JP2005012016A - Semiconductor device and manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device formed with a barrier metal film with a uniform film thickness capable of suppressing occurrence of the diffusion and decreasing the resistance, and to provide a manufacturing method of the semiconductor device. <P>SOLUTION: A second metal or a compound including the second metal is emitted onto a substrate on the surface of which a conductive film including a first metal and an insulation film coexist under the condition that chemical adsorption of the second metal or the compound is not saturated. Under this condition the second metal or the compound including the second metal is much adsorbed onto the insulation film and less adsorbed onto the conductive film. In this state, a material with reducibility is emitted onto the substrate. The barrier metal film is formed by repeating metal emission and emission of the material with the reducibility for a prescribed number of times. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. More specifically, the present invention relates to a semiconductor device having a thin film made of a material containing a metal and a method for manufacturing the same.
[0002]
[Prior art]
In recent years, with the demand for increasing the speed of semiconductor devices, there is an increasing need to reduce the switching delay of transistors. For this reason, as a wiring material, the material which has Cu as a main component with a small specific resistance compared with Al etc. which are the conventional wiring materials is used.
[0003]
However, Cu is more resistant to Si and SiO than conventional Al. ₂ Therefore, the device characteristics may be deteriorated. Moreover, since Cu has poor adhesion to the insulating film, it leads to deterioration of workability. In addition, unlike the case of Al, a passive oxide film is not formed on the Cu surface, so that the oxidation proceeds to the inside and may deteriorate the wiring characteristics.
[0004]
Therefore, in order to prevent these disadvantages, when Cu is used as a wiring material, a barrier metal is generally formed at the interface between Cu and the wiring interlayer film. Ta and TaN are often used as the barrier metal.
[0005]
For example, when forming a via plug, a thin film such as TaN is formed as a barrier metal on the inner wall of the via hole formed in the insulating film, and then Cu is embedded on the TaN film in the via hole. Here, as one of methods for forming a thin film such as TaN, a sputtering method is used. Specifically, when a TaN film is formed by sputtering, N ₂ In an atmosphere and in a high vacuum, Ar ions are irradiated onto a target of a metal plate made of Ta, and metal particles sputtered from the metal plate by Ar ions are deposited on the substrate.
[0006]
However, a thin film formed by sputtering is poor in step coverage. That is, when a thin film is formed in a high aspect ratio hole by sputtering, the amount of deposition near the opening of the via hole increases, but the particle cannot reach a deep region, so the amount of deposition is small at the bottom of the via hole. Become. Further, the amount of deposition on the side wall portion of the via hole that is horizontal to the traveling direction of the particles is further reduced. That is, a thin film formed in a high-aspect-ratio hole by sputtering is thin in the order of the vicinity of the opening, the vicinity of the bottom, and the side wall, and the overall uniformity of the thin film is low. Specifically, in the sputtering method, it is considered that the coverage is difficult to exceed 70%.
[0007]
In general, the specific resistance of the barrier metal is higher than that of Cu. Therefore, from the viewpoint of suppressing the wiring resistance, it is desirable to make the barrier metal thin at the portion in contact with the wiring such as the Cu wiring. On the other hand, from the viewpoint of suppressing the diffusion of Cu, it is desirable that the barrier metal in the portion in contact with the insulating film is thick. Therefore, the film thickness of the thin film needs to be a necessary and sufficient film thickness in order to suppress the diffusion of Cu to the minimum necessary level even at the thinnest part of the thin film. However, when sputtering is used to secure a sufficient film thickness on the sidewall where the film thickness is the thinnest in a high aspect ratio hole, the thickness of the barrier metal is small at the bottom of the via hole in contact with the lower wiring layer. It becomes thicker than necessary, resulting in increased wiring resistance and via resistance.
[0008]
[Problems to be solved by the invention]
Therefore, it is necessary to form a uniform film by using a film forming method having a better covering property than the sputtering method, and a barrier by the CVD (Chemical Vapor Deposition) method, which has an excellent covering property. Metal deposition has been studied. However, when using the CVD method, the halide or organic compound is irradiated onto the substrate, so that the halogen element, carbon, nitrogen, etc. are mixed in the film, and the specific resistance of the formed film is reduced. May increase.
[0009]
As a countermeasure for this, a film forming method is being developed, in particular, by a method called an ALCVD (Atomic Layer Chemical Deposition) method or an ALD (Atomic Layer Deposition) method. When a TaN film is formed by this method, for example, first, a material containing Ta is supplied, adsorbed on the entire surface, and then a material containing N is supplied. As a result, Ta and N react to form a TaN film. According to this ALD method, mixing of the above-described halogen elements can be suppressed, and the film thickness and film quality of the thin film to be formed are hardly affected by the substrate temperature, so that a uniform film is formed. Cheap.
[0010]
However, it is necessary to secure a minimum film thickness necessary for suppressing Cu diffusion in a portion in contact with the insulating film such as a hole side wall. Therefore, when the ALD method is used, a barrier metal film is formed with this minimum required film thickness uniformly even in the side wall of the hole or in the portion in contact with the lower layer wiring such as the bottom of the via hole. Become. For this reason, there is a limit in making the barrier metal thin and reducing the specific resistance in the portion in contact with the lower layer wiring such as the bottom of the hole.
[0011]
Accordingly, in order to solve the above-described problems, the present invention provides a semiconductor device having a thin film that is uniform and has a good characteristic capable of reducing the specific resistivity, and a method for forming the same.
[0012]
[Means for Solving the Problems]
Accordingly, the semiconductor device of the present invention includes a lower layer substrate on which a wiring containing the first metal is formed,
An interlayer insulating film formed on the lower substrate;
An opening formed through the insulating film and on the wiring;
A barrier metal formed along the inner wall of the opening and including a second metal;
A conductive member embedded on the barrier metal in the opening;
With
The barrier metal is
The film thickness at the bottom of the opening is thinner than the film thickness at the side wall of the opening.
[0013]
Alternatively, the semiconductor device of the present invention includes a substrate on which an insulating film and a conductive film containing a first metal coexist,
A barrier metal formed on the substrate and including a second metal;
With
The barrier metal is
The film thickness on the insulating film is larger than the film thickness on the conductive film.
[0014]
In the method for manufacturing a semiconductor device of the present invention, the second metal or the compound containing the second metal is formed on the substrate on which the conductive film containing the first metal and the insulating film coexist on the surface. A metal irradiation step of irradiating the second metal or the compound under a condition where the chemical adsorption of the compound is not saturated;
A reducing material irradiation step of irradiating the substrate with a reducing material; and
With
The metal irradiation step and the reducing material irradiation step are repeated a predetermined number of times.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and the description thereof is omitted or simplified.
[0016]
Embodiment 1 FIG.
1 is a schematic sectional view for illustrating a semiconductor device according to a first embodiment of the present invention.
As shown in FIG. 1, Cu wiring 104 is formed on the lower layer substrate 102. A low dielectric constant film 106 is formed on the Cu wiring 104 and the surface of the lower substrate 102. The low dielectric constant film 106 is made of, for example, SiO. ₂ It is comprised by the film | membrane etc. A via hole 108 extending from the surface to the Cu wiring 104 is formed in the low dielectric constant film 106.
[0017]
A via plug 110 connected to the Cu wiring 104 is formed at the bottom of the via hole 108. The via plug 110 includes a TaN film 112 formed as a barrier metal along the inner wall of the via hole 108 and Cu 114 embedded in the via hole 108 on the TaN film 112.
[0018]
In the via plug 110 configured as described above, the thickness of the TaN film 112 formed on the bottom of the via hole 108 is 70% or less of the thickness of the TaN film 112 formed on the side wall of the via hole 108. Further, the coverage of the TaN film 112 is, for example, 70% or more.
[0019]
In this embodiment, the TaN film 112 is formed using a method similar to the conventional ALD method. In a general ALD method, first, a material 1 containing an element A (for example, Ta in the case of forming a TaN film) is supplied onto a substrate on which a via hole is formed, and adsorbed on one surface. Next, the reaction is performed with the supplied raw material 2 to form a compound containing the element A.
[0020]
FIG. 2 is a graph for explaining the relationship between the temperature of the substrate and the film thickness to be formed when a barrier metal is formed using such a method. In FIG. 2, the vertical axis represents the film thickness, and the horizontal axis represents the substrate temperature. A dotted line indicates a case where a barrier metal is formed on a conductive material, and a solid line indicates a case where a barrier metal is formed on an insulating material.
[0021]
As shown in FIG. 2, whether the barrier metal is formed on a conductive material or the barrier metal is formed on an insulating material, the film thickness formed when the substrate temperature is A or less is It increases monotonously with the substrate temperature. This is considered to be because in the state of temperature A or lower, the amount of chemical adsorption of element A on the surface gradually increases as the temperature increases, and the film thickness increases as the amount of chemical adsorption increases. .
[0022]
In the state of temperature B or higher, the thickness of the barrier metal formed monotonously increases both on the insulating film and on the conductive film. This is presumably because the amount of thermal decomposition reaction on the substrate or in the gas phase increases as the temperature rises, so that the formed film thickness also increases.
[0023]
And between the temperature A and the temperature B, the film thickness of the barrier metal formed on the insulating film and the conductive film is substantially constant. This is presumably because the amount of chemical adsorption reaches a saturated state and the temperature at which the thermal decomposition reaction hardly occurs. A normal ALD method is performed in this temperature region.
[0024]
By the way, as shown in FIG. 2, when the temperature is A or lower, the amount of film formation on the conductive film is different from the amount of film formation on the insulating film, and the amount of film formation on the insulating film is larger. . That is, when the film is formed at a certain temperature lower than the temperature A, a barrier metal thicker than the conductive film can be formed on the insulating film.
[0025]
This is because, on the insulating film, the raw material molecules form a dipole, and an electric interaction is generated with the charge induced on the substrate, so that chemisorption easily occurs. It can be considered that no such interaction occurs and chemical adsorption is less likely to occur than on an insulating substrate.
[0026]
In Embodiment Mode 1, a thin film is formed over the conductive film and a thick film is formed over the insulating film by using the difference in film formation amount at the temperature A or lower. This will be specifically described below.
[0027]
FIG. 3 is a flowchart for illustrating a method of manufacturing a semiconductor device described in the embodiment of the present invention. 4 to 6 are schematic cross-sectional views for explaining states in each manufacturing process of the semiconductor device.
[0028]
First, as shown in FIG. 4, a low dielectric constant film 106 is formed on the lower substrate 102 on which the Cu wiring 104 is formed (step S <b> 102), and an opening is formed in the low dielectric constant film 106 on the Cu wiring 104. The via hole 108 to be formed is formed (step S104). Here, after a resist mask is formed, etching may be performed using the resist mask as a mask.
[0029]
In this way, the lower substrate 102 (hereinafter referred to as “substrate”) in which the low dielectric constant film 106 having the via hole 108 is formed is heated to maintain the substrate temperature at 100 to 250 ° C. (step S106).
[0030]
Next, as shown in FIG. 5, pentadimethylamino tantalum (Ta [N (CH ₃ ) ₂ ] ₅ ) 120 and Ar are irradiated onto the substrate (step S108). As a result, Ta and N (CH ₂ ) ₃ Is chemically adsorbed on the surface of the low dielectric constant film 106 of the lower substrate 102 and the inner wall of the via hole 108. Note that here, pentadimethylamino tantalum (Ta [N (CH ₃ ) ₂ ] ₅ ) 120 is heated to about 60 ° C to 100 ° C. Further, as described above, the substrate temperature is maintained at about 100 ° C. to 250 ° C., but this temperature is in a range where the amount of chemical adsorption is not saturated, and is within the range of temperature A or less shown in FIG. It corresponds to.
[0031]
Next, only Ar is irradiated (step S110). As a result, the pentadimethylamino tantalum (Ta [N (CH ₃ ) ₂ ] ₅ ) 120 is removed.
[0032]
Next, as shown in FIG. ₃ ) 122 is supplied (step S112). Thereby, a TaN film 112 is formed along the surface of the substrate.
[0033]
Next, only Ar is irradiated (step S114). As a result, ammonia (NH) remained without reacting on the substrate. ₃ ) 122 is removed.
[0034]
As described above, pentadimethylamino tantalum (Ta [N (CH ₃ ) ₂ ] ₅ ) 120 and Ar irradiation, Ar irradiation, ammonia (NH ₃ ) 122 irradiation and Ar irradiation (steps S108 to S114) are repeated, whereby the TaN film 112 is formed on the inner wall of the via hole 108 and the surface of the low dielectric constant film 106. Here, the temperature of the substrate is kept at 100 to 250 ° C. As described above, this temperature is a region below A, that is, a region where chemisorption is not saturated and thermal decomposition does not occur. Therefore, the film thickness of the TaN film 112 formed on the Cu wiring 104 exposed at the bottom of the via hole 108 is equal to the film thickness of the TaN film 112 formed on the side wall of the via hole 108 or the portion in contact with the surface of the low dielectric constant film 106. It is thinner than that. Here, the film thickness on the Cu wiring 104 is 70% or less with respect to the film thickness of the sidewall portion of the via hole 108.
[0035]
Thereafter, Cu 114 is buried in the via hole 108 by the damascene method (step S116), and further planarized by CMP until the surface of the low dielectric constant film 106 is exposed (step S118). As a result, as shown in FIG. 1, via plugs 110 are formed in the via holes 108 of the low dielectric constant film 106.
[0036]
After that, if necessary, an interlayer insulating film, wiring, or the like can be formed on the upper layer to form a semiconductor device.
[0037]
In this way, the film thickness at the bottom of the via hole 108 of the TaN film 112, which is a barrier metal, can be formed thinner than the side wall. Therefore, a thick barrier metal film can be formed on the sidewall of the via hole 108 in contact with the low dielectric constant film 106, while a thin barrier metal film can be formed on the bottom of the via hole 108 in contact with the Cu wiring 104. . Therefore, the diffusion of Cu 114 can be sufficiently suppressed by the thick barrier metal at the portion in contact with the low dielectric constant film 106, while the via resistance is reduced at the bottom of the via hole 108 in contact with the Cu wiring 104. be able to. Therefore, a semiconductor device with good device characteristics can be obtained.
[0038]
In addition, according to this method, a uniform film thickness can be formed in each of the bottom portion of the via hole 108 and the side wall portion of the via hole 108 as compared with the case where the sputtering method is used. Therefore, a wide margin of film thickness can be taken. In this method, barrier metals having different film thicknesses can be formed only by changing the film forming temperature in the conventional ALD method. Therefore, a conventional apparatus can be effectively used, and the barrier metal film can be formed easily and economically.
[0039]
In the first embodiment, the low dielectric constant film 106 is made of SiO. ₂ The case of using is described. However, the present invention is not limited to this, and the low dielectric constant film 106 may be another film. As the low dielectric constant film, preferably SiO ₂ It is preferable to use a material having a dielectric constant lower than that of the film.
[0040]
In the first embodiment, the substrate temperature is kept at about 100 ° C. to 250 ° C. Pentadimethylamino tantalum (Ta [N (CH ₃ ) ₂ ] ₅ ) 120 is used, the temperature A described with reference to FIG. Therefore, the substrate temperature range during film formation described in the first embodiment is determined in consideration of this temperature A (about 250 ° C.) and the film thickness of the TaN film 112 formed in proportion to the temperature. This is a more preferable range. However, in the present invention, the substrate temperature at the time of film formation is not necessarily limited to 100 ° C. to 250 ° C. If the temperature is equal to or lower than the temperature A (about 250 ° C.), the substrate temperature may be outside this range. Good.
[0041]
In the first embodiment, in order to form the TaN film 112, pentadimethylamino tantalum (Ta [N (CH ₃ ) ₂ ] ₅ ) 120 has been described. However, the present invention is not limited to this. For example, terbutylimide trisdimethylamido tantalium ([(C ₂ H ₅ ) ₂ N] ₃ TaN (C ₄ H ₉ )), Pentadiethylamino tantalum (Ta [N (C ₂ H ₅ ) ₂ ] ₅ ), Tantalum pentafluoride (TaF) ₅ ), Tantalum pentachloride (TaCl5), tantalum pentabromide (TaBr) ₅ ), Etc. may be used. Also in this case, as described above, the substrate temperature during film formation is preferably about 100 ° C. to 250 ° C.
[0042]
In the first embodiment, the case where the TaN film 112 is formed has been described. However, in the present invention, the barrier metal is not limited to the TaN film, and may be, for example, a TiN film. In this case, pentadimethylamino tantalum (Ta [N (CH ₃ ) ₂ ] ₅ ), For example, tetrakisdiethylaminotitanium (Ti [N (C ₂ H ₅ ) ₂ ] ₄ ) And titanium pentachloride (TiCl ₅ ), Titanium pentabromide (TiBr) ₅ Or the like, a raw material containing Ti as the element A may be used. Also in this case, the substrate temperature at the time of barrier metal film formation may be about 100 ° C. to 250 ° C.
[0043]
The present invention can also be applied when forming a ZrN film. In this case, pentadimethylamino tantalum (Ta [N (CH ₃ ) ₂ ] ₅ ), For example, tetrakisdiethylaminozirconium (Zr [N (C ₂ H ₅ ) ₂ ] ₄ ) And tetrakisdimethylaminozirconium (Zr [N (CH ₃ ) ₂ ] ₄ ) May be used. Also in this case, the substrate temperature at the time of barrier metal film formation may be about 100 ° C. to 250 ° C.
[0044]
Furthermore, the present invention can also be applied when forming a WN film. In this case, pentadimethylamino tantalum (Ta [N (CH ₃ ) ₂ ] ₅ ), Tungsten hexafluoride (WF) ₆ Or tungsten hexachloride (WCl) ₆ Or the like, a material containing W as the element A may be used. Also in this case, the substrate temperature at the time of barrier metal film formation may be about 100 ° C. to 250 ° C.
[0045]
In addition, as a reducing material, ammonia (NH ₃ ) Has been described. However, this invention is not limited to ammonia (NH ₃ ) Is not limited to the case of using, for example, hydrazine (N ₂ H ₄ ), Etc., and other reducing materials may be used.
[0046]
In this embodiment, the low dielectric constant film (SiO 2) on the Cu film 104 at the bottom of the via hole 108 and on the side wall of the via hole 108 is used. ₂ ) 106, the case where the TaN films 112 having different thicknesses are formed has been described. However, the present invention is not limited to this. Even if the present invention is applied to a combination of another insulating material and another conductive material, the conductive material exposed at the bottom of the via hole is similarly applied. Since the film thickness can be reduced, the same effect can be obtained.
[0047]
In the first embodiment, the Cu wiring 104 corresponds to the first metal of the present invention, and the low dielectric constant film 206 corresponds to the interlayer insulating film of the present invention. The via hole 108 corresponds to the opening of the present invention, and the TaN film 112 corresponds to the barrier metal of the present invention. Cu114 corresponds to a conductive member.
[0048]
In addition, pentadimethylamino tantalum (Ta [N (CH ₃ ) ₂ ] ₅ ) 120 corresponds to the compound containing the second metal of the present invention, and ammonia (NH ₃ ) Corresponds to a reducing material.
[0049]
Moreover, in this embodiment, the metal irradiation process of this invention is performed by performing step S108, and the reducing material irradiation process of this invention is performed by performing step S112.
[0050]
Embodiment 2. FIG.
FIG. 9 shows a Cu film 204 and SiO 2 in Embodiment 2 of the present invention. ₂ It is a cross-sectional schematic diagram for demonstrating the state which formed TaN film | membrane 208,210 on the board | substrate 202 with which the film | membrane 206 is mixed.
In the second embodiment, as in the first embodiment, the Cu wiring 104 and the low dielectric constant film (SiO 2) are formed at the bottom of the via hole 108 and the sidewall of the via hole 108, respectively. ₂ ) 106 is not exposed, but on the surface of the same substrate 202, Cu film 204 and SiO ₂ The film 206 is mixed. The TaN film 208 on the Cu film 204 is made of SiO. ₂ The film thickness is smaller than that of the TaN film 210 on the film 206. That is, on the Cu film 204, the TaN film 208 is thin in order to reduce the resistance between the wirings. On the other hand, the TaN film 210 generally prevents diffusion from the metal wiring formed in the upper layer. The film thickness is thick. Further, the thickness of the TaN film 208 is about 70% or less of the thickness of the TaN film 210.
[0051]
Also in the second embodiment, the TaN films 208 and 210 are formed using a method similar to the conventional ALD method described in the first embodiment. Further, the substrate temperature during film formation is kept at a temperature A or lower as in the first embodiment, and the film thickness of the TaN film formed under this temperature is between the conductive material and the insulating material. It uses different things to form.
[0052]
FIG. 10 is a flowchart for explaining a method of forming TaN films 208 and 210 in the second embodiment of the present invention. FIGS. 11 to 13 are schematic cross-sectional views for explaining the states in the respective steps of forming the TaN films 208 and 210. FIG.
[0053]
First, as shown in FIG. 11, a Cu film 204 and SiO 2 are formed on a substrate 202 as necessary. ₂ A film 206 is formed. Thereafter, the substrate is heated to about 100 to 250 ° C. (step S202).
[0054]
Next, as shown in FIG. 12, tetrakisdimethylaminotitanium (Ti [N (CH ₃ ) ₂ ] ₄ 220 and N ₂ Are irradiated (step S204). As a result, Ti and NH ₃ Is adsorbed on the substrate 202. The amount of adsorption at this time is as follows: ₂ Unlike the case on the film 206, the amount of adsorption on the Cu film 204 is SiO 2. ₂ Less than on the membrane 206.
[0055]
Next, N ₂ Is irradiated (step S206). Thereby, tetrakisdimethylaminotitanium (Ti [N (CH ₃ ) ₂ ] ₄ ) 220 is removed.
[0056]
Next, as shown in FIG. ₃ ) And N ₂ Are irradiated (step S208). Thereby, a TiN film is formed by reacting with Ti previously adsorbed on the substrate 202. Here, since the amount of adsorption of Ti is smaller on the Cu film 204, the TiN film on the Cu film 204 is thinner than the TiN film on the SiO 2 film.
[0057]
Then N ₂ Is irradiated (step S210). As a result, ammonia (NH) remaining on the substrate 202 is removed. ₃ ) Is removed.
[0058]
As described above, tetrakisdimethylaminotitanium (Ti [N (CH ₃ ) ₂ ] ₄ 220 and N ₂ Irradiation (step S204), N ₂ Irradiation (step S206), ammonia (NH ₃ ) And N ₂ Irradiation (step S208), N ₂ By repeating this irradiation (step S210), TiN films 208 and 210 are formed on the substrate 202.
[0059]
If it carries out as mentioned above, Cu film 204 which is an electroconductive substance, and SiO which is an insulating film ₂ TiN films 208 and 210 having different thicknesses can be formed on the substrate 202 mixed with the film 206, respectively. In general, the TiN film 208 in contact with the conductive material needs to be formed thin in order to reduce the resistance, and in the portion in contact with the insulating film, it is necessary to increase the film thickness in order to prevent diffusion as a barrier metal. . According to the second embodiment, TiN films having different required film thicknesses can be easily formed according to the lower layer film.
[0060]
Note that in Embodiment Mode 2, tetrakisdimethylaminotitanium (Ti [N (CH ₃ ) ₂ ] ₄ ) 220 has been described. However, the present invention is not limited to this. For example, tetrakisdiethylaminotitanium (Ti [N (C ₂ H ₅ ) ₂ ] ₄ ) And titanium pentachloride (TiCl ₅ ), Titanium pentabromide (TiBr) ₅ ) Etc. may be used.
[0061]
In the second embodiment, the case where the TiN film is formed has been described. However, the present invention is not limited to this, and can be applied to, for example, forming a TaN film, a ZrN film, a WN film, or the like. In this case, as described in Embodiment Mode 1, tetrakisdimethylaminotitanium (Ti [N (CH ₃ ) ₂ ] ₄ ) May be irradiated with a material containing Ta, Zr, and W, respectively, as the element A.
Since other parts are the same as those of the first embodiment, the description thereof is omitted.
[0062]
In the second embodiment, the Cu film 204 corresponds to the first metal of the present invention, and SiO 2 ₂ The film 206 corresponds to the insulating film of the present invention. The TaN films 208 and 210 correspond to the barrier metal of the present invention.
[0063]
In addition, tetrakisdimethylaminotitanium (Ti [N (CH ₃ ) ₂ ] ₄ ) 220 corresponds to the compound containing the second metal of the present invention, and ammonia (NH ₃ ) Corresponds to a reducing material.
[0064]
Moreover, in this embodiment, the metal irradiation process of this invention is performed by performing step S204, and the reducing material irradiation process of this invention is performed by performing step S208.
[0065]
【The invention's effect】
As described above, according to the present invention, when the substrate temperature during film formation is equal to or lower than a certain temperature, the amount of film formation is different between the insulating material and the conductive material, A relatively thick barrier metal film can be formed on the insulating material, and a relatively thin barrier metal film can be formed on the conductive film. Accordingly, a sufficient film thickness can be secured on an insulating material that needs to be prevented from being diffused, and a resistance can be reduced by reducing the film thickness on a conductive material.
[Brief description of the drawings]
FIG. 1 is another schematic cross-sectional view illustrating a semiconductor device according to a first embodiment of the present invention.
FIG. 2 is a graph illustrating a relationship between a substrate temperature and a film thickness when forming a barrier metal.
FIG. 3 is a flowchart for illustrating the method for manufacturing the semiconductor device in the first embodiment of the present invention.
4 is a schematic cross-sectional view for illustrating a state in each manufacturing process of the semiconductor device according to the first embodiment of the present invention. FIG.
FIG. 5 is a schematic cross sectional view for illustrating a state in each manufacturing step of the semiconductor device in the first embodiment of the present invention.
FIG. 6 is a schematic cross-sectional view for illustrating the state in each manufacturing process of the semiconductor device according to the first embodiment of the present invention.
FIG. 7 is a schematic cross sectional view for illustrating the state in each manufacturing process of the semiconductor device according to the first embodiment of the present invention.
FIG. 8 is a schematic cross sectional view for illustrating a state in each manufacturing step of the semiconductor device in the first embodiment of the present invention.
FIG. 9 is a schematic cross-sectional view for explaining a state in which a barrier metal is formed on a substrate in which a conductive material and an insulating material are mixed in Embodiment 2 of the present invention.
FIG. 10 is a flowchart for explaining a barrier metal forming method according to Embodiment 2 of the present invention;
FIG. 11 is a schematic cross-sectional view for explaining the state of each process of barrier metal film formation in Embodiment 2 of the present invention.
FIG. 12 is a schematic cross-sectional view for explaining the state of each process of barrier metal film formation in Embodiment 2 of the present invention.
FIG. 13 is a schematic cross-sectional view for explaining the state of each process of barrier metal film formation in Embodiment 2 of the present invention.
[Explanation of symbols]
102 Lower layer substrate
104 Cu wiring
106 Low dielectric constant film
108 Beer Hall
110 Via plug
112 TaN film
114 Cu
120 pentadimethylamino tantalum (Ta [N (CH ₃ ) ₂ ] ₅ )
122 Ammonia (NH ₃ )
202 substrate
204 Cu film
206 SiO ₂ film
208 TaN film
210 TaN film
220 Tetrakisdimethylaminotitanium (Ti [N (CH ₃ ) ₂ ] ₄ )
222 Ammonia (NH ₃ )

Claims (11)

A lower layer substrate on which wiring including the first metal is formed;
An interlayer insulating film formed on the lower substrate;
An opening formed through the insulating film and on the wiring;
A barrier metal formed along the inner wall of the opening and including a second metal;
A conductive member embedded on the barrier metal in the opening;
With
The barrier metal is
A semiconductor device characterized in that a film thickness at a bottom portion of the opening is thinner than a film thickness at a side wall of the opening. 2. The semiconductor device according to claim 1, wherein a film thickness of the barrier metal at the bottom is equal to or less than 70% of a film thickness of the barrier metal at the opening side wall. A substrate in which an insulating film and a conductive film containing a first metal coexist on the surface;
A barrier metal formed on the substrate and including a second metal;
With
The barrier metal is
A semiconductor device characterized in that a film thickness on the insulating film is larger than a film thickness on the conductive film. 4. The semiconductor device according to claim 3, wherein the thickness of the barrier metal on the conductive film is 70% or less of the thickness of the barrier metal on the insulating film. On the substrate on which the conductive film containing the first metal and the insulating film coexist on the surface, the second metal or the compound containing the second metal is added to the second metal or the compound. A metal irradiation process for irradiating under conditions where chemisorption is not saturated;
A reducing material irradiation step of irradiating the substrate with a reducing material; and
With
A method of manufacturing a semiconductor device, wherein the metal irradiation step and the reducing material irradiation step are repeated a predetermined number of times. The substrate includes a lower layer substrate on which wiring including a first metal is formed, an interlayer insulating film formed on the lower layer substrate, an opening penetrating the interlayer insulating film and opening on the wiring,
The insulating film is a portion of the interlayer insulating film exposed to the opening side wall portion,
6. The method of manufacturing a semiconductor device according to claim 5, wherein the conductive film is a portion of the wiring exposed at the bottom of the opening. The method of manufacturing a semiconductor device according to claim 5, wherein the first metal is Cu. The method of manufacturing a semiconductor device according to claim 5, wherein the metal irradiation step is performed using Ti, Zr, Ta, or W. The metal irradiation step includes tetrakisdimethylaminotitanium, tetrakisdiethylaminotitanium, titanium pentachloride, titanium pentabromide, tetrakisdiethylaminozirconium, tetrakisdimethylaminozirconium, pentadimethylaminotanthalium, pentadiethylaminotanthalium, terbutylimidotrisdimethylamide It is performed using any one of tantalum, tantalum pentafluoride, tantalum pentachloride, tantalum pentabromide, tungsten hexafluoride, or tungsten hexachloride. The manufacturing method of the semiconductor device of description. The method for manufacturing a semiconductor device according to claim 5, wherein the reducing material irradiation step is performed using ammonia or hydrazine. The compound is pentadimethylamino tantalum,
The method of manufacturing a semiconductor device according to claim 5, wherein the metal irradiation step is performed at a temperature of the substrate of 150 ° C. to 250 ° C.

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