JP2005005564A - Pad structure - Google Patents

Abstract

An object of the present invention is to provide a pad structure that improves the crack resistance against an impact received by a pad during bonding in a semiconductor assembly process and further prevents pad peeling caused by a tensile force applied by a bonding method. .
A metal layer 1 formed of a metal material, a metal layer 4 that is overlapped with the metal layer 1 and the insulating layer 8 interposed therebetween, and is connected by a via 3 that penetrates the metal layer 1 and the insulating layer 8, and a metal layer 4 and the insulating layer 8 are sandwiched between the metal layer 6 and the metal layer 6 connected by the via 5 penetrating the insulating layer 8, and the metal layer 6 and the insulating layer 8 are sandwiched between the overlapping metal layer 6 and the insulating layer 8. The uppermost metal layer 10 connected by the penetrating via 7 and the external terminal 13 overlapping the uppermost metal layer 10 are provided, and the periphery of each of the metal layers 1, 4, 6, 10 and the external terminal 13 is the insulating layer 9. 11 and 14, and the outer dimensions of the metal layer are metal layer 1> metal layer 4> metal layer 6.
[Selection] Figure 1

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention mainly relates to a pad structure of a semiconductor device.
[0002]
[Prior art]
In recent years, with the spread of information technology, there is an increasing demand for speeding up as electronic devices such as computers and mobile phones. Accordingly, higher speed is inevitably required as the performance of semiconductors represented by system LSI, which greatly affects the performance of electronic devices. However, what greatly hinders the speeding up of the semiconductor are the delay of the MOS transistor itself and the wiring delay due to the wiring itself and the parasitic capacitance between the wirings. Conventionally, the delay of the MOS transistor itself has been reduced by a miniaturization technique for shortening the gate length. However, as the delay of the MOS transistor itself due to the development of miniaturization technology becomes smaller, the problem of wiring delay has surfaced. Therefore, in order to reduce the delay between wirings, an attempt is made to solve the problem of reducing the wiring delay by adopting an insulating film having a low dielectric constant (low dielectric constant film) as an insulating film sandwiched between the wirings.
[0003]
However, a low dielectric constant film that realizes a dielectric constant of 3.0 or less has a mechanical strength significantly lower than that of a silicon oxide film that has been conventionally employed. This is a problem in the assembly process, particularly the wire bonding process, which is responsible for packaging the semiconductor, after the diffusion process responsible for forming the semiconductor circuit is completed. Specifically, this is as follows. Since the mechanical strength of the interlayer insulating film is not sufficient, when wire bonding is performed on a pad mounted on a semiconductor, the impact load of the wire bond is transmitted through the pad to the interlayer insulating film directly under the pad, which greatly increases the interlayer insulating film. Deform. The deformation causes a crack in the interlayer insulating film and greatly affects the quality reliability of the semiconductor element itself.
[0004]
Therefore, conventionally, as shown in FIG. 7, a metal 20 is formed directly below the pad 13 with the interlayer insulating film 8 interposed therebetween, and the metal 20 and the pad 13 are connected by the connection plug 7, thereby bonding to the interlayer insulating film 8 by bonding. The metal 20 receives the applied impact, and the connection plug 7 supports the metal 20 attempting to deform in the direction in which the impact is applied due to the impact, and the mechanical properties of the interlayer insulating film 8 formed immediately below the pad 13. Some are trying to improve strength (for example, Patent Document 1). As a result, damage such as deformation of the interlayer insulating film 8 due to an impact transmitted by bonding is reduced. Reference numeral 11 denotes a first protective film.
[0005]
On the other hand, as shown in FIG. 8, by providing a stress relaxation material 19 on the interlayer insulating film 8, the stress is relaxed immediately below the pad by wire bonding, and an impact transmitted to the interlayer insulating film 8 formed immediately below the pad is applied. By suppressing, the damage by bonding is suppressed (for example, patent document 2).
[0006]
[Patent Document 1]
JP 2000-114309 A [Patent Document 2]
Japanese Patent Application Laid-Open No. 01-22039 Description
[Problems to be solved by the invention]
However, the above pad structure has the following problems. First, a problem with the pad structure of FIG. 7 will be described. When the metal 20 has a large area and a damascene process is used to form the metal, the central portion of the metal 20 is greatly cut by mechanical chemical polishing (hereinafter abbreviated as CMP), and the film thickness becomes very thin. This is called dishing. Although the metal 20 has three layers in the pad structure, dishing becomes a more serious problem because the thickness of the metal 20 is reduced in order to realize fine via processing in the lower layer. When the metal at the center of the metal becomes thinner, the impact of bonding received on the interlayer insulating film 8 becomes larger and the possibility of damage occurring increases. Because of this dishing, it is desirable that the metal 20 below the uppermost metal has a smaller metal area than the pad 13.
[0008]
In addition, there are mainly wire bonding method and stud bump bonding (hereinafter abbreviated as SBB method) as the bonding method in the assembly process in semiconductor manufacturing. In the wire bonding method, an Au ball is applied to a pad 13 mounted on a semiconductor element while applying an ultrasonic wave to the pad 13 for pressure bonding, and then the Au wire is guided to a connection terminal of the interposer by a capillary. At this time, the tensile force from the wire is applied to the Au ball joined to the pad 13, whereby the tensile force is also applied to the pad 13. Also in the SBB method, Au balls are first bonded to the pads 13 mounted on the semiconductor element. This is the same as the wire bonding method described above, and a load and an ultrasonic wave are applied to bond the Au ball to the pad 13. Thereafter, the wire is gripped by a clamper attached to the bonding equipment, and the Au ball bonded to the pad 13 and the wire are separated. At this time, a tensile force is applied to the Au ball, and as a result, a tensile force is also applied to the pad 13.
[0009]
As described above, in the mainstream bonding method, a tensile force is applied to the pad 13, and at the same time, a tensile force is applied to the interlayer insulating film 8 and the metal 20 by the tensile force applied to the pad 13. At this time, since the mechanical strength at the boundary between the metal 20 and the interlayer insulating film 8 is weak, when a crack is generated by bonding at the boundary between any of the metals 20 and the interlayer insulating film 8, the tensile force due to the bonding described above is applied. Accelerates crack propagation. At this time, since the boundary between the metal 20 of the entire layer and the layer of the interlayer insulating film 8 is aligned, the boundary between the upper and lower layers of the metal and the interlayer insulating film is also affected and cracks are generated, resulting in pad peeling. Become.
[0010]
The problem of FIG. 8 is that the number of process steps is increased and the diffusion period is longer than that of the conventional process by forming the stress relaxation material 19 into a film. In addition, the cost increases, and there is a major problem in the demand for shortening the diffusion period and reducing the cost.
[0011]
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-described conventional problems and to provide a pad structure that does not cause pad peeling that occurs due to a crack at the boundary between a metal and an interlayer insulating film due to bonding.
[0012]
[Means for Solving the Problems]
The pad structure according to claim 1, wherein the first metal layer formed of a metal material, and the first metal layer and the first insulating layer are sandwiched so as to penetrate the first metal layer and the first insulating layer. A second metal layer connected by the first connection plug, and a second metal layer that overlaps with the second metal layer and the second insulating layer interposed therebetween and penetrates the second metal layer and the second insulating layer. The third metal layer connected by the connection plug, and the third metal layer and the third insulating layer are sandwiched between the third metal layer and the third insulating layer so as to pass through the third connection plug. Each of the first metal layer, the second metal layer, the third metal layer, the uppermost metal layer, and the external terminal The outer dimensions of the first metal layer, the second metal layer, and the third metal layer are different, surrounded by the insulating layer. It is an butterfly.
[0013]
According to the pad structure of claim 1, the pad peeling due to the tensile force by the bonding method is such that the boundary between the interlayer insulating film and the metal having low mechanical strength is aligned in the vertical direction, and the tensile force is It occurs by acting as a normal force on the part where the boundary with the metal is aligned in the vertical direction. The boundary between the interlayer insulating film and the metal is a portion where cracks are likely to occur. Therefore, for the problem of pad peeling due to the tensile force applied to the pad by the bonding method, by making the dimensions of the metal composing the pad the same, the tensile force is aligned in the vertical direction between the metal and the interlayer insulating film. This can be solved by preventing the tensile force from acting as a normal force. Therefore, a pad structure that does not cause pad peeling due to bonding is provided.
[0014]
Further, in order to suppress the diffusion period and reduce the cost, it is not necessary to add a process peculiar to the pad structure of the present invention, so that the diffusion period similar to the conventional one can be maintained and the cost does not increase.
[0015]
According to a second aspect of the present invention, there is provided a pad structure according to the first aspect, wherein the first connecting plug, the second connecting plug, and the third connecting plug are vertically arranged in a zigzag manner.
[0016]
According to the pad structure of the second aspect, in addition to the same effect as that of the first aspect, in the connection plug for connecting the metals, since there is a boundary between the connection plug and the interlayer insulating film, each layer is zigzag vertically. By arranging the connection plugs in the layer, it is possible to avoid aligning the layer boundaries in the vertical direction.
[0017]
According to a third aspect of the present invention, there is provided a pad structure according to the first or second aspect, wherein the outer dimensions of the first metal layer, the second metal layer, and the third metal layer are sequentially reduced, and the third metal layer Is formed in a flat plate, and the first metal layer and the second metal layer are formed by forming a mesh-like hole in the center.
[0018]
According to the pad structure of the third aspect, the metal area is reduced in order to suppress dishing of the thinned metal layer by CMP. However, the metal one layer below the top layer metal is flat. By using a flat plate, a connection plug that is one layer lower than the uppermost metal layer is provided to obtain higher mechanical strength against the impact of bonding. In addition, since the metal that is one layer below the uppermost metal layer is relatively strongly subjected to ultrasonic waves applied in bonding, the metal and the interlayer insulating film in the metal that is easily damaged by ultrasonic waves are reduced. In addition, the metal below the uppermost metal layer is a flat plate. Further, in order to reduce the metal area of the lower layer metal, it is effective to remove the metal in order to reduce the metal area at the center of the metal.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of the pad structure of the present invention will be described with reference to the drawings.
[0020]
In FIG. 1, reference numeral 1 denotes a lower first metal layer, 2 denotes a first barrier metal of the first metal layer 1, and 3 connects the first metal layer 1 and the second metal layer 4 thereon. First via 4 is a second metal layer one layer above first metal layer 1, 5 is a second via that connects second metal layer 4 and third metal layer 6 thereon, 6 is a third metal layer one layer above the second metal layer 4, 7 is a third via connecting the third metal layer 6 and the uppermost metal layer 10, 8 is the first via 3, and 2, a first interlayer insulating film covering the periphery of the via 5 and the third via 7 and sandwiched between the metal layers 1, 4, 6, 10, 9 is the first metal layer 1, the second metal layer 4. Second interlayer insulating film covering the periphery of the third metal layer 6 and the uppermost metal layer 10, 10 is the uppermost metal layer, and 11 is formed on the periphery of the uppermost metal layer 10. A first protective film that overlaps the uppermost metal layer 10 by 2 μm, 12 a second barrier metal film formed on the uppermost metal layer 10, 13 an external terminal, and 14 a periphery of the external terminal 13 A second protective film formed on the part and overlapping with the external terminal 13 by 2 to 3 μm is shown.
[0021]
As shown in FIG. 1, the pad structure according to the embodiment of the present invention includes a first metal layer 1 in which a metal at the center of a metal layer is extracted in a mesh shape like a first pattern 15 and a second pattern 16. The second metal layer 4, the flat third metal layer 6, and the uppermost metal layer 10 are stacked with the first interlayer insulating film 8 sandwiched between the metals. A second interlayer insulating film 9 is formed around the first metal layer 1, the second metal layer 4, the third metal layer 6, and the uppermost metal layer 10. The first via as a plug connecting the first metal layer 1 and the second metal layer 4, the second metal layer 4 and the third metal layer 6, and the third metal layer 6 and the uppermost metal 10. 13, the second via 5 and the third via 7 are mounted. A first barrier metal 2 is formed around the first metal layer 1, the second metal layer 4, the third metal layer 6, and the uppermost metal 10 except for the upper surface, and the metal diffuses into the interlayer insulating film. And at the same time improving the adhesion to the interlayer insulating film. On top of the uppermost layer metal 10, a second barrier metal 12 for improving the adhesion between the external terminal 13 and the uppermost layer metal 10 and a first for ensuring quality reliability regardless of the influence of the external environment. A protective film 11 is formed.
[0022]
As described above, the third metal layer 6 is a flat plate, but its size is shortened, and the metal at the center of the first metal layer 1 and the second metal layer 4 is extracted in a mesh shape to reduce the metal area. As a result, the dishing due to CMP does not occur, and as a result, the metal film thickness within the standard is secured, and the damage resistance against bonding is secured. The reason why the third metal is a flat plate is to shorten the boundary between the metal having low strength and the interlayer insulating film because the impact during bonding is relatively large. Furthermore, by designing the dimensions of the first metal layer 1, the second metal layer 4, and the third metal 6 so that the first metal layer 1> the second metal layer 4> the third metal layer 6, By eliminating the vertical overlap between the metal and the interlayer insulation film, which is weak to the tensile force of the bonding method, pad peeling caused by the crack at the boundary between the metal and the interlayer insulation film generated by the bonding method is eliminated. can be solved.
[0023]
Therefore, according to the first embodiment, it is possible to realize damage-free damage of the insulating interlayer film and prevention of peeling of the external terminals from the insulating interlayer film, particularly just under the bonding by the semiconductor assembly process.
[0024]
FIG. 2 is an embodiment different from FIG. 1, and in order to increase the mechanical strength of the pad structure of FIG. 1, the first via 1, the second via 5 and the third via as shown in FIG. The vias 7 are arranged in a zigzag manner in the vertical direction. The boundary between each via and the interlayer insulating film can be eliminated in the vertical direction, and the cause of pad peeling can be eliminated.
[0025]
3 to 6 show a method for manufacturing the pad structure shown in FIGS.
[0026]
In FIG. 3A, a second interlayer insulating film 9 is formed on the first interlayer insulating film 8 by chemical vapor deposition (hereinafter abbreviated as CVD). In FIG. 3B, a groove 17 is formed in the second interlayer insulating film 9 by dry etching. In FIG. 3C, the first metal layer 1 is embedded in the groove 17 by electrolytic plating. In FIG. 3D, the first metal layer 1 buried in FIG. 3C is planarized by CMP until the second interlayer insulating film 9 is exposed. In FIG. 3E, the first interlayer insulating film 8 is again formed on the upper surface by CVD. 3F, a via groove 18 is formed in the first interlayer insulating film 8 formed in FIG. 3E by dry etching. In FIG. 3G, the first via 3 is buried in the via groove 18 by electrolytic plating, and planarization is performed by CMP until the first interlayer insulating film 8 formed in FIG. 3E is exposed. By repeating FIGS. 3C to 3G, the second metal layer 4, the third metal 6, the uppermost layer metal 10, the second via 5, and the third via 7 are sequentially formed, and FIG. a) and as shown in FIG. Next, as shown in FIG. 4C, a first protective film 11 is formed by CVD, and a portion where the uppermost metal layer 10 is present is opened by dry etching. In FIG. 5A, the second barrier metal 12 and the external terminal 13 are stacked by CVD. In FIG. 5B, the second barrier metal 12 and the external terminal 13 are formed in a pad shape by a dry etching method. 6A, the second protective film 14 is formed on the uppermost layer by CVD, and finally the portion where the external terminal 13 is present is opened by the dry etching method, as shown in FIG. 6B. The pad structure shown in FIG. 1 or FIG. 2 can be manufactured.
[0027]
By adopting the present embodiment as described above, there is an effect of further improving crack resistance against the impact and tensile force of bonding, and it is possible to eliminate poor connection due to a decrease in mechanical strength in the interlayer insulating film. Therefore, priority can be given to increasing the speed of the semiconductor, and an interlayer insulating film can be selected, which greatly contributes to improving the performance of the semiconductor.
[0028]
Further, in the suppression of the diffusion period and the reduction in cost, the process unique to the pad structure of the present invention is not added, so that the diffusion period similar to the conventional one can be maintained and the cost does not increase.
[0029]
【The invention's effect】
According to the pad structure of claim 1, the tensile force generated by aligning the boundary between the metal and the interlayer insulating film in the vertical direction works as a normal force as it is by making the dimensions of the metal constituting the pad the same. It can be solved by preventing this. Therefore, it is possible to provide a pad structure that does not cause pad peeling that occurs due to a crack at the boundary between the metal and the interlayer insulating film due to bonding.
[0030]
According to the pad structure of the second aspect, in addition to the same effect as that of the first aspect, in the connection plug for connecting the metals, since there is a boundary between the connection plug and the interlayer insulating film, each layer is zigzag vertically. By arranging the connection plugs in the layer, it is possible to avoid aligning the layer boundaries in the vertical direction.
[0031]
According to the pad structure of the third aspect, by reducing the metal area, dishing due to CMP of the lower-layered metal can be suppressed. However, by forming the metal one layer below the uppermost metal as a flat plate, connection plugs one layer lower than the uppermost metal can be provided, and higher mechanical strength can be obtained against bonding impact. In addition, since the metal that is one layer below the uppermost metal layer is relatively strongly subjected to ultrasonic waves applied in bonding, the metal and the interlayer insulating film in the metal that is easily damaged by ultrasonic waves are reduced. In addition, the metal one layer below the uppermost layer metal is preferably a flat plate. Further, in order to reduce the metal area of the lower layer metal, it is effective to remove the metal so as to reduce the metal area at the center of the metal.
[Brief description of the drawings]
1A and 1B show an embodiment of the present invention, wherein FIG. 1A is a cross-sectional view, FIG. 1B is a cross-sectional view along AA ′, FIG. 1C is a cross-sectional view along BB ′, and FIG. C 'sectional drawing and (e) are DD' sectional drawings.
FIG. 2 is a cross-sectional view of another embodiment of the present invention.
FIG. 3 shows a manufacturing method according to each embodiment of the present invention, wherein (a) to (g) are process cross-sectional views in the order of manufacture.
FIG. 4 is a process cross-sectional view subsequent to FIG. 3;
FIG. 5 is a process cross-sectional view subsequent to FIG. 4;
6 is a process cross-sectional view subsequent to FIG. 5; FIG.
FIG. 7 is a cross-sectional view of a conventional connection method.
FIG. 8 is a cross-sectional view of another conventional connection method.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 1st metal layer 2 1st barrier metal 3 1st via 4 2nd metal layer 5 2nd via 6 3rd metal layer 7 3rd via 8 1st interlayer insulation film 9 2nd Interlayer insulating film 10 Uppermost metal layer 11 First protective film 12 Second barrier metal 13 External terminal 14 Second protective film 15 First pattern 16 Second pattern 17 Groove 18 Via groove 19 Stress relaxation material

Claims (3)

A first metal layer formed of a metal material, and a first connection plug that overlaps with the first metal layer and the first insulating layer sandwiched therebetween and penetrates the first metal layer and the first insulating layer And a second connection plug that overlaps with the second metal layer and the second insulating layer sandwiched between the second metal layer and the second insulating layer, and penetrates the second metal layer and the second insulating layer. The third metal layer connected to the third metal layer overlaps with the third metal layer and the third insulating layer interposed therebetween, and is connected by a third connection plug penetrating the third metal layer and the third insulating layer. An upper terminal metal layer, and an external terminal overlapping the uppermost metal layer, the first metal layer, the second metal layer, the third metal layer, the uppermost metal layer, and the Each periphery of the external terminal is surrounded by an insulating layer, and the first metal layer, the second metal layer, and the Pad structure, wherein the outer dimensions of the third metal layer is different. 2. The pad structure according to claim 1, wherein a vertical arrangement relationship between the first connection plug, the second connection plug, and the third connection plug is zigzag. The outer dimensions of the first metal layer, the second metal layer, and the third metal layer are sequentially reduced, and the third metal layer is formed in a flat plate, and the first metal layer and the third metal layer The pad structure according to claim 1 or 2, wherein the second metal layer has a mesh-like hole formed in a central portion thereof.

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