JP2005085964A - Manufacturing method of laminated substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a laminated substrate for preventing a wafer for an active layer and a wafer for a support substrate from being exfoliated from an adhered border at exfoliation heat treatment. <P>SOLUTION: Since helium ions are implanted to the wafer 10 for an active layer, an exfoliation temperature reaches 800 to 1,100°C. When reaching this temperature, most Si atoms of both the wafers 10, 20 are directly bonded on the laminated boundary of both the wafers 10, 20 to increase laminate strength. As a result, the exfoliation of both the wafers 10, 20 from the laminated boundary at the exfoliation step can be prevented. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a bonded substrate, and more particularly to a technique for heat-treating a semiconductor wafer into which helium is ion-implanted at a predetermined depth and peeling the semiconductor wafer from the ion-implanted region.

In recent years, a smart cut method described in Patent Document 1 has been developed as a method for manufacturing a semiconductor substrate having an SOI (silicon on insulator) structure.
This is because an oxide film is formed, hydrogen is ion-implanted to a predetermined depth position and the active layer wafer and the support substrate wafer are bonded at room temperature, and then the obtained bonded wafer is inserted into a heat treatment furnace, In this method, heat treatment is performed at 500 to 700 ° C., and the active layer wafer is peeled from the ion implantation region to form an active layer. Moreover, after peeling, in order to increase the bonding strength between the active layer wafer and the support substrate wafer, a bonding heat treatment is performed at 1100 ° C. for 2 hours.

JP-A-5-211128

  However, in the conventional smart cut method, hydrogen is ion-implanted into the active layer wafer. Therefore, as described above, the heat treatment temperature in the peeling process is as low as about 500 to 700 ° C. at which hydrogen gas bubbles are formed in the ion implantation region. At this temperature, it is not possible to sufficiently increase the bonding strength between the active layer wafer and the support substrate wafer that have been bonded together at room temperature. Hereinafter, the bonding of the active layer wafer and the support substrate wafer will be described in detail.

The bonding of the active layer wafer and the support substrate wafer at room temperature is a bond (bonding) with a weak force by Van der Waals force. Therefore, the bonding strength is increased in the subsequent bonding heat treatment step. That is, when the bonded wafer is heat-treated, first, a dehydration condensation reaction occurs around 200 ° C. Next, when the heat treatment temperature is further increased, hydrogen bonds are gradually converted into Si—O—Si bonds. And if it heats to 1000 degreeC or more, most Si atoms will couple | bond together directly.
That is, it can be said that when the hydrogen gas bubbles are generated at about 500 to 700 ° C., the direct bonding between the Si atoms does not proceed sufficiently and the bonding is incomplete.
Therefore, at the time of the peeling heat treatment, there is a possibility that peeling from the bonded interface between the wafer for active layer and the wafer for support substrate may occur, not peeling from the ion implantation region.

  An object of the present invention is to provide a method for manufacturing a bonded substrate capable of preventing peeling from the bonded interface between the active layer wafer and the support substrate wafer during the peeling heat treatment.

  According to the first aspect of the present invention, an ion implantation step of ion-implanting helium into a predetermined depth position of the active layer wafer to form an ion implantation region in the active layer wafer, and then the active layer wafer, A supporting substrate wafer is bonded to each other with an insulating film interposed therebetween, and a bonding process for forming a bonded wafer, and the bonded wafer is heat-treated at 800 to 1100 ° C., and a helium gas bubble is formed in the ion implantation region. Forming an active layer by peeling a part of the wafer for active layer from the predetermined depth position.

  According to the first aspect of the present invention, since helium is used as a light element for ion implantation, the temperature at which bubbles are formed in the ion implantation region of the active layer wafer during peeling is 800 to 1100 ° C. . When this temperature is reached, most of the Si atoms of the active layer wafer and the support substrate wafer are directly bonded to each other at the bonding interface between the two wafers, and bonding with high bonding strength is obtained. As a result, in this peeling step, peeling from the bonding interface between the active layer wafer and the support substrate wafer can be prevented.

As the types of the active layer wafer and the support substrate wafer, for example, a single crystal silicon wafer, a germanium wafer, a SiC wafer, or the like can be employed.
As the insulating film, for example, an oxide film or a nitride film can be employed.
The thickness of the insulating film is not limited. For example, it is 0.1 to 1.0 μm.
The thickness of the active layer is not limited. For example, the thickness of the thick active layer is 1 to 10 μm. Moreover, it is 0.01-1 micrometer in the active layer of a thin film.

The dose of helium at the time of ion implantation is not limited.
The acceleration voltage at the time of helium ion implantation is 50 keV or less, preferably 30 keV or less, and more preferably 20 keV or less. In the helium ion implantation, helium can be concentrated at a target depth as the acceleration voltage decreases.
The substrate temperature of the active layer wafer at the time of ion implantation is 100 to 600 ° C. Below 100 ° C., helium ion implantation damage is significant and crystal defects in the active layer increase. On the other hand, when the temperature exceeds 600 ° C., the diffusion of the injected helium increases, the distribution of the injection becomes broad, and the roughness of the peeled surface decreases. Incidentally, the substrate temperature at the time of conventional hydrogen ion implantation was 450 ° C. or less. In the present invention, by increasing the substrate temperature at the time of ion implantation in this way, damage caused by ions passing through a part of the wafer for active layer at the time of ion implantation can be reduced.

The atmosphere in the furnace at the time of peeling may be an atmosphere of a non-oxidizing gas (an inert gas such as nitrogen or argon). Further, it may be in a vacuum.
If the heating temperature of the bonded wafer at the time of peeling is less than 800 ° C., helium gas bubbles for peeling cannot be formed, and precipitates grow on the active layer wafer, making it difficult to reprocess and reuse. A preferable heat treatment temperature of the bonded wafer is 900 ° C to 1000 ° C.

The heating time of the bonded wafer at the time of peeling is 10 minutes or more, preferably 30 to 60 minutes. If it is less than 10 minutes, bubble formation is inadequate and the inconvenience that it cannot peel at a helium injection surface arises.
After the peeling step, a bonding heat treatment for increasing the strength of the bonding heat treatment between the active layer wafer and the support substrate wafer may be performed. The heating temperature at this time is, for example, 1100 ° C. and 2 hours. As the atmospheric gas in the thermal oxidation furnace, oxygen or the like can be employed.

The invention according to claim ² is the method for manufacturing a bonded substrate according to claim 1, wherein a dose of helium is 8 × 10 ¹⁶ to 2 × 10 ¹⁷ / cm ² in the ion implantation step.

When the dose of helium is less than 8 × 10 ¹⁶ / cm ² , the support substrate wafer cannot be peeled off even when heat-treated at a high temperature of 800 ° C. or higher. Further, if the dose of helium exceeds 2 × 10 ¹⁷ / cm ² , the wafer will expand during ion implantation (the phenomenon that the wafer surface peels off during ion implantation, acceleration voltage during helium ion implantation = 45 keV). May occur. A preferable dose of helium is 9 × 10 ¹⁶ to 1 × 10 ¹⁷ / cm ² . Incidentally, in the conventional hydrogen ion implantation, 1.5 × 10 ^{17 to} 2.0 × 10 ¹⁷ / cm ² is the limit.

  According to this invention, since helium is employed as the light element for ion implantation, the temperature at which bubbles are formed in the ion implantation region of the active layer wafer during peeling is 800 to 1100 ° C. Peeling from the bonding interface with the support substrate wafer can be prevented.

  Embodiments of the present invention will be described below with reference to the drawings.

A p-type single crystal silicon ingot to which a predetermined amount of boron is added is pulled up by the CZ method. Thereafter, the single crystal silicon ingot is subjected to block cutting, slicing, chamfering, mirror polishing, and the like. Thus, an active layer wafer 10 having a thickness of 725 μm, a diameter of 200 mm, a specific resistance of 10 to 20 Ωcm, and a p-type mirror finish is obtained, and a support substrate wafer 20 is obtained (FIGS. 1A and 1B). .
Thereafter, the active layer wafer 10 is inserted into a thermal oxidation apparatus and subjected to thermal oxidation treatment in an oxygen gas atmosphere. As a result, a silicon oxide film 10 a having a thickness of 0.15 μm is formed over the entire exposed surface of the active layer wafer 10. The heat treatment conditions are 950 to 1100 ° C. and 5 to 8 hours (FIG. 1C).

Next, helium ions are implanted at a predetermined depth position from the mirror-finished surface of the active layer wafer 10 at an acceleration voltage of 70 keV using a medium current ion implantation apparatus. Thereby, the helium ion implantation area | region 10b is formed in the wafer 10 for active layers (FIG.1 (c)).
The dose at this time is 5 × 10 ¹⁶ to 4 × 10 ¹⁷ / cm ² .

  Subsequently, the surface of the active layer wafer 10 and the mirror surface of the support substrate wafer 20 are used as a bonding surface (overlapping surface), and both the silicon oxide film 10a are used, for example, by a known jig in a vacuum apparatus. The wafers 10 and 20 are bonded together to produce a bonded wafer 30 (FIG. 1D). At this time, the active layer wafer 10 and the support substrate wafer 20 are bonded via the silicon oxide film 10a, and the silicon oxide film 10a at the bonded portion becomes a buried silicon oxide film (insulating film) 30a.

  Then, the bonded wafer 30 is inserted into an exfoliation heat treatment apparatus (not shown), and heat-treated at a furnace temperature of 800 to 1100 ° C. and an atmosphere of nitrogen gas (FIG. 1 (e)). The heat treatment time is 30 minutes. By this heat treatment, a low temperature heat treatment is performed to leave the active layer 10A on the bonding interface side of the support substrate wafer 20 and peel the active layer wafer 10 from the helium ion implantation region 10b.

  At this time, since helium is employed as a light element for ion implantation, the peeling temperature is increased to 800 to 1100 ° C. When this temperature is reached, most of the Si atoms of the active layer wafer 10 and the support substrate wafer 20 are directly bonded to each other at the bonding interface between the two wafers 10 and 20, and bonding with high bonding strength is obtained. As a result, in this peeling step, a conventional bonding heat treatment (1100 ° C., 2 hours) step for enhancing the bonding strength can also be used. Therefore, peeling from the bonding interface between the active layer wafer 10 and the support substrate wafer 20 can be prevented. In addition, the number of manufacturing steps of the bonded SOI substrate can be reduced. The peeled active layer wafer 10 can be reused as the support substrate wafer 20.

Further, after peeling, the bonded wafer 30 may be heat-treated at 1100 ° C. for 2 hours if necessary. As a result, the bonding strength between the active layer wafer 10 and the support substrate wafer 20 can be further increased.
Then, the bonded wafer 30 having the SOI structure is immersed in a 1 wt% HF solution (room temperature), and the silicon oxide film 10a remaining on the outer peripheral portion of the active layer 10A is etched. Thereafter, the surface of the active layer 10A is polished by a polishing apparatus. Thus, a bonded substrate by the smart cut method is manufactured (FIG. 1 (f)).

Here, the results of a comparative investigation of the bonding strength at the bonding interface between the active layer wafer and the buried silicon oxide film after the peeling process are reported for the method of the present invention and the conventional method.
The HF dip method was adopted for the measurement of the bond strength. Specifically, first, the peeled bonded SOI substrate (FIG. 2A) is immersed in a 25 wt% HF solution (room temperature) for 10 minutes, and the outer peripheral edge of the embedded silicon oxide film is etched. Thereafter, the inclination angle θ on the bonding interface side of the outer peripheral surface of the buried silicon oxide film is measured (FIG. 2B). If the inclination angle θ is small, the bonding strength is weak. Conversely, if the inclination angle θ is large, the bonding strength is strong. The results are shown in Table 1.

  As is apparent from Table 1, in each of Test Examples 1 to 4, the bonding strength between the active layer wafer and the support substrate wafer was improved as compared with Comparative Examples 1 to 4. That is, the inclination angle θ on the interface side was larger in Test Examples 1 to 4 than in Comparative Examples 1 to 4. In particular, the angle 62 ° in the case of Test Example 2 is a numerical value closest to the angle (70 to 80 °) when the bonding strength test is similarly performed on the bonded wafer subjected to the bonding heat treatment after peeling, The bonding strength was the maximum.

It is a flow sheet which shows the manufacturing method of the bonded substrate board concerning Example 1 of this invention. (A) It is sectional drawing of the bonded wafer immediately after the peeling process of the manufacturing method of the bonded substrate board concerning Example 1 of this invention. (B) In the bonded wafer after the peeling process according to Example 1 of the present invention, it is a cross-sectional view of the bonded wafer whose bond strength at the bonded interface between the active layer wafer and the support substrate wafer is being inspected.

Explanation of symbols

10 Active layer wafer,
10A active layer,
10b Helium ion implantation region (ion implantation region),
30 bonded wafers,
30a Embedded silicon oxide film (insulating film).

Claims (2)

An ion implantation step of ion-implanting helium into a predetermined depth position of the active layer wafer to form an ion implantation region in the active layer wafer;
Thereafter, the active layer wafer and the support substrate wafer are bonded together with an insulating film interposed therebetween, and a bonding step of forming a bonded wafer;
The bonded wafer is heat-treated at 800 to 1100 ° C., and helium gas bubbles are formed in the ion implantation region, whereby a part of the wafer for active layer is peeled off from the predetermined depth position to form an active layer. The manufacturing method of the bonded substrate board provided with the peeling process to perform. ^{2. The} method for manufacturing a bonded substrate according to claim 1, wherein in the ion implantation step, a dose of helium is 8 × 10 ¹⁶ to 2 × 10 ¹⁷ / cm ² .

Images