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JP2005072369A - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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JP2005072369A
JP2005072369A JP2003301749A JP2003301749A JP2005072369A JP 2005072369 A JP2005072369 A JP 2005072369A JP 2003301749 A JP2003301749 A JP 2003301749A JP 2003301749 A JP2003301749 A JP 2003301749A JP 2005072369 A JP2005072369 A JP 2005072369A
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insulating substrate
copper base
temperature
manufacturing
heating
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Fumitatsu Shinno
文達 新野
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Fuji Electric Co Ltd
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Fuji Electric Holdings Ltd
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    • H10W72/0711
    • H10W90/734

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Abstract

【課題】線膨張率の小さな絶縁基板との半田接合により銅ベースに発生した反りを、短時間,かつ少ない消費エネルギーで矯正できるように改良した反り矯正方法を提供する。
【解決手段】半導体チップを7マウントした絶縁基板3を銅ベース1に載置して半田接合した半導体装置の組立体に対し、銅ベースを低温状態に保ったまま絶縁基板側から熱を加えて半田層9の温度をクリープ変形し易い融点近い温度まで昇温させた後に加熱を止めて常温に戻し、この過程で銅ベースと絶縁基板との半田接合の際に発生した銅ベースの反りを、半田層のクリープ変形を利用して矯正するものとし、その矯正工程では、あらかじめ加熱器15で高温に予熱しておいた加熱ブロック15を絶縁基板3の上に移して半田層9を基板側からの伝熱により融点に近い高温に昇温させた後に加熱ブロックを外して常温まで戻す。また、この間に銅ベースの裏面側には予冷しておいた冷却ブロック16を当てて低温状態に保持する。
【選択図】 図1
A warpage correction method improved so that warpage generated in a copper base due to solder bonding with an insulating substrate having a small coefficient of linear expansion can be corrected in a short time with less energy consumption.
Heat is applied to an assembly of a semiconductor device in which an insulating substrate 3 on which seven semiconductor chips are mounted is placed on a copper base 1 and solder-bonded, from the insulating substrate side while the copper base is kept at a low temperature. After raising the temperature of the solder layer 9 to a temperature close to the melting point at which creep deformation is likely to occur, the heating is stopped and the temperature is returned to room temperature. In this process, the warp of the copper base generated during the solder bonding between the copper base and the insulating substrate is In the correction process, the heating block 15 preheated to a high temperature by the heater 15 is transferred onto the insulating substrate 3 and the solder layer 9 is moved from the substrate side. After the temperature is raised to a temperature close to the melting point by heat transfer, the heating block is removed and the temperature is returned to room temperature. During this time, the precooled cooling block 16 is applied to the back side of the copper base to keep it at a low temperature.
[Selection] Figure 1

Description

本発明は、パワー半導体モジュールの製造工程で、線膨張率の異なる絶縁基板と銅ベースとを半田接合した際に銅ベースに発生した反りの矯正方法に関する。   The present invention relates to a method for correcting warpage generated in a copper base when an insulating substrate having a different linear expansion coefficient and a copper base are solder-bonded in a manufacturing process of a power semiconductor module.

まず、本発明の実施対象となるパワー半導体モジュールの組立構造を図5に示す。図において、1はパッケージの銅ベース、2は樹脂成形品の外囲ケース、3はAl2 O3 ,AlNなどを材料とするセラミック板4の上下両面に銅回路パターン5,裏ベタ銅箔6を直接接合したDirect Bonding Copper 基板、7は絶縁基板3の銅回路パターン5に半田マウントした半導体チップ、8は銅回路パターン5に半田接合して外部に引き出した外部導出端子(リードフレーム)であり、前記絶縁基板3はその裏ベタ銅箔6を銅ベース1の上面に重ね合わせて半田接合されている。なお、9,10,11はそれぞれ銅ベース/絶縁基板間,絶縁基板/半導体チップ間,絶縁基板/外部導出端子間の接合半田層を表している。
上記構成のパワー半導体モジュールを使用する際には、図示のように銅ベース1を放熱フィン(ヒートシンク)12の端面に重ね合わせて銅ベース1の両端に穿孔した取付穴1aに通したボルト13で放熱フィンに締結固定し、半導体チップ7の発生熱を絶縁基板3,銅ベース1を伝熱して放熱フィン12より大気側に放熱するようにしている。
First, an assembly structure of a power semiconductor module that is an object of the present invention is shown in FIG. In the figure, 1 is a copper base of a package, 2 is an enclosing case for a resin molded product, 3 is a copper circuit pattern 5 and a back solid copper foil 6 directly on both upper and lower surfaces of a ceramic plate 4 made of Al2 O3, AlN, etc. Bonded Direct Bonding Copper substrate, 7 is a semiconductor chip solder-mounted on the copper circuit pattern 5 of the insulating substrate 3, and 8 is an external lead-out terminal (lead frame) that is solder-bonded to the copper circuit pattern 5 and drawn to the outside. The insulating substrate 3 is solder-bonded with the back solid copper foil 6 superimposed on the upper surface of the copper base 1. Reference numerals 9, 10, and 11 represent bonding solder layers between the copper base / insulating substrate, between the insulating substrate / semiconductor chip, and between the insulating substrate / external lead terminals, respectively.
When using the power semiconductor module having the above-described configuration, the bolt 13 is passed through the mounting holes 1a that are perforated at both ends of the copper base 1 by superimposing the copper base 1 on the end face of the radiating fin (heat sink) 12 as shown in the figure. The heat generated by the semiconductor chip 7 is transferred to the insulating substrate 3 and the copper base 1 and radiated from the heat radiating fins 12 to the atmosphere side by fastening and fixing to the heat radiating fins.

ここで、前記半導体モジュールの組立工程で銅ベース1に絶縁基板3を半田接合するには、銅ベース1と絶縁基板3との間に半田箔を挟むか半田クリームを塗布しておき、この仮組立状態で加熱炉に搬入し、半田の融点以上の温度に加熱して半田付けを行うようにしている。
ところで、前記方法で銅ベース1に絶縁基板3を半田接合した後、組立体を加熱炉から取り出して常温(室温)まで戻すと、図6で示すように銅ベース1に反りが生じて底面中央部が凹状となる。この反りは銅ベース1と絶縁基板3との線膨張率差に起因する所謂バイメタル作用によって発生する。すなわち、絶縁基板3の等価線膨張率はセラミック単体の線膨張率(4.6E-6/K〜7.1E-6/K) に近似した値で、銅ベース1の線膨張率(16.5E-6/K)と比べて非常に小さい。このために、前記のように仮組立体を半田の融点以上に加熱して銅ベース1と絶縁基板3の間を半田接合した後に常温まで冷却すると、銅ベース1の熱収縮量が絶縁基板3に比べて大きくなるため、その底面中央部が凹状となるような反りが発生する。しかも、銅ベース1に反りが生じた状態で半導体モジュールを放熱フィン12に取り付けようとすると、図6で表すように銅ベース1の底面と放熱フィン12とが密着しないで隙間が残り、このためにモジュール/放熱フィン間の伝熱性が極端に低下して所要の放熱性能が発揮できなくなると言った問題が発生する。
Here, in order to solder-bond the insulating substrate 3 to the copper base 1 in the assembling process of the semiconductor module, a solder foil is sandwiched between the copper base 1 and the insulating substrate 3 or a solder cream is applied. It is carried into a heating furnace in an assembled state, and is soldered by heating to a temperature equal to or higher than the melting point of the solder.
By the way, after soldering the insulating substrate 3 to the copper base 1 by the above method, when the assembly is taken out from the heating furnace and returned to room temperature (room temperature), the copper base 1 is warped as shown in FIG. The part is concave. This warpage is caused by a so-called bimetal action resulting from a difference in linear expansion coefficient between the copper base 1 and the insulating substrate 3. That is, the equivalent linear expansion coefficient of the insulating substrate 3 is a value approximating the linear expansion coefficient of the ceramic alone (4.6E-6 / K to 7.1E-6 / K), and the linear expansion coefficient of the copper base 1 (16.5E-6 Very small compared to / K). For this reason, when the temporary assembly is heated to the melting point of the solder or higher and soldered between the copper base 1 and the insulating substrate 3 as described above and then cooled to room temperature, the heat shrinkage of the copper base 1 is reduced to the insulating substrate 3. Therefore, the warp such that the central portion of the bottom surface is concave is generated. Moreover, if the semiconductor module is attached to the heat radiating fin 12 with the copper base 1 warped, the bottom surface of the copper base 1 and the heat radiating fin 12 do not adhere to each other as shown in FIG. However, the problem arises that the heat transfer between the module and the heat radiating fins is extremely lowered and the required heat radiating performance cannot be exhibited.

一方、前記のような銅ベースの反りを回避するために、次記のような対策が従来知られている。
(1) 銅ベース1の反り発生量を見込んであらかじめ銅ベースを凸状に加工しておき、絶縁基板3との間を半田接合した際に発生する反り分を補償して常温に戻した状態で銅ベース1の底面が略平坦を呈するようにする。
(2) 絶縁基板3との半田接合により銅ベース1の底面が凹状に反った状態で、この組立体を表面が銅ベースの反りと反対方向に凹状となる皿形のプレス金型の上に載せ、プレス金型に設けたヒータにより半田が塑性変形可能な温度になるまで加熱昇温させるとともに、この昇温状態で銅ベース1に加圧力を加えてプレス金型の表面形状に押圧させて反りを矯正する(例えば、特許文献1参照)。
特公平7−110491号公報
On the other hand, in order to avoid the copper-based warp as described above, the following measures are conventionally known.
(1) Predicting the amount of warpage of the copper base 1, the copper base is processed into a convex shape in advance, and the warp generated when soldering the insulation base 3 is compensated to return to room temperature. The bottom surface of the copper base 1 is made substantially flat.
(2) With the bottom surface of the copper base 1 warped in a concave shape by soldering to the insulating substrate 3, this assembly is placed on a dish-shaped press mold whose surface is concave in the direction opposite to the warp of the copper base. The solder is heated up to a temperature at which the solder can be plastically deformed by a heater provided in the press die, and the copper base 1 is pressed against the surface shape of the press die in this temperature rising state. Warp is corrected (for example, refer to Patent Document 1).
Japanese Patent Publication No.7-110491

ところで、前記した従来の矯正方法では次記のような問題点がある。
すなわち、前項(1) の方法では、接合部材である銅ベース1の長さ寸法が大きくなると、その反り量は長さの二乗に比例して増加することから銅ベースの加工量が大きくなる。そのために、半導体装置の組立工程で銅ベース1の上に平坦な絶縁基板3を置くと、銅ベース1と絶縁基板3の間に隙間が生じて半田接合できないか、半田接合しても大きな未接合部が残る欠陥が発生する。
また、前項(2) の方法では、半田接合した基板/銅ベース組立体をプレス金型に載せた状態で、銅ベースを含めて半田が塑性変形(クリープ変形)可能になる温度まで加熱するために、加熱後に常温まで戻す冷却過程で銅ベースが熱収縮する。そのために、皿形のプレス金型に合わせて銅ベースを加圧操作する際に、冷却過程で発生する反り量を見込んでそれ以上の逆反り変形を与える必要があり、このために銅ベースと絶縁基板の間を接合している半田が剥離してしまうおそれがある。さらに、プレス金型に銅ベースを載置した状態で半田を塑性変形可能な温度まで昇温させるのに要する加熱時間が長く、また加熱後は銅ベースに加圧力を加えたまま室温まで徐冷することから、反り矯正工程のスループット時間が長くなるほか、消費する熱エネルギーも大きくなるなどの問題もある。さらに、従来ではパワー半導体モジュールに使用する半田はSn-Pb 系が主流であったが、最近になり環境問題からPbを含まない半田, 例えばSn-Ag 系の半田が用いられる傾向にある。しかもSn-Ag 系の半田はSn-Pb 系と比べて溶融温度が高く、このために前記従来の反り矯正方法では作業に長い時間がかかってスループット性が低下する。
By the way, the conventional correction method described above has the following problems.
That is, in the method of the above item (1), when the length dimension of the copper base 1 which is a joining member is increased, the warpage amount increases in proportion to the square of the length, so that the processing amount of the copper base is increased. For this reason, when the flat insulating substrate 3 is placed on the copper base 1 in the assembly process of the semiconductor device, a gap is generated between the copper base 1 and the insulating substrate 3, or solder bonding is not possible. A defect in which the joint remains is generated.
In the method of (2) above, the solder / bonded board / copper base assembly is placed on a press die and heated to a temperature at which the solder including the copper base can be plastically deformed (creep deformation). In addition, the copper base thermally shrinks during the cooling process to return to room temperature after heating. Therefore, when pressing the copper base in accordance with the dish-shaped press mold, it is necessary to allow for the amount of warpage generated in the cooling process and to give more reverse warping deformation. There is a possibility that the solder bonding between the insulating substrates may be peeled off. Furthermore, the heating time required to raise the solder to a temperature at which plastic deformation can be performed with the copper base placed on the press die is long, and after heating, the copper base is gradually cooled to room temperature with pressure applied. Therefore, there is a problem that the throughput time of the warp correction process becomes long and the heat energy consumed increases. Furthermore, Sn-Pb solder has been the mainstream in power semiconductor modules in the past. However, recently, solder containing no Pb, for example, Sn-Ag solder tends to be used due to environmental problems. In addition, the Sn-Ag solder has a higher melting temperature than the Sn-Pb solder, and for this reason, the conventional warp correction method takes a long time to work and lowers the throughput.

本発明は上記の点に鑑みなされたものであり、線膨張率の小さな絶縁基板との半田接合により銅ベースに発生した反りを、短時間,かつ少ない消費エネルギーで効果的に矯正できるよう改良した半導体装置の銅ベースの反り矯正方法を提供することを目的とする。   The present invention has been made in view of the above points, and has been improved so that warpage generated in a copper base due to solder bonding with an insulating substrate having a small linear expansion coefficient can be effectively corrected in a short time and with less energy consumption. An object of the present invention is to provide a copper-based warpage correction method for a semiconductor device.

上記目的は、本発明により次に記す矯正方法により達成できる。
すなわち、半導体チップをマウントした絶縁基板を銅ベース上に載置して半田接合した半導体装置の組立体に対し、その銅ベース側を低温状態に保ったまま絶縁基板側から熱を加えて前記半田層の温度をクリープ変形し易い融点近い温度まで昇温させた後に、絶縁基板への加熱を止めて常温まで戻して銅ベースの反りを矯正するものとし(請求項1)、具体的には次記の各項で述べるような手段を採用して実現できる。
(1) 反り矯正工程で絶縁基板を加熱する手段として、あらかじめ高温に予熱しておいた加熱ブロックを絶縁基板の表面に当てがって半田層を高温状態に昇温させるとともに、加熱ブロックからの熱伝導で銅ベースの温度が高温になる以前に加熱ブロックを絶縁基板から外して常温に戻すようにする(請求項2)。
The above object can be achieved by the correction method described below according to the present invention.
That is, heat is applied from the insulating substrate side to the assembly of the semiconductor device in which the insulating substrate on which the semiconductor chip is mounted is placed on the copper base and solder-bonded, and the solder base is kept at a low temperature. After the temperature of the layer is raised to a temperature close to the melting point at which creep deformation is likely to occur, heating to the insulating substrate is stopped and returned to room temperature to correct the warp of the copper base (Claim 1). This can be realized by adopting the means described in the following sections.
(1) As a means of heating the insulating substrate in the warp correction process, a heating block preheated to a high temperature is applied to the surface of the insulating substrate to raise the temperature of the solder layer to a high temperature state. Before the temperature of the copper base becomes high due to heat conduction, the heating block is removed from the insulating substrate so as to return to normal temperature.

(2) 前項(1) で用いる加熱ブロックには、高い熱伝導率と、半田層を融点近くまで昇温させるに必要な熱容量を有する金属ブロック体を用いる(請求項3)。
(3) 前項(2) に用いる加熱ブロックは、絶縁基板に当接する表面形状を凹面状となし、かつ該表面には絶縁基板上にマウントした半導体チップとの不要な干渉を避けるように凹部を形成しておく(請求項4)。
(4) 前項(2) に用いる加熱ブロックを、絶縁基板の表面形状,および該基板上にマウントした半導体チップの形状に順応して個々に変位可能な可動ブロックの集合体で構成する(請求項5)。
(5) 絶縁基板の加熱手段として、前記加熱ブロックを用いる代わりに、絶縁基板の表面に半田の融点近い温度に加熱した高温気体を絶縁基板の表面に吹きつけて半田層を高温状態に昇温させ、高温気体からの熱伝導により銅ベースが高温状態に昇温する前に高温気体の吹きつけを停止して常温に戻すようにする(請求項6)。
(2) For the heating block used in the preceding item (1), a metal block body having a high thermal conductivity and a heat capacity necessary for raising the temperature of the solder layer to near the melting point is used.
(3) The heating block used in (2) above has a concave surface on the insulating substrate, and the surface has a concave so as to avoid unnecessary interference with the semiconductor chip mounted on the insulating substrate. It is formed (claim 4).
(4) The heating block used in the preceding item (2) is composed of an assembly of movable blocks that can be individually displaced according to the shape of the surface of the insulating substrate and the shape of the semiconductor chip mounted on the substrate. 5).
(5) Instead of using the heating block as a means for heating the insulating substrate, the solder layer is heated to a high temperature state by blowing a high-temperature gas heated to a temperature close to the melting point of the solder onto the surface of the insulating substrate. And before the copper base is heated to a high temperature state due to heat conduction from the high temperature gas, the blowing of the high temperature gas is stopped to return to the normal temperature (Claim 6).

(6) 前記各項の矯正方法で、絶縁基板側から加熱している状態で銅ベースを低温状態に保持する手段として、銅ベースの底面側にあらかじめ低温に予冷しておいた冷却ブロックを当てがうようにする(請求項7)。
(7) 銅ベースを低温状態に保持する手段として、前項(6) で用いる冷却ブロックの代わりに、銅ベースの底面側に低温の冷却風を吹きつけるようにする(請求項8)。
(8) さらに、前記各項の矯正方法において、絶縁基板側からの加熱と並行して、銅ベースに反りを矯正する方向に加圧力を加えるようにする(請求項9)。
上記のように、本発明による反り矯正方法の最も大きな特長は、銅ベースを低温に保持した状態で絶縁基板側から熱を急速に加えて半田部分を融点近い温度まで昇温させるようにした点にあり、この方法によれば次記の作用で述べるように、銅ベース/絶縁基板の半田接合によって生じた銅ベースの反りを短時間で矯正することが可能となる。
(6) In the correction method of each of the above items, as a means for holding the copper base at a low temperature while being heated from the insulating substrate side, a cooling block that has been pre-cooled to a low temperature is applied to the bottom side of the copper base. (Claim 7).
(7) As means for keeping the copper base in a low temperature state, low temperature cooling air is blown to the bottom surface side of the copper base instead of the cooling block used in the preceding item (6).
(8) Further, in the correction method of each of the above items, a pressure is applied to the copper base in a direction to correct the warp in parallel with the heating from the insulating substrate side (claim 9).
As described above, the most significant feature of the warp correction method according to the present invention is that the solder portion is heated to a temperature close to the melting point by rapidly applying heat from the insulating substrate side while the copper base is kept at a low temperature. According to this method, as described in the following operation, it is possible to correct the warping of the copper base caused by the copper base / insulating substrate solder joint in a short time.

すなわち、絶縁基板の線膨張率をαz 、半田接合後の絶縁基板の温度変化をTz 、銅べースの線膨張率をαc 、接合後の銅ベースの温度変化をTc とすれば、その反り量δは次式(1) で表される。
δ=K(αz *Tz −αc *Tc ) …………(1)
ここで、先記のように基板組立体を加熱炉に搬入して銅ベースと絶縁基板を半田接合する方法では、前記の温度変化はTz =Tc であるがαz <<αc であるために、半田接合後に常温に戻す冷却過程で銅ベースには図6で述べたように底面中央が凹となる反りが発生する。
この場合に、銅ベースに発生した反りをできるだけ短時間で矯正させるには、銅ベース, 絶縁基板を常温状態に保ったままで半田層だけをクリープ変形を起こしやすい温度(半田の融点よりは低いが限りなく融点に近い温度)に高めることが考えられる。このような状態になれば、銅ベースと絶縁基板との間を接合している半田層がクリープ変形して銅ベース, 絶縁基板の残留応力(半田接合の際にバイメタル作用によって生じた応力)が解除されるので、銅ベースは反りのない当初の形状に復元する。しかしながら、絶縁基板と銅ベースとの間に挟まれた半田層だけを外部から加える加熱で高温状態に高めることは現実的に不可能である。
That is, if the linear expansion coefficient of the insulating substrate is αz, the temperature change of the insulating substrate after solder bonding is Tz, the linear expansion coefficient of the copper base is αc, and the temperature change of the copper base after bonding is Tc, the warp The quantity δ is expressed by the following equation (1).
δ = K (αz * Tz−αc * Tc) (1)
Here, in the method of bringing the substrate assembly into the heating furnace and soldering the copper base and the insulating substrate as described above, the temperature change is Tz = Tc, but αz << αc. In the cooling process to return to room temperature after soldering, the copper base is warped in the center of the bottom as described in FIG.
In this case, in order to correct the warp generated in the copper base in as short a time as possible, the temperature at which only the solder layer is likely to undergo creep deformation while the copper base and the insulating substrate are kept at room temperature (lower than the melting point of the solder) It is conceivable to increase the temperature to a temperature close to the melting point as much as possible. In such a state, the solder layer joining the copper base and the insulating substrate creeps and the residual stress of the copper base and the insulating substrate (stress generated by the bimetal action during solder joining) Since it is released, the copper base is restored to its original shape without warping. However, it is practically impossible to raise only a solder layer sandwiched between the insulating substrate and the copper base to a high temperature state by heating from the outside.

そこで、本発明の反り矯正方法では、線膨張率の小さい絶縁基板側から熱を加え、反対側の銅ベースを低温状態に保ったまま絶縁基板を伝熱した熱で半田層をクリープ変形し易い温度まで昇温させて銅ベースの反りを短時間で矯正するようにしている。
すなわち、セラミック板を主体とする絶縁基板の線膨張率はαz =5E- 6/K 、銅ベースの線膨張率はαc =16.5E-6/K 近傍の値であり、前記(1) 式で絶縁基板の温度変化Tz が200K(室温を20℃とすれば220 ℃)となるように絶縁基板側から熱を加え、その熱伝導により半田層の温度が融点(Sn−Pb系で約183 ℃) よりも多少低いクリープ変形し易い温度まで昇温したとする。このときに銅ベースの温度変化Tc が高々60K(室温を20℃とすれば80℃)の低温状態を保つように制御すれば、加熱の停止後に常温まで戻す過程で銅ベースが熱収縮することもなく、銅ベースの反り量を殆どゼロに矯正することができる。なお、この場合に銅ベースの温度変化をTc<60K の範囲に制御できるならば、銅ベースの底面を多少凸状気味に反らせることも可能である。
Therefore, in the warp correction method of the present invention, heat is applied from the insulating substrate side having a small linear expansion coefficient, and the solder layer is easily creep-deformed by the heat transferred from the insulating substrate while the copper base on the opposite side is kept at a low temperature. The temperature is raised to a temperature to correct the copper-based warpage in a short time.
That is, the coefficient of linear expansion of an insulating substrate mainly composed of a ceramic plate is αz = 5E-6 / K, and the coefficient of linear expansion of a copper base is a value near αc = 16.5E-6 / K. Heat is applied from the insulating substrate side so that the temperature change Tz of the insulating substrate is 200K (220 ° C if the room temperature is 20 ° C), and the heat conduction causes the temperature of the solder layer to reach the melting point (about 183 ° C for Sn-Pb system) It is assumed that the temperature has been raised to a temperature that is slightly lower than At this time, if the temperature change Tc of the copper base is controlled so as to maintain a low temperature of 60K (80 ° C if the room temperature is 20 ° C) at most, the copper base will thermally shrink in the process of returning to normal temperature after stopping the heating. In addition, the warp amount of the copper base can be corrected to almost zero. In this case, if the temperature change of the copper base can be controlled in the range of Tc <60K, the bottom surface of the copper base can be slightly warped.

なお、この場合に絶縁基板と銅ベースは半田層を挟んで伝熱的に結合されているので、絶縁基板側から熱を加える際に長い時間をかけてゆっくり加熱すると、熱伝導により銅ベースの温度も熱バランスするように高温に上昇するために上記のような温度差をつけることはできない。したがって、絶縁基板側からの加熱はできるだけ短時間で急速に行うのがよく、またその場合の加熱条件としては、半田層の温度を融点よりは低いが融点に限りなく近いという状態にするのが望ましい。
この点に関して、絶縁基板の加熱手段に本発明による加熱ブロックを用いた場合には、加熱ブロックから絶縁基板への熱流量Qは次式(2) で与えられる。
Q=λ(t1-t0 )/(l/A ) …………(2)
そこで、前記の加熱ブロックにについて、熱伝導率 (λ) の高い材料を使う、ブロックの加熱温度 (t1)を高くする。さらに絶縁基板との接触面積 (A)を大きく,伝熱距離 (l)を短縮して伝熱的な接触状態を良くすれば、短時間で半田層をクリープ変形し易い高温状態にすることが可能となる。
In this case, since the insulating substrate and the copper base are thermally coupled to each other with the solder layer interposed therebetween, if heat is slowly applied over a long period of time when heat is applied from the insulating substrate side, the copper base of the copper substrate is thermally conductive. Since the temperature rises to a high temperature so as to balance the heat, the above temperature difference cannot be made. Therefore, the heating from the insulating substrate side should be carried out rapidly in as short a time as possible, and the heating condition in that case is that the temperature of the solder layer is lower than the melting point but close to the melting point as much as possible. desirable.
In this regard, when the heating block according to the present invention is used as the heating means for the insulating substrate, the heat flow Q from the heating block to the insulating substrate is given by the following equation (2).
Q = λ (t1-t0) / (l / A) (2)
Therefore, the heating temperature (t1) of the block which uses a material having a high thermal conductivity (λ) is increased for the heating block. Furthermore, if the contact area (A) with the insulating substrate is increased and the heat transfer distance (l) is shortened to improve the heat transfer contact state, the solder layer can be brought into a high temperature state where it can be easily creep-deformed in a short time. It becomes possible.

また、前記の加熱ブロックの代わりに高温空気を絶縁基板側に吹きつける (請求項6)方法を採用しても同様に機能させることができる。さらに、絶縁基板側からの加熱と並行して銅ベースを冷却する(請求項7,8)ことも有効な方法である。
そのほか、半田層を高温に加熱した状態で、銅ベースに対して反り発生方向と逆方向に加圧力を加える(請求項9)ことにより、銅ベースの残留応力除去を加速して反り矯正を助成できる。
Moreover, even if the method of spraying high-temperature air on the insulating substrate side instead of the heating block (Claim 6) is adopted, the same function can be achieved. It is also an effective method to cool the copper base in parallel with the heating from the insulating substrate side (claims 7 and 8).
In addition, with the solder layer heated to a high temperature, pressure is applied to the copper base in the direction opposite to the direction of warpage (Claim 9), thereby accelerating the removal of residual stress from the copper base and assisting in warping correction. it can.

本発明によれば、前記のように半導体チップをマウントした絶縁基板を銅ベース上に載置して半田接合した半導体装置の組立体に対して、銅ベース側を低温状態に保ったまま絶縁基板側から急速に熱を加えて前記半田層の温度をクリープ変形し易い融点近くまで昇温させた後に、絶縁基板への加熱を止めて常温まで戻ようにしたことにより、絶縁基板との半田接合により銅ベースに生じた反りを、短時間,かつ少ない熱エネルギーの消費で効果的に矯正できる。   According to the present invention, as compared with the assembly of the semiconductor device in which the insulating substrate on which the semiconductor chip is mounted is placed on the copper base and soldered as described above, the insulating substrate is maintained with the copper base side kept at a low temperature. Solder bonding to the insulating substrate by applying heat rapidly from the side to raise the temperature of the solder layer to near the melting point where creep deformation is likely to occur, and then stopping heating to the insulating substrate and returning it to room temperature. This effectively corrects the warp generated in the copper base in a short time and with a small amount of heat energy.

本発明は、半導体装置の組立工程で絶縁基板を銅ベースに半田接合した際に銅ベースに発生した反りを短時間で矯正するための方法として、線膨張率の大きな銅ベースを低温状態に保ったまま、線膨張率の小さい絶縁基板側から急速に熱を加えて半田層を融点近い温度に高め、半田のクリープ変形を利用して銅ベースの反りを矯正させるようにしたものであり、絶縁基板側から熱を加える手段, および銅ベースを低温状態に保持する手段には、次記の実施例で述べる具体的な手段を採用して実現できる。   The present invention maintains a copper base having a large linear expansion coefficient at a low temperature as a method for correcting the warp generated in the copper base in a short time when the insulating substrate is soldered to the copper base in the assembly process of the semiconductor device. As it is, heat is rapidly applied from the side of the insulating substrate with a low coefficient of linear expansion to raise the solder layer to a temperature close to the melting point, and the warp of the copper base is corrected using the creep deformation of the solder. The means for applying heat from the substrate side and the means for maintaining the copper base at a low temperature can be realized by adopting specific means described in the following embodiments.

図1は本発明の基本的な実施例の反り矯正工程を表した図であり、図6に示した半導体装置の組立体(銅ベース1/絶縁基板3の半田接合により銅ベース1には底面側が凹となる反りが生じている)に対する銅ベース1の反り矯正工程には、加熱ブロック14と該加熱ブロックを高温状態に予熱しておく加熱器15備えている。
ここで、加熱ブロック14は熱伝導率の高い材質で、熱容量の大きな金属ブロック体であり、その外形サイズは半導体装置の絶縁基板3,銅ベース1に対応している。また、加熱器15は内蔵したヒータの加熱により加熱ブロック14を半田(銅ベース1と絶縁基板3を接続する半田)の融点(例えば、Sn−Pb系の半田でで約183℃)に近い温度に予熱しておくようにする。
そして、半導体装置の組立工程で銅ベース1に絶縁基板3を半田接合した基板組立体(銅ベースに反りが生じている)が反り矯正工程に到来すると、加熱器15に載せて高温状態に予熱しておいた加熱ブロック14を加熱器15から移動し、図示のように絶縁基板3の上に載せる。これにより、加熱ブロック15の保有熱が絶縁基板3を経由して銅ベース1との間を接合した半田層9に伝熱し、半田はクリープ変形し易い融点近い温度にまで昇温するようになる。なお、この場合に半田層9を挟んで絶縁基板3と反対側に接合した銅ベース1の温度が加熱ブロック14からの伝熱により常温(室温)から数十℃,高くても100℃程度に昇温した状態になった時点で、加熱ブロック14を絶縁基板3から取り外して加熱器15に戻して銅ベース1がそれ以上高温にならないようにし、この状態から徐冷して常温に戻す。
FIG. 1 is a diagram showing a warp correction process according to a basic embodiment of the present invention. The assembly of the semiconductor device shown in FIG. In the warp correction process of the copper base 1 against the warp having a concave side), a heating block 14 and a heater 15 for preheating the heating block to a high temperature state are provided.
Here, the heating block 14 is a metal block body made of a material having a high thermal conductivity and a large heat capacity, and its outer size corresponds to the insulating substrate 3 and the copper base 1 of the semiconductor device. Further, the heater 15 is heated to a built-in heater to heat the heating block 14 to a temperature close to the melting point of solder (solder that connects the copper base 1 and the insulating substrate 3) (for example, Sn-Pb solder is about 183 ° C.). Keep it preheated.
Then, when a substrate assembly in which the insulating substrate 3 is solder-bonded to the copper base 1 in the semiconductor device assembly process (warping of the copper base) arrives at the warp correction process, it is placed on the heater 15 and preheated to a high temperature state. The previously heated block 14 is moved from the heater 15 and placed on the insulating substrate 3 as shown. As a result, the heat held by the heating block 15 is transferred to the solder layer 9 bonded to the copper base 1 via the insulating substrate 3, and the solder is heated to a temperature close to the melting point at which creep deformation easily occurs. . In this case, the temperature of the copper base 1 bonded to the opposite side of the insulating substrate 3 with the solder layer 9 interposed therebetween is from room temperature (room temperature) to several tens of degrees Celsius due to heat transfer from the heating block 14, and at most about 100 degrees Celsius. When the temperature rises, the heating block 14 is removed from the insulating substrate 3 and returned to the heater 15 so that the copper base 1 does not reach a higher temperature, and gradually cooled from this state to room temperature.

この加熱,徐冷の過程で半田層9が一旦はクリープ変形可能な温度に昇温する。これにより、銅ベース1は絶縁基板3との半田接合で発生していた反りの残留応力が消失し、当初の平坦形状に復元して反りが矯正されるとともに、その後の温度の低下とともに半田も元の固相に戻り、銅ベース1は反りが矯正された状態で絶縁基板3と一体化される。
なお、この実施例の反り矯正工程では、前記の加熱ブロック14,加熱器15とは別に、図示のように加熱ブロック14と同様な金属ブロック体になる冷却ブロック16および冷却器17を備え、この冷却ブロック16を冷却器17で予冷するようにしている。
そして、前記のように加熱ブロック14を絶縁基板3の上に移して銅ベース1の反りを矯正する工程で、あらかじめ予冷しておいた冷却ブロック16を銅ベース1の裏面に当てがって銅ベースを低温状態に保つようにしている。この冷却ブロック16を併用することにより、銅ベース1の温度が加熱ブロック14からの伝熱によって昇温するのを抑えることができ、これにより冷却過程で銅ベース1が熱収縮するのを抑えて反り矯正を安定よく行うことができるようになる。
In this heating and slow cooling process, the solder layer 9 is once heated to a temperature at which creep deformation is possible. As a result, the warp residual stress generated in the solder joint with the insulating substrate 3 disappears from the copper base 1, and the warp is corrected by restoring the original flat shape. Returning to the original solid phase, the copper base 1 is integrated with the insulating substrate 3 with the warp corrected.
In addition, the warp correction process of this embodiment includes a cooling block 16 and a cooler 17 that are metal blocks similar to the heating block 14 as shown in the drawing, in addition to the heating block 14 and the heater 15. The cooling block 16 is precooled by a cooler 17.
Then, in the process of moving the heating block 14 onto the insulating substrate 3 and correcting the warp of the copper base 1 as described above, the cooling block 16 that has been pre-cooled in advance is applied to the back surface of the copper base 1 to form copper. The base is kept at a low temperature. By using this cooling block 16 together, it is possible to suppress the temperature of the copper base 1 from rising due to heat transfer from the heating block 14, thereby suppressing the copper base 1 from being thermally contracted during the cooling process. Warping correction can be performed stably.

また、反り矯正工程で銅ベース1を低温状態に保持する手段として、前記冷却ブロック16を用いる代わりに、銅ベース1の裏面に低温の冷却空気を吹きつけるようにして実施することもできる。   Further, as a means for holding the copper base 1 in a low temperature state in the warp correction step, instead of using the cooling block 16, low temperature cooling air can be blown on the back surface of the copper base 1.

次に、本発明の請求項4に対応する実施例を図2で説明する。この実施例は、先記実施例1で述べた加熱ブロック14を絶縁基板3の上に載せて熱を加える際に、加熱ブロック14の保有熱を効率よく絶縁基板3に伝熱させるように加熱ブロックの形状を改良したものである。
そのために、加熱ブロック14の下面(絶縁基板3との対峙面)の形状は、銅ベース1との半田接合によるバイメタル作用によって生じた絶縁基板3の標準的な反り量に対応した凹面を呈するように形成するとともに、さらに表面には絶縁基板3にマウントした半導体チップ7との不要な干渉を避けるように凹所14aが形成されている。これにより、加熱ブロック14を絶縁基板3の上に載せた状態では、図示のように加熱ブロックの表面が広範囲で絶縁基板3の表面に直接重なり合って伝熱的に接触する。これにより、加熱ブロック14の保有熱を効率よく絶縁基板3に伝熱させて半田層9を融点近い温度まで急速に加熱昇温させることができる。
Next, an embodiment corresponding to claim 4 of the present invention will be described with reference to FIG. In this embodiment, when the heating block 14 described in the first embodiment is placed on the insulating substrate 3 and heat is applied, the heating block 14 is heated so that the heat retained in the heating block 14 is efficiently transferred to the insulating substrate 3. This is an improved block shape.
Therefore, the shape of the lower surface of the heating block 14 (opposite surface to the insulating substrate 3) has a concave surface corresponding to the standard amount of warpage of the insulating substrate 3 caused by the bimetal action by the solder joint with the copper base 1. In addition, a recess 14 a is formed on the surface so as to avoid unnecessary interference with the semiconductor chip 7 mounted on the insulating substrate 3. Thus, in a state where the heating block 14 is placed on the insulating substrate 3, the surface of the heating block directly overlaps the surface of the insulating substrate 3 over a wide range as shown in the drawing and is in heat transfer contact. Thereby, the heat held in the heating block 14 can be efficiently transferred to the insulating substrate 3 and the solder layer 9 can be rapidly heated to a temperature close to the melting point.

次に、前記実施例2で述べた加熱ブロック14について、さらに汎用性を高めるように改良した本発明の請求項5に対応する実施例を図3(a),(b) に示す。
すなわち、図2に示した加熱ブロック14は、絶縁基板3のサイズ,および該基板上にマウントした半導体チップ7の個数,配置に合わせて凹所14aを形成しているために、このままでは半導体チップの配列が異なる別機種の半導体装置には適用できない。
そこで、この実施例では、加熱ブロック14を多数本に細分して分割した柱状可動ブロック14bの集合体で構成し、各可動ブロック14bを支持枠14cに連結ピン(スルーピン)14dを介して個々に上下スライド可能に支持している。なお、可動ブロック14bには長穴14b-1を穿孔し、この長穴14b-1に連結ピン14dを通して上下可動に吊り下げ支持するようにしている。
Next, with respect to the heating block 14 described in the second embodiment, an embodiment corresponding to claim 5 of the present invention, which has been improved so as to enhance versatility, is shown in FIGS. 3 (a) and 3 (b).
That is, the heating block 14 shown in FIG. 2 forms the recess 14a in accordance with the size of the insulating substrate 3 and the number and arrangement of the semiconductor chips 7 mounted on the substrate. It cannot be applied to other types of semiconductor devices having different arrangements.
Therefore, in this embodiment, the heating block 14 is composed of an assembly of columnar movable blocks 14b divided into a large number of pieces, and each movable block 14b is individually connected to the support frame 14c via a connecting pin (through pin) 14d. Supports slidable up and down. A long hole 14b-1 is perforated in the movable block 14b, and the long hole 14b-1 is suspended and supported through a connecting pin 14d.

上記構成の加熱ブロック14を用いることにより、図示のように絶縁基板3の上に載せた状態では、個々の可動ブロック14bが絶縁基板3および半導体チップ7の形状,配列に順応して上下方向に変位し、絶縁基板3に対して図2で述べたと同様な伝熱的接触状態をかたち作ることができる。
なお、前記の可動ブロック14bをフリーの状態で使用するほか、反りの矯正を施す半導体装置の機種に合わせて、各可動ブロック14bを位置決めした上で、この位置に結束して使用することも可能である。
By using the heating block 14 configured as described above, when the movable block 14b is placed on the insulating substrate 3 as shown in the drawing, the individual movable blocks 14b are adapted to the shape and arrangement of the insulating substrate 3 and the semiconductor chip 7 in the vertical direction. As a result of the displacement, a heat transfer contact state similar to that described with reference to FIG.
In addition to using the movable block 14b in a free state, it is also possible to position each movable block 14b in accordance with the model of the semiconductor device that corrects the warp, and then bind it to this position for use. It is.

次に、本発明の請求項6に対応する応用実施例を図4に示す。この実施例は、先記の各実施例に示した加熱ブロックに代え、加熱空気を使って絶縁基板,接合半田を加熱するようにしたものである。
すなわち、銅ベース1の反り矯正工程には空気加熱器18と遮風壁19を備えておき、この矯正工程に搬入された半導体装置の基板組立体を図示のようにセットする。そして、この状態で空気加熱器18のヒータ18aで高温(半田層9の融点に近い温度)に加熱した空気を送風ファン18bにより導風ガイド18を通じて絶縁基板3の上面に向けて吹きつける。なお、遮風壁19は空気加熱器18から吹き出した熱風20が銅ベース1に直接当たるのを防ぐ役目を果たしている。
これにより、空気加熱器18から吹き出した熱風20の熱が絶縁基板3に当たって半田層9に伝熱し、この半田を融点近い温度に高める。ここで、銅ベース1と絶縁基板3を接合している半田層9がクリープ変形し易い融点近い温度に昇温した状態になれば、銅ベース1が半田層9からの熱伝導によって高温状態になる前に、空気加熱器18の運転を停止した上で常温まで徐冷する。この結果、先記実施例の熱ブロックを用いた場合と同様に銅ベース1に発生していた反りが矯正される。
Next, an application example corresponding to claim 6 of the present invention is shown in FIG. In this embodiment, instead of the heating block shown in each of the previous embodiments, the insulating substrate and the joining solder are heated using heated air.
That is, the warp correction process of the copper base 1 is provided with the air heater 18 and the wind shielding wall 19, and the substrate assembly of the semiconductor device carried into the correction process is set as illustrated. In this state, air heated to a high temperature (a temperature close to the melting point of the solder layer 9) by the heater 18a of the air heater 18 is blown toward the upper surface of the insulating substrate 3 through the air guide 18 by the blower fan 18b. The wind shield wall 19 serves to prevent the hot air 20 blown from the air heater 18 from directly hitting the copper base 1.
Thereby, the heat of the hot air 20 blown out from the air heater 18 strikes the insulating substrate 3 and is transferred to the solder layer 9 to raise the solder to a temperature close to the melting point. Here, when the solder layer 9 joining the copper base 1 and the insulating substrate 3 is heated to a temperature close to the melting point at which creep deformation easily occurs, the copper base 1 is brought into a high temperature state by heat conduction from the solder layer 9. Before becoming, after the operation of the air heater 18 is stopped, it is gradually cooled to room temperature. As a result, the warp generated in the copper base 1 is corrected as in the case of using the heat block of the previous embodiment.

なお、上記の実施例2〜4においても、反り矯正の工程中に銅ベース1を低温状態に保つために、実施例1で述べたと同様に銅ベース1の裏面側に冷却ブロック16(図1参照)を当てがう、あるいは冷却空気を吹きつけるなどの冷却手段を併用して実施することができるのは勿論のことである。
さらに、本発明の応用実施例として、先記の各実施例で述べた銅ベース1の反り矯正工程では、絶縁基板3側からの加熱操作と並行して、銅ベース1には該ベースに生じた反りと逆な方向から治具(図示せず)を使って機械的な加圧力を加え、反り矯正を助成する方法がある。このように半田層9の高温状態で、銅ベース1に反りと逆方向から加圧力を加えることで、銅ベースに残って板残留応力の除去を加速して反り矯正を短時間で行うことができる。
Also in the above-described Examples 2 to 4, in order to keep the copper base 1 at a low temperature during the warp correction process, the cooling block 16 (see FIG. 1) is provided on the back side of the copper base 1 in the same manner as described in Example 1. Of course, it can be carried out in combination with cooling means such as applying a reference) or blowing cooling air.
Further, as an application example of the present invention, in the warp correction process of the copper base 1 described in each of the foregoing examples, the copper base 1 is generated in the base in parallel with the heating operation from the insulating substrate 3 side. There is a method in which a mechanical pressure is applied using a jig (not shown) from the opposite direction to warping to assist warpage correction. In this way, by applying pressure to the copper base 1 in the opposite direction to the warp while the solder layer 9 is in a high temperature state, it is possible to correct the warp in a short time by accelerating the removal of the plate residual stress remaining on the copper base. it can.

本発明の実施例1に係る銅ベースの反り矯正工程を表す説明図Explanatory drawing showing the copper base curvature correction process which concerns on Example 1 of this invention. 本発明の実施例2に係る銅ベースの反り矯正工程を表す説明図Explanatory drawing showing the copper base curvature correction process which concerns on Example 2 of this invention. 本発明の実施例3に係る銅ベースの反り矯正工程を表す説明図Explanatory drawing showing the copper base curvature correction process which concerns on Example 3 of this invention. 本発明の実施例4に係る銅ベースの反り矯正工程を表す説明図Explanatory drawing showing the copper base curvature correction process which concerns on Example 4 of this invention. 本発明の実施対象となるパワー半導体モジュールの組立構造図Assembly structure diagram of power semiconductor module which is an object of the present invention 図5において銅ベースと絶縁基板との半田接合により発生した基板組立体の反り発生態を表す図FIG. 5 is a diagram showing a warpage occurrence state of a board assembly generated by solder bonding between a copper base and an insulating board in FIG.

符号の説明Explanation of symbols

1 銅ベース
3 絶縁基板
4 セラミック板
5 銅回路パターン
6 裏ベタ銅箔
7 半導体チップ
9 銅ベース/絶縁基板間を接合した半田層
12 放熱フィン
14 加熱ブロック
15 加熱器
16 冷却ブロック
17 冷却器
18 空気加熱器
DESCRIPTION OF SYMBOLS 1 Copper base 3 Insulation board | substrate 4 Ceramic board 5 Copper circuit pattern 6 Back solid copper foil 7 Semiconductor chip 9 Solder layer which joined between copper base / insulation board 12 Radiation fin 14 Heating block 15 Heater 16 Cooling block 17 Cooler 18 Air Heater

Claims (9)

半導体チップをマウントした絶縁基板を銅ベース上に載置して半田接合した半導体装置の組立体に対し、銅ベース側を低温状態に保ったまま絶縁基板側から熱を加えて前記半田層の温度をクリープ変形し易い融点近い温度まで昇温させた後に、絶縁基板への加熱を止めて常温まで戻し、絶縁基板との半田接合過程で生じた銅ベースの反りを矯正するようにしたことを特徴とする半導体装置の製造方法。 The temperature of the solder layer is obtained by applying heat from the insulating substrate side while keeping the copper base side at a low temperature for the assembly of the semiconductor device in which the insulating substrate on which the semiconductor chip is mounted is placed on the copper base and soldered. After heating up to a temperature close to the melting point where creep deformation is likely to occur, heating to the insulating substrate is stopped and the temperature is returned to room temperature to correct the warping of the copper base that occurs during the solder bonding process with the insulating substrate. A method for manufacturing a semiconductor device. 請求項1に記載の製造方法において、絶縁基板の加熱手段として、あらかじめ高温に予熱しておいた加熱ブロックを絶縁基板の表面に当てがって半田層を高温状態に昇温させるとともに、加熱ブロックからの熱伝導により銅ベースが高温状態に昇温する以前に加熱ブロックを絶縁基板から外して常温に戻すようにしたことを特徴とする半導体装置の製造方法。 2. The manufacturing method according to claim 1, wherein a heating block preheated to a high temperature is applied to the surface of the insulating substrate as a heating means for the insulating substrate to heat the solder layer to a high temperature state, and the heating block A method of manufacturing a semiconductor device, wherein the heating block is removed from the insulating substrate and returned to room temperature before the copper base is heated to a high temperature state due to heat conduction. 請求項2に記載の製造方法において、加熱ブロックが、高い熱伝導率と、半田層を融点近くまで昇温させるに必要な熱容量を有する金属ブロック体であることを特徴とする半導体装置の製造方法。 3. The method of manufacturing a semiconductor device according to claim 2, wherein the heating block is a metal block body having high thermal conductivity and a heat capacity necessary for raising the temperature of the solder layer to near the melting point. . 請求項2に記載の製造方法において、絶縁基板に当てがう加熱ブロックは、その表面が凹面状を呈し、かつ該表面に絶縁基板にマウントした半導体チップとの干渉を避ける凹部が形成されていることを特徴とする半導体装置の製造方法。 3. The manufacturing method according to claim 2, wherein the heating block applied to the insulating substrate has a concave surface, and a concave portion is formed on the surface to avoid interference with a semiconductor chip mounted on the insulating substrate. A method of manufacturing a semiconductor device. 請求項2に記載の製造方法において、加熱ブロックとして、絶縁基板の表面形状,および該基板上にマウントした半導体チップの形状に順応して個々に変位可能な可動ブロックの集合体を用いることを特徴とする半導体装置の製造方法。 3. The manufacturing method according to claim 2, wherein an assembly of movable blocks that can be individually displaced according to the surface shape of the insulating substrate and the shape of the semiconductor chip mounted on the substrate is used as the heating block. A method for manufacturing a semiconductor device. 請求項1に記載の製造方法において、絶縁基板の加熱手段として、絶縁基板の表面に半田の融点近い温度に加熱した高温気体を絶縁基板の表面に吹きつけて半田層を高温状態に昇温させ、高温気体からの熱伝導により銅ベースが高温状態に昇温する以前に高温気体の吹きつけを停止して常温に戻すようにしたことを特徴とする半導体装置の製造方法。 2. The manufacturing method according to claim 1, wherein as a means for heating the insulating substrate, a high-temperature gas heated to a temperature close to the melting point of the solder is blown onto the surface of the insulating substrate to raise the temperature of the solder layer to a high temperature state. A method for manufacturing a semiconductor device, characterized in that before the copper base is heated to a high temperature state by heat conduction from the high temperature gas, the blowing of the high temperature gas is stopped to return to the normal temperature. 請求項1に記載の製造方法において、銅ベースを常温状態に保持する手段として、銅ベースの底面側にあらかじめ低温に予冷しておいた冷却ブロックを当てがうようにしたことを特徴とする半導体装置の製造方法。 2. The semiconductor device according to claim 1, wherein a cooling block precooled to a low temperature in advance is applied to the bottom surface side of the copper base as means for holding the copper base at a normal temperature. Device manufacturing method. 請求項1に記載の製造方法において、銅ベースを常温状態に保持する手段として、銅ベースの底面側に低温に冷却した冷気を吹きつけるようにしたことを特徴とする半導体装置の製造方法。 2. The method of manufacturing a semiconductor device according to claim 1, wherein cold air cooled to a low temperature is blown to a bottom surface side of the copper base as means for holding the copper base at a normal temperature. 請求項1に記載の製造方法において、絶縁基板側からの加熱操作と並行して、銅ベースに反りを矯正する方向に加圧力を加えるようにしたことを特徴とする半導体装置の製造方法。
2. The method of manufacturing a semiconductor device according to claim 1, wherein a pressure is applied to the copper base in a direction to correct warpage in parallel with the heating operation from the insulating substrate side.
JP2003301749A 2003-08-26 2003-08-26 Manufacturing method of semiconductor device Pending JP2005072369A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016167548A (en) * 2015-03-10 2016-09-15 三菱マテリアル株式会社 Method manufacturing substrate for power module with heat sink
US11037790B2 (en) 2016-04-27 2021-06-15 Nikkiso Co., Ltd. Pressurizing device and pressurizing method
US11501980B2 (en) 2019-05-15 2022-11-15 Fuji Electric Co., Ltd. Semiconductor module, method for manufacturing semiconductor module, and level different jig

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016167548A (en) * 2015-03-10 2016-09-15 三菱マテリアル株式会社 Method manufacturing substrate for power module with heat sink
US11037790B2 (en) 2016-04-27 2021-06-15 Nikkiso Co., Ltd. Pressurizing device and pressurizing method
US11901199B2 (en) 2016-04-27 2024-02-13 Nikkiso Co., Ltd. Pressurizing device and pressurizing method
US11501980B2 (en) 2019-05-15 2022-11-15 Fuji Electric Co., Ltd. Semiconductor module, method for manufacturing semiconductor module, and level different jig
US12148631B2 (en) 2019-05-15 2024-11-19 Fuji Electric Co., Ltd. Semiconductor module, method for manufacturing semiconductor module, and level different jig

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