JP2005065098A - Signal processing apparatus and method, and program - Google Patents

Abstract

Block noise can be detected appropriately.
A determination unit 51 uses a predetermined evaluation value set by a control unit 53 to determine a block boundary candidate using a difference in luminance value between adjacent blocks. Based on the number set by the control unit 53, the determination unit 52 determines that each of the target position and the boundary at one block interval from the boundary separated by n blocks in the left-right direction is a block boundary candidate. It is determined whether or not the target position is a block boundary based on the determination result. The control unit 53 changes the magnitude of the evaluation value of the determination unit 51 every time it is determined that the target position is not a block boundary, and when it is determined that the target position is a block boundary, the control unit 53 Control is performed to perform processing for removing block noise on a pixel value in a predetermined range including the target position.
[Selection] Figure 3

Description

  For example, the present invention relates to a signal processing apparatus and method, and a program for reducing block noise from digital image data to be reproduced when reproducing digital image data compression-encoded using a block coding method. About.

  In order to efficiently record or transmit still image data or moving image data having a large amount of data to a recording medium, the still image data or moving image data is, for example, 8 pixels × 8. A compression coding method using block coding in which a block is formed into a predetermined size such as a pixel and data is compressed using the block as a processing unit is widely used.

  Both the JPEG (Joint Photographic Experts Group) method, which is widely used as a compression coding method for still image data, and the MPEG (Moving Picture Experts Group) method, which is widely used as a compression coding method for moving image data, are used. This is a compression coding method using a block coding method.

  By the way, this compression coding method using the block coding method decomposes an image into a spatial frequency sequence and leaves an important part (low frequency component) as an image impression, and a part which is not so important depending on the compression rate. This is done by discarding (high frequency component). For this reason, if the compression ratio increases and the number of parts to be cut off increases, continuity at the block boundary (boundary with the adjacent block) cannot be ensured, and a deviation in the playback data value at the block boundary is perceived as noise. So-called block noise occurs (the block itself can be seen).

  This block noise can be reduced by detecting a block boundary portion and filtering the image data of that portion. If block noise exists, there will be a problem that block noise will become more noticeable when processing such as sharpening the image, but if you can reduce block noise before sharpening, Block noise can be made inconspicuous. Therefore, reducing block noise is an important technique for maintaining image quality.

  Here, a conventional block boundary detection method (see Patent Document 1) when reducing block noise will be briefly described.

  First, a boundary that may be a block boundary is detected by using a certain difference in luminance values between adjacent pixels (brightness values between blocks) across the block boundary.

  Since the block boundary continuously exists at intervals corresponding to the size of the block (8 pixels × 8 pixels), for example, as shown in FIG. It is determined whether the boundary P0 that is one block (8 pixels) ahead and the boundary P2 that is one block (8 pixels) behind are recognized as possible block boundaries.

For example, the luminance difference between the lattice portion and the background portion (inside and outside of the contour on the image) in the lattice pattern image also has a certain difference as in the case of the block boundary where the block noise is generated although the degree is different. Therefore, if a block boundary is detected by paying attention only to the difference in pixel values between blocks, the contour portion is mistaken as a block boundary. Thus, the block boundary can be detected more accurately by detecting the block boundary by paying attention to the fact that the block boundary exists at a constant interval (continuity of the block boundary).
JP 2003-232890 A

  However, if the luminance difference is small and there are coincidentally three boundary portions at the block interval, the conventional method misidentifies the boundary portion as a block boundary. That is, with the conventional block boundary detection method, the block boundary may not be detected properly.

  In view of the above, an object of the present invention is to enable appropriate detection of block boundaries.

  In the signal processing device of the present invention, for input image data, a difference value of pixel values between pixels adjacent to a predetermined position of interest and an average value of difference values of adjacent pixel values within a predetermined range including the position of interest are: It is determined whether or not the first condition is satisfied, and the difference between the average value of the pixel values of the plurality of pixels at the preceding stage and the average value of the pixel values of the plurality of pixels at the subsequent stage and the first evaluation value are the second Determine whether or not the condition is satisfied, determine whether or not the pixel value difference between the pixels adjacent to the target position and the second evaluation value satisfy the third condition, and based on each determination result, First determination means for determining whether or not the target position is a block boundary candidate; and a target number and a predetermined number of boundaries at one block interval from the target position as a target boundary, and the target target boundary is a first target boundary It is determined whether or not it is determined as a block boundary candidate by the determining means, Based on the determination result, a second determination unit that determines whether or not the target position is a block boundary, and a predetermined range including the target position determined to be a block boundary by the second determination unit And processing means for performing block noise reduction processing on the pixel.

  Based on the determination result by the second determination means, it is possible to further provide a changing means for changing the values of the first evaluation value, the second evaluation value, and the number of confirmation target boundaries.

  The changing unit changes the value of the first evaluation value or the second evaluation value from a value that easily satisfies the first condition or the second condition to a value that does not easily satisfy the first condition or the second condition, and increases the number of confirmation target boundaries. The number can be changed from a small number.

  The second determination unit can determine that the target position is a block boundary when all of the target position and the confirmation target boundary are determined to be block boundary candidates by the first determination unit.

  When the number of confirmation target boundaries becomes three, the second determination unit is a block boundary candidate, and when one of the two confirmation target boundaries is a block boundary candidate, It can be determined that the position of interest is a block boundary.

  In the signal processing method of the present invention, for input image data, a difference value of pixel values between pixels adjacent to a predetermined position of interest and an average value of difference values of adjacent pixel values within a predetermined range including the position of interest are: It is determined whether or not the first condition is satisfied, and the difference between the average value of the pixel values of the plurality of pixels at the preceding stage and the average value of the pixel values of the plurality of pixels at the subsequent stage and the first evaluation value are the second Determine whether or not the condition is satisfied, determine whether or not the pixel value difference between the pixels adjacent to the target position and the second evaluation value satisfy the third condition, and based on each determination result, A first determination step for determining whether or not the position of interest is a block boundary candidate; and a predetermined number of boundaries within one block interval from the position of interest and the position of interest as a confirmation target boundary; Whether or not it was determined as a block boundary candidate in the processing of the determination step A second determination step of determining whether or not the target position is a block boundary based on the determination result, and a target position determined to be a block boundary in the processing of the second determination step And a processing step of performing block noise reduction processing on pixels within a predetermined range.

  According to the program of the present invention, for input image data, a difference value of pixel values between pixels adjacent to a predetermined position of interest and an average value of difference values of adjacent pixel values within a predetermined range including the position of interest are first. The difference between the average value of the pixel values of the plurality of pixels at the preceding stage and the average value of the pixel values of the plurality of pixels at the subsequent stage, and the first evaluation value satisfy the second condition. Controlling whether or not the difference between the pixel values between the pixels adjacent to the target position and the second evaluation value satisfy the third condition, and determining the target position based on each determination result A first determination control step for controlling determination of whether or not is a block boundary candidate, a target position and a predetermined number of boundaries that are one block interval from the target position as a target boundary, and the target boundary is a first target Block boundary candidates in the decision control step A second determination control step for controlling whether or not the target position is a block boundary based on the determination result, and a block in the processing of the second determination control step And a processing control step of controlling block noise reduction processing for pixels within a predetermined range including a target position determined to be a boundary.

  In the signal processing device, method, and program of the present invention, for input image data, a difference value between pixel values adjacent to a predetermined position of interest and a difference value between adjacent pixel values within a predetermined range including the position of interest. It is determined whether the first value satisfies the first condition, and the difference between the average value of the pixel values of the plurality of pixels at the preceding stage and the average value of the pixel values of the plurality of pixels at the subsequent stage, and the first It is determined whether or not the evaluation value satisfies the second condition, and it is determined whether or not the difference between the pixel values between the pixels adjacent to the target position and the second evaluation value satisfy the third condition, Based on the determination result, it is determined whether or not the target position is a block boundary candidate, and the target position and a predetermined number of boundaries at one block interval from the target position are set as the target boundary, and the target boundary is the block boundary candidate. Whether or not Then, based on the determination result, it is determined whether or not the target position is a block boundary, and block noise reduction processing is performed on pixels within a predetermined range including the target position determined to be the block boundary. Applied.

  According to the present invention, it is possible to appropriately detect block noise and reduce block noise.

  FIG. 2 shows a configuration example of a DVD (Digital Versatile Disk) playback apparatus 1 to which the present invention is applied. The playback device 1 reads out and plays back image data and audio data recorded on the disk 2 by compression encoding according to the MPEG method. At this time, the block noise generated at the time of block encoding is applied to the image data. Reduce (remove) as described later.

  The MPEG compression coding is to perform compression coding of an image using the correlation between the time direction and the space direction of the image, and the use of the correlation in the space direction is the DCT coding which is block coding. This is realized by using (Discrete Cosin Transform). That is, the block noise generated here is generated in units of DCT blocks (8 pixels × 8 pixels).

  The optical head 11 includes an optical system such as a laser light source, a beam splitter, an objective lens, and a photodetector (light receiving element), a biaxial actuator, and the like. The optical head 11 irradiates the disk 2 with a laser beam and receives reflected light from the disk 2 when reproducing image data and audio data from the disk 2. The optical head 11 converts the received reflected light into an electrical signal and supplies it to the RF processor 14.

  The rotation drive unit 12 is composed of a spindle motor or the like, and drives the disk 2 to rotate, for example, at a constant linear velocity (CLV). The drive unit 13 includes a slide mechanism such as a sled motor for moving the disk 2 in the radial direction.

  The RF processor 14 receives supply of an electrical signal from the optical head 11 and forms a reproduction RF signal, a focus error signal, and a tracking error signal corresponding to data recorded on the disk 2. The focus error signal and tracking error signal formed here are supplied to the servo controller 15. The reproduction RF signal is supplied to the MPEG decoder 16. Also, address information read from the disk 2 is supplied from the RF processor 14 to the system controller 31.

  The servo controller 15 forms a control signal for controlling the rotation drive unit 12 and the drive unit 13 based on the control signal from the system controller 31, the focus error signal and the tracking error signal from the RF processor 14, and rotates the control signal. This is supplied to the drive unit 12 and the drive unit 13. As a result, the disc 2 loaded in the reproducing apparatus 1 is controlled by the rotary drive unit 12 so that the linear velocity is constant, and the track on the disc 2 on which data is recorded has a spot shape of an appropriate size. The laser beam can be scanned accurately.

  The MPEG decoder 16 performs processing such as inverse quantization and inverse DCT encoding on the reproduced RF signal from the RF processor 14 to decode image data and audio data that have been compressed by the MPEG method, and compress the compressed data. The original image data and audio data before encoding are restored. The decoded audio data is supplied to the audio reproduction processing unit 17, and the image data is supplied to the block noise reduction unit 18.

  The audio reproduction processing unit 17 forms digital audio data for reproduction from the supplied decoded digital audio data. The digital audio data for reproduction formed here is output through a digital I / F (not shown) or D / A converted and output.

  The block noise reduction unit 18 performs block noise reduction processing for reducing block noise, which will be described later, on the decoded image data (more precisely, a luminance signal) from the MPEG decoder 16 and digitally processes the processed digital image data. The output encoder 19 and the NTSC / PAL encoder 22 are supplied.

  The digital output encoder 19 forms digital image data for output from the supplied digital image data after the block noise reduction processing, and outputs the digital image data through the digital I / F 20 and the digital image data output terminal 21, for example, a monitor receiver ( (Not shown).

  The NTSC / PAL encoder 22 forms digital image data corresponding to the NTSC system / PAL system from the supplied digital image data after the block noise reduction processing, and supplies this to the D / A converter 23. The D / A converter 23 converts the supplied digital image data converted into the NTSC system / PAL system into an analog signal, and supplies the analog signal to the monitor receiver or the like through the analog image signal output terminal 24.

  The system controller 31 controls each unit of the playback apparatus 1 and is a microcomputer including a CPU, a ROM, a RAM, an EEPROM, and the like. The operation unit 32 receives an input operation from the user, and includes various operation keys such as a reproduction key, a stop key, and a pause key. The display unit 33 is configured by, for example, an LCD (Liquid Crystal Display) and displays various guidance messages.

  FIG. 3 shows a configuration example of the block noise reduction unit 18 of FIG.

  The luminance signal of the decoded image data from the MPEG decoder 16 is input to the block boundary candidate determination unit 51. The block boundary candidate determination unit 51 refers to each pixel value (luminance value) of the image data in the horizontal direction, for example, and uses a predetermined evaluation value set by the control unit 53 as will be described later. Block boundary candidate determination using the difference in pixel value (luminance value) is performed, and the determination result is notified to the block boundary determination unit 52.

  Based on the number (= 2n−1) set by the control unit 53 as described later, the block boundary determining unit 52, as shown in FIG. The boundaries (boundaries indicated by downward arrows in FIG. 4) that are located at one block interval up to the boundary where the blocks are separated are the confirmation target boundaries, and these are the block boundary candidates by the block boundary candidate determination unit 51. It is determined whether it has been determined (continuity is determined), and based on the determination result, it is determined whether the target position is a block boundary. The determination result is notified to the control unit 53.

  The block boundary determination unit 52 can specify a boundary at one block interval from the target position by counting a pixel clock signal separately input, for example, by 8 pixels with a 3-bit counter.

  Whenever the block boundary determination unit 52 determines that the target position is not a block boundary, the control unit 53 changes the magnitude of the evaluation value used in the block boundary candidate determination unit 51 (described later). The control unit 53 also controls the filtering unit 54 when the block boundary determination unit 52 determines that the position of interest is a block boundary, so that pixels in a predetermined range including the position of interest determined as the block boundary. The value is subjected to filter processing for removing block noise.

  Note that the control unit 53 can specify the pixel to be subjected to the filter process by counting the pixel clock signal separately input, for example, by 8 pixels with a 3-bit counter.

  The filtering unit 54 filters input image data (luminance signal) according to the control of the control unit 53. That is, when there is no filtering request, the filtering unit 54 outputs the original luminance signal to the digital output encoder 19 and the NTSC / PAL encoder 22, and when there is a filtering request, the filtering unit 54 replaces the original luminance signal with a filtering process. Is output to the digital output encoder 19 and the NTSC / PAL encoder 22.

  The color signal of the decoded image data from the MPEG decoder 16 is input to the delay circuit 55. The delay circuit 55 delays the color signal so as to be synchronized with the luminance signal from the filtering unit 54, and outputs the delayed color signal to the digital output encoder 19 and the NTSC / PAL encoder 22.

  Next, the configuration of the block boundary candidate determination unit 51 will be described. Image data (luminance signal) from the MPEG decoder 16 is input to the determination unit 61 of the block boundary candidate determination unit 51.

The determination unit 61 determines that the absolute value of the luminance difference (hereinafter referred to as a target pixel difference value DA) between adjacent pixels (hereinafter referred to as the target pixel) across the target position (target position) is a predetermined position. It is determined whether or not it is larger than the average value of the absolute values (hereinafter referred to as reference pixel difference values DB) of the luminance difference between adjacent pixels of the pixel group having the relationship (hereinafter referred to as reference pixels) (ie, the expression (1) ) Is determined).
Attention pixel difference value DA> average value of reference pixel difference value DB (1)

  When the determination unit 61 determines that the expression (1) is satisfied, the determination unit 61 outputs a signal (“1”) that becomes the H level to the AND circuit 64 (logical product circuit), and determines that the expression (1) is not satisfied. In this case, an L level signal (“0”) is output to the AND circuit 64.

  The determination process of the determination unit 61 will be described using the pixel data shown in FIG. 5 as an example. Note that the MPEG-compressed image data processed here is subjected to DCT encoding processing in units of blocks of 8 pixels × 8 pixels, so the blocks handled here are 8 pixels × 8 painters. It is configured. Here, each block boundary in the horizontal direction is detected, but the same can be done in the vertical direction.

  In the example of FIG. 5, the two pixels E and F sandwiching the target position P are the target pixels, and the four pixels A, B, C, and D arranged in the left direction from the target pixel E and the right direction from the pixel F A total of 8 pixels of the four pixels G, H, I, and J arranged in a row are reference pixels.

  At this time, the determination unit 61 determines the absolute value of the luminance difference between the pixels E and F (the pixel difference value DA = | the luminance value f of the pixel F−the luminance value e | of the pixel E) and the adjacent pixels of the reference pixel. Absolute value (reference pixel difference value D) (DB1 = | b−a |, DB2 = | c−b |, DB3 = | dc−, DB4 = | ed−, DB5 = | g −f |, DB6 = | hg |, DB7 = | i−h |, DB8 = | j−i |) and their average value (= (DB1 + DB2 + DB3 + DB4 + DB5 + DB6 + DB7 + DB8) / 8). And the determination part 61 determines whether Formula (1) is formed based on the calculation result.

  Although the absolute value of the luminance difference between adjacent pixels belonging to the same block is relatively small, adjacent pixels sandwiching the block boundary where block noise occurs (block B1 including pixels indicated by black circles in FIG. 5) The absolute value of the luminance difference between the pixel E belonging to the pixel E and the pixel F belonging to the block B2 made up of pixels indicated by white circles is large, as can be seen from the fact that the block itself can be seen. (There is a step on the pixel).

  That is, when the target pixel difference value DA is larger than the average value of the reference pixel difference values DB (when the formula (1) is satisfied), the target position is highly likely to be a block boundary. The target position is determined to be a block boundary candidate, and an H level signal indicating that is output to the AND circuit 64. On the other hand, when the target pixel difference value DA is equal to or smaller than the average value of the reference pixel difference value DB (when the formula (1) is not established), the determination unit 61 determines that the target position is less likely to be a block boundary. At this time, it is determined that the target position is not a block boundary candidate, and an L level signal indicating that is output to the AND circuit 64.

  The determination unit 61 is configured as shown in FIG.

  The latch circuit 101 and the latch circuit 102 latch input luminance values pixel by pixel so that the luminance values of adjacent pixels are supplied in synchronization with the difference calculation circuit 103. That is, the luminance value output from the latch circuit 102 is the luminance value input first, and the luminance value output from the latch circuit 101 is the luminance value one pixel after the luminance value output from the latch circuit 102. Become.

  The difference calculation circuit 103 calculates the target pixel difference value DA and the reference pixel difference value DB by obtaining the absolute value of the luminance difference between adjacent pixels. The difference value calculated by the difference calculation circuit 103 is supplied to the latch circuit unit 104.

  In the example of FIG. 5, the latch circuit unit 104 includes reference pixel difference values DB1, DB2, DB3, DB4, a target pixel difference value DA, and reference pixel difference values DB5, DB6, DB7, DB8 is latched in this order.

  The difference values latched by the first to fourth latch circuits of the latch circuit unit 104 are supplied to the averaging circuit 105 as reference pixel difference values DB5, DB6, DB7, and DB8 for the pixels on the right side of the target position P. Then, the difference values latched by the sixth to ninth latch circuits are supplied to the averaging circuit 106 as the reference pixel difference values DB1, DB2, DB3, DB4 for the pixel on the left side of the target position P. Further, the difference value latched by the fifth latch circuit of the latch circuit unit 104 is supplied to the comparison circuit 108 and the determination unit 63 as the target pixel difference value DA.

  The averaging circuits 105 and 106 calculate the average values of the four reference pixel difference values DB supplied thereto, and supply the calculated average values to the averaging circuit 107.

  The averaging circuit 107 receives the calculation results from the averaging circuits 105 and 106, calculates the average value of these two calculation results (the average value of the entire reference pixel difference values DB1 to DB8), and the calculation result Is supplied to the comparison circuit 108.

  The comparison circuit 108 compares the target pixel difference value DA from the latch circuit unit 104 with the average value of the reference pixel difference value DB from the averaging circuit 107, and determines whether or not Expression (1) is satisfied. . When it is determined that Expression (1) is satisfied, the comparison circuit 108 outputs an H level signal indicating that to the AND circuit 64. When it is determined that Expression (1) is not satisfied, the comparison circuit 108 is L level indicating that. Is output to the AND circuit 64.

Returning to FIG. 3, the determination unit 62 of the block boundary candidate determination unit 51 will be described next. The luminance value latched by the latch circuit 102 (FIG. 6) of the determination unit 61 is sequentially supplied to the determination unit 62. The determination unit 62 determines the absolute value of the difference between the average value AVL of the luminance values of the four pixels arranged on the left side of the target position and the average value AVR of the luminance values of the four pixels arranged on the right side as described later. It is determined whether or not the value is smaller than a predetermined evaluation value D set by the control unit 53 (determines whether or not Expression (2) is satisfied).
D> | Average value AVL−Average value AVR | (2)

  When determining that Expression (2) is satisfied, the determination unit 62 outputs a signal that becomes H level to the AND circuit 64, and when determining that Expression (2) is not satisfied, the determination unit 62 outputs a signal that is L level to the AND circuit 64. Output to.

  In the example of FIG. 5, the determination unit 62 includes the average value AVL of the luminance values of the four pixels B, C, D, and E arranged on the left side of the target position P and the four pixels arranged on the right side of the target position P. It is determined whether or not the absolute value of the difference value from the average value AVR of the luminance values of F, G, H, and I is smaller than a predetermined value D.

  Block noise occurs when the bit rate of the image data is low (when the compression rate is high) or when the image moves fast, so the luminance value between adjacent blocks across the block boundary There is a certain difference. However, the difference is usually smaller than, for example, the difference in luminance value between the lattice portion and the background portion (inside and outside of the contour) in the lattice pattern image.

  The evaluation value D is a value that generally represents the difference (large value) in luminance value between the inner side (grid portion) and the outer side (background portion) of the contour on the image. When the absolute value of the difference between the average value AVL of the luminance values of the pixels and the average value AVR of the luminance values of the four pixels arranged on the right side is smaller than the evaluation value D (when formula (2) is satisfied), The attention position P is highly likely to be a block boundary on condition that the expression (1) holds. Accordingly, at this time, the determination unit 62 determines that the target position is a block boundary candidate, and outputs an H level signal indicating that to the AND circuit 64. On the other hand, the absolute value of the difference value between the average value AVL of the luminance values of the four pixels arranged on the left side of the target position and the average value AVR of the luminance values of the four pixels arranged on the right side is equal to or greater than the evaluation value D. In the case (when Expression (2) is not established), the target position is unlikely to be a block boundary (highly likely to be a contour portion). Therefore, at this time, the determination unit 62 determines that the target position is not a block boundary candidate, and outputs an L level signal indicating that to the AND circuit 64.

  That is, the larger the evaluation value D is set, the easier it is to determine that the position of interest is a block boundary candidate, and the block boundary can be reliably detected. However, this means that a portion (contour portion) that is not a block boundary is easily mistaken for a block boundary.

  In addition to the determination condition (expression (1)) in the determination unit 61, the determination condition (expression (2)) in the determination unit 62 is further provided as shown in FIG. In addition, there is a step similar to the block boundary, and the expression (1) may be satisfied, so that the contour portion is prevented from being recognized as a block boundary candidate by the determination condition of the expression (2). If the contour portion of the image is detected as block noise and subjected to reduction processing, a problem such as blurring of the image occurs.

  The determination unit 62 is configured as shown in FIG.

  The luminance value latched by the latch circuits 101 and 102 of the determination unit 61 is supplied to the latch circuit unit 111. In the example of FIG. 5, the latch circuit unit 111 latches the luminance values of the pixels A, B, C, D, E, F, G, H, I, and J in this order by the respective latch circuits constituting the latch circuit unit 111. .

  The luminance values of the pixels F, G, H, and I on the right side of the target position P latched by the second to fifth latch circuits of the latch circuit unit 111 are supplied to the averaging circuit 112, and the sixth to sixth pixels are supplied. Pixels B, C, D, E on the left side of the target position P latched by the ninth latch circuit are supplied to the averaging circuit 113.

  The averaging circuits 112 and 113 calculate the average values AVL and AVR of the luminance values of the four pixels supplied to them, and output them to the comparison circuit 114.

  The comparison circuit 114 compares the absolute value of the difference value between the average value AVL and the average value AVR from the averaging circuits 112 and 113 with the evaluation value D, and determines whether or not Expression (2) is satisfied. When it is determined that Expression (2) is satisfied, the comparison circuit 114 outputs an H level signal indicating that to the AND circuit 64, and when it is determined that Expression (1) is not satisfied, the comparison circuit 114 is L level indicating that. Is output to the AND circuit 64.

  Returning to FIG. 3, the determination unit 63 of the block boundary candidate determination unit 51 will be described next.

The determination unit 63 determines whether the pixel-of-interest difference value DA supplied from the determination unit 61 is smaller than an evaluation value H set by the control unit 53 as will be described later (whether equation (3) is satisfied) Or not).
H> Remarked pixel difference value DA (3)

  The determination unit 63 outputs an H level signal to the AND circuit 64 when it is determined that the expression (3) is satisfied, and outputs an L level signal when the expression (3) is not satisfied. Output to.

  In the example of FIG. 5, it is determined whether or not the absolute value of the luminance difference between the pixels E and F is smaller than the evaluation value H.

  Although the absolute value of the luminance difference between adjacent pixels across the block boundary is above a certain level, it is usually smaller than the absolute value of the luminance difference between adjacent pixels belonging to the inside and outside of the contour on the image.

  Since the evaluation value H is a value that generally represents the absolute value of the luminance difference between adjacent pixels belonging to the inside and outside of the contour on the image, the target pixel difference value DA is greater than the evaluation value H. When it is small (when Expression (3) is satisfied), the target position is highly likely to be a block boundary on condition that Expressions (1) and (2) are satisfied. Accordingly, at this time, the determination unit 62 determines that the target position is a block boundary candidate, and outputs an H level signal indicating that to the AND circuit 64. On the other hand, when the pixel-of-interest difference value DA is equal to or greater than the evaluation value H (when Expression (3) is not established), the target position is unlikely to be a block boundary (highly likely to be an outline portion). Accordingly, at this time, the determination unit 63 determines that the target position is not a block boundary candidate, and outputs an L level signal indicating that to the AND circuit 64.

  That is, as the evaluation value H is set to a larger value, it is easier to determine that the target position is a block boundary candidate, and the block boundary can be reliably detected. However, this means that a portion (contour portion) that is not a block boundary is easily misidentified as a block boundary.

  In addition to the determination condition (equation (1)) in the determination unit 61 and the determination condition (expression (2)) in the determination unit 62, the determination condition (expression (3)) in the determination unit 63 is further provided. This is to more reliably prevent the contour portion from being recognized as a block boundary candidate.

  In this manner, the determination units 61 to 63 determine whether or not the target position is a block boundary candidate according to each determination condition.

  The AND circuit 63 receives a signal representing the determination result from the determination units 61 to 63, and performs a logical product operation there. Therefore, from the AND circuit 64, when all of the determination results in the determination units 61 to 653 indicate that the position of interest is a block boundary candidate (the position of interest is the condition of Expression (1) to Expression (3)). ), An H level signal is output to the block boundary determination unit 52 (the block boundary candidate determination unit 51 as a whole is notified that the target position is a block boundary candidate).

  On the other hand, when any one of the determination results of the determination unit 61 to the determination unit 63 indicates that the target position is not a block boundary candidate (when the conditions of the expressions (1) to (3) are not satisfied) , An L-level signal is output to the block boundary determination unit 52 (the block boundary candidate determination unit 51 as a whole is notified that the target position is not a block boundary candidate).

  Next, the configuration of the block boundary determination unit 52 will be described with reference to FIG.

  The m delay circuits R1 to Rm constituting the delay unit 121 delay the determination result from the block boundary candidate determination unit 51 by 8 pixels and output the result to the continuity confirmation circuit 122. That is, to the continuity confirmation circuit 122, the determination result of the block boundary candidate determination unit 51 with respect to the target position and the boundary separated from the target position by 8 pixels in the left-right direction is input in synchronization.

  The continuity check circuit 122 is based on the number (= 2n−1) set by the control unit 53, and is one block from the attention position and the boundary separated by n blocks in the left-right direction as shown in FIG. In order to obtain the determination result of the block boundary candidate determination unit 51 for the boundary at the interval (the boundary indicated by the downward arrow in FIG. 4), the necessary delay circuit R is selected.

  For example, when the number set by the control unit 53 is 3 (= 2 × 2-1), the continuity confirmation circuit 122 selects the delay circuits R1 and R2 of the delay unit 121. That is, in this case, referring to FIG. 1 as an example, the determination result of the boundary P0 input without delay, the determination result of the boundary P1 delayed by 8 pixels by the delay circuit R1, and an additional 8 pixels by the delay circuit R2 The determination result of the boundary P1 delayed by the minute is input to the continuity confirmation circuit 122 in synchronization.

  Then, the continuity confirmation circuit 122 determines the continuity of the block boundary based on the determination result by the block boundary candidate determination unit 51 for the confirmation target boundary input to the selected delay circuit R.

  Specifically, as shown in FIG. 10, the logical product of the determination results of the block boundary candidate determination unit 51 is taken at the boundary of (2n-1) 1 block intervals. That is, when all the confirmation target boundaries are set as block boundary candidates, the continuity confirmation circuit 122 determines that the target position is a block boundary. The determination result here is notified to the control unit 53.

  Next, the operation of the control unit 53 will be described with reference to the flowchart of FIG.

  In step S1, the control unit 53 evaluates the evaluation value D (equation (2)) used in the determination of the determination unit 62 of the block boundary candidate determination unit 51 and the evaluation value H (expression (equation) used in the determination of the determination unit 63. Let (3)) be the largest value among settable values. By making the evaluation values D and H large, even block boundaries with large steps can be determined as block boundary candidates without being overlooked as being contour boundaries.

  The control unit 53 also sets the number (2n−1) of boundaries (confirmation target boundaries) confirmed by the block boundary continuity determination of the block boundary determination unit 52 to the maximum. By increasing the evaluation values D and H, it becomes easy for the block boundary candidate determination unit 51 to determine that a contour boundary with a small step is a block boundary candidate (although it is likely to be mistaken), but a confirmation target in continuity determination By increasing the number of boundaries, it is possible to prevent a contour boundary determined as a block boundary candidate from being determined as a block boundary.

  Next, in step S2, the control unit 53 determines whether or not the position of interest is determined to be a block boundary by the block boundary determination unit 52. If it is determined that the target position is not a block boundary, the control unit 53 proceeds to step S3. .

  In step S3, the control unit 53 reduces the magnitudes of the evaluation values D and H by one rank (by a predetermined value). The control unit 53 also reduces the number of confirmation target boundaries for block boundary continuity determination by one rank (a predetermined number). As the number of confirmation target boundaries increases, in principle, the block boundary can be accurately detected. However, as the number of confirmation target boundaries increases, as shown in FIG. There is a high possibility that it will coincide with the end VL. When the confirmation target boundary matches the edge VL of the image, even if the target position is a block boundary, it is determined that the target position is not a block boundary, and eventually the block boundary is missed.

  Therefore, the number of boundaries to be confirmed for continuity determination is reduced to reduce the possibility of occurrence of a problem as shown in FIG. On the other hand, the evaluation values D and H are reduced by one rank to reduce the possibility that the contour boundary is determined as a block boundary candidate, and the block boundary is appropriately detected as a whole.

  Next, in step S4, it is determined whether or not the number of confirmation target boundaries for continuous determination <3. If it is determined that the number of confirmation target boundaries <3, the process returns to step S2 and the control unit 53 The subsequent processing is executed.

  As described above, when the process of step S3 is repeatedly performed and the number of confirmation target boundaries for continuity determination is 3, the block boundary determination unit 52 may determine that none of them is a block boundary candidate. As shown in FIG. 13, when it is determined that either the front or rear boundary other than the target position is a block boundary candidate, the target position is determined to be a block boundary. By doing so, as shown in FIG. 14, even if the boundary P2 coincides with the edge VL of the image among the other boundaries P0 and P2 of the target position P1, the target position that is originally a block boundary is blocked. It becomes possible to determine that it is a boundary.

  When it is determined in step S2 that the target position is a block boundary, the process proceeds to step S5, and the control unit 53 controls the filtering unit 54 to block the pixels within a predetermined range sandwiching the target position. Apply filtering to reduce noise.

  In the example of FIG. 5, filtering processing is performed on the eight pixels B, C, D, E, F, G, H, and I sandwiching the target position P.

Here, the filtering process will be briefly described. First, the basic correction amount is calculated by Expression (4).
Basic correction amount = | f−e | − (| ed−d | + | g−f |) / 2 (4)

  For example, the pixel values of these pixels are ITU-RBT. In the case of 64, 64, 56, 64, 128, 136, 128, and 128 according to the definition of 601, the basic correction amount = 56 (= 64− (8 + 8) / 2).

Based on the basic correction amount, the correction amount for each pixel corresponding to the distance from the target position P is calculated as follows.
Correction amount of pixels E and F = basic correction amount / 2
Correction amount of pixels D and G = basic correction amount / 4
Correction amount of pixels C and H = basic correction amount / 8
Correction amount of pixels B and I = basic correction amount / 16

  The correction amount calculated as described above is added to or subtracted from the luminance value of each pixel. Note that when fe <0, the respective correction amounts are added to the luminance values f, g, h, and i of the pixels F, G, H, and I, and the luminance values of the pixels B, C, D, and E are obtained. The respective correction amounts are subtracted from b, c, d, and e. On the other hand, when fe> 0, the respective correction amounts are subtracted from the luminance values f, g, h, i of the pixels F, G, H, I, and the luminance values of the pixels B, C, D, E are obtained. The respective correction amounts are added to b, c, d, and e. That is, the luminance values of the pixels b, c, d, e, f, g, h, i are corrected as shown by the dotted lines in FIG.

  When it is determined in step S4 that the number of confirmation target boundaries <3, or when the filtering process is executed in step S5, the control unit 53 ends this process, and for the next target position, The processing from step S1 to step S5 is executed in the same manner.

  In the above description, the case where the block is composed of 8 pixels × 8 pixels has been described as an example. However, as shown in FIG. 17, 16 pixels × 16 pixels, which are MPEG1 processing units such as a video CD, are set to 1 It can also be handled as one block.

  In the above description, the DVD playback apparatus 1 has been described as an example, but the present invention can also be applied to devices such as a DVD recorder, an HDD recorder, and a CS digital tuner.

  Further, in the above, the control unit 53 of the block noise reduction unit 18 sets the evaluation values D and H and the number of confirmation target boundaries for continuity determination based on the determination result of the block boundary determination unit 52. However, for example, when reproducing an image in which block noise is likely to occur in advance, such as an image recorded for a long period of time, the user operates the operation unit 32 to more reliably detect the block noise boundary. The evaluation values D and H can be set higher or the number of confirmation target boundaries can be set larger.

  The series of processes described above can be realized by hardware, but can also be realized by software. When a series of processing is realized by software, a program constituting the software is installed in a computer, and the program is executed by the computer, so that the block noise reduction unit 18 described above is functionally realized. The

  FIG. 18 is a block diagram illustrating a configuration of an embodiment of a computer 501 that functions as the block noise reduction unit 18 as described above. An input / output interface 516 is connected to a CPU (Central Processing Unit) 511 via a bus 515, and the CPU 511 receives a command from an input unit 518 such as a keyboard and a mouse via the input / output interface 516. When input, it is stored in a recording medium such as a read only memory (ROM) 512, a hard disk 514, or a magnetic disk 531, an optical disk 532, a magneto-optical disk 533, or a semiconductor memory 534 mounted in the drive 520. The program is loaded into a RAM (Random Access Memory) 513 and executed. Thereby, the various processes described above are performed. Further, the CPU 511 outputs the processing result to an output unit 517 such as an LCD (Liquid Crystal Display) via the input / output interface 516 as necessary. The program is stored in advance in the hard disk 514 and the ROM 512 and provided to the user integrally with the computer 501 or as a package medium such as the magnetic disk 531, the optical disk 532, the magneto-optical disk 533, and the semiconductor memory 534. Or can be provided to the hard disk 514 via the communication unit 519 from a satellite, a network, or the like.

  In the present specification, the step of describing the program provided by the recording medium is not limited to the processing performed in chronological order according to the described order, but is not necessarily performed in chronological order. It also includes processes that are executed individually.

It is a figure explaining the conventional block boundary detection method. It is a block diagram which shows the structural example of the reproducing | regenerating apparatus to which this invention is applied. It is a block diagram which shows the structural example of the block noise reduction part of FIG. It is a figure explaining operation | movement of the block boundary determination part 52 of FIG. It is a figure explaining operation | movement of the block boundary candidate determination part 51 of FIG. It is a block diagram which shows the structural example of the determination part 61 of FIG. It is a figure which shows the pixel data of an outline part. It is a block diagram which shows the structural example of the determination part 62 of FIG. It is a block diagram which shows the structural example of the block boundary determination part of FIG. It is another figure explaining operation | movement of the block boundary determination part of FIG. It is a flowchart explaining operation | movement of the control part of FIG. It is another figure explaining operation | movement of the block boundary determination part of FIG. It is another figure explaining operation | movement of the block boundary determination part of FIG. It is another figure explaining operation | movement of the block boundary determination part of FIG. It is a figure explaining operation | movement of the filtering part of FIG. It is another figure explaining operation | movement of the filtering part of FIG. It is a figure which shows the structure of a block. And FIG. 16 is a block diagram illustrating a configuration example of a personal computer.

Explanation of symbols

18 block noise reduction unit, 51 block boundary candidate determination unit, 52 block boundary determination unit, 53 control unit, 54 filtering unit, 61 determination unit, 62 determination unit, 63 determination unit

Claims (7)

In a signal processing device that reduces block noise of input image data that is block-decoded and sequentially supplied when block-coded digital image data is block-decoded and output,
Regarding the input image data, a difference value of pixel values between pixels adjacent to a predetermined position of interest and an average value of difference values of adjacent pixel values within a predetermined range including the position of interest satisfy the first condition. Whether or not the difference between the average value of the pixel values of the preceding pixels of the target position and the average value of the pixel values of the subsequent pixels and the first evaluation value satisfy the second condition. Whether the pixel value difference between the pixels adjacent to the target position and the second evaluation value satisfy the third condition, and based on each determination result, the target position is First determination means for determining whether or not a block boundary candidate;
The target position and a predetermined number of boundaries that are one block interval from the target position are used as a check target boundary, and it is determined whether or not the check target boundary is determined as a block boundary candidate by the first determination unit. , Based on the determination result, second determination means for determining whether or not the target position is a block boundary;
A signal processing apparatus comprising: processing means for performing block noise reduction processing on pixels within a predetermined range including the target position determined to be a block boundary by the second determination means. The apparatus further comprises changing means for changing the values of the first evaluation value, the second evaluation value, and the number of the confirmation target boundaries based on the determination result by the second determination means. Item 2. The signal processing device according to Item 1. The changing means changes the value of the first evaluation value or the second evaluation value from a value that makes it easy to satisfy the first condition or the second condition to a value that makes it difficult to satisfy the condition. The signal processing device according to claim 2, wherein the number of target boundaries is changed from a large number to a small number. The second determination unit determines that the target position is a block boundary when all of the target position and the confirmation target boundary are determined to be block boundary candidates by the first determination unit. The signal processing apparatus according to claim 1. When the number of confirmation target boundaries is three, the second determination unit is configured such that the target position is a block boundary candidate, and one of the two confirmation target boundaries is a block boundary candidate. The signal processing device according to claim 4, wherein the target position is determined to be a block boundary. In a signal processing method for reducing block noise of input image data that is block-decoded and sequentially supplied when block-coded digital image data is block-decoded and output,
Regarding the input image data, a difference value of pixel values between pixels adjacent to a predetermined position of interest and an average value of difference values of adjacent pixel values within a predetermined range including the position of interest satisfy the first condition. Whether or not the difference between the average value of the pixel values of the preceding pixels of the target position and the average value of the pixel values of the subsequent pixels and the first evaluation value satisfy the second condition. Whether the pixel value difference between the pixels adjacent to the target position and the second evaluation value satisfy the third condition, and based on each determination result, the target position is A first determination step of determining whether or not the block boundary candidate;
Whether or not the target position and a predetermined number of boundaries at one block interval from the target position are to be confirmed, and whether or not the confirmation target boundary is determined to be a block boundary candidate in the process of the first determination step. A second determination step of determining whether or not the target position is a block boundary based on the determination result;
A processing step of performing block noise reduction processing on a pixel within a predetermined range including the target position determined to be a block boundary in the processing of the second determination step. Method. A program for reducing block noise of input image data that is block-decoded and sequentially supplied when block-coded digital image data is block-decoded and output.
Regarding the input image data, a difference value of pixel values between pixels adjacent to a predetermined position of interest and an average value of difference values of adjacent pixel values within a predetermined range including the position of interest satisfy the first condition. Whether the first evaluation value satisfies the second condition or not, and the difference between the average value of the pixel values of the plurality of pixels at the preceding stage and the average value of the pixel values of the plurality of pixels at the subsequent stage of the target position. The determination of whether or not the difference between the pixel values between the pixels adjacent to the target position and the second evaluation value satisfies the third condition, and the target position based on each determination result is A first determination control step for controlling determination of whether or not the block boundary candidate;
Whether or not the target position and a predetermined number of boundaries at one block interval from the target position are used as check target boundaries, and the check target boundary is determined to be a block boundary candidate in the processing of the first determination control step. And a second determination control step for controlling determination of whether or not the target position is a block boundary based on the determination result;
Causing the computer to execute a process including a process control step for controlling a block noise reduction process for pixels within a predetermined range including the target position determined to be a block boundary in the process of the second determination control step. A program characterized by that.

Images