JP2005051540A - Analog / digital conversion method and apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an analog / digital conversion method in consideration of a signal change speed.
In an analog / digital conversion process for converting an analog signal into a digital signal, it is detected whether the amplitude value of the analog signal has changed by a predetermined voltage value and whether the direction of the change is an increasing direction or a decreasing direction. At the same time, the time during which the analog signal changes by the predetermined voltage value is measured, and the digital signal is composed of a code indicating the direction of the change and a digital code indicating the measured time.
[Selection] Figure 2

Description

  The present invention relates to an analog / digital conversion method and apparatus for converting an analog signal into a digital signal.

  Many of the current electronic devices are digital devices that digitally process signals, as represented by computers. For this reason, an analog / digital conversion device that converts an analog signal that changes over time into a digital signal is provided at the input stage of the digital device.

  As described in Non-Patent Document 1 below, a conventional analog / digital conversion device converts an analog signal into a digital signal based on the sampling theorem proposed by Shannon (CE Shannon) and Isao Someya. It has been converted. That is, in the conventional analog / digital conversion device, this analog signal is sampled at equal intervals in time at a high rate that is at least twice the maximum frequency of the analog signal to be converted, and the signal value at each sampling point is quantized. It is a digital signal.

C. E. Shannon: Communications in the presence of noise, Proc.IRE, Vol.37, No.1, pp.10-21, 1949. Isaya Isao: Waveform transmission, Shukyosha, 1949.

  There are various analog signals to be converted. For example, there is a signal such as a music signal in which a high frequency component is localized only in a part of the signal and the frequency of the other part is low. When converting such an analog signal into a digital signal with a conventional analog / digital converter, a high-rate equal time interval is set so that a high-frequency portion in the analog signal is converted into a digital signal with high accuracy. There is a problem that the low-frequency portion is uniformly sampled at this high rate at equal time intervals, and there is a lot of extra collected data and wasteful processing.

  In order to further improve the accuracy of a digital signal with a conventional analog / digital converter, it is necessary to increase the bit of the digital signal in order to reduce the quantization error. However, in order to increase the bit rate, it is indispensable to increase the circuit scale of the analog / digital conversion device and to increase the processing speed, and it has become difficult to realize in terms of cost.

  An object of the present invention is to provide an analog / digital conversion method and apparatus capable of converting an analog signal into a digital signal with high accuracy and low cost without using the conventional sampling theorem.

  The analog / digital conversion method of the present invention is an analog / digital conversion method for converting an analog signal into a digital signal, and whether or not the amplitude value of the analog signal has changed by a predetermined voltage value and the direction of the change is an increasing direction or While detecting whether the direction is decreasing, the time during which the analog signal changes by the predetermined voltage value is measured, and the digital signal is composed of a code indicating the direction of the change and a digital code indicating the measured time It is characterized by doing.

  With this configuration, the time measurement value is sampled according to the speed at which the analog signal changes by a predetermined voltage value, and the value is quantized with a high-speed clock period, and the analog signal is converted into a digital signal with high accuracy. The

  According to the analog / digital conversion method of the present invention, the lower limit frequency of the clock used for the time measurement is determined by the maximum frequency of the analog signal, the dynamic range which is a change range of the signal value, and the predetermined voltage value determined in advance. It is characterized by that.

  With this configuration, it is possible to appropriately set a predetermined voltage value and a clock frequency for time measurement according to the analog signal to be converted, and it is possible to convert the digital signal adaptively and with higher accuracy.

  The analog / digital conversion device according to the present invention is an analog / digital conversion device that converts an analog signal into a digital signal, a comparator that detects whether an amplitude value of the analog signal has changed by a predetermined voltage value, and the change Increase / decrease detecting means for detecting whether the direction of the signal is increasing or decreasing, measuring means for measuring the time during which the analog signal changes by the predetermined voltage value, a sign indicating the direction of the change, and the measurement And a register means for sequentially storing and outputting digital codes representing the measured time.

  With this configuration, the time measurement value is sampled sequentially as the analog signal changes by a predetermined voltage value, and is converted into a digital signal adaptively and with high accuracy according to the speed of the analog signal change with a small circuit scale. The

  The measuring means of the analog / digital conversion apparatus of the present invention is characterized by comprising a counter that counts clock signals and uses an output signal from the comparator as a reset signal.

  With this configuration, it is possible to improve the accuracy of time measurement by a simple means of clock measurement.

  According to the present invention, an analog signal can be adaptively converted into a digital signal with high accuracy and low cost according to the speed of change, and high-precision sampling can be realized without increasing the circuit scale. Become.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 is a diagram for explaining the processing outline of an analog / digital conversion method according to an embodiment of the present invention. The curve is an analog signal waveform to be converted, with the horizontal axis representing time and the vertical axis representing signal amplitude (voltage value). Conventionally, sampling time intervals are set at equal intervals, and the signal value at each sampling point is quantized. In the present embodiment, the signal amplitude on the vertical axis changes by a predetermined voltage value Vref. The direction and time interval are detected, and the code indicating the direction of change and the clock count value of the detection time interval are used as digital signals.

  That is, the time from the point A1 in FIG. 1 in the direction of changing by the predetermined voltage value Vref, the “positive direction” in which the signal amplitude increases in the illustrated example, and the time from the point A1 to the point of change A2 by the predetermined voltage value Vref. The interval T1 is detected, and a set of the “positive direction” and the clock count value in the time interval T1 is used as a digital signal. Next, the direction changes from the point A2 to the point A3 by a predetermined voltage value Vref (in the illustrated example, "Positive direction") and the time interval T2 from the point A2 to the point A3 are detected, and the pair of the sign and the clock count value is set to the next digital signal in the same manner as described above, and then from the point A3 to the point A3. A direction (a negative direction in the illustrated example) that changes by a predetermined voltage value Vref up to A4 and a time interval T3 from the point A3 to the point A4 are detected. Next digital signal ... The analog signal sequence of digital signals (forward + clock count value of the time interval T1, clock count value in the positive direction + time interval T2, the clock count value of the negative direction + time interval T3, ...) into a. Naturally, the time intervals T1, T2, T3,... Are unequal intervals, and therefore their clock count values are also unequal intervals.

  FIG. 2 is a detailed explanatory diagram of FIG. In the analog / digital conversion device of this embodiment, the high-speed clock signal is counted by a counter, and the amplitude value of the analog signal is always positive (increase) or negative (decrease) from the previous value separately from the operation of the counter. Whether the direction has changed by a predetermined voltage value Vref is detected with high accuracy.

  Then, when it is detected that the signal amplitude value of the analog signal has reached a point A1 where it has changed by a predetermined voltage value Vref with respect to the previous value, the clock counting counter is reset, and a new counting is started. The counter count value until the point at which the point A2 having changed by the predetermined voltage value Vref is detected is set to a value obtained by quantizing the detection time interval T1 in units of clock cycles, and the counter is reset to the next time. Measurement of the interval T2 starts. In the example shown in FIG. 2, the clock count value in the detection time interval T1 is “4” in decimal (“100” in binary).

  FIG. 3 is a diagram illustrating an example of a block configuration of the analog / digital conversion apparatus according to the present embodiment. This analog / digital conversion device includes, for example, an 8-bit counter 1 that counts an input high-speed clock signal in binary numbers, and a counter value when the reset signal is input to the counter 1 (decimal number “4”). In the case of "," a binary number "00000100") is received and a register 2 in which a 1-bit code indicating a signal change direction is further written in the 8-bit count value. A total of 9-bit digital signal in the register 2 is transferred from the counter 1 to the register 2 every time a pulse signal is output from the monostable multivibrator 11 described later, and from the register 2 to the input buffer of the interface board 3 of the digital device. It becomes the composition which is done.

  In addition to the counter 1 and the register 2 described above, the analog / digital conversion device of this embodiment includes a sample hold circuit 5 to which an analog signal to be converted is input, and a sample and hold circuit to which the analog signal to be converted is input to a plus terminal. 5, an adder 6 to which the analog signal of the previous value held at 5 is input to the minus terminal, a reference voltage value generator 7 for generating the set predetermined voltage value Vref, and an output signal of the adder 6 to the plus terminal The first comparator 8 that inputs and outputs the output voltage value of the reference voltage value generator 7 to the negative terminal, and the output signal of the adder 6 is input to the negative terminal and the output voltage value of the reference voltage value generator 7 is the positive terminal And a two-input OR gate 10 having the output signal of the first comparator 8 and the output signal of the second comparator 9 as input signals.

  The analog / digital converter further converts the monostable multivibrator 11 that performs pulse conversion using the output signal of the 2-input OR gate 10 as a trigger signal, the output signal of the first comparator 8, and the output pulse signal of the monostable multivibrator 11. A first two-input AND gate 12 as an input signal, a second two-input AND gate 13 as an input signal, the output signal of the second comparator 9 and the output pulse signal of the monostable multivibrator 11, and a monostable A first delay circuit 14 that delays the output pulse signal of the multivibrator 11 for a first predetermined time and a second delay circuit 15 that delays the second predetermined time.

  The output pulse signal of the monostable multivibrator 11 is supplied not only to the first delay circuit 14 and the second delay circuit 15 but also to the sample hold circuit 5, and the digital data of the counter 1 is written to the register 2. Given as a signal. The sign storage memory 2 a provided in the register 2 is connected to the outputs of the AND gates 12 and 13, and when the “1” signal is output from the AND gate 12, “0” indicating the positive direction of signal change is displayed. When the “1” signal is output from the AND gate 13 and written in the sign bit storage memory 2a, “1” indicating the negative direction of the signal change is written. The first delay circuit 14 outputs a reset signal to the counter 1, and the second delay circuit 15 receives digital data that is the contents of the register 2 including the sign bit storage memory 2 a in the input buffer of the interface board 3. A set signal for transfer is output.

  Next, the operation of the analog / digital conversion apparatus according to this embodiment having the above-described configuration will be described. The analog signal to be converted is passed through a guard filter (not shown) in advance to remove high-frequency signal components and measurement additive noise that exceed the signal analysis band, and are input to the adder 6 and the sample hold circuit 5. When the start signal is input to the monostable multivibrator 11, the initial value of the input analog signal is sampled by the sample hold circuit 5 using the pulse signal that is output, and the output signal from the first delay circuit 14 is used. The counter 1 is reset, and thereafter a predetermined analog / digital conversion operation is repeated.

  In this embodiment, an analog signal is first passed through a guard filter, so that the highest frequency included in the analog signal to be analyzed is first predicted. Next, a predetermined voltage value Vref is determined by the number of equivalent quantization bits indicating how the signal value is approximated by dividing the dynamic range indicating the change range of the signal value, and using this value and the value of the highest frequency, The lower frequency limit value of the high-speed clock signal counted by the counter 1 is determined.

  The adder 6 outputs the difference between the analog signal amplitude value of the current value and the analog signal amplitude value of the previous value held in the sample hold circuit 5, and this difference is the first comparator 8 and the second comparator. 9 is input. The first comparator 8 and the second comparator 9 are given a predetermined voltage value Vref from the reference voltage value generator 7, and when the amplitude value of the analog signal is higher than the previous value by the predetermined voltage value Vref, A “1” signal is output from the first comparator 8, and a “1” signal is output from the second comparator 9 when the amplitude value of the analog signal is lower than the previous value by a predetermined voltage value Vref.

  The 2-input OR gate 10 outputs a “1” signal when a “1” signal is output from either the first comparator 8 or the second comparator 9, and the monostable multivibrator 11 is output from the 2-input OR gate 10. The output “1” signal operates as a trigger signal.

  The monostable multivibrator 11 outputs a binary pulse signal that is “1” for a predetermined period when “1” is output from the two-input OR gate 10, and the binary pulse signal is output from the AND gates 12 and 13 and the delay circuit. 14 and 15 and also supplied to the sample-and-hold circuit 5 to hold the analog signal value of the current value as the previous value of the next time. Further, after the digital data of the counter 1 is written to the register 2, the data is interfaced. Transfer to the input buffer of board 3.

  The AND gate 12 receives the output signal of the first comparator 8 and the binary pulse signal from the monostable multivibrator 11, and when both become "1", the sign bit storage memory 2a of the register 2 is stored. "0" (signal change is positive direction) is written in The AND gate 13 receives the output signal of the second comparator 9 and the binary pulse signal from the monostable multivibrator 11, and when both become “1”, the sign bit storage memory of the register 2 Write "1" (signal change is in negative direction) to 2a.

  The counter 1 receives a delay signal obtained by delaying the binary pulse signal output from the monostable multivibrator 11 by the first delay circuit 14 for a first predetermined time. That is, after the contents of the counter 1 are reliably transferred to the register 2 at the output timing of the monostable multivibrator 11, the delay signal from the first delay circuit 14 is input to the counter 1 and reset. At the same time, a high-speed clock signal for counting the time interval Tn is input to the counter 1. As described above, the counter 1 counts the number of high-speed clock signals input from the reset signal input to the next reset signal input. The count value is always connected to the digital code receiving unit from the counter 1 of the register 2 and is output in synchronization with the output timing of one of the two comparators 8 and 9 that perform a reverse operation in both positive and negative directions. The data is transferred to the register 2 at the timing of the output binary pulse signal from the monostable multivibrator 11.

  With the above operation, every time the analog signal amplitude value changes by the predetermined voltage value Vref, a digital signal having a 9-bit configuration is successively transferred from the register 2 to the input buffer of the interface board 3. At this time, the second delay circuit 15 is written in the input buffer of the interface board 3 by the transfer instruction signal whose timing is adjusted in the same manner as described above, and is sent to the subsequent digital device via the buffer for digital processing. Is done.

  As described above, the analog / digital conversion apparatus according to the present embodiment generates a digital signal composed of sampling sequences with unequal intervals in time. Therefore, the digital signal is converted into a conventional digital signal (temporal etc. Digital processing cannot be performed with the same processing algorithm as a digital signal obtained by sampling at intervals, and a new processing algorithm needs to be constructed.

  However, before digital processing by the digital device, the digital processing algorithm of the existing asset is converted by converting the digital signal consisting of the unequal interval sampling sequence of the present embodiment into the digital signal consisting of the conventional arbitrary equidistant sequence. It can be used as it is. As the conversion method, for example, the conversion method described in Japanese Patent Application Laid-Open No. 2001-292990, which was previously filed by the present applicant and published, is not limited to this conversion method.

  As described above, according to the analog / digital conversion method and apparatus of the present embodiment, the predetermined voltage value Vref that determines the interval of sampling the signal value can be set with very high accuracy with the current technology. In the embodiment, since only the voltage value is prepared, it is only necessary to accurately determine whether the input analog signal has changed by the predetermined voltage value Vref in the positive or negative direction. A digital signal can be generated adaptively and simply according to the speed of change.

  Further, in the present embodiment, adjacent unequal interval sampling times are quantized by counting the counter in units of clock cycles, so that a conventional quantizer is unnecessary and the circuit configuration is extremely simple. In addition, since the time measurement accuracy is significantly improved at present, the quantization accuracy can be further increased at low cost.

  Of course, the analog / digital conversion method of the present invention cannot be applied in principle when the analog signal is a DC signal.

  Since the present invention can convert an analog signal into a digital signal with a very simple circuit configuration with high accuracy, it is useful as an analog / digital conversion device used in an input stage of a digital device, and can be applied to various adaptive processing and control. It is.

It is explanatory drawing of the process outline | summary of the analog / digital conversion method which concerns on one Embodiment of this invention. FIG. 2 is a detailed explanatory diagram of FIG. 1. 1 is a block configuration diagram of an analog / digital conversion apparatus according to an embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Counter 2 Register 2a Signal bit storage memory of signal change 5 Sample hold circuit 6 Adder 7 Reference voltage value (predetermined voltage value Vref) generator 8, 9 Comparator 10 2 input OR gate 11 Monostable multivibrator 12, 13 2 Input and gate 14, 15 delay circuit

Claims (4)

In the analog / digital conversion method for converting an analog signal into a digital signal, the amplitude value of the analog signal is changed by a predetermined voltage value, and whether the direction of the change is an increasing direction or a decreasing direction is detected. An analog / digital conversion characterized in that a time during which the analog signal changes by the predetermined voltage value is measured, and the digital signal is constituted by a code indicating the direction of the change and a digital code indicating the measured time. Method. The lower limit frequency of the clock used for the time measurement is determined by the maximum frequency of the analog signal, the dynamic range which is a change range of the signal value, and the predetermined voltage value determined in advance. Analog / digital conversion method. In an analog / digital conversion device that converts an analog signal into a digital signal, a comparator that detects whether or not the amplitude value of the analog signal has changed by a predetermined voltage value, and the direction of the change is an increasing or decreasing direction An increase / decrease detecting means for detecting the above, a measuring means for measuring the time during which the analog signal changes by the predetermined voltage value, a code indicating the direction of the change, and a digital code indicating the measured time are sequentially stored. And an analog / digital converter characterized by comprising: register means for outputting the output. 4. The analog / digital conversion apparatus according to claim 3, wherein the measuring means includes a counter that counts a clock signal and uses an output signal from the comparator as a reset signal.

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