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JP2005045054A - Group III nitride semiconductor light emitting device - Google Patents

Group III nitride semiconductor light emitting device Download PDF

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JP2005045054A
JP2005045054A JP2003278276A JP2003278276A JP2005045054A JP 2005045054 A JP2005045054 A JP 2005045054A JP 2003278276 A JP2003278276 A JP 2003278276A JP 2003278276 A JP2003278276 A JP 2003278276A JP 2005045054 A JP2005045054 A JP 2005045054A
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group iii
iii nitride
nitride semiconductor
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Masaki Furukawa
勝紀 古川
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Sharp Corp
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Abstract

【課題】 n型導電性基板を用いたIII族窒化物半導体発光素子において、基板側より光を取り出す発光素子の不良率の低減および光り取り出し効率を向上させ、工業的規模でIII族窒化物半導体発光素子の量産を図る。
【解決手段】 本発明のIII族窒化物半導体発光素子は、導電性を有する透光性のn型半導体基板上に、III族窒化物半導体膜と、p型電極とを備え、n型半導体基板より光を取り出す発光素子であって、III族窒化物半導体膜の光取り出し方向と反対側の表面の少なくとも一部と、III族窒化物半導体膜の側面およびn型半導体基板の側面の少なくとも一部に、絶縁性の保護膜を有することを特徴とする。
【選択図】 図1
PROBLEM TO BE SOLVED: To reduce a defect rate of a light emitting element for extracting light from the substrate side and improve light extraction efficiency in a group III nitride semiconductor light emitting element using an n-type conductive substrate, and to provide a group III nitride semiconductor on an industrial scale. Aim for mass production of light emitting devices.
A group III nitride semiconductor light emitting device of the present invention comprises a group III nitride semiconductor film and a p-type electrode on a light-transmitting n-type semiconductor substrate having conductivity, and an n-type semiconductor substrate. A light-emitting element for extracting light, wherein at least part of the surface of the group III nitride semiconductor film opposite to the light extraction direction, at least part of the side surface of the group III nitride semiconductor film and the side surface of the n-type semiconductor substrate And an insulating protective film.
[Selection] Figure 1

Description

本発明は、導電性半導体基板上に作製するIII族窒化物半導体発光素子に関する。   The present invention relates to a group III nitride semiconductor light emitting device fabricated on a conductive semiconductor substrate.

従来、GaNなどに代表されるIII族窒化物半導体は、その特性を利用して、発光素子およびハイパワーデバイスとして利用または研究されている。たとえば、発光素子を作製する場合、構成する組成を調整することにより、技術的には紫色から橙色までの幅の広い発光素子として利用することができる。近年、その特性を利用して、青色発光ダイオードまたは緑色発光ダイオードの実用化がなされ、半導体レーザ素子として青紫色半導体レーザが開発されている。本明細書において、III族窒化物半導体とは、III−V系化合物半導体のうち、V族元素が窒素であるものをいい、たとえば、GaN、AlN、AlαGa1−αN(0<α<1)、InN、InβGa1−βN(0<β<1)、InγGaδAl1−γ−δN(0<γ<1、(0<δ<1)などを指す(以下、「GaN系化合物半導体」ともいう)。 Conventionally, group III nitride semiconductors typified by GaN and the like have been used or studied as light-emitting elements and high-power devices using their characteristics. For example, when a light-emitting element is manufactured, it can be technically used as a light-emitting element having a wide width from purple to orange by adjusting the constituent composition. In recent years, blue light emitting diodes or green light emitting diodes have been put to practical use by utilizing the characteristics, and blue-violet semiconductor lasers have been developed as semiconductor laser elements. In the present specification, the group III nitride semiconductor refers to a group III-V compound semiconductor in which a group V element is nitrogen, for example, GaN, AlN, Al α Ga 1-α N (0 <α <1), refers InN, In β Ga 1-β N (0 <β <1), In γ Ga δ Al 1-γ-δ N (0 <γ <1, (0 <δ <1) and ( Hereinafter also referred to as “GaN compound semiconductor”).

GaN系化合物半導体膜を製造する際には、基板として、サファイア、SiC、スピネル、Si、GaAsなどの基板が使用される(特許文献1参照)。たとえば、基板としてサファイアを使用する場合には、GaN膜をエピタキシャル成長する前に、あらかじめ、500℃〜600℃の低温で、GaNまたはAlNのバッファ層を形成し、その後、基板を1000℃〜1100℃の高温に昇温して、GaN系化合物半導体膜のエピタキシャル成長を行なうと表面状態の良い、構造的および電気的に良好な結晶を得ることができ、基板が絶縁性であるために表面に2電極を形成することで発光素子が得られる。   When manufacturing a GaN-based compound semiconductor film, a substrate such as sapphire, SiC, spinel, Si, or GaAs is used as a substrate (see Patent Document 1). For example, when sapphire is used as a substrate, a GaN or AlN buffer layer is formed in advance at a low temperature of 500 ° C. to 600 ° C. before epitaxial growth of the GaN film, and then the substrate is formed at 1000 ° C. to 1100 ° C. When the GaN-based compound semiconductor film is epitaxially grown at a high temperature, a structurally and electrically good crystal having a good surface state can be obtained. Since the substrate is insulative, two electrodes are formed on the surface. A light emitting element can be obtained by forming.

また、SiCを基板として使用する場合には、エピタキシャル成長を行なう成長温度で、薄いAlN膜をバッファ層として使用すると良い結晶が得られ、SiCは導電性基板であることから、基板裏面とエピタキシャル成長面にそれぞれ電極を形成した発光素子が得られることが知られている。また、サファイア基板は紫色から橙色までの光に透明であることより、表面に2電極を形成し、基板よりの光取り出し構造(フリップチップ構造)も採用できることが知られている(特許文献2参照)。   Further, when SiC is used as a substrate, a good crystal can be obtained by using a thin AlN film as a buffer layer at a growth temperature for epitaxial growth. Since SiC is a conductive substrate, the substrate back surface and the epitaxial growth surface can be obtained. It is known that light-emitting elements each having an electrode can be obtained. Further, since the sapphire substrate is transparent to light from purple to orange, it is known that two electrodes are formed on the surface and a light extraction structure (flip chip structure) from the substrate can be employed (see Patent Document 2). ).

一般に、GaN、SiCは、p型の低抵抗が得られず、基板としてはn型に用いられている。n型基板を用いてエピタキシャル成長により、GaN系化合物半導体発光素子を形成した場合には、成長終了面がp型になり、GaNはp型の低抵抗膜が得られないため、透明(透光性)電極が用いられている。かかる透光性電極は、膜厚が2nmから10nm程度と薄く、条件の範囲が狭いため、オーミック特性を得にくく、作製された発光素子毎の電極の特性の均一性に関しても、良好ではない。さらに、電極の熱処理工程が入ることで、歩留りが低下するという問題がある。また、透光性電極は、発光した光の50〜60%の透過率であり、外部取り出し効率が良くない。そこで導電性基板を用いた場合においても基板側より光を取り出す試みが為されている。
特開平10−114600号公報 特開平10−150220号公報
In general, GaN and SiC cannot obtain a p-type low resistance, and are used as an n-type substrate. When a GaN-based compound semiconductor light emitting device is formed by epitaxial growth using an n-type substrate, the growth end surface becomes p-type, and GaN cannot obtain a p-type low-resistance film. ) An electrode is used. Such a translucent electrode has a thin film thickness of about 2 nm to 10 nm and a narrow range of conditions. Therefore, it is difficult to obtain ohmic characteristics, and the uniformity of the electrode characteristics for each manufactured light emitting element is not good. Furthermore, there is a problem that the yield decreases due to the heat treatment step of the electrodes. Moreover, the translucent electrode has a transmittance of 50 to 60% of the emitted light, and the external extraction efficiency is not good. Therefore, even when a conductive substrate is used, an attempt is made to extract light from the substrate side.
Japanese Patent Laid-Open No. 10-114600 JP-A-10-150220

しかしながら、p型電極をステムなどに接続し、基板側より光を取り出す場合において、GaN系発光素子ではp型電極とpn接合との位置が0.1μm以下と近いために、pn接合および基板を保護する必要がある。また、導電性基板を用いて、上下2電極にする場合には、表面2電極の場合に比べて、チップサイズを小さくできるが、電極(パッド電極など外部接続用電極)がチップサイズに比べて大きくなるから、電極による光取り出しの阻害を抑制し、外部量子効率を高める必要がある。   However, when the p-type electrode is connected to a stem or the like and light is extracted from the substrate side, the position of the p-type electrode and the pn junction is close to 0.1 μm or less in the GaN-based light emitting device. It needs to be protected. In addition, when the upper and lower electrodes are formed using the conductive substrate, the chip size can be reduced as compared with the case of the front surface two electrodes, but the electrode (external connection electrode such as a pad electrode) is smaller than the chip size. Therefore, it is necessary to suppress the inhibition of light extraction by the electrode and increase the external quantum efficiency.

本発明のIII族窒化物半導体発光素子は、導電性を有する透光性のn型半導体基板上に、III族窒化物半導体膜と、p型電極とを備え、n型半導体基板より光を取り出す発光素子であって、III族窒化物半導体膜の光取り出し方向と反対側の表面の少なくとも一部と、III族窒化物半導体膜の側面およびn型半導体基板の側面の少なくとも一部に、絶縁性の保護膜を有することを特徴とする。   The group III nitride semiconductor light emitting device of the present invention includes a group III nitride semiconductor film and a p-type electrode on a light-transmitting n-type semiconductor substrate having conductivity, and extracts light from the n-type semiconductor substrate. A light emitting device having an insulating property on at least a part of a surface of the group III nitride semiconductor film opposite to the light extraction direction, at least a part of a side surface of the group III nitride semiconductor film and a side surface of the n-type semiconductor substrate. It is characterized by having a protective film.

本発明によれば、n型導電性基板を用いたGaN系化合物半導体発光素子において、基板側より光を取り出す発光素子の不良率の低減および光り取り出し効率の向上が可能になり、工業的規模でGaN系化合物半導体発光素子の量産が可能となる。   According to the present invention, in a GaN-based compound semiconductor light-emitting device using an n-type conductive substrate, it is possible to reduce the defect rate of the light-emitting device that extracts light from the substrate side and to improve the light extraction efficiency on an industrial scale. Mass production of GaN-based compound semiconductor light-emitting elements becomes possible.

本発明のIII族窒化物半導体発光素子は、典型的には図1に示すように、GaN厚膜基板2などの導電性を有する透光性のn型半導体基板上に、n型GaN層3、発光層4、p型クラッド層5、p型コンタクト層6などからなるIII族窒化物半導体膜と、p型電極11とを備え、n型半導体基板より光を取り出す発光素子であって、III族窒化物半導体膜の光取り出し方向と反対側の表面の少なくとも一部と、III族窒化物半導体膜の側面およびn型半導体基板の側面の少なくとも一部に、絶縁性の保護膜13を有することを特徴とする。かかる保護膜を設けることにより、pn接合および基板を保護することができ、発光素子の不良率を低減して、GaN系化合物半導体素子の量産が可能となる。   The group III nitride semiconductor light-emitting device of the present invention typically has an n-type GaN layer 3 on a conductive translucent n-type semiconductor substrate such as a GaN thick film substrate 2 as shown in FIG. A light emitting device comprising a group III nitride semiconductor film comprising a light emitting layer 4, a p-type cladding layer 5, a p-type contact layer 6 and the like, and a p-type electrode 11, and for extracting light from an n-type semiconductor substrate, An insulating protective film 13 is provided on at least a part of the surface of the group nitride semiconductor film opposite to the light extraction direction, at least a part of the side surface of the group III nitride semiconductor film and the side surface of the n-type semiconductor substrate. It is characterized by. By providing such a protective film, the pn junction and the substrate can be protected, the defect rate of the light emitting element can be reduced, and the GaN compound semiconductor element can be mass-produced.

p型成長層よりn型半導体基板にかけて有効に保護する膜を形成する必要があるため、側面上の保護膜は、III族窒化物半導体膜の表面から10μm以上形成することが好ましく、15μm以上形成するとより好ましい。一方、側面はエッチングなどにより形成し、形成された穴の側面に保護膜を形成する。したがって、深過ぎると形成が難しくなるため、側面上の保護膜は、n型半導体基板の厚さ以下の領域とすることが好ましく、基板の厚さの1/2以下がより好ましい。また、保護膜の厚さは、pn接合および基板を有効に保護するため0.1〜0.7μmが好ましく、0.2〜0.5μmがより好ましい。保護膜を形成する材料は、十分な強度および絶縁性を有する点で、SiO、Al、SiNなどが好適である。保護膜を電気絶縁性とすることにより、発光素子側面のリーク電流を抑制することができる。保護膜は、たとえば、n型半導体基板上に、III族窒化物半導体膜を形成した後、III族窒化物半導体膜の表面からn型半導体基板にかけて、エッチングまたはダイシングにより溝を形成し、溝の端面にプラズマCVDなどにより容易に形成することができる。 Since it is necessary to form a film that effectively protects from the p-type growth layer to the n-type semiconductor substrate, the protective film on the side surface is preferably formed at least 10 μm from the surface of the group III nitride semiconductor film, and is formed at least 15 μm. It is more preferable. On the other hand, the side surface is formed by etching or the like, and a protective film is formed on the side surface of the formed hole. Therefore, since formation becomes difficult if it is too deep, it is preferable that the protective film on the side surface be a region not larger than the thickness of the n-type semiconductor substrate, and more preferably not more than ½ of the thickness of the substrate. Further, the thickness of the protective film is preferably 0.1 to 0.7 μm and more preferably 0.2 to 0.5 μm in order to effectively protect the pn junction and the substrate. The material for forming the protective film is preferably SiO 2 , Al 2 O 3 , SiN, or the like because it has sufficient strength and insulation. By making the protective film electrically insulating, leakage current on the side surface of the light emitting element can be suppressed. For example, after forming a group III nitride semiconductor film on the n-type semiconductor substrate, the protective film forms a groove by etching or dicing from the surface of the group III nitride semiconductor film to the n-type semiconductor substrate. It can be easily formed on the end face by plasma CVD or the like.

本発明の発光素子は、n型半導体基板より光を取出すため、n型半導体基板は透光性を有するものを使用するが、透光性を有する材料の中でも、400nm以上の波長の光を透過するものが好ましい。400nm未満の波長の光は、紫外線またはX線などの放射線に該当するが、本発明は、青色〜橙色などに発光するレーザ素子の提供を主たる目的とするからである。また、本発明の発光素子に使用するn型半導体基板は導電性を有する必要があるため、GaNなどのIII族窒化物またはSiCからなる基板が好ましく使用される。III族窒化物半導体基板は、エピタキシャル成長法により下地基板上に形成した後、下地基板の一部または全部を剥離、または研磨、またはエッチングにより除去し、容易に作製することができる。   Since the light-emitting element of the present invention takes out light from an n-type semiconductor substrate, the n-type semiconductor substrate uses a light-transmitting material. Among light-transmitting materials, light having a wavelength of 400 nm or more is transmitted. Those that do are preferred. This is because light having a wavelength of less than 400 nm corresponds to radiation such as ultraviolet rays or X-rays, and the present invention mainly aims to provide a laser element that emits light in blue to orange colors. In addition, since the n-type semiconductor substrate used in the light emitting device of the present invention needs to have conductivity, a substrate made of a group III nitride such as GaN or SiC is preferably used. The group III nitride semiconductor substrate can be easily manufactured by forming it on the base substrate by an epitaxial growth method, and then removing a part or all of the base substrate by peeling, polishing, or etching.

n型半導体基板としてIII族窒化物半導体基板を使用するときは、キャリア濃度が1×1018cm−3以上であり、5×1019cm−3以下であるものが好ましい。キャリア濃度が1×1018cm−3未満であると、動作電圧が高くなる傾向がある。一方、キャリア濃度が5×1019cm−3より大きくなると、発光出力が基板によって吸収されるため、発光出力が低下する傾向がある。同様に、n型半導体基板として、SiC半導体基板を使用するときは、動作電圧を低減するため、キャリア濃度が5×1016cm−3以上の基板が好ましく、また発光出力を高めるため、キャリア濃度が1×1018cm−3以下の基板が好ましい。 When a group III nitride semiconductor substrate is used as the n-type semiconductor substrate, the carrier concentration is preferably 1 × 10 18 cm −3 or more and 5 × 10 19 cm −3 or less. When the carrier concentration is less than 1 × 10 18 cm −3 , the operating voltage tends to increase. On the other hand, if the carrier concentration is higher than 5 × 10 19 cm −3 , the light emission output tends to be reduced because the light emission output is absorbed by the substrate. Similarly, when an SiC semiconductor substrate is used as the n-type semiconductor substrate, a substrate having a carrier concentration of 5 × 10 16 cm −3 or more is preferable in order to reduce the operating voltage, and in order to increase the light emission output, the carrier concentration is increased. Is preferably a substrate of 1 × 10 18 cm −3 or less.

n型半導体基板は、キャリア濃度が低く、基板のみで電流を有効に広げられないので、光取り出し面上にメッシュ形状のn型電極を有するものが好ましく、光取り出し面に、外部接続用のパッド電極を有するものが好ましい。また、光の取り出しを阻害しないようにするため、n型電極は透光性を有するものが好ましい。透光性と導電性を有する材料としては、たとえばITO、IDIXO、ZnOなどがあり、かかる材料は、n型電極用の材料として好適である。一方、パッド電極は、n型電極と接する部分が電流阻止構造を有する態様が好ましい。かかる態様とすることにより、パッド電極直下の発光が少なくなり、パッド電極による光取り出し阻害効果を低減し、発光効率を高めることができる。パッド電極を電流阻止構造とするには、たとえば、n型電極と接する部分に、SiO、Al、SiNなどの絶縁膜を形成する態様のほか、pn接合による電流阻止構造とする態様にしても同様の効果が得られる。また、電流阻止層の挿入位置は、基板の直上としても有効である。 Since the n-type semiconductor substrate has a low carrier concentration and the current cannot be effectively spread only by the substrate, the n-type semiconductor substrate preferably has a mesh-shaped n-type electrode on the light extraction surface, and a pad for external connection is provided on the light extraction surface. What has an electrode is preferable. In order not to hinder the extraction of light, the n-type electrode preferably has translucency. Examples of materials having translucency and conductivity include ITO, IDIXO, and ZnO, and such materials are suitable as materials for n-type electrodes. On the other hand, it is preferable that the pad electrode has a current blocking structure at a portion in contact with the n-type electrode. By setting it as this aspect, light emission just under a pad electrode decreases, the light extraction inhibiting effect by a pad electrode can be reduced, and luminous efficiency can be improved. In order to make the pad electrode have a current blocking structure, for example, in addition to a mode in which an insulating film such as SiO 2 , Al 2 O 3 , or SiN is formed in a portion in contact with the n-type electrode, a mode in which a current blocking structure by a pn junction is used However, the same effect can be obtained. Further, the insertion position of the current blocking layer is also effective immediately above the substrate.

n型半導体基板上に形成するIII族窒化物半導体膜は、p型電極と接する部分が凹凸を有するものが好ましい。p型電極と接する部分に凹凸を設けることにより、光の散乱が生じて、光の取り出し効率が向上する。凹凸は、算術平均粗さで10nm〜500nmが好ましい。10nm未満では、光の散乱効果が小さく、発光出力が十分に増加しない。一方、500nmより大きいと、凹凸が大き過ぎるため、p型電極との良好なオーミック接触が得られない。なお、p電極は、コモン電極として用いることができる。   The group III nitride semiconductor film formed on the n-type semiconductor substrate preferably has an uneven portion in contact with the p-type electrode. By providing irregularities in the portion in contact with the p-type electrode, light scattering occurs and the light extraction efficiency is improved. The unevenness is preferably 10 nm to 500 nm in terms of arithmetic average roughness. If it is less than 10 nm, the light scattering effect is small, and the light emission output does not increase sufficiently. On the other hand, if the thickness is larger than 500 nm, the unevenness is too large, so that a good ohmic contact with the p-type electrode cannot be obtained. Note that the p-electrode can be used as a common electrode.

実施例1
本実施例では、サファイア基板上に、H−VPE法を用いて成長した厚膜のGaNを基板として使用した。まず、(0001)面を有するサファイア基板を洗浄し、MOCVD法を用いて、以下の手順で、約3μmの厚さのアンドープGaN膜を下地層として成長した。洗浄したサファイア基板をMOCVD装置内に導入し、H雰囲気の中で、約1100℃の高温でクリーニングを行なった。その後、降温して、キャリアガスとして水素(H)を10L/m流しながら、600℃でNHとトリメチルガリウム(TMG)をそれぞれ5L/m、20mol/m導入して、約20nmの厚さのGaN低温バッファ層を成長した。
Example 1
In this example, a thick GaN film grown on the sapphire substrate using the H-VPE method was used as the substrate. First, a sapphire substrate having a (0001) plane was washed, and an undoped GaN film having a thickness of about 3 μm was grown as an underlayer by MOCVD using the following procedure. The cleaned sapphire substrate was introduced into the MOCVD apparatus and cleaned at a high temperature of about 1100 ° C. in an H 2 atmosphere. Thereafter, the temperature was lowered, and NH 3 and trimethyl gallium (TMG) were introduced at 600 ° C. while flowing hydrogen (H 2 ) as a carrier gas at 10 L / m, respectively, at a thickness of about 20 nm. A GaN low temperature buffer layer was grown.

その後、一旦TMGの供給を停止し、再び約1050℃まで昇温して、TMGを約100mol/m導入し、1時間で約3μmの厚さのアンドープGaN膜を成長した。その後、TMGおよびNHの供給を停止し、室温まで降温し、アンドープGaN下地層を成長したサファイア基板を取り出した。低温バッファ層としては、GaNに限らず、トリメチルアルミニウム(TMA)、TMG、NHを使用して、AlN膜またはGaAlN膜を用いてもよい。 Thereafter, the supply of TMG was once stopped, the temperature was raised again to about 1050 ° C., TMG was introduced at about 100 mol / m, and an undoped GaN film having a thickness of about 3 μm was grown in one hour. Thereafter, the supply of TMG and NH 3 was stopped, the temperature was lowered to room temperature, and the sapphire substrate on which the undoped GaN underlayer was grown was taken out. The low temperature buffer layer is not limited to GaN, and trimethylaluminum (TMA), TMG, or NH 3 may be used, and an AlN film or a GaAlN film may be used.

つぎに、上記方法で作製したアンドープGaN下地層を成長したサファイア基板上に、厚膜を成長する際にクラックが生じないようにするため、厚さ2000Åで、幅7μm、間隔10μmのストライプ状の成長抑制膜を形成し、その上にH−VPE法で選択成長を行ない、平坦なGaN厚膜を成長した。本実施例では、成長抑制膜として、電子ビーム蒸着法(EB法)により蒸着したSiO膜をフォトリソグラフィを用いてエッチングしたものを使用した。 Next, in order to prevent cracks from occurring when a thick film is grown on the sapphire substrate on which the undoped GaN underlayer produced by the above method has been grown, a stripe shape having a thickness of 2000 mm, a width of 7 μm, and an interval of 10 μm is used. A growth suppression film was formed, and selective growth was performed by the H-VPE method to grow a flat GaN thick film. In this example, the growth suppression film used was a SiO 2 film deposited by electron beam evaporation (EB method) etched using photolithography.

続いて、以下の方法で、H−VPE法によりGaN厚膜を成長した。上述した方法で作製したストライプ状の成長抑制膜を有するアンドープGaN下地層を成長したサファイア基板を、H−VPE装置内に導入した。NキャリアガスとNHを、それぞれ5L/m流しながら、基板の温度を約1050℃まで昇温した。その後、基板上にGaClを100cc/m導入してGaNの厚膜の成長を開始した。GaClは約850℃に保持されたGa金属にHClガスを流すことにより生成させた。また、基板近傍まで単独で配管してある不純物ドーピングラインを用いて、不純物ガスを流すことにより、任意に成長中に不純物のドーピングを行なった。 Subsequently, a GaN thick film was grown by the H-VPE method by the following method. A sapphire substrate on which an undoped GaN underlayer having a striped growth suppression film produced by the above-described method was grown was introduced into the H-VPE apparatus. The substrate temperature was raised to about 1050 ° C. while flowing N 2 carrier gas and NH 3 each at 5 L / m. Thereafter, GaCl was introduced at 100 cc / m on the substrate to start growing a thick GaN film. GaCl was generated by flowing HCl gas through Ga metal maintained at about 850 ° C. Further, impurity doping was arbitrarily performed during growth by flowing an impurity gas using an impurity doping line that was independently piped to the vicinity of the substrate.

本実施例では、Siをドーピングする目的で、成長を開始すると同時に、モノシラン(SiH)を200nmol/m流し、SiドープGaN層(Si不純物濃度:3.8×1018cm−3)を成長し、3時間の成長で350μmのGaN厚膜を得た。なお、Siのドーピングに関しては、SiHに限らず、モノクロロシラン(SiHCl)、ジクロロシラン(SiHCl)、トリクロロシラン(SiHCl)など、他の原料を使用してもよい。 In this example, for the purpose of doping Si, at the same time as starting growth, 200 nmol / m of monosilane (SiH 4 ) was flowed to grow a Si-doped GaN layer (Si impurity concentration: 3.8 × 10 18 cm −3 ). Then, a GaN thick film having a thickness of 350 μm was obtained by growth for 3 hours. Regarding Si doping, other raw materials such as monochlorosilane (SiH 3 Cl), dichlorosilane (SiH 2 Cl 2 ), and trichlorosilane (SiHCl 3 ) may be used without being limited to SiH 4 .

成長後、研磨によりサファイア基板、MOCVD法によるアンドープGaN膜、SiO膜を除去し、GaN厚膜基板2を得た(以下、「GaN基板」ともいう。)。以上のようにして得られたGaN厚膜を基板として、MOCVD法により発光素子構造を成長した。以下、GaN基板上のGaN系化合物半導体のLEDの成長方法について記述する。 After the growth, the sapphire substrate, the undoped GaN film by the MOCVD method, and the SiO 2 film were removed by polishing to obtain a GaN thick film substrate 2 (hereinafter also referred to as “GaN substrate”). Using the GaN thick film obtained as described above as a substrate, a light emitting device structure was grown by MOCVD. Hereinafter, a method for growing a GaN-based compound semiconductor LED on a GaN substrate will be described.

図1に、本実施例の方法により、作製されたGaN系化合物半導体のLEDの断面図を示す。GaN基板を、下地除去面とは反対の面をエピタキシャル成長するように、MOCVD装置内に導入し、NとNHをそれぞれ5L/m流しながら約1050℃まで昇温した。温度が上がれば、キャリアガスをNからHに代えて、TMGを100μmol/m、SiHを10nmol/m導入して、n型GaN層3を約4μm成長した。その後、TMGの供給を停止して、キャリアガスをHからNに再び代えて、700℃まで降温し、インジウム原料であるトリメチルインジウム(TMI)を10μmol/m、TMGを15μmol/m導入し、In0.05Ga0.95Nよりなる4nm厚の障壁層を成長した。その後、TMIの供給量を50μmol/mに増加し、In0.2Ga0.8Nよりなる2nm厚の井戸層を成長した。井戸層は合計3層、同様の手法で成長を行ない、井戸層と井戸層との間および両側には合計4層の障壁層が存在するような多重量子井戸(MQW)の発光層4を成長した。 FIG. 1 shows a cross-sectional view of a GaN-based compound semiconductor LED manufactured by the method of this example. The GaN substrate was introduced into the MOCVD apparatus so that the surface opposite to the base removal surface was epitaxially grown, and the temperature was raised to about 1050 ° C. while flowing N 2 and NH 3 each at 5 L / m. When the temperature rose, the carrier gas was changed from N 2 to H 2 , TMG was introduced at 100 μmol / m, SiH 4 was introduced at 10 nmol / m, and the n-type GaN layer 3 was grown by about 4 μm. Thereafter, the supply of TMG was stopped, the carrier gas was changed from H 2 to N 2 again, the temperature was lowered to 700 ° C., and trimethylindium (TMI) as an indium raw material was introduced at 10 μmol / m, and TMG was introduced at 15 μmol / m. Then, a 4 nm thick barrier layer made of In 0.05 Ga 0.95 N was grown. Thereafter, the supply amount of TMI was increased to 50 μmol / m, and a 2 nm-thick well layer made of In 0.2 Ga 0.8 N was grown. The well layer is grown in a total of three layers in the same manner, and a multiple quantum well (MQW) light emitting layer 4 is grown in which there are a total of four barrier layers between and on both sides of the well layer. did.

MQWの成長が終了すると、TMIおよびTMGの供給を停止して、再び1050℃まで昇温し、キャリアガスを再びNからHに代えて、TMGを50μmol/m、TMAを30μmol/m、p型ドーピング原料であるビスシクロペンタジエニルマグネシウム(CpMg)を10nmol/m流し、20nm厚のp型Al0.2Ga0.8Nクラッド層5を成長し、最後に、TMGの供給を100μmol/mに調整して、TMAの供給を停止し、0.1μm厚のp型GaNコンタクト層6の成長を行ない、発光素子構造の成長を終了した。成長が終了すると、TMGおよびCpMgの供給を停止して降温し、室温でMOCVD装置より取り出した。 When the growth of MQW is finished, the supply of TMI and TMG is stopped, the temperature is raised again to 1050 ° C., the carrier gas is changed from N 2 to H 2 again, TMG is 50 μmol / m, TMA is 30 μmol / m, A p-type doping raw material biscyclopentadienylmagnesium (Cp 2 Mg) was flowed at 10 nmol / m to grow a 20-nm-thick p-type Al 0.2 Ga 0.8 N cladding layer 5, and finally, supply of TMG Was adjusted to 100 μmol / m, the supply of TMA was stopped, the p-type GaN contact layer 6 having a thickness of 0.1 μm was grown, and the growth of the light emitting device structure was completed. When the growth was completed, the supply of TMG and Cp 2 Mg was stopped, the temperature was lowered, and the film was taken out from the MOCVD apparatus at room temperature.

その後、ドライエッチング装置を用いて、p−GaNコンタクト層6をn型GaN層3までエッチングを行ない、メサを形成した。その後、p−GaN部分にPdを150Å、Auを1000Å蒸着して、p型電極11を形成した。また、基板温度を200℃程度に保ち、GaN厚膜基板2の裏面に、Tiを厚さ150Å、Alを1000Å蒸着し、n型電極21をそれぞれ形成した。n型電極21の形状は、線幅50μmの格子状に形成した。加えて、n型電極21の一部にAuを3000Å蒸着して、パッド電極22を形成した。   Thereafter, the p-GaN contact layer 6 was etched up to the n-type GaN layer 3 using a dry etching apparatus to form a mesa. Thereafter, Pd was deposited on the p-GaN portion at 150 Å and Au was deposited at 1000 Å to form the p-type electrode 11. Further, the substrate temperature was kept at about 200 ° C., and 150 nm of Ti and 1000 mm of Al were deposited on the back surface of the GaN thick film substrate 2 to form the n-type electrode 21. The n-type electrode 21 was formed in a lattice shape having a line width of 50 μm. In addition, 3000 μg of Au was deposited on a part of the n-type electrode 21 to form the pad electrode 22.

つぎに、ダイシング装置を用い、エピタキシャル表面より、GaN厚膜基板2にまで溝12を形成した。溝の深さは20μm、巾は50μmとした。続いてエピタキシャル表面および溝部分にプラズマCVD装置を用いて、厚さ0.3μmの酸化珪素(SiO)からなる絶縁性の保護膜13を形成した。その結果、図1に示すように、III族窒化物半導体膜の光取り出し方向と反対側の表面の一部と、III族窒化物半導体膜の側面およびn型半導体基板の側面の一部に、絶縁性の保護膜13が形成された。最後に、劈開あるいはダイシング法を用いて溝12の中央を、溝12より細い切断刃(厚さ30μm)で素子長が約200μmとなるように分離した。作製したLEDは、p電極をステムに導電性接着剤を用い接続し、n型電極にワイヤーボンドを用いて電気的接続を形成し、使用した。 Next, a groove 12 was formed from the epitaxial surface to the GaN thick film substrate 2 using a dicing apparatus. The depth of the groove was 20 μm and the width was 50 μm. Subsequently, an insulating protective film 13 made of silicon oxide (SiO 2 ) having a thickness of 0.3 μm was formed on the epitaxial surface and the groove using a plasma CVD apparatus. As a result, as shown in FIG. 1, a part of the surface of the group III nitride semiconductor film opposite to the light extraction direction, a side surface of the group III nitride semiconductor film, and a part of the side surface of the n-type semiconductor substrate, An insulating protective film 13 was formed. Finally, the center of the groove 12 was separated by a cleaving or dicing method using a cutting blade (thickness 30 μm) thinner than the groove 12 so that the element length was about 200 μm. The produced LED was used by connecting a p-electrode to the stem using a conductive adhesive and forming an electrical connection using a wire bond to the n-type electrode.

本実施形態で作製したLEDは、動作電圧が2.9V、発光波長が470nm,発光出力2.5mWであり、約5000時間の寿命試験を実施したが、光出力の低下は10%以下であり、良好な結果が得られた。また、ステム載置での不良率は5%以下に押さえられた。   The LED manufactured in this embodiment has an operating voltage of 2.9 V, an emission wavelength of 470 nm, and an emission output of 2.5 mW. A life test of about 5000 hours was performed, but the decrease in the optical output was 10% or less. Good results were obtained. Further, the defect rate when the stem was placed was suppressed to 5% or less.

比較例1
比較例1として、保護膜を形成しない構造のLEDを作製した。作製方法は、実施例1と同様の方法で、溝を形成せず、メサ形成部分を切断し素子分離を行なった。この素子の場合、動作電圧が2.9V、発光波長が470nm,発光出力2.5mWであり、特性に変化はないが、導電性接着剤の回り込みが原因で、ステム載置での不良率は50%あり、素子間の特性のばらつきも10%以上あった。
Comparative Example 1
As Comparative Example 1, an LED having a structure in which no protective film was formed was produced. The manufacturing method was the same as that of Example 1, and the groove was not formed, and the mesa forming portion was cut to perform element isolation. In the case of this element, the operating voltage is 2.9 V, the emission wavelength is 470 nm, the emission output is 2.5 mW, and there is no change in the characteristics, but due to the wraparound of the conductive adhesive, the defect rate on the stem mounting is There was 50%, and the variation in characteristics between elements was 10% or more.

実施例2
本実施例では、キャリア濃度を変えたGaN基板を用いて、LEDを作製した。実施例1と同様にH−VPE法により成長し、サファイア基板を剥離したGaN厚膜(Siドープ、キャリア濃度:5×1017cm−3、厚さ350μm)を基板として用いた以外は、実施例1と同様にして発光素子を作製した。この素子は、発光波長470nm、光出力2.2mWであり変化はないが、動作電圧が3.3Vと高くなった。
Example 2
In this example, an LED was manufactured using a GaN substrate with a different carrier concentration. Except that the GaN thick film (Si-doped, carrier concentration: 5 × 10 17 cm −3 , thickness 350 μm) grown by the H-VPE method and exfoliated from the sapphire substrate was used as the substrate in the same manner as in Example 1. A light emitting device was fabricated in the same manner as in Example 1. This device had an emission wavelength of 470 nm and an optical output of 2.2 mW, and there was no change, but the operating voltage was as high as 3.3V.

実施例3
本実施例では、GaN厚膜(Siドープ、キャリア濃度:7×1019cm−3、厚さ350μm)を基板として用いた以外は実施例1と同様にして発光素子を作製した。この素子は、動作電圧3.1V、発光波長470nmと変化しないが、発光出力が2.0mWであり、光出力が基板による吸収のために低下した。
Example 3
In this example, a light emitting device was manufactured in the same manner as in Example 1 except that a GaN thick film (Si-doped, carrier concentration: 7 × 10 19 cm −3 , thickness 350 μm) was used as a substrate. This element did not change with an operating voltage of 3.1 V and an emission wavelength of 470 nm, but the emission output was 2.0 mW, and the optical output was lowered due to absorption by the substrate.

実施例4
本実施例では、III族窒化物半導体基板を、エピタキシャル成長技術により下地基板上に形成した後、下地基板の一部を除去して作製した発光素子の例を示す。図2に、本実施例の方法により、作製されたGaN系化合物半導体のLEDの断面図を示す。図2に示すように、このLEDは、下地基板であるサファイア基板201上に、GaN厚膜基板202、n型GaN層203、発光層204、p型クラッド層205、p型コンタクト層206、p型電極211がこの順に形成され、p型コンタクト層206の表面の一部とIII族窒化物半導体膜の側面およびGaN厚膜基板の側面の一部に、SiOからなる保護膜213が形成されている。また、サファイア基板201の光取り出し面側には、n型電極221と、パッド電極222が形成された構造を有する。保護膜213は、p型コンタクト層206の表面からGaN厚膜基板202にかけて溝212を形成した後、溝の端面に形成した。
Example 4
In this example, an example of a light-emitting element manufactured by forming a group III nitride semiconductor substrate on a base substrate by an epitaxial growth technique and then removing a part of the base substrate is shown. FIG. 2 shows a cross-sectional view of a GaN-based compound semiconductor LED manufactured by the method of this example. As shown in FIG. 2, this LED has a GaN thick film substrate 202, an n-type GaN layer 203, a light emitting layer 204, a p-type cladding layer 205, a p-type contact layer 206, p on a sapphire substrate 201 as a base substrate. A type electrode 211 is formed in this order, and a protective film 213 made of SiO 2 is formed on a part of the surface of the p-type contact layer 206, a side surface of the group III nitride semiconductor film, and a part of the side surface of the GaN thick film substrate. ing. The sapphire substrate 201 has a structure in which an n-type electrode 221 and a pad electrode 222 are formed on the light extraction surface side. The protective film 213 was formed on the end face of the groove after forming the groove 212 from the surface of the p-type contact layer 206 to the GaN thick film substrate 202.

実施例1と同様の方法により、サファイア基板上にH−VPE法で350μmのGaN厚膜202を成長した。続いて、サファイアがついたままのGaN厚膜202上にMOCVD法を用いて実施例1と同様に発光素子構造(p型GaNコンタクト層206まで)を形成した。その後、ドライエッチング装置を用いて、p−GaNコンタクト層206をn型GaN層203までエッチングを行ない、メサを形成した。   In the same manner as in Example 1, a 350 μm thick GaN film 202 was grown on the sapphire substrate by the H-VPE method. Subsequently, a light emitting element structure (up to the p-type GaN contact layer 206) was formed on the GaN thick film 202 with the sapphire attached by using the MOCVD method in the same manner as in Example 1. Thereafter, the p-GaN contact layer 206 was etched up to the n-type GaN layer 203 using a dry etching apparatus to form a mesa.

その後、p−GaNコンタクト層206上にPdを、150Å、Auを1000Å蒸着して、p型電極211を形成した。つぎに、サファイア基板の一部にSiOマスクを形成し,ドライエッチング装置を用いて、サファイア基板を裏面よりGaN厚膜基板202までエッチングにより除去した。続いて、GaN厚膜基板202のエッチング面およびサファイア基板201上に、Tiを厚さ300Å、Alを1000Å蒸着し、n型電極221を形成した。n型電極221は、線幅50μmの格子状に形成した。加えて、n型電極221の一部に、Auを3000Å蒸着してパッド電極222を形成した。 Thereafter, Pd was deposited on the p-GaN contact layer 206 by 150 to 1000 and Au to 1000 to form a p-type electrode 211. Next, a SiO 2 mask was formed on a part of the sapphire substrate, and the sapphire substrate was removed by etching from the back surface to the GaN thick film substrate 202 using a dry etching apparatus. Subsequently, on the etching surface of the GaN thick film substrate 202 and the sapphire substrate 201, 300 nm of Ti and 1000 mm of Al were deposited to form an n-type electrode 221. The n-type electrode 221 was formed in a lattice shape having a line width of 50 μm. In addition, a pad electrode 222 was formed on a part of the n-type electrode 221 by depositing 3000 μg of Au.

本実施例で作製したLEDは、動作電圧2.9V、発光波長470nm,発光出力2.8mWであり、約5000時間の寿命試験を実施したが、光出力の低下は10%以下であり、良好な結果が得られた。また、ステム載置での不良率は5%以下に押さえられた。本実施例では、パッド電極を絶縁体であるサファイア基板上に形成したこと、またn型電極をGaN厚膜基板の一部に形成したことによる狭窄効果のため、光出力の向上が図れた。   The LED manufactured in this example has an operating voltage of 2.9 V, an emission wavelength of 470 nm, and an emission output of 2.8 mW. A life test of about 5000 hours was carried out, but the decrease in the optical output was 10% or less, which was good. Results were obtained. Further, the defect rate when the stem was placed was suppressed to 5% or less. In this embodiment, the light output can be improved due to the narrowing effect due to the pad electrode formed on the sapphire substrate as an insulator and the n-type electrode formed on a part of the GaN thick film substrate.

実施例5
本実施例では、実施例1で示す方法で作製したLEDにおいて、p型GaNコンタクト層の表面に凹凸を形成した場合のLED特性について記述する。図3に、本実施例の方法により、作製されたGaN系化合物半導体のLEDの断面図を示す。このLEDは、図3に示すように、GaN厚膜基板302上に、n型GaN層303、発光層304、p型クラッド層305、p型コンタクト層306、p型電極311がこの順に形成され、p型コンタクト層306の表面には凹凸306bを有し、またp型コンタクト層306の表面の一部とIII族窒化物半導体膜の側面およびn型半導体基板の側面の一部に、SiOからなる保護膜313が形成されている。また、GaN厚膜基板302の光取り出し面側には、n型電極321と、パッド電極322が形成された構造を有する。保護膜313は、p型コンタクト層306からGaN厚膜基板302にかけて溝312を形成した後、溝の端面に形成した。
Example 5
In this example, the LED characteristics when an unevenness is formed on the surface of the p-type GaN contact layer in the LED manufactured by the method shown in Example 1 will be described. FIG. 3 shows a cross-sectional view of a GaN-based compound semiconductor LED manufactured by the method of this example. In this LED, as shown in FIG. 3, an n-type GaN layer 303, a light emitting layer 304, a p-type cladding layer 305, a p-type contact layer 306, and a p-type electrode 311 are formed in this order on a GaN thick film substrate 302. The surface of the p-type contact layer 306 has irregularities 306b, and SiO 2 is formed on a part of the surface of the p-type contact layer 306, a side surface of the group III nitride semiconductor film, and a part of the side surface of the n-type semiconductor substrate. A protective film 313 made of is formed. Further, an n-type electrode 321 and a pad electrode 322 are formed on the light extraction surface side of the GaN thick film substrate 302. The protective film 313 was formed on the end face of the groove after forming the groove 312 from the p-type contact layer 306 to the GaN thick film substrate 302.

実施例1で示す方法により、MOCVD法を用いて、p型GaNコンタクト層306までの各層を形成した。続いて、研磨装置を用い、p型GaNコンタクト層306の表面を荒らし、表面に凹凸306bを形成した。凹凸の形成には、粒径3μmダイアモンド砥粒を用い、算術平均粗さで100nmの凹凸を形成した。その後、実施例1と同様にして、LEDを作製した。   The layers up to the p-type GaN contact layer 306 were formed by the MOCVD method according to the method shown in Example 1. Subsequently, using a polishing apparatus, the surface of the p-type GaN contact layer 306 was roughened, and irregularities 306b were formed on the surface. For the formation of irregularities, diamond abrasive grains having a particle size of 3 μm were used, and irregularities with an arithmetic average roughness of 100 nm were formed. Thereafter, an LED was produced in the same manner as in Example 1.

本実施例で作製したLEDは、動作電圧2.9V、発光波長470nm、発光出力3.0mWであり、約5000時間の寿命試験を実施したが、光出力の低下は10%以下であり、良好な結果が得られた。また、素子間の特性のばらつきも2%以下に押さえられた。p型GaNコンタクト層306の表面を荒らすことにより、光の散乱による取り出し効率が向上し、発光出力が増加することがわかった。   The LED manufactured in this example has an operating voltage of 2.9 V, a light emission wavelength of 470 nm, a light emission output of 3.0 mW, and a life test of about 5000 hours was performed. Results were obtained. Also, the variation in characteristics between elements was suppressed to 2% or less. It has been found that roughening the surface of the p-type GaN contact layer 306 improves the extraction efficiency due to light scattering and increases the light emission output.

実施例6
本実施例では、n型半導体基板をSiC基板にし、パッド電極の下部に電流阻止用の酸化膜を形成し、n型電極を透明電極にした場合のLED特性について記述する。図4に、本実施例の方法により、作製されたGaN系化合物半導体のLEDの断面図を示す。このLEDは、図4に示すように、SiC基板402b上に、バッファ層407、n型GaN層403、発光層404、p型クラッド層405、p型コンタクト層406、p型電極411がこの順に形成され、p型コンタクト層406の表面の一部とIII族窒化物半導体膜の側面およびSiC基板の側面の一部に、SiOからなる保護膜413が形成されている。また、SiC基板402bの光取り出し面側には、n型電極421b、電流阻止層423、パッド電極422が形成された構造を有する。保護膜は、p型コンタクト層406からSiC基板402bにかけて溝412を形成した後、溝の端面に形成した。以下、SiC基板上に形成したGaN系化合物半導体からなるLEDの成長方法について記述する。
Example 6
In this example, the LED characteristics when an n-type semiconductor substrate is a SiC substrate, a current blocking oxide film is formed below the pad electrode, and the n-type electrode is a transparent electrode will be described. FIG. 4 shows a cross-sectional view of a GaN-based compound semiconductor LED manufactured by the method of this example. As shown in FIG. 4, this LED has a buffer layer 407, an n-type GaN layer 403, a light emitting layer 404, a p-type cladding layer 405, a p-type contact layer 406, and a p-type electrode 411 in this order on an SiC substrate 402b. A protective film 413 made of SiO 2 is formed on a part of the surface of the p-type contact layer 406, the side surface of the group III nitride semiconductor film, and a part of the side surface of the SiC substrate. In addition, an n-type electrode 421b, a current blocking layer 423, and a pad electrode 422 are formed on the light extraction surface side of the SiC substrate 402b. The protective film was formed on the end face of the groove after forming the groove 412 from the p-type contact layer 406 to the SiC substrate 402b. Hereinafter, a method for growing an LED made of a GaN-based compound semiconductor formed on a SiC substrate will be described.

SiC基板402b(キャリア濃度:1×1017cm−3)を、MOCVD装置内に導入し、NとNHをそれぞれ5L/m流しながら、約1050℃まで昇温した。温度が上がれば、キャリアガスをNからHに代えて、TMGを50μmol/m、TMAを30μmol/m、SiHを10nmol/m導入して、AlGaN膜407バッファ層を50nm成長した。続いて、TMGを100μmol/m、SiHを10nmol/m導入して、n型GaN層403を約4μm成長した。その後、TMGの供給を停止して、キャリアガスをHからNに再び代えて、700℃まで降温し、インジウム原料であるトリメチルインジウム(TMI)を10μmol/m、TMGを15μmol/m導入し、In0.05Ga0.95Nよりなる4nm厚の障壁層を成長した。その後、TMIの供給量を50μmol/mに増加し、In0.2Ga0.8Nよりなる2nm厚の井戸層を成長した。井戸層は合計3層、同様の手法で成長を行ない、井戸層と井戸層との間および両側には合計4層の障壁層が存在するような多重量子井戸(MQW)の発光層404を成長した。 The SiC substrate 402b (carrier concentration: 1 × 10 17 cm −3 ) was introduced into the MOCVD apparatus, and the temperature was raised to about 1050 ° C. while flowing N 2 and NH 3 each at 5 L / m. When the temperature rose, the carrier gas was changed from N 2 to H 2 , TMG 50 μmol / m, TMA 30 μmol / m, SiH 4 10 nmol / m were introduced, and an AlGaN film 407 buffer layer was grown to 50 nm. Subsequently, 100 μmol / m of TMG and 10 nmol / m of SiH 4 were introduced to grow an n-type GaN layer 403 by about 4 μm. Thereafter, the supply of TMG was stopped, the carrier gas was changed from H 2 to N 2 again, the temperature was lowered to 700 ° C., and trimethylindium (TMI) as an indium raw material was introduced at 10 μmol / m, and TMG was introduced at 15 μmol / m. Then, a 4 nm thick barrier layer made of In 0.05 Ga 0.95 N was grown. Thereafter, the supply amount of TMI was increased to 50 μmol / m, and a 2 nm-thick well layer made of In 0.2 Ga 0.8 N was grown. The well layer is grown in a total of three layers in the same way, and a multiple quantum well (MQW) light emitting layer 404 is grown in which there are a total of four barrier layers between and on both sides of the well layer. did.

MQWの成長が終了すると、TMIおよびTMGの供給を停止して、再び1050℃まで昇温し、キャリアガスを再びNからHに代えて、TMGを50μmol/m、TMAを30μmol/m、p型ドーピング原料であるビスシクロペンタジエニルマグネシウム(CpMg)を10nmol/m流し、20nm厚のp型Al0.2Ga0.8Nクラッド層405を成長し、最後に、TMGの供給を100μmol/mに調整して、TMAの供給を停止し、0.1μm厚のp型GaNコンタクト層406の成長を行なった。成長が終了すると、TMGおよびCpMgの供給を停止して降温し、室温でMOCVD装置より取り出した。 When the growth of MQW is finished, the supply of TMI and TMG is stopped, the temperature is raised again to 1050 ° C., the carrier gas is changed from N 2 to H 2 again, TMG is 50 μmol / m, TMA is 30 μmol / m, A p-type doping raw material, biscyclopentadienylmagnesium (Cp 2 Mg), was flowed at 10 nmol / m to grow a 20 nm-thick p-type Al 0.2 Ga 0.8 N clad layer 405, and finally, supply of TMG Was adjusted to 100 μmol / m, the supply of TMA was stopped, and a 0.1 μm thick p-type GaN contact layer 406 was grown. When the growth was completed, the supply of TMG and Cp 2 Mg was stopped, the temperature was lowered, and the film was taken out from the MOCVD apparatus at room temperature.

つぎに、実施例1で示す方法により、p型電極411を形成した。続いて、スパッタ装置を用いて、透明で導電性を有する酸化スズ膜(ITO膜)421bを、SiC基板402bの全面に形成した。膜厚は0.3μmであった。続いて、スパッタ装置を用いて、ITO膜421b上の一部に、酸化シリコン(SiO)からなる電流阻止層423を膜厚0.1μmとなるように形成した。つぎに、蒸着により、電流阻止層423上にAuを3000Å蒸着して、n型電極のパッド電極422を形成した。その後、実施例1と同様にしてLEDを作製した。 Next, a p-type electrode 411 was formed by the method shown in Example 1. Subsequently, a transparent and conductive tin oxide film (ITO film) 421b was formed on the entire surface of the SiC substrate 402b using a sputtering apparatus. The film thickness was 0.3 μm. Subsequently, a current blocking layer 423 made of silicon oxide (SiO 2 ) was formed to a thickness of 0.1 μm on part of the ITO film 421b using a sputtering apparatus. Next, 3000 μg of Au was vapor-deposited on the current blocking layer 423 by vapor deposition to form an n-type electrode pad electrode 422. Thereafter, an LED was produced in the same manner as in Example 1.

本実施例で作製したLEDは、動作電圧3.0V、発光波長470nm、発光出力2.8mWであり、約5000時間の寿命試験を実施したが、光出力の低下は10%以下であり、良好な結果が得られた。発光パターンの観察により、パッド電極直下の発光が少なくなり、パッド電極による光取り出し阻止作用を低減することができ、取り出し効率が向上し、発光出力が増加することがわかった。   The LED manufactured in this example has an operating voltage of 3.0 V, a light emission wavelength of 470 nm, and a light emission output of 2.8 mW. A life test of about 5000 hours was carried out. Results were obtained. By observing the light emission pattern, it was found that the light emission directly under the pad electrode is reduced, the light extraction preventing action by the pad electrode can be reduced, the extraction efficiency is improved, and the light emission output is increased.

今回開示された実施の形態および実施例はすべての点で例示であって制限的なものではないと考えられるべきである。本発明の範囲は上記した説明ではなくて特許請求の範囲によって示され、特許請求の範囲と均等の意味および範囲内でのすべての変更が含まれることが意図される。   It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

本発明によれば、発光素子の不良率を低減できるから、工業的規模で窒化ガリウム系化合物半導体を量産することができるようになり、特に発光ダイオード(LED)の市場規模の拡大を図ることができる。   According to the present invention, since the defect rate of light emitting elements can be reduced, gallium nitride compound semiconductors can be mass-produced on an industrial scale, and in particular, the market scale of light emitting diodes (LEDs) can be increased. it can.

実施例1の窒化ガリウム系化合物半導体発光素子の構造を示す断面模式図である。1 is a schematic cross-sectional view showing the structure of a gallium nitride-based compound semiconductor light-emitting element of Example 1. FIG. 実施例4の窒化ガリウム系化合物半導体発光素子の構造を示す断面模式図である。6 is a schematic cross-sectional view showing the structure of a gallium nitride-based compound semiconductor light-emitting element of Example 4. FIG. 実施例5の窒化ガリウム系化合物半導体発光素子の構造を示す断面模式図である。6 is a schematic cross-sectional view showing the structure of a gallium nitride-based compound semiconductor light-emitting element of Example 5. FIG. 実施例6の窒化ガリウム系化合物半導体発光素子の構造を示す断面模式図である。6 is a schematic cross-sectional view showing the structure of a gallium nitride-based compound semiconductor light-emitting element of Example 6. FIG.

符号の説明Explanation of symbols

2 GaN厚膜基板、3 n型GaN層、4 発光層、5 p型クラッド層、6 p型コンタクト層、11 p型電極、12 溝、13 保護膜、21 n型電極、22 パッド電極。   2 GaN thick film substrate, 3 n-type GaN layer, 4 light emitting layer, 5 p-type cladding layer, 6 p-type contact layer, 11 p-type electrode, 12 groove, 13 protective film, 21 n-type electrode, 22 pad electrode.

Claims (13)

導電性を有する透光性のn型半導体基板上に、III族窒化物半導体膜と、p型電極とを備え、n型半導体基板より光を取り出す発光素子であって、III族窒化物半導体膜の光取り出し方向と反対側の表面の少なくとも一部と、III族窒化物半導体膜の側面およびn型半導体基板の側面の少なくとも一部に、絶縁性の保護膜を有することを特徴とするIII族窒化物半導体発光素子。   A light-emitting element including a group III nitride semiconductor film and a p-type electrode on a light-transmitting n-type semiconductor substrate having conductivity, and extracting light from the n-type semiconductor substrate, the group III nitride semiconductor film A group III, comprising an insulating protective film on at least a part of the surface opposite to the light extraction direction, on a side surface of the group III nitride semiconductor film and on a side surface of the n-type semiconductor substrate Nitride semiconductor light emitting device. 側面上の保護膜は、III族窒化物半導体膜の表面から10μm以上で、n型半導体基板の厚さ以下の領域に形成されていることを特徴とする請求項1に記載のIII族窒化物半導体発光素子。   2. The group III nitride according to claim 1, wherein the protective film on the side surface is formed in a region not less than 10 μm from the surface of the group III nitride semiconductor film and not more than the thickness of the n-type semiconductor substrate. Semiconductor light emitting device. 保護膜が形成されている側面は、III族窒化物半導体膜とn型半導体基板のエッチングまたはダイシングにより形成された側面である請求項1または2に記載のIII族窒化物半導体発光素子。   3. The group III nitride semiconductor light emitting device according to claim 1, wherein the side surface on which the protective film is formed is a side surface formed by etching or dicing of the group III nitride semiconductor film and the n-type semiconductor substrate. n型半導体基板は、400nm以上の波長の光を透過する請求項1に記載のIII族窒化物半導体発光素子。   The group III nitride semiconductor light-emitting device according to claim 1, wherein the n-type semiconductor substrate transmits light having a wavelength of 400 nm or more. n型半導体基板は、III族窒化物またはSiCからなることを特徴とする請求項1または2に記載のIII族窒化物半導体発光素子。   3. The group III nitride semiconductor light-emitting device according to claim 1, wherein the n-type semiconductor substrate is made of group III nitride or SiC. III族窒化物半導体基板は、キャリア濃度が1×1018cm−3以上であり、5×1019cm−3以下である請求項5に記載のIII族窒化物半導体発光素子。 The group III nitride semiconductor light-emitting device according to claim 5, wherein the group III nitride semiconductor substrate has a carrier concentration of 1 × 10 18 cm −3 or more and 5 × 10 19 cm −3 or less. SiC半導体基板は、キャリア濃度が5×1016cm−3以上であり、1×1018cm−3以下である請求項5に記載のIII族窒化物半導体発光素子。 The group III nitride semiconductor light-emitting element according to claim 5, wherein the SiC semiconductor substrate has a carrier concentration of 5 × 10 16 cm −3 or more and 1 × 10 18 cm −3 or less. III族窒化物半導体基板は、エピタキシャル成長法により下地基板上に形成された後、下地基板の一部または全部を剥離、または研磨、またはエッチングにより除去して得られたものであることを特徴とする請求項5に記載のIII族窒化物半導体発光素子。   The group III nitride semiconductor substrate is obtained by being formed on an underlying substrate by an epitaxial growth method and then removing a part or all of the underlying substrate by peeling, polishing, or etching. The group III nitride semiconductor light-emitting device according to claim 5. n型半導体基板は、光取り出し面上にメッシュ形状のn型電極と、パッド電極を有することを特徴とする請求項1に記載のIII族窒化物半導体発光素子。   2. The group III nitride semiconductor light-emitting device according to claim 1, wherein the n-type semiconductor substrate has a mesh-shaped n-type electrode and a pad electrode on a light extraction surface. n型電極は、透光性を有することを特徴とする請求項9に記載のIII族窒化物半導体発光素子。   The group III nitride semiconductor light-emitting device according to claim 9, wherein the n-type electrode has translucency. パッド電極は、n型電極と接する部分が電流阻止構造を有することを特徴とする請求項9に記載のIII族窒化物半導体発光素子。   The group III nitride semiconductor light-emitting device according to claim 9, wherein the pad electrode has a current blocking structure at a portion in contact with the n-type electrode. III族窒化物半導体膜は、p型電極と接する部分が凹凸を有することを特徴とする請求項1に記載のIII族窒化物半導体発光素子。   The group III nitride semiconductor light-emitting device according to claim 1, wherein the group III nitride semiconductor film has irregularities in a portion in contact with the p-type electrode. 凹凸は、算術平均粗さで10nm〜500nmであることを特徴とする請求項12に記載のIII族窒化物半導体発光素子。   The group III nitride semiconductor light-emitting device according to claim 12, wherein the irregularities have an arithmetic average roughness of 10 nm to 500 nm.
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