JP2004320058A - Semiconductor device and substrate connection structure thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device capable of improving heat radiation efficiency by a method using a solder bump for heat radiation, and to provide a substrate connection structure of such a semiconductor device. .
A semiconductor device includes a package holding a semiconductor element (chip) therein, a large number of heat-dissipating solder bumps connected to a board connection surface of the package, and a board connection solder bump. And The heat radiation solder bumps 13 are formed at a smaller pitch than the wiring connection solder bumps 14. The arrangement pitch of the heat-dissipating solder bumps 13 is such that a solder bridge is formed between adjacent solder bumps during heat treatment for bonding to the substrate, and all the heat-dissipating solder bumps 13 form an integrated bonding layer 30. It is set as follows.
[Selection diagram] Fig. 1

Description

  The present invention provides a semiconductor device in which a plurality of wiring connection solder bumps and a plurality of heat radiation solder bumps are formed on a substrate connection surface of a package holding a semiconductor element, and a combination of the semiconductor device and the substrate. To a substrate connection structure of a semiconductor device.

FIGS. 10A and 10B show a conventional semiconductor device having solder bumps, FIG.
b) is a bottom view. The semiconductor device 1 includes a package 2 for holding a semiconductor element (chip) (not shown) therein, a large number of heat-dissipating solder bumps 3 and a board-connecting solder bump 4 connected to a board connecting surface 2 a of the package 2. It has.

  The heat-dissipating solder bumps 3 are arranged in a central area of the board connecting surface 2a, and the wiring-connecting solder bumps 4 are arranged in a peripheral area surrounding the central area. The wiring connection solder bumps 4 are arranged so as to be connected to electrodes of a built-in semiconductor element, and have a function as a contact for connecting a circuit of the semiconductor element to an external circuit.

  The semiconductor device 1 is mounted on a substrate and undergoes a heat treatment (reflow) process, thereby being connected to the substrate 5 as shown in FIG. The substrate 5 is provided with heat radiation pads 6 at positions corresponding to the heat radiation solder bumps 3, and wiring connection pads 7 at positions corresponding to the wiring connection bumps 4. The semiconductor device 1 is fixed to the substrate 5 by melting each solder bump and bonding it to each pad in a heat treatment process.

  The solder bumps 4 for wiring connection need to be independently connected to the corresponding pads 7 for wiring connection as connection terminals. Therefore, a predetermined pitch is set so that solder bridges do not occur between adjacent bumps due to heat treatment. It is arranged in. The heat-dissipating solder bumps 3 are also formed at the same pitch as the wiring-connecting solder bumps 4 as shown in FIG.

  According to the above configuration, the heat generated in the semiconductor element in the package is transmitted to the substrate 5 side through the heat conducting portion formed by the heat radiating solder bumps 3 and diffused and radiated.

  However, in the substrate connection structure using the above-described conventional semiconductor device 1, since the heat conducting portions are formed at the same pitch as the wiring connection solder bumps, the cross-sectional area of the heat conducting portion is relatively small, and the heat radiation efficiency is poor. There is a problem.

  The present invention has been made in view of the above-described problems of the related art, and provides a semiconductor device capable of improving heat radiation efficiency by a method using a heat radiation solder bump as compared with the related art. It is an object (object) to provide a substrate connection structure for a semiconductor device.

  In order to achieve the above object, a semiconductor device according to the present invention has a configuration in which a plurality of wiring connection solder bumps and a plurality of heat radiation solder bumps are formed on a substrate connection surface of a package holding a semiconductor element. The heat-dissipating solder bumps are collectively arranged in a partial area of the board connection surface, and during heat treatment for bonding to the board, a solder bridge is formed between adjacent solder bumps to form an integral bonding layer It is characterized by being arranged at such a pitch.

  According to the above configuration, since the heat radiation solder bumps form a bridge when connected to the substrate to form an integral bonding layer, the individual heat radiation solder bumps are independently bonded to the substrate as in the related art. As compared with the case, the ratio of the effective area of the heat conducting portion used for heat dissipation is increased, and the heat dissipation efficiency can be improved.

  In addition, it is desirable that the heat radiation solder bumps be arranged in a central area of the connection surface, and the wiring connection solder bumps be arranged in a peripheral area surrounding the central area. Since the semiconductor element is usually arranged at the center of the package, the above arrangement allows the heat generated by the semiconductor element to be efficiently radiated to the substrate side via the integral bonding layer.

  Further, a heat radiating plate having a high thermal conductivity for transmitting heat from the semiconductor element may be provided on the substrate connecting surface side of the package, and a heat radiating solder bump may be formed on the heat radiating plate. In this case, if a relay portion that directly contacts the semiconductor element is formed on the heat sink, the heat radiation efficiency can be further improved. When the relay section is arranged so as to be almost entirely in contact with the surface of the semiconductor element on the heat radiating plate side, maximum heat radiation efficiency can be obtained.

  In the case of a cavity-down structure in which the semiconductor element is exposed on the substrate connection surface side, the heat-releasing solder bumps can be formed directly on the semiconductor element. In addition, if a solder resist layer having a plurality of openings is formed on the surface of the semiconductor element, and heat-dissipating solder bumps are formed in these openings, the solder bumps can be easily formed at accurate positions as designed. be able to.

  On the other hand, a substrate connection structure of a semiconductor device according to the present invention includes a substrate having wiring connection pads and a heat radiation pad, a wiring connection solder bump bonded to the wiring connection pad, and a heat radiation bonding joined to the heat radiation pad. In combination with a semiconductor device having solder bumps, heat-dissipating solder bumps are collectively arranged in a partial area of the board connection surface, and when joined to the board by heat treatment, a solder bridge is formed between adjacent solder bumps. It is characterized in that it is formed so as to form an integral bonding layer.

  According to this structure, an integrated heat-dissipating bonding layer is formed between the semiconductor device and the substrate, so that compared to a conventional case in which individual heat-dissipating solder bumps are independently bonded to the substrate. As a result, the ratio of the effective area used for heat dissipation increases, and the heat dissipation efficiency can be improved.

  In order to make it easy to join adjacent solder bumps for heat dissipation, in the above structure, the ratio of the effective area of the heat dissipation pad to the total area of the area is determined by dividing the effective area of the wiring connection pad by the total area of the area. It is desirable to set higher than the ratio to. In the case where a solder resist layer is formed on the surface of the substrate to which the semiconductor device is bonded, solder bumps for wiring connection and heat radiation are connected to the solder resist layer to pads for wiring connection and heat radiation. It is desirable to form an opening for the heat dissipation and design the diameter of the opening formed for heat dissipation to be larger than the diameter of the opening formed for wiring connection. In addition, a continuous plane covering an area to which the heat-dissipating solder bumps are joined may be formed as the heat-dissipating pad.

  As described above, according to the present invention, when connecting to the substrate, the heat-radiating solder bumps form a bridge to form an integral bonding layer, so that individual heat-radiating solder bumps are independently formed as in the related art. The ratio of the effective area used for heat dissipation is higher than in the case where the semiconductor device is joined to the substrate, and the heat dissipation efficiency can be improved.

Hereinafter, an embodiment of a substrate connection structure of a semiconductor device according to the present invention will be described. 1A and 1B show a semiconductor device 10 according to the first embodiment, wherein FIG. 1A is a side view and FIG. 1B is a bottom view. The semiconductor device 10 includes a package (corresponding to a sealing body) 11 for holding a semiconductor element (chip) (not shown) therein, and a number of heat-radiating solder bumps (first type) connected to a substrate connection surface 11 a of the package 11. 13) and a wiring connection solder bump (corresponding to a second protruding electrode) 14.

  The heat-dissipating solder bumps 13 are collectively arranged in the central area of the board connecting surface 11a, and the wiring-connecting solder bumps 14 are arranged in a peripheral area surrounding the central area. The wiring connection solder bumps 14 are arranged so as to be connected to electrodes of a built-in semiconductor element, and have a function as a contact for connecting a circuit of the semiconductor element to an external circuit.

  The semiconductor device 10 is mounted on a substrate and undergoes a heat treatment (reflow) process, thereby being connected to the substrate 20 as shown in FIG. The substrate 20 is provided with heat radiation pads 21 at positions corresponding to the heat radiation solder bumps 13, and wiring connection pads 22 at positions corresponding to the wiring connection bumps 14. The semiconductor device 10 is fixed to the substrate 20 by melting each solder bump and bonding it to each pad in a heat treatment process.

  The wiring connection solder bumps 14 need to be independently connected to the corresponding wiring connection pads 22 as connection terminals, and therefore have a predetermined pitch so that solder bridges do not occur between adjacent bumps due to heat treatment. It is arranged in. On the other hand, the heat radiation solder bumps 13 are formed at a smaller pitch than the wiring connection solder bumps 14, as shown in FIG. The arrangement pitch of the heat radiation solder bumps 13 is such that a solder bridge is formed between adjacent solder bumps during heat treatment for bonding to the substrate 20, and all the heat radiation solder bumps 13 are shown in FIG. It is set so as to form such an integral bonding layer 30. In the first embodiment, as shown in FIG. 2B, the heat-dissipating bonding layers 30 are connected to the heat-dissipating pads 21 formed independently of each other. Specifically, for example, when the diameter of each solder bump is 0.76 mm, the arrangement pitch of the heat radiation solder bumps 13 may be set to about 1.00 mm, and the arrangement pitch of the wiring connection solder bumps 14 may be set to about 1.27 mm. .

  According to the above configuration, heat generated in the semiconductor element in the semiconductor device 1 during actual use is transmitted to the substrate 20 via the bonding layer 30 and diffused and radiated by the substrate 20. At this time, since the heat conducting portion from the semiconductor device 10 to the substrate 20 side is formed by the integral bonding layer 30, compared with the conventional case in which the individual heat radiation solder bumps are independently bonded to the substrate. As a result, the ratio of the effective area used for heat dissipation is high, and the heat dissipation efficiency can be improved.

In order to facilitate bonding of adjacent heat radiation solder bumps, in the above structure, the ratio of the effective area of the heat radiation pad to the total area of the area is determined by dividing the effective area of the wiring connection pad by the area of the area. What is necessary is just to set it higher than the ratio with respect to the whole area. For example, as shown in FIG. 3, when the solder resist layer 40 is formed on the substrate 20 and the openings 41 and 42 are formed at positions corresponding to the respective pads, the openings 42 corresponding to the wiring connection pads 22 are formed as shown in FIG. 3A, the opening 41 corresponding to the heat radiation pad 21 is formed with a larger diameter d2, as shown in FIG. 3B.

  The diameter of the opening 42 for the wiring connection pad 22, that is, the effective area ratio is determined so that the solder bridge is not formed on the wiring connection solder bump 14 by the heat treatment as described above. On the other hand, with regard to the heat radiation pad 21, the effective area ratio is increased so that the solder bridge is positively formed. By making the diameter of the opening 41 relatively large in this manner, the diameter of the heat-dissipating solder bump 13 can also be increased, and a solder bridge can be easily formed at the time of joining.

4A and 4B show a substrate bonding structure of the semiconductor device according to the second embodiment, wherein FIG. 4A is a side view in a bonded state, FIG. 4B is a plan view of the substrate, and FIG. 4C is a broken line in FIG. It is an enlarged view of the part enclosed with. In this example, the configuration on the semiconductor device 10 side is the same as that of the first embodiment, and a continuous plane covering this area is provided in a region of the substrate 20 to which the heat radiation solder bump (bonding layer 30) is bonded. Pad 23 is formed.

  According to the above configuration, the bonding layer 30 that is melted and integrated at the time of bonding is entirely bonded to the heat radiation pad 23. Therefore, the heat conduction efficiency between the bonding layer 30 and the substrate 20 can be made higher than in the first embodiment, and the heat generated in the semiconductor element in the package can be more efficiently transmitted to the substrate 20 and dissipated. be able to.

  FIG. 5 is a sectional view showing a semiconductor device 50 according to the third embodiment. In this example, a heat radiation plate 53 having a high thermal conductivity for transmitting heat from the semiconductor element 52 is provided on the substrate connection surface 51 a side of the package 51, and a heat radiation solder bump 54 is formed on the heat radiation plate 53. I have. Note that the wiring connection solder bumps 55 are formed in the peripheral region as in the first embodiment. The wire 56 electrically connects the electrode of the semiconductor element 52 to the electrode of the package 51 on which the wiring connection bump 14 is provided. Also, the point that the pitch of the heat radiation determination bumps 54 is smaller than the pitch of the wiring connection solder bumps is the same as in the first embodiment.

  According to the third embodiment, the heat generated in the semiconductor element 51 is efficiently transmitted to the heat-radiating solder bumps 54 via the heat-radiating plate 53. Therefore, by connecting the semiconductor device 50 to the substrate through a heat treatment step and forming an integrated bonding layer, it is possible to obtain higher heat dissipation efficiency than in the first embodiment.

  FIG. 6 is a cross-sectional view showing a modification of the third embodiment shown in FIG. In this example, in addition to the configuration of the third embodiment, a plurality of convex portions 53a are formed on the heat sink 53 as relay portions that directly contact the semiconductor element 51. According to this configuration, heat generated in the semiconductor element 51 is more efficiently conducted to the heat radiating plate 53 than the example of FIG. Therefore, by forming the bonding layer by connecting to the substrate, it is possible to obtain higher heat radiation efficiency than in the third embodiment.

  FIG. 7 is a sectional view showing another modification of the third embodiment shown in FIG. In this example, in addition to the configuration of the third embodiment, a flat portion 53b is formed on the heat sink 53 as a relay portion that directly contacts the semiconductor element 51 entirely. According to this configuration, the thermal conductivity to the heat radiating plate 53 can be further increased as compared with the example of FIG. Therefore, by forming the bonding layer by connecting to the substrate, it is possible to obtain higher heat radiation efficiency than the configuration of FIG.

  Note that the semiconductor element 51 is directly bonded onto the heat sink 53 directly or via a die bond material without forming the flat portion 53b between the semiconductor element 51 and the heat sink 53 as in the example of FIG. You can also. In this case, the die pad can be used also as the heat sink 53.

  FIG. 8 is a sectional view showing a semiconductor device 60 according to the fourth embodiment of the present invention. In this example, a semiconductor device 60 having a cavity-down structure in which the semiconductor element 61 is exposed on the substrate connection surface 62a side of the package 62 is intended. The heat radiation solder bump 63 is formed directly on the semiconductor element 61. Note that the wiring connection solder bumps 64 are formed in the peripheral region, as in the first embodiment. Also, the point that the pitch of the heat radiation determination bumps 63 is smaller than the pitch of the wiring connection solder bumps 64 is the same as in the first embodiment.

  According to the fourth embodiment, since the heat generated in the semiconductor element 61 is directly transmitted to the solder bumps 63 for heat dissipation, the semiconductor device 60 is connected to the substrate through a heat treatment process to form an integrated bonding layer. Thereby, higher heat radiation efficiency can be obtained than in the first embodiment.

  FIG. 9 is a side view showing a modified example of the fourth embodiment shown in FIG. 8, and shows an enlarged portion where the semiconductor element 61 is arranged. In this example, a solder resist layer 65 having a plurality of openings is formed on the substrate connection surface 62a of the package 62 including the surface of the semiconductor element 61. In the central region of the solder resist layer 65, a plurality of openings 66 for forming the heat-dissipating solder bumps 63 are formed.

  By providing the solder resist layer 65 as shown in FIG. 9, when forming the heat-dissipating solder bump 63, the heat-dissipating solder bump 63 can be easily formed at an accurate position as designed. Since the heat-dissipating solder bumps 63 are formed at a narrow pitch so as to form a solder bridge at the time of bonding to the substrate, if the formation positions are displaced during mounting on the semiconductor device, there is a possibility that adjacent solder bumps are bonded to each other. is there. Then, if the solder bumps are joined before joining to the substrate, the joined portion has a lower height than a single solder bump, and there is a possibility that the joined portion will not come into contact with the substrate when connected to the substrate. By forming the heat-dissipating solder bumps with reference to the openings 66 formed in the solder resist layer 65 as described above, it is possible to prevent the solder bumps from being inadvertently bonded due to misalignment, and to join the solder bumps to the substrate with the same height. Can be ensured.

1A and 1B show a semiconductor device according to a first embodiment, wherein FIG. 1A is a side view and FIG. 1B is a bottom view. 2A and 2B show a connection structure of the semiconductor device of FIG. 1 to a substrate, wherein FIG. 1A is a side view, and FIG. 2B is an enlarged view of a portion surrounded by a broken line in FIG. 3A and 3B show a structure in which a solder resist layer is provided on the substrate of the first embodiment, wherein FIG. 4A is a cross-sectional view showing wiring connection pads, and FIG. 4B is a cross-sectional view showing heat radiation pads. FIG. 4A shows a substrate bonding structure of a semiconductor device according to a second embodiment, in which FIG. 5A is a side view in a bonded state, FIG. 5B is a plan view of the substrate, and FIG. 5C is surrounded by a broken line in FIG. FIG. FIG. 11 is a sectional view showing a semiconductor device according to a third embodiment. FIG. 13 is a sectional view showing a modification of the third embodiment shown in FIG. 5. FIG. 16 is a sectional view showing another modification of the third embodiment shown in FIG. 5. FIG. 14 is a sectional view showing a semiconductor device according to a fourth embodiment. FIG. 9 is a side view showing a modification of the fourth embodiment shown in FIG. 8. 1A shows a conventional semiconductor device provided with solder bumps, FIG. 1A is a side view, and FIG. 1B is a bottom view. FIG. 11 is a side view showing a connection structure of the semiconductor device of FIG. 10 to a substrate.

Explanation of reference numerals

DESCRIPTION OF SYMBOLS 10 Semiconductor device 11 Package 13 Solder bump for heat dissipation 14 Solder bump for wire connection 20 Substrate 21 Pad for heat dissipation 22 Pad for wire connection 30 Bonding layer

Claims (5)

In a substrate connection structure of a semiconductor device including a substrate and a semiconductor device bonded thereto, a heat conducting portion for heat dissipation is formed between the substrates and on a substrate connection surface of a package holding a semiconductor element. , The heat conducting part is an integral bonding layer that fills the area of the heat conducting part,
The substrate connection structure of a semiconductor device, wherein the semiconductor element is disposed so as to be exposed on the substrate connection surface side of the package, and the heat conductive portion is formed directly on the semiconductor element. A semiconductor element, a sealing body for sealing the semiconductor element, a plurality of first protruding electrodes arranged on the surface of the sealing body at a first interval, and a periphery of the first protruding electrode. A plurality of second protruding electrodes formed in the region and arranged at a second interval wider than the first interval.
The semiconductor device, wherein the semiconductor element is disposed so as to be exposed on a substrate connection surface side of the sealing body, and the first protruding electrode is directly formed on the semiconductor element.   3. The semiconductor device according to claim 2, wherein the second protrusion electrode is electrically connected to the semiconductor element, and the first protrusion electrode is not electrically connected to the semiconductor element. 4. A plurality of first protruding electrodes densely arranged on the substrate connection surface of the package holding the semiconductor element, and a plurality of second protruding electrodes arranged less densely than the first protruding electrodes;
The semiconductor device, wherein the semiconductor element is disposed so as to be exposed on a substrate connection surface side of the package, and the first protruding electrode is directly formed on the semiconductor element.   5. The semiconductor device according to claim 4, wherein the first protruding electrode is disposed substantially at a center of the surface of the semiconductor device, and the second protruding electrode is disposed in a region surrounding the first protruding electrode. 6. 13. The semiconductor device according to claim 1.

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