JP2004311799A - Semiconductor testing device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor testing device applicable to the measurement of MOS-FET on-state resistance on a wafer, even in case of a warped wafer, to the measurement of chips on the periphery of the wafer, and to the measurement involving the wafer rear surface with measurement accuracy degradation effectively avoided. <P>SOLUTION: A plurality of contact pins 4 are provided on a stage 2 and are selectively depressed by movable contact pieces 5F, 5S, so that contact pins 4 abut at the rear surface of the semiconductor wafer at specified positions corresponding to the contact pieces 5F, 5S. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor test apparatus, and can be applied to, for example, on-resistance measurement of a MOS-FET (Metal Oxide Semiconductor Field Effect Transistor) using a wafer. According to the present invention, a plurality of contact pins are provided on a stage, and the contact pins are selectively pressed by a movable contact piece, and the contact pins are brought into contact with the back surface of the semiconductor wafer at a specific portion corresponding to the contact piece. It is possible to measure not only a wafer having a large warp but also chips around the wafer, so that deterioration of the measurement accuracy on the back surface of the wafer can be effectively avoided.
[0002]
[Prior art]
Conventionally, in a semiconductor test apparatus, as disclosed in, for example, Japanese Patent Application Laid-Open No. H11-64385, measurement accuracy is improved by so-called Kelvin connection.
[0003]
That is, in this type of semiconductor test apparatus, after a semiconductor wafer is attracted and held on a predetermined stage, a probe is sequentially pressed against each chip of the semiconductor wafer to measure the characteristics of each chip. In this type of semiconductor test device, each probe is connected to the sense and force of the measuring device by so-called Kelvin connection, thereby preventing deterioration of measurement accuracy due to contact resistance or the like in the probe. .
[0004]
In a semiconductor test apparatus that holds a semiconductor wafer by attracting and holding a semiconductor wafer on such a stage, a sense and a force of a measuring device are connected to the stage. Therefore, in this type of semiconductor test apparatus, the resistance value obtained by adding the resistance of the stage itself to the contact resistance between the back surface of the wafer and the stage is superimposed on the measurement result. In the measurement, there was a disadvantage that the measurement accuracy deteriorated.
[0005]
On the other hand, in a semiconductor test apparatus that holds a semiconductor wafer by attracting and holding it on such a stage, a configuration in which a contact by Kelvin connection is provided on the back surface of the semiconductor wafer has been proposed. According to such a configuration, it is possible to prevent a decrease in measurement accuracy due to a contact resistance between the back surface of the wafer and the stage and a resistance of the stage itself. However, in this method, since the contact is not always provided on the back surface of the chip to be measured, the potential difference from directly behind the chip to be measured to the sense line is superimposed on the measured value as a resistance. Thus, in the case of this method, there is a disadvantage that the measurement result changes depending on the distance between the portion to be measured and the contact point, and further, depending on the size of the chip.
[0006]
For this reason, in this type of semiconductor test apparatus, there is also a semiconductor test apparatus which holds a semiconductor wafer by sandwiching the periphery of the semiconductor wafer from above and below, and presses a probe by Kelvin connection from both sides of the semiconductor wafer (hereinafter, referred to as a double side method). It has been made as proposed. In the double-sided semiconductor test apparatus, the above-described drawbacks of the semiconductor test apparatus having the configuration for holding the semiconductor wafer by suction can be effectively avoided.
[0007]
[Patent Document 1]
JP-A-11-64385
[Problems to be solved by the invention]
However, in this double-sided semiconductor test apparatus, by holding the semiconductor wafer while holding the periphery of the semiconductor wafer from above and below, it is possible to test the characteristics of the chips formed around the semiconductor wafer after all. There are difficult problems. Incidentally, peripheral chips which are difficult to test in this way are eventually thrown away, and according to the semiconductor test apparatus of this type, the yield of chips obtained from one wafer deteriorates. There are drawbacks.
[0009]
Further, by holding the semiconductor wafer by holding the periphery of the semiconductor wafer from above and below, there is a problem that it is difficult to measure a semiconductor wafer having a large warp. Has a drawback that is difficult to apply.
[0010]
The present invention has been made in consideration of the above points, and can measure a wafer with a large warp, and also a chip around the wafer, and effectively avoid deterioration of measurement accuracy on the back surface of the wafer. It is intended to propose a semiconductor test apparatus that can perform the test.
[0011]
[Means for Solving the Problems]
In order to solve such a problem, the invention according to claim 1 is applied to a semiconductor test apparatus that holds a semiconductor wafer on a stage and tests characteristics of chips formed on the semiconductor wafer. The present invention provides a semiconductor device, comprising: a plurality of contact pins that are insulated from each other, are held on the stage at a predetermined pitch, and are pressed from the back side. And a contact piece that is movable along the surface holding the contact pin and presses the contact pin provided at the opposing portion.
[0012]
Further, in the invention according to claim 2, in the configuration according to claim 1, the contact pieces are a contact piece for sensing and a contact piece for force, and are formed by Kelvin connection by the contact pieces for sensing and force. The characteristics of the chip are measured.
[0013]
Further, in the invention of claim 3, in the configuration of claim 1 or claim 2, the portion of the semiconductor wafer where the contact pins abut on the back surface by pressing the contact piece is moved from the front side of the semiconductor wafer. A probe is provided for contacting the semiconductor wafer.
[0014]
According to the configuration of claim 1, the semiconductor wafer is held on the stage and applied to a semiconductor test apparatus for testing the characteristics of the chips formed on the semiconductor wafer. The surrounding chips can be measured. Further, the semiconductor wafer is held on the stage at a predetermined pitch while being insulated from each other, and a plurality of contact pins whose tips abut on the back surface of the semiconductor wafer by pressing from the back side, and holding the semiconductor wafer on the back surface of the stage. A contact piece that is movable along the surface and presses the contact pin provided at the opposing portion, thereby moving the contact piece to a portion corresponding to the chip to be measured and pressing the contact pin. Accordingly, contact can be made on the back surface of the chip to be measured, and accordingly, deterioration of measurement accuracy on the back surface of the wafer can be effectively avoided.
[0015]
According to a second aspect of the present invention, in the configuration of the first aspect, the contact pieces are a contact piece for sensing and a contact piece for force, and Kelvin connection by the contact pieces for sensing and force. By measuring the characteristics of the chip, it is possible to prevent a measurement error related to the contact resistance of the contact piece, the contact pin, and the like, and to further effectively reduce the deterioration of the measurement accuracy related to the further lower surface of the wafer. .
[0016]
According to a third aspect of the present invention, in the configuration of the first or second aspect, the portion of the semiconductor wafer where the contact pins are in contact with the back surface by pressing the contact pieces is positioned on the front side of the semiconductor wafer. By having a probe that comes into contact with the semiconductor wafer from above, the probe is brought into contact with the pad of each chip from above the semiconductor wafer mounted on the stage by suction or the like, and the characteristics of each chip are measured. can do.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings as appropriate.
[0018]
(1) Configuration of Embodiment FIG. 1 is a perspective view showing a partial configuration of a semiconductor test apparatus according to an embodiment of the present invention. The semiconductor test apparatus 1 holds a semiconductor wafer by suction on a stage 2 and tests characteristics such as on-resistance of a chip formed on the semiconductor wafer.
[0019]
Here, the stage 2 is formed by processing an insulator made of, for example, Teflon or the like into a disk shape, and has an air suction port for sucking a semiconductor wafer at a predetermined pitch. Accordingly, in the semiconductor test apparatus 1, for example, a semiconductor wafer is transferred to the stage 2 by a handler or the like, and then suction is started from the air suction port to hold the semiconductor wafer. Is designed to enable measurement of chips around the wafer.
[0020]
Further, in the stage 2, through holes 3 are formed at a predetermined pitch on the entire surface holding the semiconductor wafer, and contact pins 4 are arranged in each through hole 3 as shown in a cross section in FIG. Here, one end of the contact pin 4 is provided so as to protrude from the rear side so as to be pressed from the rear side, and when no pressure is applied from the rear side, as shown in FIG. The stage 2 is disposed such that the front end on the semiconductor wafer side is recessed from the surface of the stage 2 holding the semiconductor wafer. Further, as shown in FIG. 2 (B), when pressed by contact pieces 5F and 5S described later, the tip protrudes very slightly from the surface holding the semiconductor wafer, and the back surface of the semiconductor wafer held on this surface. The tip is configured to abut.
[0021]
In the stage 2, as shown in FIG. 3, the contact pins 4 are densely arranged so that a plurality of contact pins 4 are assigned to one chip T formed on a semiconductor wafer.
[0022]
The semiconductor test apparatus 1 tests the characteristics of the chips formed on the semiconductor wafer by sequentially moving the contact pieces 5F, 5S, and the probe 6 with respect to such a stage 2 by a movable mechanism (not shown). .
[0023]
That is, the semiconductor test apparatus 1 is provided with arms 7 and 8 extending to the front side and the back side of the stage 2, respectively, and the probe 6 and the contact pieces 5F and 5S face the tips of the arms 7 and 8, respectively. Placed in Here, the probe 6 and the contact pieces 5F, 5S are respectively connected to corresponding test devices for testing characteristics.
[0024]
In the arms 7 and 8, when the semiconductor wafer is held on the stage 2, as shown by an arrow A, the probe 6 and the contact pieces 5F and 5S are located above the semiconductor wafer and below the stage 2, respectively. , Are driven by a predetermined drive mechanism. When the probe 6 and the contact pieces 5F and 5S are held up and down in this way, after lowering the probe 6 to make contact with the semiconductor wafer, the contact pieces 5F and 5S are raised and the contact pins 4 are pressed. A probe 6 and contact pieces 5F and 5S are connected to the front and back surfaces of a chip to be tested, respectively, to test the characteristics of the chip. When the characteristics are tested in this manner, the probe 6 is moved up after the contact pieces 5F and 5S are lowered, and the probe 6 and the contact pieces 5F and 5S are moved to the chip to be subsequently tested. In the semiconductor test apparatus 1, these operations are repeated to complete the test for all the chips formed on the semiconductor wafer. After the probe 6 and the contact pieces 5F and 5S are retracted to the original standby positions, the semiconductor wafer Is terminated.
[0025]
Of the probe 6 and the contact pieces 5F and 5S connected to the test apparatus 1 in this way, the probe 6 is configured to press the probe needle to the corresponding chip pad similarly to the conventional semiconductor test apparatus. In addition, it is connected to a test apparatus by a Kelvin connection, so that deterioration of measurement accuracy can be prevented.
[0026]
On the other hand, each of the contact pieces 5F and 5S is constituted by a force contact piece 5F and a sensing contact piece 5S, and thereby can be connected to a test apparatus by Kelvin connection. That is, as shown in FIGS. 2 and 3, the contact pieces 5F and 5S are insulated by the insulating plate 9 provided at the tip of the arm 8, and the force contact piece 5F is formed in a substantially cylindrical shape. On the other hand, the sensing contact piece 5S is formed in a cylindrical shape so as to surround the force contact piece 5F. The contact pieces 5F and 5S are respectively connected to the sense and the force of the test apparatus via terminals formed on the back side.
[0027]
As shown in FIG. 3 when viewed from the semiconductor wafer side, when the center of the sensing contact piece 5S is arranged at the center of the chip T of the semiconductor wafer, the contact pieces 5F and 5S 5F is formed so as to press the contact pins 4 at the peripheral portion of the chip T, and to press a plurality of contact pins 4 respectively. As a result, in the semiconductor test apparatus 1, the corresponding contact pins 4 are selectively pressed by the sensing and force contact pieces 5F and 5S, respectively, and the contact pins 4 contacting the back surface of the semiconductor wafer are also pressed. The contact pieces 5F and 5S are assigned to sense and force in accordance with the contact pieces and are connected to the back surface of the semiconductor wafer.
[0028]
(2) Operation of Embodiment In the above configuration, in the semiconductor test apparatus 1 (FIG. 1), when a semiconductor wafer is placed on the stage 2, suction starts from an air suction port provided on the stage 2. As a result, the semiconductor wafer is held on the stage 2 by suction. Further, the probe 6 and the contact pieces 5F, 5S are respectively moved above and below the chip to be tested, above the semiconductor wafer and below the stage 2, and the probe 6 is lowered to contact the semiconductor wafer. Thus, in the semiconductor test apparatus 1, the probe needles are connected to the pads formed on the chip by Kelvin connection.
[0029]
Subsequently, the contact pieces 5F and 5S are raised to selectively press the contact pins 4 where the chip T is to be arranged (FIGS. 2 and 3), whereby the contact pins 4 are recessed from the holding surface of the stage 2 until then. The tip of the probe 6 whose tip is located at the position comes into contact with the back surface of the semiconductor wafer by this pressing. Thus, in the semiconductor test apparatus 1, at a location where a chip to be tested on a semiconductor wafer is formed, the contact piece 5S for sensing connected to the sense of the test apparatus is pressed by the contact piece 5S. A contact piece 5F for force, which is connected to the force of the test device, is connected to the back surface of the semiconductor wafer through the contact pin 4 formed by the contact pin 4 formed by pressing the contact piece 5F. To the back surface of the semiconductor wafer.
[0030]
Thus, the semiconductor test apparatus 1 holds the semiconductor wafer on the stage 2 so that the semiconductor wafer can be measured for a wafer with a large warp and also for chips around the wafer, and the chip to be tested can be measured. Can be connected to the test equipment at the location where the is formed, effectively avoiding the situation where the potential difference from directly behind the chip under test to the sense line is superimposed on the measured value as a resistance component. The measurement accuracy can be improved accordingly.
[0031]
Further, since the contact piece 5S for sensing and the contact piece 5F for force are Kelvin-connected and formed in a coaxial shape with a sectional area corresponding to one chip T, the contact pieces 5F, 5S and the contact pins 4F are formed. A decrease in measurement accuracy due to the contact resistance of the contact pin 4 and the contact resistance between the back surface of the semiconductor wafer and the like can be effectively avoided, and a decrease in measurement accuracy can be effectively avoided accordingly. ing.
[0032]
Actually, in a MOS-FET which is one of the test objects of such a semiconductor test apparatus, an on-resistance is measured in a test of its characteristics. The number of devices of [mΩ] or less has been increasing, and thus, even if there is a potential difference from the back of the chip to be measured to the sense line, the contact resistance of the contact pins on the back, etc., the measurement accuracy is significantly deteriorated. However, according to the configuration of this embodiment, the measurement error on the back surface of the semiconductor wafer can be reduced to 1 [mΩ] or less, and the measurement accuracy is significantly improved as compared with the related art. can do.
[0033]
Further, if the back side is connected by the contact pins 4 as in this embodiment, the back side can be effectively prevented from being damaged by pressing the probe needle as in the conventional Kelvin chuck system. Product defects during chip mounting can also be significantly reduced.
[0034]
In addition, although each chip produced in this way may be molded and tested, in the test after molding, the resistance of the bonding wire causes an error. On the other hand, in the case of testing with this semiconductor test apparatus, errors can be effectively avoided even for the resistance of such a bonding wire, whereby the ability of each chip can be truly measured. .
[0035]
(3) Effects of the Embodiment According to the configuration described above, a plurality of contact pins are provided on the stage, the contact pins are selectively pressed by the movable contact pieces, and the contact pins are pressed at specific portions corresponding to the contact pieces. Abuts against the back surface of the semiconductor wafer, it is possible to measure not only the wafer with a large warp, but also the chips around the wafer, and it is possible to effectively avoid the deterioration of the measurement accuracy on the back surface of the wafer. .
[0036]
These contact pieces are a contact piece for sensing and a contact piece for force. By measuring the characteristics of the chip by Kelvin connection using the contact pieces for sensing and force, the measurement accuracy related to the back surface of the wafer is measured. Can be more effectively avoided.
[0037]
Also, by providing a probe for contacting the semiconductor wafer from the front side of the semiconductor wafer to the portion of the semiconductor wafer where the contact pins are in contact with the back surface by pressing the contact piece, the configuration on the front side of the semiconductor wafer is The configuration can be the same as that of a conventional semiconductor test apparatus, and the configuration can be simplified accordingly.
[0038]
(4) Other Embodiments In the above-described embodiment, the case where the sensing and force contact pieces are arranged in a coaxial shape has been described. However, the present invention is not limited to this. In the case of providing the contact pieces for sensing and force, for example, in the case where they are provided side by side, arrangements of various shapes can be widely applied.
[0039]
Further, in the above-described embodiment, the case where the semiconductor wafer is tested by Kelvin connection also on the back side has been described. However, the present invention is not limited to this, and in a case where practically sufficient measurement accuracy can be ensured, The Kelvin connection on the back side may be omitted.
[0040]
Further, in the above-described embodiment, the case where the front side is connected by a probe has been described. However, the present invention is not limited to this, and a large number of contact pins are provided on the front side similarly to the back side, and these contact pins are selectively provided. May be used to make contact.
[0041]
【The invention's effect】
As described above, according to the present invention, a plurality of contact pins are provided on a stage, and a contact pin is selectively pressed by a movable contact piece, and the contact pin is pressed at a specific portion corresponding to the contact piece on the back surface of the semiconductor wafer. , It is possible to measure not only the wafer with a large warp but also the chips around the wafer, and it is possible to effectively avoid the deterioration of the measurement accuracy on the back surface of the wafer.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a partial configuration of a semiconductor test apparatus according to an embodiment of the present invention.
FIG. 2 is a sectional view showing a stage of the semiconductor test apparatus of FIG. 1 together with a related configuration.
FIG. 3 is a plan view showing a relationship between contact pins and contact pieces in the semiconductor test device of FIG.
[Explanation of symbols]
1 ... Semiconductor test equipment, 2 ... Stage, 4 ... Contact pin, 5F, 5S ... Contact piece, 6 ... Probe

Claims (3)

In a semiconductor test apparatus for holding a semiconductor wafer on a stage and testing characteristics of chips formed on the semiconductor wafer,
A plurality of contact pins that are insulated from each other and are held on the stage at a predetermined pitch, and are pressed from the back side, with a plurality of contact pins having tips contacting the back side of the semiconductor wafer;
A semiconductor test apparatus, comprising: a contact piece movable on a back surface of the stage along a surface holding the semiconductor wafer and pressing the contact pin provided at an opposing portion. The contact piece is a contact piece for sensing and a contact piece for force,
2. The semiconductor test apparatus according to claim 1, wherein characteristics of the chip are measured by Kelvin connection using the sensing and force contact pieces. 2. The semiconductor wafer according to claim 1, wherein a portion of the semiconductor wafer where the contact pins are in contact with a back surface by pressing the contact piece has a probe that contacts the semiconductor wafer from the front surface side of the semiconductor wafer. Or a semiconductor test apparatus according to claim 2.

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