JP2004362282A - Network equipment and network system - Google Patents

Abstract

An object of the present invention is to save power by controlling a clock frequency of a network device as compared with a conventional device.
A network controller includes a reception buffer for buffering a reception frame received via a network. The comparison block of the virtual memory block 214 determines the content of the received frame. When there is a received frame of the frame status request, the frame generation circuit 216 returns the data set in the status register 215 as a transmission frame and sends it back. The control block of the virtual memory block 214 controls the supply of the operation clock to the comparison block. The virtual memory block 214 compares the number of received frames buffered in the reception buffer with a predetermined threshold. Then, the control block varies the frequency of the operation clock according to the result of the comparison.
[Selection] Figure 2

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a network device having a built-in network interface, for example, a copier, a printer, a multifunction peripheral thereof, and a network system including such a network device.
[0002]
[Prior art]
In recent years, a network system that connects a plurality of personal computers, printers, and the like via a LAN network and enables data sharing and printer sharing has become widespread.
[0003]
FIG. 6 is a schematic diagram showing an example of such a network system. In the network system shown in FIG. 6, a plurality of personal computers 101 and an output device 201 are connected via a network 301 so that data communication is possible. In such a network system, as the output device 201, for example, an image forming apparatus such as a copier, a printer, or a multifunction peripheral thereof is used.
[0004]
On the other hand, a conventional personal computer generally has a power management function. Some of these power management functions, such as the "on-now" power management function developed by Microsoft, are suitable for use in the network system illustrated in FIG. In other words, with such a power management function, even if the data transmission destination is in the power saving mode, the device returns from the power saving mode by transmitting a specific packet, and the data transmission source and the transmission destination Allows communication to start. Assuming such a power management function, a network interface (not shown) provided in the transmission destination, for example, the output device 201 monitors a frame on the network 301 while other parts of the device are in a low power state, and performs software Search for a specific frame registered by. Then, when the network interface of the output device 201 detects one of such frames, the network interface outputs a signal for starting and returning the system of the output device 201.
[0005]
[Patent Document 1]
JP 2000-141831 A
[Problems to be solved by the invention]
However, when the power management function as described above is used, the network interface is always operating even when the output device 201 is in the power saving mode, and it is desired to save power of the network interface in order to further save power.
[0007]
On the other hand, the power consumption of a circuit depends on its operating frequency. It is a well-known fact that the lower the operating frequency, the lower the power consumption.
[0008]
An object of the present invention is to control the clock frequency of a network device so that power consumption can be reduced as compared with the related art.
[0009]
[Means for Solving the Problems]
The invention according to claim 1 operates according to an operation command from a computer connected to a network, and when a predetermined condition is satisfied, only a part of the circuit of the network device is operated to save power. In a network device having a power mode function, the circuit includes a communication unit serving as a network interface for communicating with an external device via the network, and a reception buffer for buffering data received through the communication unit. Determining means for determining the content of the received data, responding means for transmitting data to the external device in response to the content of the determination, and controlling means for controlling supply of an operation clock to the determining means And comparison means for comparing the number of data buffered in the reception buffer with a predetermined threshold. For example, the control means varying the frequency of the operation clock in accordance with a result of the comparison, a network device according to claim.
[0010]
Therefore, in conjunction with the traffic of the network, when the number of data items in the reception buffer has a margin, the operation clock frequency in the determination unit is reduced to save power, and when the number of data items in the reception buffer is large, the operation in the determination unit is performed. By increasing the clock frequency to promote the processing of the determining means and to prevent the overflow of the receiving buffer, finer power saving control can be performed.
[0011]
According to a second aspect of the present invention, in the network device according to the first aspect, when there are a plurality of the inspection units, the control unit is configured to use unused inspection units or target data from a result of the inspection. The supply of the operation clock to the inspection means determined not to be the same is stopped.
[0012]
Therefore, it is possible to stop the inspection unit which has become unnecessary during the power saving mode, thereby providing a further power saving effect.
[0013]
According to a third aspect of the present invention, in the network device according to the first or second aspect, when the determination unit determines that the received data is a status request, the response unit transmits the status to the external device. The present network device transmits a status indicating that it is in the power saving mode.
[0014]
Therefore, it is possible to confirm that the network device is in the power saving mode in the external device without impairing the state of the network device in the power saving mode.
[0015]
According to a fourth aspect of the present invention, in the network device according to any one of the first to third aspects, the circuit detects establishment of a link to the network and link down in the power saving mode state. A link detecting means, when the down of the link is detected, the supply of power to the circuits other than the link detecting means and the present means is stopped, and when the establishment of the link is detected, The power supply to the circuit other than the detection means and the present means is restarted.
[0016]
Therefore, when the link to the network goes down, the power of the circuit operating even in the power saving mode can be further reduced, and a further power saving effect can be brought about.
[0017]
According to a fifth aspect of the present invention, in a network system in which a computer and a network device are connected to a network, the network device operates according to an operation command from the network-connected computer, and a predetermined condition is satisfied. Has a function of a power saving mode for saving power by operating only a part of the circuit of the present network device, the circuit includes a communication unit serving as a network interface for communicating with an external device via the network. A receiving buffer for buffering data received via the communication means, a determining means for determining the content of the received data, and a response for transmitting data to the external device in response to the content of the determination and responding Means, control means for controlling supply of an operation clock to the determination means, Comparing means for comparing the number of data buffered in the receiving buffer with a predetermined threshold value, wherein the control means varies the frequency of the operation clock according to a result of the comparison. Network system.
[0018]
Therefore, in conjunction with the traffic of the network, when the number of data items in the reception buffer has a margin, the operation clock frequency in the determination unit is reduced to save power, and when the number of data items in the reception buffer is large, the operation in the determination unit is performed. By increasing the clock frequency to promote the processing of the determining means and to prevent the overflow of the receiving buffer, finer power saving control can be performed.
[0019]
BEST MODE FOR CARRYING OUT THE INVENTION
An embodiment of the present invention will be described.
[0020]
This embodiment is applied to, for example, the output device 201 functioning as the printer illustrated in FIG. Therefore, the output device 201 implements the network device of the present invention, and operates according to an operation command from the personal computer 101 connected to the network. The output device 201 has a function of a power saving mode for saving power by operating only a part of circuits (a direct access control unit 212 described later) under a predetermined condition, for example, when the output device 201 is operated for a certain period of time without being used. It has.
[0021]
FIG. 1 is a block diagram illustrating an example of an output device 201 having an ASIC 211 in which a direct access control unit 212 is incorporated. The output device 201 is, for example, a printer.
[0022]
The ASIC 211 of this embodiment has various functions in addition to the function of the direct access control unit 212 described later. In order to perform such a function, the ASIC 211 includes a memory arbiter block (memory arbiter) 231 connected to a DMA (Direct Memory Access) controller 217. The memory arbitration block 231 connects to the CPU 252 via the CPU interface 232 and connects to the memory 253 via the memory controller 233. Therefore, the DMA controller 217 has a function of accessing the memory 253 shared with the CPU 252. Also, the DMA controller 217 connects to the HDD 254 via the HDD interface 234, connects to the printer engine 255 (when the output device 201 is implemented as a printer) in the system 251 via the printer engine interface 235, and connects to the IEEE 1284 interface. 236 is connected to the serial interface 256.
[0023]
Here, when the output device 201 is in the power saving mode, the power supply and the clock (power supply / power supply) other than the power supply and the clock (power supply 2 / clock 2) of the direct access control unit 212 described later, which is enclosed by a broken line in FIG. 1 / Clock 1) supply is stopped. Thus, after the output device 201 receives the command to shift to the power saving mode, only the direct access control unit 212 executes various controls. Then, when a return command from the power saving mode is received, the supply of the power supply and the clock (power supply 1 / clock 1) to the output device 201 other than the stopped direct access control unit 212 is restarted.
[0024]
FIG. 2 is a block diagram showing a circuit configuration of the direct access control unit 212 included in the ASIC 211. The direct access control unit 212 includes a network controller 213 having a MAC (Media Access Controller) configuration, a virtual memory block 214, a status register 215 for storing status information and a source address, and a frame generation circuit 216 for generating a transmission frame. , A DMA controller 217, and a link detection block 220 (link detection means). Each of these circuit units 213 to 217 and 220 is configured by a circuit as hardware. The circuit units 213 to 217 and 220 and a part 218 (described later) forming the physical layer are the only circuits to be supplied with power without being turned off even in the power saving mode by the power management function. It is.
[0025]
The network controller 213 is connected via an interface 219 (communication means) serving as a network interface to a portion 218 constituting the physical layer represented by, for example, MII, and is connected to the network 301 via the portion 218 constituting the physical layer. Connected. Further, a reception buffer (not shown) serving as a buffer for packets received from the network 301 is provided.
[0026]
When the power saving mode is set in the output device 201, the DMA controller 217 switches the bus connection from the system of the output device 201 to the direct access control unit 212.
[0027]
The link detection block 220 detects a change in the link state of the network 301 in the power saving mode, and when the link goes down (the network 301 is not functioning), the virtual memory block 214 and the link detection block 220 It outputs a signal for stopping the supply of the clock signal to other devices, and notifies the virtual memory block 214 of the change in the link signal. When the link goes down, the virtual memory block 214 stops all the circuits 213, 215 to 217. Thereby, the effect of power saving can be maximized. After that, when the link is restored (restoration of the network connection), the output device 201 needs to be recognized on the network 301. Therefore, the virtual memory block 214 passes through the virtual memory block 214 and the circuits 213, 215 to 217 Issue a power-on request.
[0028]
The virtual memory block 214 (comparing means) constantly monitors the state of the reception buffer of the network controller 213. When the number of received frames stored in the reception buffer becomes equal to or larger than a preset threshold, the clock signal supplied to the direct access control unit 212 is changed to a high frequency using a circuit shown in FIG. Switch to something. Conversely, when the number of received frames in the receiving buffer falls below the threshold, the circuit is switched to a low-frequency clock signal by the circuit of FIG. In FIG. 4, clk_b is a high-frequency clock signal, clk_c is a low-frequency clock signal, enable_m is a clock stop / operation switching signal, and buffer_alarm is a signal indicating the state of the reception buffer of the network controller 213.
[0029]
When the virtual memory block 214 receives from the personal computer 101 a wakeup request frame for instructing the output device 201 to exit from the power saving mode, the virtual memory block 214 outputs a start request signal for supplying power to the system, and When a frame including a request is received, it has a function of extracting a source address. The extracted transmission source address is sent to the frame generation circuit 216, and the frame generation circuit 216 constructs a transmission frame from the status information stored in the status register 215 and the contents of the transmission source address (own device address). Deliver to virtual memory block 214. The virtual memory block 214 starts transmission to the transmission source which is the personal computer 101 (see FIG. 6) via the DMA controller 217. All of these operations are performed by the hardware-configured direct access control unit 212 in accordance with preset contents. Other circuits and software in the system do not affect the above operation.
[0030]
By using such a circuit configuration, it is possible to transmit the status to the personal computer 101 as the transmission source without changing the state of the power saving mode. The personal computer 101, which is the transmission source, confirms the state of the output device 201, which is the output destination, by performing processing as shown in FIG. 6 described later, and performs automatic change of the output destination, data output after returning from the power saving mode, and the like. It will also be possible to do it.
[0031]
FIG. 3 shows a comparison block 222 (determination means) for monitoring a packet received by the network controller 213 in the virtual memory block 214 and searching for a specific type of frame registered by software, and an operation clock of the comparison block 222. FIG. 4 is a block diagram showing a control block 223 (control means) for generating the data. The output device 201 corresponds to a power management function such as the above-mentioned “on-now” power management function of Microsoft Corporation, and in each comparison block 222, inspects the contents of the frame buffered in the reception buffer of the network controller 213. For example, when the comparison block 222 detects a packet instructing to return the output device 201 from the power saving mode, the direct access control unit 212 outputs a signal for starting and returning the system of the output device 201. Become. The number of comparison blocks 222 and control blocks 223 to be mounted differs depending on the ASIC 211. Further, the number of blocks to be used also differs depending on a device mounted on the ASIC 211 and a system configuration. Since not all the comparison blocks 222 are used in the system, the power consumption can be further reduced by stopping the supply of the clock signal to the unused blocks.
[0032]
When the comparison block 222 detects that the received frame is not the target frame as a result of the inspection, the supply of the clock signal to the corresponding comparison block 222 may be stopped. Therefore, when such a mismatch is detected, the discord signal is asserted to the control block 223, and the supply of the clock signal is stopped.
[0033]
Further, upon identifying a valid received frame to be passed to the virtual memory block 214, the network controller 213 issues a signal to the effect that a valid frame has been received to the virtual memory block 214. Upon receiving this signal, the supply of the clock from the control block 223 to the comparison block 222 of the virtual memory block 214 starts. When the inspection processing of the received frame is completed and there is no reception of the next valid frame (when such a signal is not asserted), the supply of the clock signal from the control block 223 is stopped.
[0034]
By these fine clock controls, power consumption in the power saving mode can be further reduced.
[0035]
FIG. 4 is a circuit diagram showing one configuration example of the control block 223, and FIG. 5 is a timing chart for explaining the operation of the circuit of FIG. 4, the control block 223 includes flip-flops 261 to 264, OR circuits 265 to 267, and an AND circuit 268. The signal enable_m is an operation permission signal for the comparison block 222 and the control block 223. When the signal enable_m is at the H level, the comparison block 222 and the control block 223 are in the operation permission state. An operation permission signal en_m_gate is output. Further, a clock signal clk_m_gate serving as the operation clock is output to the comparison block 222 with its frequency controlled.
[0036]
Here, the control block 223 uses a clock signal clk_b obtained by dividing the original clock signal clk_a by a predetermined divider, and a clock signal clk_c obtained by dividing the frequency. The signal buffer_alarm indicates a comparison result between the number of received frames stored in the reception buffer of the network controller 213 and the threshold. When the signal buffer_alarm is an H-level signal, the number of received frames falls below the threshold, and the L_level When the number of received frames exceeds the threshold when the signal is a signal, the frequency is at point (A) after the signal buffer_alarm goes low by the flip-flops 261 and 262 and the OR circuits 265 and 266. Before the high clock signal clk_b appears and the signal buffer_alarm goes to the L level, the clock signal clk_c having a low frequency appears at the point (B). The e.
[0037]
Next, processing when a network user uses the output device 201 will be described. A network user using a personal computer 101 with a power management function, such as the aforementioned Microsoft "on-now" power management function, may request status from a plurality of output devices 201 before transmitting data. Can be. Then, the output device 201 in the power saving mode recognizes that the virtual memory block 214 is the received frame of the status request, and extracts the source address from the received frame. The frame generation circuit 216 uses the source address as the destination address and returns the data set in the status register 215 as a transmission frame (response means). Thereby, the network user can receive a response from all the output devices 201 regardless of whether or not the power saving mode is set. Moreover, in this case, the output device 201 can respond while maintaining the power saving mode.
[0038]
Thus, the network user can know whether or not the target output device 201 is in the power saving mode, and returns the output device 201 from the power saving mode to output data (printout). ) Or output from the output device 201 which is not in another power saving mode.
[0039]
When data is output by the output device 201 in the power saving mode, a command to return from the power saving mode is transmitted to the corresponding output device 201, and then the output data is transmitted. If necessary, after outputting the data, a command to shift to the power saving mode again may be transmitted to the corresponding output device 201.
[0040]
【The invention's effect】
According to the first and fifth aspects of the present invention, when the number of data in the reception buffer has a margin, the operating clock frequency in the determination means is reduced to save power in conjunction with the traffic of the network, and the number of data in the reception buffer is reduced. When the number increases, the operation clock frequency of the determination means is increased to accelerate the processing of the determination means and to prevent overflow of the reception buffer, thereby enabling more detailed power saving control.
[0041]
According to a second aspect of the present invention, in the first aspect of the present invention, the inspection unit that does not need to be operated during the power saving mode can be stopped to achieve a further power saving effect.
[0042]
According to a third aspect of the present invention, in the first or second aspect, the external device confirms that the network device is in the power saving mode without impairing the state of the network device in the power saving mode. be able to.
[0043]
According to a fourth aspect of the present invention, in the first aspect of the present invention, when the link to the network is down, the power of the circuit operating even in the power saving mode is further reduced. , Can bring about a further power saving effect.
[Brief description of the drawings]
FIG. 1 is a block diagram illustrating an example of an ASIC in which a direct access control unit included in an output device according to an embodiment of the present invention is incorporated.
FIG. 2 is a block diagram illustrating a circuit configuration of a direct access control unit included in an ASIC.
FIG. 3 is a block diagram showing a received frame comparison block provided inside a virtual memory block;
FIG. 4 is a circuit diagram of a control block.
FIG. 5 is a timing chart illustrating the operation of the circuit in FIG. 4;
FIG. 6 is a schematic diagram showing an example of a conventional network system in which a plurality of personal computers, printers, and the like are connected via a LAN network to enable data sharing and printer sharing.
[Explanation of symbols]
201 network device 214 comparing means 219 communication means 220 link detecting means 222 determining means 223 control means 301 network

Claims (5)

A network that operates according to an operation command from a computer connected to the network and has a power saving mode function that saves power by operating only some circuits of the network device when a predetermined condition is satisfied. In the equipment,
The circuit comprises:
Communication means serving as a network interface for communicating with an external device via the network;
A reception buffer for buffering data received via the communication means,
Determining means for determining the content of the received data;
Response means for transmitting data to the external device according to the content of the determination and responding,
Control means for controlling supply of an operation clock to the determination means,
Comparing means for comparing the number of data buffered in the reception buffer with a predetermined threshold,
With
The control unit varies a frequency of the operation clock according to a result of the comparison;
Network equipment characterized by the following. The control unit, when there are a plurality of the inspection unit, to stop the supply of the operation clock to the inspection unit that is not used, or to the inspection unit that is determined not to be the target data from the result of the inspection, The network device according to claim 1, wherein: The response unit, when the determination unit determines that the received data is a status request, transmitting a status indicating that the network device is in the power saving mode to the external device, The network device according to claim 1, wherein: The circuit includes link detection means for detecting establishment of a link to the network and link down in the power saving mode state,
When the down of the link is detected, the supply of power to the circuits other than the link detecting means and the present means is stopped, and thereafter, when the establishment of the link is detected, other than the link detecting means and the present means. Restarting the supply of power to the circuit of
The network device according to claim 1, wherein: In a network system in which a computer and a network device are connected to a network,
The network device operates according to an operation command from a computer connected to the network, and, when a predetermined condition is satisfied, a function of a power saving mode in which only a part of the circuit of the network device is operated to save power. With
The circuit comprises:
Communication means serving as a network interface for communicating with an external device via the network;
A reception buffer for buffering data received via the communication means,
Determining means for determining the content of the received data;
Response means for transmitting data to the external device according to the content of the determination and responding,
Control means for controlling supply of an operation clock to the determination means,
Comparing means for comparing the number of data buffered in the reception buffer with a predetermined threshold,
With
The control unit varies a frequency of the operation clock according to a result of the comparison;
A network system characterized by the following.

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