JP2004349561A

JP2004349561A - Adhesive method for semiconductor device and adhesive used therefor

Info

Publication number: JP2004349561A
Application number: JP2003146602A
Authority: JP
Inventors: Hiroshi Ogasawara; 宏小笠原
Original assignee: Kyocera Chemical Corp
Current assignee: Kyocera Chemical Corp
Priority date: 2003-05-23
Filing date: 2003-05-23
Publication date: 2004-12-09

Abstract

【課題】半導体素子の電極パッド上の金属突起と配線基板の配線パターンとの熱共晶による合金形成接続法において、接続信頼性が高く、ボイド発生不良や接続不良が発生しない半導体装置の製造方法とそれ用の接着剤を提供する。
【解決手段】電極パッド２上に金属突起３を有する半導体素子１と、電極パッドに相対する配線パターン５を有する配線基板４との間に、微細フィラーを含むエポキシ樹脂系の接着剤６を介在させ、半導体素子上の金属突起と配線基板上の配線パターンを位置合せした後、加熱加圧７し、金属突起と配線パターンを共晶合金形成により電気的接続を得るとともに、接着剤を硬化６′させて、半導体素子と配線基板とを固定する半導体装置の製造方法である。
【選択図】図１A method of manufacturing a semiconductor device, which has high connection reliability and does not cause void generation failure or connection failure in an alloy forming connection method by thermal eutectic between a metal projection on an electrode pad of a semiconductor element and a wiring pattern of a wiring board. And provide an adhesive for it.
An epoxy resin-based adhesive containing a fine filler is interposed between a semiconductor element having a metal projection on an electrode pad and a wiring board having a wiring pattern facing the electrode pad. After the metal projection on the semiconductor element is aligned with the wiring pattern on the wiring board, heating and pressurizing 7 are performed to obtain an electrical connection between the metal projection and the wiring pattern by forming a eutectic alloy and harden the adhesive 6 ′ To fix the semiconductor element and the wiring board.
[Selection diagram] Fig. 1

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体素子の電極パツドと配線基板とを簡便に接続する半導体装置の製造方法、およびそれに使用される接着剤に関するものである。
【０００２】
【従来の技術】
近年、半導体素子を多数個用いるデバイス、機器の開発が促進されてきている。例えば、メモリーカード、液晶やＥＬのディスプレイパネル等が有り、これらはいずれも多数個のＩＣ、ＬＳＩを一定の面積を有する基板に、高密度にしかも薄型に搭載しなければならない。ＩＣ、ＬＳＩの実装手段としては熱圧接接続によるフリップチップ方式が公知である（特開昭６０−２６２４３０号公報）。
【０００３】
しかしながら、熱圧接接続法には以下のような問題がある。
【０００４】
前記熱圧接接続によるフリップチップ方式は、半導体素子の電極パッド上に金属突起を形成し、配線基板上の配線パターンと半導体素子の金属突起を位置合せをし加熱して、光もしくは熱により接着樹脂を硬化させて、圧接のみにより金属突起と配線パターンの電気的接続を得るものである。したがって、熱圧接接続によるフリップチップ方式は、電気的接続を圧接のみにより行うため電極突起と配線パターンが固定されておらず、外部からの熱や機械的歪により配線基板に膨張や反りが発生して、接続部や半導体素子自体の剥離が発生しやすかった。
【０００５】
熱圧接接続より接続信頼性の高い方法として、電極パッド上の金属突起と配線パターンとを熱共晶による合金形成を行う方法がある（特開２０００−１００８６２公報）。
【０００６】
しかしながら、この熱共晶による合金形成接続法では、２８０〜４１８℃の温度範囲で共晶合金が形成されて金属突起と配線パターンの電気的接続がなされるが、接着剤樹脂はその熱共晶温度領域である２８０〜４１８℃において硬化が速すぎることにより、接続不良やボイドが発生するという問題があった。
【０００７】
【発明が解決しようとする課題】
本発明の目的は、このような従来の問題点を鑑み、半導体素子の電極パッド上の金属突起と配線基板の配線パターンとの熱共晶による合金形成接続法において、接続信頼性が高く、ボイド発生不良や樹脂硬化による接続不良が発生しない接続方法を可能にする半導体装置の製造方法とそれに使用する接着剤を提供することにある。
【０００８】
【課題を解決するための手段】
本発明者は、半導体素子の電極パッド上の金属突起と配線基板の配線パターンとの熱共晶合金形成接続法において、接着剤に用いる樹脂組成物中に適量の微細フィラーを入れるこによって上記問題を解決することを見いだした。また、さらに該樹脂組成物の硬化特性を最適化させることにより、ボイド発生不良などをなくすことができるということを見いだした。
【０００９】
即ち、本発明の半導体装置の製造方法は、
電極パッド上に金属突起を有する半導体素子と、電極パッドに相対する配線パターンを有する配線基板との間に、微細フィラーを含むエポキシ樹脂系の接着剤を介在させ、半導体素子上の金属突起と配線基板上の配線パターンを位置合せした後、加熱加圧し、金属突起と配線パターンを共晶合金形成により電気的接続を得るとともに、接着剤を光もしくは熱により硬化させて、半導体素子と配線基板とを固定することを特徴とし、また本発明の接着剤は上記半導体装置の製造方法に適合して使用されるエポキシ樹脂系の接着剤である。
【００１０】
【発明の実施の形態】
まず接着剤について具体的に説明すると、例えば、ビスフェノールＡ型エポキシ樹脂（油化シェル株式会社製；エピコート８１８）９０ｇ、ジシアンジアミド１ｇ、ニッケル粉（福田金属製；平均粒径０．４μｍ）０．５ｇをロール混合し、接着剤組成物を得た。さらに、相当量のイミダゾール（四国化成社製；２ＭＺ）を加えて、４１８℃での硬化時間が０．５秒、２秒、１０秒、２０秒となるように接着剤をそれぞれ作製した。硬化時間は、測定温度のホットプレート上に接着剤組成物を０．２５ｇのせ、テフロン製ミニスパチュラでかきまぜ、糸引きがなくなった時間を測定する。
【００１１】
、接着剤に使用するエポキシ樹脂、硬化剤、硬化促進剤などの配合原料は、エポキシ樹脂接着剤一般に使用されるものが制限なく使用できる。
【００１２】
次に、電子部品の製造にかかる実施例を、図１と表１〜３を用いて説明する。図１において、１は半導体素子、４は配線基板である。半導体素子１の電極パッド２として、Ｃｒ−Ｃｕ、Ｔｉ−Ｐｄ等の多層金属膜を被着せしめ、該電極パッド２上に電解メッキ法により金属突起３を形成する。金属突起３は、Ａｕ、Ａｇ、Ｃｕ、半田等の材料で３〜３０μｍの厚さに構成される。
【００１３】
一方、配線基板４は、ガラス板、セラミック板、樹脂板、金属酸化物を表面に被覆した金属板等で構成され、その表面において、少なくとも半導体素子１の金属突起３と対応した位置に配線パターン５を形成してある。配線パターン５は、Ｃｕ、Ａｌ、Ａｕ、ＩＴＯ等を母体にし、酸化しやすい材質例えば、Ｃｕであれば、Ａｕメッキ、Ｓｎメッキ、半田メッキ等の処理を施してある。
【００１４】
上記配線基板４面上か若しくは半導体素子１の金属突起３を形成した面上に、前記配合で作成した接着剤７を塗布載置する（図１）。このとき、接着剤の代わりに接着シートを用いてもよい。なお樹脂組成物は、熱硬化でなく、光硬化によるものでもよい。
【００１５】
次に、半導体素子１上の金属突起３と配線基板４上の配線パターン５とを、図１のごとく位置合せし、両者を加圧７せしめ、熱共晶温度範囲で加熱する。この加圧７により、樹脂６は半導体素子１の金属突起３側の全面に押し拡げられ、かつ、前記金属突起３と配線パターン５とはその加熱により熱共晶合金を作り、電気的接続を得る。この工程で、押し拡げられた樹脂６は、熱共晶温度範囲の熱もしくは光が加えられて、硬化樹脂６′となり、硬化樹脂６′により半導体素子１と配線基板４とは金属突起３と配線パターン６との電気的導通を継続したまま固定されることになる。
【００１６】
即ち、半導体素子１の金属突起３と配線基板４上の配線パターン５との電気的接続は熱共晶合金で行われ、半導体素子１と配線基板４との固定は硬化した樹脂６′によってなされるものである。このとき、微細フィラーが樹脂６中に存在することにより、ボイドがなく信頼性の高い接続を得ることができる。更にニッケル粉を使用した場合には、ニッケル粉によって、硬化樹脂６′の電極パッド２へのアンカー効果が得られ、信頼性の高い半導体装置を得ることができるのである。なお、微細フィラーとしては、エポキシ樹脂組成物用一般のフィラーが使用でき、２種類以上の微細フィラーを配合することも差支えない。
【００１７】
シリカ粉の配合量は、０．１〜４０重量％が好ましい。０．１重量％未満ではボイド低減に十分な効果がなく、４０重量％を超えると電極突起と配線パターン間の接続が十分でなくなる。
【００１８】
ニッケル粉の配合量は、０．１〜３０重量％が好ましい。０．１重量％未満ではボイド低減に十分な効果がなく、３０重量％を超えると隣接電極間の絶縁性が十分でなくなる。
【００１９】
本発明は、半導体素子１上の金属突起３と配線基板４の配線パターン５との熱共晶合金による接続において、半導体素子１と配線基板４の間に介在せしめる接着剤樹脂組成物に微細フィラーを添加した接着剤を使用することにより、高い接続信頼性を得ることができ、また、ボイドの発生を抑制できるものである。接続信頼性結果およびボイド評価結果を表１、表２に示す。
【００２０】
【表１】

○印…１００％接続、△印…８０％接続、×印…５０％以下接続。
【００２１】
Ａｕメバンブ付きＩＣチップをＳｎメッキ回路パターン上に上記温度にて接合した後、接合部分の導通確認を行った。
【００２２】
【表２】

○印…ボイドなし、△印…小さなボイド発生、×印…大きなボイド発生。
【００２３】
Ａｕメバンブ付きＩＣチップをＳｎメッキ回路パターン上に上記温度にて接合した後、ボイドの目視確認を行った。
【００２４】
また、接着剤組成物の樹脂の硬化時間は、３００℃〜４１８℃における硬化時間が１〜１５秒であることが好ましい。共晶接続では、３００〜４１８℃の温度範囲が用いられている。各共晶接続温度において樹脂硬化時間が１秒未満と速い場合、半導体素子の電極と配線基板の配線パターンが触れる前に樹脂が硬化してしまうため接続不良となる。また、硬化時間が１５秒を超えて遅い場合、反応熱量が小さくなりすぎることとなり、樹脂が硬化しなくなり、半導体素子と配線基板の固定が不可能となる。この硬化時間範囲を反応熱量で示すと４０〜５００ｍＪ／ｍｇとなる。その結果を表３に示す。
【００２５】
【表３】

○印…１００％接続、△印…８０％接続、×印…５０％以下接続。
【００２６】
Ａｕメバンブ付きＩＣチップをＳｎメッキ回路パターン上に上記温度にて接合した後に、熱共晶合金層の目視確認を行った。
【００２７】
【発明の効果】
以上の説明及び表１〜３から明らかなように、本発明は、半導体素子の金属突起と配線基板の配線パターンとの電気的接続は熱共晶合金接続、半導体素子と配線基板との固定が接着樹脂で行われる製造方法において、微細フィラー入りに接着剤を用いることによって、接着樹脂中にボイドがなく、高い信頼性を有する電気的接続を得ることができる。
【図面の簡単な説明】
図１は、本発明の実施例における接着剤を使用した半導体装置の断面図である。
【符号の説明】
１半導体素子
２電極パッド
３金属突起
４配線基板
５配線パターン
６（６′）接着剤（硬化接着剤）
７加圧[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device for easily connecting an electrode pad of a semiconductor element to a wiring board, and an adhesive used for the method.
[0002]
[Prior art]
In recent years, the development of devices and devices using a large number of semiconductor elements has been promoted. For example, there are a memory card, a liquid crystal display panel, an EL display panel, and the like, all of which require a large number of ICs and LSIs to be mounted on a substrate having a fixed area with high density and thinness. As a means for mounting ICs and LSIs, a flip-chip method using thermal pressure connection is known (Japanese Patent Application Laid-Open No. 60-262430).
[0003]
However, the thermal pressure welding method has the following problems.
[0004]
In the flip-chip method by the thermal pressure connection, a metal projection is formed on an electrode pad of a semiconductor element, a wiring pattern on a wiring board is aligned with the metal projection of the semiconductor element, heated, and an adhesive resin is applied by light or heat. Is cured to obtain an electrical connection between the metal projection and the wiring pattern only by pressing. Therefore, in the flip-chip method using thermal pressure connection, the electrical connection is performed only by pressure welding, so that the electrode protrusions and the wiring pattern are not fixed, and the wiring board expands and warps due to external heat and mechanical strain. As a result, the connection portion and the semiconductor element itself were easily peeled off.
[0005]
As a method having higher connection reliability than the thermal pressure connection, there is a method of forming an alloy between a metal projection on an electrode pad and a wiring pattern by thermal eutectic (Japanese Patent Laid-Open No. 2000-100862).
[0006]
However, in this alloy eutectic connection method by thermal eutectic, an eutectic alloy is formed in a temperature range of 280 to 418 ° C. to make electrical connection between the metal projections and the wiring pattern. When the curing is too fast in the temperature range of 280 to 418 ° C., there is a problem that a connection failure or a void occurs.
[0007]
[Problems to be solved by the invention]
In view of such a conventional problem, an object of the present invention is to provide a method of forming a connection between a metal projection on an electrode pad of a semiconductor element and a wiring pattern of a wiring board by alloying by thermal eutectic, which has high connection reliability and voids. An object of the present invention is to provide a method of manufacturing a semiconductor device which enables a connection method that does not cause a connection failure due to occurrence failure or resin curing, and an adhesive used therefor.
[0008]
[Means for Solving the Problems]
The present inventor has found that in the thermal eutectic alloy forming connection method between a metal projection on an electrode pad of a semiconductor element and a wiring pattern of a wiring board, the above problem is caused by adding an appropriate amount of fine filler to a resin composition used for an adhesive. Was found to be solved. In addition, it has been found that by optimizing the curing properties of the resin composition, it is possible to eliminate the occurrence of voids and the like.
[0009]
That is, the method for manufacturing a semiconductor device according to the present invention includes:
An epoxy resin-based adhesive containing a fine filler is interposed between a semiconductor element having a metal projection on an electrode pad and a wiring substrate having a wiring pattern facing the electrode pad, and the metal projection on the semiconductor element is connected to the wiring. After aligning the wiring pattern on the substrate, heating and pressurizing, the metal projection and the wiring pattern are electrically connected by forming a eutectic alloy, and the adhesive is cured by light or heat, so that the semiconductor element and the wiring substrate are The adhesive of the present invention is an epoxy resin-based adhesive used in conformity with the above-described method for manufacturing a semiconductor device.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
First, the adhesive will be specifically described. For example, 90 g of bisphenol A type epoxy resin (manufactured by Yuka Shell Co., Ltd .; Epicoat 818), 1 g of dicyandiamide, and 0.5 g of nickel powder (manufactured by Fukuda Metal; average particle diameter of 0.4 μm) Was mixed with a roll to obtain an adhesive composition. Further, a considerable amount of imidazole (2MZ, manufactured by Shikoku Chemicals Co., Ltd.) was added to prepare adhesives such that the curing time at 418 ° C. was 0.5, 2, 10, and 20 seconds, respectively. The curing time is measured by placing 0.25 g of the adhesive composition on a hot plate at a measurement temperature, stirring the mixture with a mini-spatula made of Teflon, and measuring the time when stringing has disappeared.
[0011]
As the compounding raw materials such as an epoxy resin, a curing agent, and a curing accelerator used for the adhesive, those commonly used for epoxy resin adhesives can be used without limitation.
[0012]
Next, an example of manufacturing an electronic component will be described with reference to FIG. In FIG. 1, 1 is a semiconductor element, and 4 is a wiring board. A multilayer metal film such as Cr—Cu or Ti—Pd is applied as an electrode pad 2 of the semiconductor element 1, and a metal projection 3 is formed on the electrode pad 2 by an electrolytic plating method. The metal projection 3 is made of a material such as Au, Ag, Cu, solder, or the like, and has a thickness of 3 to 30 μm.
[0013]
On the other hand, the wiring board 4 is composed of a glass plate, a ceramic plate, a resin plate, a metal plate coated on the surface with a metal oxide, or the like, and has a wiring pattern on its surface at least at a position corresponding to the metal protrusion 3 of the semiconductor element 1. 5 is formed. The wiring pattern 5 is based on Cu, Al, Au, ITO, or the like, and is subjected to a process such as Au plating, Sn plating, or solder plating if the material is easily oxidized, for example, Cu.
[0014]
On the surface of the wiring substrate 4 or on the surface of the semiconductor element 1 on which the metal protrusions 3 are formed, the adhesive 7 prepared by the above-mentioned composition is applied and placed (FIG. 1). At this time, an adhesive sheet may be used instead of the adhesive. It should be noted that the resin composition may be obtained by photo-curing instead of heat-curing.
[0015]
Next, the metal projections 3 on the semiconductor element 1 and the wiring patterns 5 on the wiring board 4 are aligned as shown in FIG. 1, and both are pressurized 7 to be heated in the thermal eutectic temperature range. Due to the pressurization 7, the resin 6 is spread over the entire surface of the semiconductor element 1 on the metal projection 3 side, and the metal projection 3 and the wiring pattern 5 are heated to form a thermal eutectic alloy, thereby establishing electrical connection. obtain. In this step, the resin 6 expanded and expanded becomes a cured resin 6 ′ by applying heat or light in a thermal eutectic temperature range, and the semiconductor element 1 and the wiring board 4 are separated from the metal projection 3 by the cured resin 6 ′. It is fixed while the electrical conduction with the wiring pattern 6 is continued.
[0016]
That is, the electrical connection between the metal projection 3 of the semiconductor element 1 and the wiring pattern 5 on the wiring board 4 is made by a thermal eutectic alloy, and the fixing of the semiconductor element 1 and the wiring board 4 is made by the cured resin 6 '. Things. At this time, since the fine filler is present in the resin 6, a highly reliable connection without voids can be obtained. Further, when nickel powder is used, an effect of anchoring the cured resin 6 'to the electrode pad 2 is obtained by the nickel powder, and a highly reliable semiconductor device can be obtained. As the fine filler, a general filler for an epoxy resin composition can be used, and two or more kinds of fine fillers may be mixed.
[0017]
The compounding amount of the silica powder is preferably 0.1 to 40% by weight. If the amount is less than 0.1% by weight, the effect of reducing the void is not sufficiently obtained, and if the amount exceeds 40% by weight, the connection between the electrode projection and the wiring pattern becomes insufficient.
[0018]
The amount of the nickel powder is preferably 0.1 to 30% by weight. If the amount is less than 0.1% by weight, the effect of reducing the void is not sufficiently obtained, and if the amount exceeds 30% by weight, the insulation between adjacent electrodes becomes insufficient.
[0019]
The present invention relates to a method of connecting a metal projection 3 on a semiconductor element 1 and a wiring pattern 5 of a wiring board 4 by a thermal eutectic alloy to a fine filler in an adhesive resin composition interposed between the semiconductor element 1 and the wiring board 4. By using an adhesive to which is added, high connection reliability can be obtained and the generation of voids can be suppressed. Tables 1 and 2 show the connection reliability results and void evaluation results.
[0020]
[Table 1]

○: 100% connection, Δ: 80% connection, X: 50% or less connection.
[0021]
After bonding the IC chip with the Au membrane to the Sn-plated circuit pattern at the above temperature, the conduction of the bonded portion was confirmed.
[0022]
[Table 2]

○: no void, △: small void, ×: large void.
[0023]
After bonding the IC chip with Au membrane to the Sn-plated circuit pattern at the above temperature, voids were visually checked.
[0024]
The curing time of the resin of the adhesive composition is preferably 1 to 15 seconds at 300 ° C. to 418 ° C. For eutectic connection, a temperature range of 300-418 ° C is used. If the resin curing time is as fast as less than 1 second at each eutectic connection temperature, the resin is cured before the electrodes of the semiconductor element and the wiring pattern of the wiring board come into contact, resulting in poor connection. On the other hand, when the curing time is longer than 15 seconds, the amount of heat of reaction becomes too small, the resin is not cured, and the semiconductor element and the wiring substrate cannot be fixed. This curing time range is 40 to 500 mJ / mg in terms of the amount of heat of reaction. Table 3 shows the results.
[0025]
[Table 3]

○: 100% connection, Δ: 80% connection, X: 50% or less connection.
[0026]
After bonding the IC chip with Au membrane to the Sn-plated circuit pattern at the above temperature, the thermal eutectic alloy layer was visually checked.
[0027]
【The invention's effect】
As apparent from the above description and Tables 1 to 3, in the present invention, the electrical connection between the metal projection of the semiconductor element and the wiring pattern of the wiring board is made of a thermal eutectic alloy connection, and the semiconductor element and the wiring board are fixed. In a manufacturing method performed with an adhesive resin, by using an adhesive with a fine filler, a highly reliable electrical connection without voids in the adhesive resin can be obtained.
[Brief description of the drawings]
FIG. 1 is a sectional view of a semiconductor device using an adhesive according to an embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Electrode pad 3 Metal protrusion 4 Wiring board 5 Wiring pattern 6 (6 ') Adhesive (cured adhesive)
7 Pressurization

Claims

An epoxy resin-based adhesive containing a fine filler is interposed between a semiconductor element having a metal projection on an electrode pad and a wiring board having a wiring pattern facing the electrode pad, so that the metal projection on the semiconductor element can be connected to the wiring. After aligning the wiring pattern on the substrate, heat and pressure are applied, the metal projection and the wiring pattern are electrically connected by forming a eutectic alloy, and the adhesive is cured by light or heat, so that the semiconductor element and the wiring substrate are A method of manufacturing a semiconductor device, comprising:

2. The method for manufacturing a semiconductor device according to claim 1, wherein the fine filler is nickel powder having an average particle size of 0.1 to 6.0 [mu] m and contained in the adhesive in an amount of 0.1 to 30% by weight.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the fine filler is silica powder having an average particle diameter of 0.1 to 5.0 [mu] m and contained in the adhesive in an amount of 0.1 to 40% by weight.

4. The method for manufacturing a semiconductor device according to claim 1, wherein the thermosetting of the epoxy resin adhesive is performed at 300 to 418 [deg.] C. for 1 to 15 seconds.

An epoxy resin-based adhesive used in conformity with the method for manufacturing a semiconductor device according to claim 1.