JP2004128350A - Image sensor equipped with pixel isolation region - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image sensor which is equipped with a pixel isolation region composed of an impurity region that shuts off a leakage current between unit pixel regions and a light shading region that restrains incident light rays from being diffused. <P>SOLUTION: The image sensor is composed of a semiconductor substrate, a plurality of unit pixel regions for photoelectrically converting light incident on the surface of the semiconductor substrate into electric signals, and a pixel isolation region which is located between the neighboring unit pixel regions. The pixel isolation region is equipped with the impurity region which shuts off a leakage current that is injected and generated between the neighboring unit pixel regions and a light shading film which is formed on the surface of the impurity region to prevent incident light rays from diffusing into the neighboring unit pixel regions. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image sensor having a unit pixel isolation structure, and more particularly, to an image sensor having a pixel isolation region including an impurity layer for blocking leakage current between unit pixel regions and a light blocking film for preventing diffusion of incident light. Related to sensors.
[0002]
[Prior art]
An image sensor is a device that converts one-dimensional or two-dimensional or more optical information into an electric signal. The types of image sensors are roughly classified into image pickup tubes and solid-state image pickup devices. The image pickup tube is widely used for measurement, control, recognition, and the like utilizing the image processing technology centering on a television, and applied technology is being developed.
[0003]
On the other hand, there are two types of solid-state imaging devices on the market, a CCD (Charged Coupled Device) and a CMOS type.
A CMOS image sensor is an element that converts an optical image into an electrical signal using a CMOS manufacturing technology, and employs a switching method in which MOS transistors are formed as many as the number of pixels and outputs are sequentially detected using the MOS transistors. . A CMOS sensor has a simpler driving method than a CCD image sensor which is widely used as a conventional image sensor, can implement various scanning methods, can produce a signal processing circuit on a single chip, and has a small product size. In addition, the use of compatible CMOS technology can reduce manufacturing costs and save power consumption. Due to such advantages, CMOS image sensors are more frequently used than CCD image sensors in recent years.
[0004]
FIG. 4 shows a configuration of the CMOS image sensor. Reference numeral 10 denotes a pixel isolation region, 12 denotes a photodiode (Photo Diode), and 14 denotes a gate electrode.
Referring to FIG. 1, the CMOS image sensor has a unit pixel region including a photodiode (Photo Diode) 12 and a gate electrode 14 arranged adjacent to each other, and a pixel isolation region 10 is disposed therebetween. The unit pixel region has a function of converting incident light into an electric signal, and the image sensor is an aggregate of a plurality of unit pixel regions. The resolution of an image converted into an electric signal is determined by the number of such unit pixel regions. Therefore, in order to increase the resolution, a plurality of unit pixel regions are arranged adjacent to each other, and the pixel isolation region 10 is arranged between adjacent unit pixel regions for electrical insulation between adjacent unit pixel regions.
[0005]
In order to generate the pixel isolation region 10, a local oxidation of silicon (LOCOS) or a shallow trench isolation (STI) process is conventionally used. Among them, a LOCOS process, whose manufacturing process is relatively simple, is mainly used, and the LOCOS process is a process of exposing an oxide film and growing the oxide film by a thermal oxidation process.
FIGS. 5A to 5D show a conventional LOCOS process for generating a pixel isolation region.
[0006]
Referring to FIG. 5, first, a silicon oxide film (SiO ₂ ) and a silicon nitride film (Si ₃ N ₄ ) are formed on a silicon substrate (FIG. 5A). Then, the silicon nitride film (Si ₃ N ₄ ) is removed by dry etching using a plasma device in a portion other than the pixel isolation region to be generated, and the silicon oxide film (SiO ₂ ) is locally exposed. (FIG. 5B).
[0007]
After the silicon nitride film (Si ₃ N ₄ ) is removed and the silicon oxide film (SiO ₂ ) is locally exposed, the exposed silicon oxide film (SiO ₂ ) is expanded through a high-temperature heat treatment process (FIG. 5 ( C)).
After the step of expanding the silicon oxide film (SiO ₂ ) is completed, the remaining silicon nitride film (Si ₃ N ₄ ) is removed by dry etching using a plasma device (FIG. 5D )). As described above, the pixel isolation region is generated between the unit pixel regions arranged adjacent to each other through the above-described process.
[0008]
However, according to the LOCOS process described above, plasma etching is repeatedly used to remove the silicon nitride film (Si ₃ N ₄ ). However, the high temperature of the plasma damages the silicon substrate during etching, and eventually causes white scratches on the image sensor.
Many inventions have been filed to solve the problems of the LOCOS process. In particular, Korean Patent Publication No. 2000-64430 discloses a CMOS image sensor in which an element isolation impurity layer is ion-implanted between unit pixel regions.
[0009]
Also, Korean Patent Publication No. 2000-51300 discloses an invention in which an impurity layer is formed under an element isolation film to perform element isolation.
However, if a pixel isolation region is generated according to the disclosed invention, electrical isolation between adjacent unit pixel regions can be achieved, but it is not possible to prevent incident light from being diffused into adjacent unit pixel regions.
[0010]
[Problems to be solved by the invention]
SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to reduce damage to a silicon substrate due to plasma etching and prevent incident light from being diffused to an adjacent unit pixel region. An object of the present invention is to provide an image sensor having an isolated area.
[0011]
Other objects and advantages of the present invention will be described below, and will be apparent by the practice of the present invention. Further, the objects and advantages of the present invention can be realized by the means and combinations shown in the claims.
[0012]
[Means for Solving the Problems]
In order to achieve the above object, an image sensor according to the present invention includes a semiconductor substrate, a plurality of unit pixel regions for photoelectrically converting light incident on the surface of the semiconductor substrate, and an adjacent unit pixel region. In an image sensor including a pixel isolation region located between the impurity regions, the pixel isolation region is injected between adjacent unit pixel regions and blocks an impurity region that blocks leakage current generated between adjacent unit pixel regions. And a light blocking film for preventing the incident light from being diffused to the adjacent unit pixel region formed on the surface of the light emitting device.
[0013]
The light blocking layer is an opaque insulator, and may be a silicon oxide layer (SiO ₂ ) or a polymer resin (resin).
Further, the impurity region is formed by doping a p-type or an n-type impurity according to a semiconductor substrate type.
The pixel isolation region is applicable not only to CCD and CMOS image sensors but also to all image sensors that integrate light and output electric signals.
[0014]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Here, the terms and words used in the present description and claims are not to be construed as being limited to dictionary meanings. That is, they should be interpreted based on the principle that the inventor describes the invention in the best way.
[0015]
Therefore, the embodiments described in the present specification and the configurations shown in the drawings are merely preferred embodiments of the present invention, and do not represent all the technical ideas of the present invention. It should be understood that there are various equivalents and variations that can be substituted for these in the above.
FIG. 1 illustrates an image sensor including a pixel isolation region generated according to a preferred embodiment of the present invention. In the drawing, reference numeral 42 denotes a unit pixel region, 44 denotes an impurity region, and 46 denotes a light blocking film.
[0016]
The impurity region 44 is a p-type or n-type impurity, and is formed by ion implantation depending on the type of the semiconductor substrate, and functions to block a leakage current between the unit pixel regions 42. Further, the light blocking film 46 is formed in contact with the impurity region, and has a function of preventing light incident on the unit pixel region 42 from being diffused to the adjacent unit pixel region 42. That is, in the related art, an impurity is implanted into the semiconductor substrate to achieve the purpose of electrical insulation between the adjacent unit pixel regions 42, but the diffusion of the incident light into the adjacent unit pixel regions 42 cannot be blocked. However, the present invention can prevent the incident light from being diffused into the adjacent unit pixel region 42 by forming the light blocking film on the impurity region 44.
[0017]
The pixel isolation region including the impurity region 44 and the light blocking film 46 is not only used in the conventional image sensors such as CCD and CMOS, but also used in all image sensors that integrate light and output electric signals. Can be used. In particular, an NMOS image sensor filed by the present inventors on the same date as the present application can also be used.
[0018]
2A to 2E illustrate a process of forming a pixel isolation region having an impurity region and a light blocking layer according to a preferred embodiment of the present invention. Through the above process, damage to the silicon substrate due to plasma etching can be minimized.
Referring to FIG. 1, first, an impurity region for blocking a leakage current between unit pixel regions is ion-implanted into a silicon substrate (FIG. 2A). The impurity layer uses p-type or n-type impurities depending on the type of the silicon substrate.
[0019]
When the ion implantation of the impurity layer is completed, a silicon oxide film (SiO ₂ ) and a silicon nitride film (Si ₃ N ₄ ) are formed on the silicon substrate as shown in FIG. At this time, it is desirable that the silicon oxide film (SiO ₂ ) be formed thicker than the silicon oxide film (SiO ₂ ) in the existing LOCOS process.
After the oxide film (SiO ₂ ) and the nitride film (Si ₃ N ₄ ) are formed, the remaining region excluding the pixel isolation region to be formed is subjected to dry etching using a plasma device or the like to locally perform the etching. Then, the silicon nitride film (Si ₃ N ₄ ) is removed (FIG. 2C).
[0020]
Although high-temperature plasma etching is performed in the above-described process as in the LOCOS process, damage to the silicon substrate can be prevented by a buffering action of a silicon oxide film (SiO ₂ ) that is thick on the silicon substrate.
When the etching of the silicon nitride film (Si ₃ N ₄ ) is completed, as shown in FIG. 2D, the silicon oxide film (SiO ₃ ) is formed using the locally existing silicon nitride film (Si ₃ N ₄ ) as a mask. ). The silicon oxide film (SiO ₂ ) may be removed by wet etching using a chemical.
[0021]
If the remaining silicon substrate excluding the pixel isolation region is exposed by wet etching, the manufacturing process of the pixel isolation region of the present invention is completed. Then, an oxide film for protecting the exposed silicon substrate can be further formed (FIG. 2E).
The pixel isolation region generated according to the above process includes a p-type or n-type impurity region formed by ion implantation into a silicon substrate and a light blocking film formed on the silicon substrate.
[0022]
In the present embodiment, the light blocking film is formed of a silicon oxide film (SiO ₂ ) and a silicon nitride film (Si ₃ N ₄ ). However, an opaque insulating layer such as a polymer resin (resin) layer is formed through a process change. It is also possible.
3A to 3C illustrate various image sensors used in a unit pixel area according to a preferred embodiment of the present invention.
[0023]
FIG. 3A shows a CMOS image sensor used for a unit pixel area.
Referring to FIG. 5, a CMOS unit pixel region includes an oxide film 52 formed on an upper portion of a semiconductor substrate, a photodiode n region 54 formed in the semiconductor substrate at a predetermined depth, and a photodiode n region. A photodiode surface p region 56 located above and having an interface, a floating diffusion region 58 spaced at regular intervals and having an interface and located in a semiconductor substrate, and between the floating diffusion region 58 and the photodiode regions 54 and 56. And a gate electrode 59 located on the semiconductor substrate.
[0024]
The CMOS-type unit pixel region photoelectrically converts incident light into light at the photodiode n region 54 to generate signal charges, passes through the photodiode surface p region 56, and is amplified at the floating diffusion region 58 to a voltage signal. Converted and output.
In general, the gate electrode 59 has a structure aligned with the floating diffusion region 58 and the photodiodes 54 and 56 described below, and the gate electrode is mainly formed of doped polysilicon.
[0025]
FIG. 3B shows a CCD type image sensor used for a unit pixel area.
Referring to FIG. 5, the CCD unit pixel region includes an oxide film 62 formed on an upper portion of a semiconductor substrate, a photodiode n region 64 formed in the semiconductor substrate at a constant depth, and a photodiode n. A photodiode surface p region 66 located on the region 64 and having an interface, a floating diffusion region 68 which is spaced apart at regular intervals and has an interface and is located in the semiconductor substrate, and which is located on the semiconductor substrate above the floating diffusion region 68 It comprises a gate electrode 69, a p-type well region 63 including a photodiode n region 64, a photodiode surface p region 66, and a floating diffusion region 68.
[0026]
The CCD type image sensor photoelectrically converts the incident light in the photodiode n region 64 to generate a signal charge, passes through the photodiode surface p region 66, horizontally traverses the p type well region 63, and floats and diffuses. After being amplified in the region 68, it is converted into a voltage signal and output. Normally, the gate electrode 69 has a structure overlapping with a floating diffusion region 68 described below, and is formed of doped polycrystalline silicon.
[0027]
FIG. 3C illustrates an NMOS type image sensor used in a unit pixel region.
Referring to FIG. 7, an oxide film 72 formed on an upper portion of a semiconductor substrate, a gate electrode 79 formed on the oxide film, and one of the gate electrodes 79 separated from the gate electrode 79 by a predetermined distance. A floating diffusion region formed in the semiconductor substrate having an interface and formed at the other end of the photodiode n-type region 74 and the gate electrode 79, which is spaced apart from the n-type region 74 and is formed at the other end of the semiconductor substrate; It is composed of a certain n-type region 78.
[0028]
The specific operation process of the NMOS image sensor is disclosed in the invention filed by the same inventor on the same date as the present invention, and therefore detailed description is omitted.
As described above, the pixel isolation region of the present invention is applicable not only to CCD and CMOS image sensors, but also to all image sensors that integrate light and output electric signals.
[0029]
As described above, even if the present invention has been described with reference to the limited embodiments and drawings, the present invention is not limited to this, and those having ordinary knowledge in the technical field to which the present invention pertains may understand the technical idea of the present invention. It goes without saying that various modifications and variations are possible within the equivalent scope of the claims.
[0030]
【The invention's effect】
As described above, according to the present invention, the silicon substrate can be prevented from being damaged by the buffering action of the silicon oxide film (SiO ₂ ) during plasma etching for removing the silicon nitride film (Si ₃ N ₄ ). In addition, the function of the image sensor can be improved by separately providing a light blocking film that blocks efficiently diffusion of incident light.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of an image sensor in which pixels are isolated according to a preferred embodiment of the present invention.
FIGS. 2A to 2E are views showing a pixel isolation process according to a preferred embodiment of the present invention.
FIGS. 3A to 3C are diagrams illustrating a configuration of a unit pixel area according to a preferred embodiment of the present invention;
FIG. 4 is a configuration diagram of a conventional CMOS image sensor.
FIGS. 5A to 5D are views showing a LOCOS process which is a conventional pixel isolation process.
[Explanation of symbols]
10: Pixel isolation region 12: Photodiode
14: gate electrode 42: unit pixel region 44: impurity region 46: light blocking films 52, 62, 72: oxide films 54, 64, 74: photodiode n regions 56, 66: photodiode surface p regions 58, 68, 78 : Floating diffusion regions 59, 69, 79: gate electrode 63: p-type well region

Claims (8)

A semiconductor substrate, a plurality of unit pixel regions for photoelectrically converting light incident on the surface of the semiconductor substrate, and an image sensor including a pixel isolation region located between adjacent unit pixel regions,
The pixel isolation region is an impurity region that is injected between adjacent unit pixel regions and blocks leakage current generated between adjacent unit pixel regions.
An image sensor comprising: a light blocking film formed on a surface of the impurity region to prevent incident light from being diffused to an adjacent unit pixel region. The image sensor according to claim 1, wherein the impurity region is formed in the semiconductor substrate by doping with p-type or n-type impurities. The image sensor according to claim 1, wherein the light blocking film is made of an opaque insulator. The image sensor according to claim 3, wherein the light blocking film is a silicon oxide film. The image sensor according to claim 3, wherein the light blocking film is made of an opaque polymer resin. The image sensor according to claim 1, wherein the unit pixel region is formed of a CMOS semiconductor. The image sensor according to claim 1, wherein the unit pixel region is formed of a CCD semiconductor. The unit pixel area is
An oxide film formed on an upper portion of the semiconductor substrate;
A gate electrode formed on the oxide film;
A photodiode n-type region formed at a predetermined distance from the gate electrode and located in one of the gate electrodes and having an interface at an upper portion and formed in a semiconductor substrate;
An NMOS type semiconductor including a large number of unit pixels, each of which is separated by a certain distance from the gate electrode and located on the other side, has an interface on the upper side, and is an n-type region which is a floating diffusion region formed in a semiconductor substrate. The image sensor according to claim 1, wherein:

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