JP2004119839A - Optical semiconductor device and method of manufacturing the same - Google Patents

Abstract

Provided is an optical semiconductor device in which high luminance and high efficiency are obtained without a decrease in yield or characteristics and a process cost is suppressed, and a method for manufacturing the same.
An InGaAlP-based or AlGaAs-based compound semiconductor substrate having a first conductivity type compound semiconductor substrate and a first conductivity type cladding layer, an active layer, and a second conductivity type cladding layer formed sequentially on the substrate. A light-emitting layer 2 made of a compound semiconductor of the formula (1), and forming a concavo-convex region 8 having a height and a width equal to or less than the emission wavelength on the light extraction surface formed on the light-emitting layer 2 or an upper layer thereof, or A light emitting layer 2 made of an InGaAlP-based or AlGaAs-based compound semiconductor having a first conductive type clad layer 3, an active layer 4, and a second conductive type clad layer 5 on a compound semiconductor substrate 1, and a lattice just above the light emitting layer A graded layer 6 that is matched and has a lattice constant that changes stepwise from the lower layer to the upper layer, and is almost lattice-matched to the uppermost layer of the graded layer 6 and is transparent to the emission wavelength. A structure comprising a current spreading layer 7.
[Selection diagram] Fig. 1

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an optical semiconductor device and a method of manufacturing the same, and more particularly to an optical semiconductor device with high efficiency and reduced process cost and a method of manufacturing the same.
[0002]
[Prior art]
In recent years, high-brightness light emitting diodes (LEDs), which have attracted attention as light sources replacing light bulbs and the like, are required to have higher brightness and higher efficiency.
[0003]
FIG. 7 shows an example of the structure of a conventional LED. A light emitting layer 2 is formed on an n-type GaAs substrate 1 by epitaxially growing an n-type cladding layer 3, an active layer 4, and a p-type cladding layer 5 each made of an InGaAlP-based or AlGaAs-based compound semiconductor. Then, electrodes 9 and 10 are formed on the surface of the light emitting layer 2 and on the back surface of the n-type GaAs substrate.
[0004]
In the LED having such a structure, light is generated in the light emitting layer by applying a voltage between the electrodes 9 and 10, and the light is extracted outside from the surface of the light emitting layer 2 serving as a light extraction surface.
[0005]
[Problems to be solved by the invention]
In such an LED, as shown in FIG. 8A, an attempt has been made to improve the current distribution and increase the efficiency by further providing a current diffusion layer on the light emitting layer 2 . However, when the current diffusion layer 7 ′ made of, for example, InGaAlP is formed, a problem such as a mounting problem due to an increase in the device voltage Vf due to an increase in the thickness of the InGaAlP layer and a problem such as a decrease in luminous efficiency occur. I will.
[0006]
Therefore, it is expected to improve the light extraction efficiency by providing a current diffusion layer made of GaP that is transparent to the emission wavelength and can control Vf. However, GaP cannot be lattice-matched with the InGaAlP-based or AlGaAs-based compound semiconductor as the light emitting layer. Therefore, if GaP is grown on the light emitting layer as it is, crystal defects occur, and the surface morphology deteriorates.
[0007]
In order to suppress the occurrence of such lattice defects, a process of bonding the GaP substrate 7 ″ via the buffer layer 14 has been developed as shown in FIG. 8B. There has been a problem that the yield decreases and the process cost increases.
[0008]
Accordingly, the present invention has been made to overcome the above-mentioned problems in the conventional optical semiconductor device and the method for manufacturing the same, and has been proposed to provide a high-brightness and high-efficiency optical semiconductor device without a decrease in yield or deterioration in characteristics and a reduced process cost. It is an object of the present invention to provide an apparatus and a method for manufacturing the same.
[0009]
[Means for Solving the Problems]
The optical semiconductor device of the present invention is an InGaAlP-based or AlGaAs-based compound semiconductor substrate having a first conductivity type compound semiconductor substrate and a first conductivity type clad layer, an active layer, and a second conductivity type clad layer formed sequentially on the substrate. A light-emitting layer made of a compound semiconductor is provided, and the light-extraction surface formed on the light-emitting layer or on the light-emitting layer is formed with irregularities having a height and a width equal to or less than an emission wavelength.
[0010]
Further, the optical semiconductor device of the present invention is characterized in that a current diffusion layer made of GaP is provided on the light emitting layer.
[0011]
Further, the optical semiconductor device of the present invention provides a light emission made of an InGaAlP-based or AlGaAs-based compound semiconductor having a first conductivity type clad layer, an active layer, and a second conductivity type clad layer on a first conductivity type compound semiconductor substrate. A graded layer whose lattice constant changes stepwise from the lower layer to the upper layer, and which is substantially lattice-matched with the uppermost layer of the graded layer and which is transparent to the emission wavelength. A current diffusion layer is provided.
[0012]
In the optical semiconductor device of the present invention, the current diffusion layer is made of GaP, the graded layer is made of an InGaAlP-based compound semiconductor, and the concentration of In and Al decreases from the lower layer to the upper layer. And
[0013]
Further, in the method of manufacturing an optical semiconductor device according to the present invention, the first conductive type clad layer, the active layer, and the second conductive type clad made of an InGaAlP-based or AlGaAs-based compound semiconductor are formed on the first conductive-type compound semiconductor substrate. A step of forming a light emitting layer having a layer, a step of forming a block copolymer layer having a phase separation structure on the light emitting layer directly or through a current diffusion layer, and selecting a predetermined phase in the block copolymer layer A first etching step for selectively etching and removing, a second etching step for etching the current diffusion layer using the remaining phase as a mask to form irregularities on the surface, and a third etching step for removing the block copolymer layer It is characterized by having.
[0014]
The method for manufacturing an optical semiconductor device according to the present invention is characterized in that the block copolymer layer comprises an aromatic polymer phase and an acrylic polymer phase.
[0015]
Further, in the method of manufacturing an optical semiconductor device according to the present invention, the first, second, and third etching steps are continuously performed in the same chamber.
[0016]
Further, according to the method of manufacturing an optical semiconductor device of the present invention, an InGaAlP-based or AlGaAs-based light emission having at least a first conductive type clad layer, an active layer, and a second conductive type clad layer on a first conductive type semiconductor substrate at least sequentially. A step of forming a layer, and a step of introducing a reaction gas containing In, Ga, Al, and P onto the light emitting layer, and gradually reducing the flow ratio of In and Al to form a graded layer. A step of forming a current diffusion layer made of GaP on the graded layer.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0018]
FIG. 1 shows a cross-sectional structure of the optical semiconductor device of the present embodiment. As shown in the figure, on the n-GaAs substrate 1, the light-emitting layer 2 is formed, the light emitting layer 2, n- cladding layer 3 having a thickness of 0.1~2.0μm which are sequentially formed, the thickness It comprises an active layer 4 having a thickness of 0.1 to 2.0 μm and a p-cladding layer 5 having a thickness of 0.1 to 2.0 μm.
[0019]
Here, In _0.49 (Ga _0.3 Al _0.7 ) _0.51 P having an n-carrier concentration of about 1.0 × E16 to 1.0 × E19 cm ⁻³ is provided in the n-cladding layer 3. The active layer 4 has a non-doped In _0.49 (Ga _0.75 Al _0.25 ) _0.51 P, and the p-cladding layer 5 has a p-carrier concentration of 1.0 × E17 to 1.0 ×. In _0.49 (Ga _0.3 Al _0.7 ) _0.51 P of about E19 cm ⁻³ can be used.
[0020]
Further, the graded layer 6 made of InGaAlP is formed with a thickness of 0.05 to 0.50 μm, and the current diffusion layer 7 made of GaP is formed with a thickness of 0.5 to 5.0 μm.
[0021]
An unevenness (Graded Index: hereinafter referred to as GI) region 8 having a height on the order of several nm is formed on the surface of the current diffusion layer 7 serving as a light extraction surface, and p is formed on the unevenness region 8 side of the current diffusion layer 7. The n-side electrode 9 is formed on the n-GaAs substrate side of the n-side electrode 9.
[0022]
Then, when a voltage is applied between the electrodes 9 and 10, a current is injected into the light emitting layer via the current diffusion layer 7 from below the p-side electrode 9 and light is emitted in the light emitting layer. The emitted light passes through the GaP current diffusion layer 7 transparent to the emission wavelength, and is emitted from the GI region 8 without lowering the light extraction efficiency.
[0023]
Such an optical semiconductor device is formed as follows. First, the n-type GaAs substrate 1 is placed in an MOCVD (metal organic chemical vapor deposition) apparatus, and trimethyl gallium (TMG), trimethyl aluminum (TMA), trimethyl indium (TMI), and phosphine (PH ₃ ) are used as reaction gases. ) Is controlled by MFC (Mass Flow Controller), introduced together with n-type dopant gas SiH ₄ and carrier gas hydrogen (H ₂ ), and epitaxially grown at about 500 to 900 ° C. to obtain an n-cladding layer. Form 3
[0024]
Next, the TMA of the reaction gas was reduced to increase the TMG, the dopant gas was stopped, and the active layer 4 was similarly formed. Thereafter, the concentrations of TMA and TMG were returned, and p-type zinc gas of p-type dopant gas was introduced. -The clad layer 5 is formed to have a configuration as shown in FIG.
[0025]
Then, utilizing the ramping function of the MFC, the flow rate of only TMI and TMA is gradually reduced while leaving the dopant gas as it is, and as shown in FIG. 2B, InGaAlP in which the In and Al concentrations decrease in the upper layer direction. The graded layer 6 is formed.
[0026]
Next, the flow rates of TMI and TMA are set to 0 while keeping the dopant gas as it is, and a current diffusion layer 7 made of GaP is formed as shown in FIG.
[0027]
Further, after forming a p-side electrode 9 made of Au on the GaP current diffusion layer 7, as shown in FIG. 3A, polystyrene (PS) of an aromatic polymer dissolved by an organic solvent and poly- A dissolved polymer layer 11 made of methylene methacrylate (PMMA) is applied by spin coating.
[0028]
Then, as shown in FIG. 3B, a block copolymer layer 11 ′ having a phase separation structure is formed by thermal annealing at 50 to 300 ° C. in an N ₂ atmosphere. At this time, the two phases of the PS phase 12 and the PMMA phase 13 are arranged on the order of nm, but the size can be controlled by appropriately setting the molecular weight of each polymer and the annealing conditions (temperature and time). .
[0029]
Then, as shown in FIG. 3C, the PMMA phase 13 is selectively etched by a parallel plate type RIE (Reactive Ion Etching) method. The etching conditions are as follows: NF ₃ , CF ₄ , SF ₆ , CHF ₃ , CH ₂ F ₂ , C ₄ F ₈ , C ₂ F _6, etc. F-containing gas flow rate: 10 to 100 ccm, O ₂ gas flow rate: 10 to 10 ccm ( (F-containing gas: O ₂ gas = partial pressure is preferably about 10: 1), pressure: 10 to 30 Pa, and power: 10 to 100 W.
[0030]
At this time, the acrylic polymer such as PMMA has a low O ₂ content because of its high O ₂ content, and the etching proceeds by F radicals in the F containing gas. On the other hand, an aromatic polymer such as PS has a high etching resistance because it contains a benzene ring having a high carbon content, and remains without reacting with F radicals, so that a high etching selectivity of PMMA to PS can be obtained.
[0031]
Here, as the F-containing gas, SF ₆ in which F radicals are more easily generated is most preferable, and the selectivity can be improved to 50. Further, F radicals can be further increased by ICP (Inductively Coupled Plasma) etching. FIG. 5 shows the etching rate and the selectivity of the aromatic polymer and the acrylic polymer when the IPC etching is performed using the F-containing gas as CH ₂ F ₂ , NF ₃ , CHF ₃ , CF ₄ , and SF ₆ . According F ratio increases, the etching rate is increased, the selectivity ratio by a SF ₆ it can be seen that can be improved to 75.
[0032]
The state in which the etching progresses and PMMA is completely etched is the end point of the etching, and is controlled by time. At this time, since a sufficient selectivity has been obtained, it has been confirmed that even if 100% over-etching is performed, a problem such as a shape collapse does not occur.
[0033]
Next, as shown in FIG. 3D, the surface of the GaP current diffusion layer 7 is etched to a depth of 0.05 to 0.3 μm by RIE using the remaining PS phase 12 as a mask. Etching conditions are as follows: Cl ₂ gas flow rate: 20 to 100 ccm, BCl ₃ gas flow rate: 30 to 300 ccm, pressure: 10 to 30 Pa, power: 100 to 600 W, and appropriately set the etching time to obtain a desired etching state. Can be. At this time, the p-side electrode 9 is not etched by Cl ₂ .
[0034]
Further, as shown in FIG. 3E, the PS phase 12 used as a mask is etched by RIE. The etching conditions are as follows: O2 gas flow rate: 30 to 300 ccm, pressure: 100 to 300 Pa, power: 10 to 50 W. At this time, the etching end point can be easily obtained by using a light emission monitor.
[0035]
Thus, the remaining PS phase is removed, and GI region 8 is formed on the surface of GaP current diffusion layer 7. As can be seen from FIG. 4, as shown in the shape of the GI region, fine irregularities on the order of nm are formed on the surface. At this time, the height (h) of the GI region (irregularities) is 0.34λ ≦ h ≦ λ, and the width (D) is D ≦ 0.2λ (λ: emission wavelength). Preferred above.
[0036]
The etching of the PMMA phase, the GaP current diffusion layer, and the PS phase can all be performed continuously in one chamber.
[0037]
When the luminance of the optical semiconductor device formed and chipped as described above was evaluated, the luminance was 1.5 to 2.0 times higher than that of the conventional optical semiconductor device using InGaAlP for the current diffusion layer. Was obtained.
[0038]
Further, as shown in FIG. 6, when the light extraction surface is flat, the light extraction efficiency (Power Reflected) becomes almost zero when the incident angle exceeds 20 ° as shown in FIG. It becomes. On the other hand, when the GI region in an ideal state is formed on the surface as shown in (b), a slight decrease is observed in the region where the incident angle is large, but the average is improved to about 70%. As described above, the GI region enables light to be emitted in a region where the incident angle is large, and as a result, the light extraction efficiency can be improved.
[0039]
Such a GI region is effective even if it is formed on an optical semiconductor device having no current diffusion layer or on a light extraction surface such as formed by bonding. Further, since a bonding step is not required for forming a GaP layer and can be dealt with only by adding a step using an existing etching apparatus using a block copolymer, a significant increase in manufacturing cost can be suppressed.
[0040]
In the present embodiment, the InGaAlP-based light emitting layer is used. At this time, an InGaAlP layer within an allowable range of lattice matching may be first formed on the graded layer on the light emitting layer, and then the concentrations of In and Al may be gradually reduced in the same manner.
[0041]
Also, regardless of the composition of the light emitting layer, the crystallinity of the GaP current diffusion layer can be improved by having the graded layer having the gradient composition. Therefore, the current can be diffused without absorbing the light from the light emitting layer, and the light extraction efficiency can be improved.
[0042]
As the structure of the light emitting layer, a double hetero structure in which an active layer is sandwiched between p and n cladding layers is used. However, a pn junction structure without an active layer or an MQW (Multi Quantum Well) structure in an active layer may be used. Well, it is not particularly limited. As the p and n cladding layers, a two-stage cladding layer may be applied as a measure against deterioration. Further, the substrate is not limited to the n-type, and the conductivity type of each layer may be reversed using a p-type substrate.
[0043]
【The invention's effect】
According to the present invention, it is possible to provide an optical semiconductor device which does not cause a decrease in yield or deterioration in characteristics, can achieve high luminance and high efficiency, and has a low process cost, and a method for manufacturing the same.
[Brief description of the drawings]
FIG. 1 is a diagram showing a cross section of an optical semiconductor device of the present invention.
FIG. 2 is a view showing a manufacturing process of the optical semiconductor device of the present invention.
FIG. 3 is a view showing a manufacturing process of the optical semiconductor device of the present invention.
FIG. 4 is a diagram showing a shape of a GI region in the optical semiconductor device of the present invention.
FIG. 5 is a view showing etching characteristics of a block copolymer used in the present invention.
FIG. 6 is a diagram showing an effect of a GI region in the present invention.
FIG. 7 is a diagram showing a cross section of a conventional optical semiconductor device.
FIG. 8 is a diagram showing a cross section of a conventional optical semiconductor device.
[Explanation of symbols]
REFERENCE SIGNS LIST 1 n-GaAs substrate 2 light emitting layer 3 n-cladding layer 4 active layer 5 p-cladding layer 6 graded layer 7, 7 ', 7 "current diffusion layer 8 GI region 9 p-side electrode 10 n-side electrode 11 dissolved polymer layer 11 'block copolymer layer 12 PS phase 13 PMMA phase 14 GaP buffer layer

Claims (8)

A compound semiconductor substrate of a first conductivity type, and a light emitting layer made of an InGaAlP-based or AlGaAs-based compound semiconductor having a first conductivity-type clad layer, an active layer, and a second conductivity-type clad layer sequentially formed on the substrate. An optical semiconductor device, wherein irregularities having a height and a width equal to or less than an emission wavelength are formed on a light extraction surface formed on the light emitting layer or an upper layer thereof. The optical semiconductor device according to claim 1, further comprising a current diffusion layer made of GaP on the light emitting layer. A light emitting layer made of an InGaAlP-based or AlGaAs-based compound semiconductor having a first conductive type clad layer, an active layer, and a second conductive type clad layer on a compound semiconductor substrate of a first conductive type, and a lattice almost directly above the light emitting layer. A graded layer that is matched and has a lattice constant that changes stepwise from the lower layer to the upper layer, and a current spreading layer that is substantially lattice-matched with the uppermost layer of the graded layer and is transparent to the emission wavelength. Optical semiconductor device. The optical semiconductor according to claim 3, wherein the current diffusion layer is made of GaP, the graded layer is made of an InGaAlP-based compound semiconductor, and the concentration of In and Al decreases from the lower layer to the upper layer. apparatus. Forming a light emitting layer having a first conductive type clad layer, an active layer, and a second conductive type clad layer made of an InGaAlP-based or AlGaAs-based compound semiconductor on a first conductive-type compound semiconductor substrate;
A step of forming a block copolymer layer having a phase-separated structure on the light emitting layer, directly or through a current diffusion layer;
A first etching step of selectively etching out a predetermined phase in the block copolymer layer;
A second etching step of etching the current diffusion layer using the remaining phase as a mask to form irregularities on the surface;
A method for manufacturing an optical semiconductor device, comprising: a third etching step of removing a block copolymer layer. The method according to claim 5, wherein the block copolymer layer comprises an aromatic polymer phase and an acrylic polymer phase. 7. The method according to claim 5, wherein the first, second, and third etching steps are performed continuously in the same chamber. Forming an InGaAlP-based or AlGaAs-based light-emitting layer having at least a first conductive-type clad layer, an active layer, and a second conductive-type clad layer on a semiconductor substrate of the first conductive type;
Forming a graded layer by introducing a reaction gas containing In, Ga, Al, and P onto the light emitting layer, and gradually reducing the flow ratio of In and Al;
Forming a current diffusion layer of GaP on the graded layer.

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