JP2004088752A

JP2004088752A - Coupler

Info

Publication number: JP2004088752A
Application number: JP2003183460A
Authority: JP
Inventors: Munehiro Shinabe; 宗博品部; Taiji Ono; 泰司小野
Original assignee: Matsushita Electric Industrial Co Ltd
Current assignee: Panasonic Holdings Corp
Priority date: 2002-07-05
Filing date: 2003-06-26
Publication date: 2004-03-18

Abstract

【課題】大きな結合度を有する結合器を提供する。
【解決手段】互いに平行な第１と第２の面を有する第１、第２誘電体基板１４１，１４２と、前記第１誘電体基板１４１の第１の面に形成された接地導体１０３と、前記第２誘電体基板１４２の第２の面上に、互いに電磁的に結合するよう近接する２本の結合用線路導体１２０，１２１とからなる結合器において、前記第２誘電体基板を貫通するスルーホール内に充填されたビア導体１５０〜１６３、１７０〜１８３を前記２本の結合用線路導体１２０，１２１上に互いに電磁気的結合度を増すよう配置接続することにより、前記結合用線路導体１２０，１２１間の対向する面積を大きくし静電容量を増大するようにした。
【選択図】　　　図１A coupler having a high degree of coupling is provided.
A first dielectric substrate having first and second dielectric substrates parallel to each other; a ground conductor formed on a first surface of the first dielectric substrate; A coupler comprising two coupling line conductors 120 and 121 which are close to each other so as to be electromagnetically coupled to each other on the second surface of the second dielectric substrate 142 and penetrate the second dielectric substrate. The via conductors 150 to 163 and 170 to 183 filled in the through-holes are arranged and connected on the two coupling line conductors 120 and 121 so as to increase the degree of electromagnetic coupling with each other. , 121 are increased to increase the capacitance.
[Selection diagram] Fig. 1

Description

【０００１】
【発明の属する技術分野】
本発明は、結合器に関し、マイクロ波回路における方向性結合器、またはフィルタに用いられる結合器に関するものであり、特にストリップラインを用いた場合に、大きな結合度を有する結合器に関する。
【０００２】
【従来の技術】
従来、結合器は、フィルタ回路、平衡型増幅器平衡型ミキサ、及びバランなどの種々のマイクロ波回路に適用されている。
図６は、従来の１／４波長先端短絡型結合線路を用いた結合器を示す図である。
図６（ｃ）は、従来の結合器を上から見た平面図であり、上方から見えない部分は破線で示す。図６（ａ）は、図６（ｃ）のＡ９−Ａ１０縦断面図、図６（ｂ）は、図６（ｃ）のＡ１１−Ａ１２縦断面図である。また、図６（ｄ）は、図６（ｃ）のＡ１−Ａ２横断面図、図６（ｅ）は、図６（ｃ）のＡ３−Ａ４横断面図、図６（ｆ）は、図６（ｃ）のＡ５−Ａ６横断面図、図６（ｇ）は、図６（ｃ）のＡ７−Ａ８横断面図である。
【０００３】
図６（ａ）、及び（ｂ）に示すように、従来の結合器は、第１の誘電体基板６０１の下面に接地導体６０３が形成され、第２の誘電体基板６０２の上面に接地導体６０４が形成されている。
また、図６（ｅ）及び（ｆ）に示すように、前記第１誘電体基板６０１と前記第２誘電体基板６０２の間に、ストリップラインを用いた信号の信号入出力用線路導体６１２、６１３と、互いに電磁的に結合するように近接し、接地導体６０４の中心線に対して対称に形成された２本の結合用線路導体６２０、６２１とを形成している。
【０００４】
また、前記第１誘電体基板６０１、及び前記第２誘電体基板６０２を貫通するスルーホール内において、ビア導体６３０、６３１、６３２、及び６３３が充填されている。
図６（ａ）及び（ｂ）に示すように、該ビア導体６３０、６３１は、図６（ｃ）のＡ７−Ａ８線の位置で、また、該ビア導体６３２、６３３は、図６（ｃ）のＡ１−Ａ２線の位置で、前記結合用線路導体６２０と６２１の互いに対向しない先端部分を、接地導体６０４と接地導体６０３に短絡し、インターデジタル結合させる。
また、前記第１誘電体基板６０１、及び前記第２誘電体基板６０２の側面に、接地導体６０５、６０６、６０７、及び６０８を形成する。
【０００５】
このように、従来の１／４波長先端短絡方結合線路を用いた結合器は、結合用線路導体６２０、６２１を接地導体６０３、６０４、６０５、６０６、６０７、及び６０８で囲み、ストリップラインを用いて構成されている。
従来の１／４波長先端短絡方結合線路を用いた結合器は、前記信号入出力用線路導体６１２、６１３を前記結合線路用導体６２０、６２１に互いに対向しない点対称で接続し、この接続した位置と前記結合線路用導体６２０、６２１の先端からの距離により入出力インピーダンスが決まる。
【０００６】
また、プリント基板実装時の前記信号入出力用端面電極６１０、６１１を前記第１誘電体基板６０１、及び前記第２誘電体基板６０２の側面に形成し、それぞれ前記信号入出力用線路導体６１２、６１３に接続させる。
ここで、各結合用線路導体６２０、６２１は、１／４波長の長手方向の長さ、すなわち１／４λｇ（λｇは管内波長である。）の長手方向の長さを有する。
【０００７】
この従来例の１／４波長先端短絡型結合線路を用いた結合器に対して、公知の偶奇直交モード励振法による準ＴＥＭ近似（ジェイ・リード（Ｊ．Ｒｅｅｄ））や、「実用　マイクロ波技術講座−理論と実際―」（非特許文献１参照）に開示されている偶モード、奇モードの解析方法を用いて、解析を行うと、偶モードにおいては同相励振となり、一方、奇モードにおいては逆相励振となる。
【０００８】
ここで、この結合線路の結合伝送線路の奇、偶各モード時の特性インピーダンスＺｏｄｄ、Ｚｅｖｅｎは〔数１〕及び〔数２〕で表される。
〔数１〕　Ｚｏｄｄ＝１／（Ｖｐ×（Ｃ１＋２×Ｃ１２））　［Ω］
〔数２〕　Ｚｅｖｅｎ＝１／（Ｖｐ×Ｃ１）　［Ω］
なお、Ｖｐは伝送路を電磁界が伝搬する速度である。また、Ｃ１はストリップラインである前記結合用線路導体６２０、６２１と前記接地導体６０３、６０４との間の単位長当りの静電容量であり、Ｃ１２は、前記結合用線路導体６２０、６２１間単位長当りの静電容量である。
【０００９】
上記特性インピーダンスＺｏｄｄ、Ｚｅｖｅｎを用いて、従来例の１／４波長先端短絡型結合線路を用いた結合器の結合度Ｋは次式で表わすことができる。
〔数３〕　Ｋ＝２０ｌｏｇ｛（Ｚｅｖｅｎ−Ｚｏｄｄ）／（√２×（Ｚｅｖｅｎ＋Ｚｏｄｄ））｝　［ｄＢ］
上記〔数３〕に〔数１〕、及び〔数２〕を代入することによって、結合度Ｋを示す次の〔数４〕を得る。
〔数４〕　Ｋ＝２０ｌｏｇ｛Ｃ１２／（√２×（Ｃ１＋Ｃ１２））｝
以上のように従来例の１／４波長先端短絡型結合線路を用いた結合器の結合度Ｋは表される。
また、上記従来例に比較して大きな結合度を有する１／４波長結合線路型方向性結合器も提案されている（特許文献１）。
【００１０】
【非特許文献１】
小西良弘，「実用　マイクロ波技術講座−理論と実際」，ケイラボ出版，２００１年６月，第３巻
【特許文献１】
特開平６−３５０３１３号公報（第１−１３頁）
【００１１】
【発明が解決しようとする課題】
しかしながら、上記従来のストリップラインによる結合器では、２本の結合用線路導体６２０、６２１の間隔を極端に小さくしないと結合度Ｋを大きくすることができないという問題があった。しかし、製造上の問題点から２本の結合用線路導体６２０、６２１を配置することができる最小間隔の距離が限定されている。
また、最近、低温焼成セラミック（ＬＴＣＣ）が開発され、絶縁層を薄くし小型化することが可能となってきているが、絶縁層を薄くすると、ストリップラインである前記結合用線路導体６２０、６２１と前記接地導体６０３、６０４との間の単位長当りの静電容量であるＣ１が大きくなり、〔数４〕で示すように、更に結合線路の結合度Ｋが小さくなる。
【００１２】
この問題点を解決するために、上記従来例より改善された１／４波長結合線路型方向性結合器が提案されている（特許文献１）。
【００１３】
しかしながら、上記公報に開示された従来例は、主にマイクロストリップによる線路導体に関するものであるが、他からの電磁妨害を受けやすく、上記１／４波長結合線路型方向性結合器の上下に部品を配置できないため高密度実装に不向きであり、小型化できないという問題があった。
【００１４】
本発明は、上記のような従来の問題点を解決するためになされたもので、従来例と比較して小型で高密度実装可能な、結合度Ｋが大きい結合器を提供することを目的とする。
【００１５】
【課題を解決するための手段】
前記従来の課題を解決するために、本発明の請求項１による結合器は、互いに平行な第１の面、及び第２の面を有する第１誘電体基板と、前記第１誘電体基板の第２の面上に配置される、互いに平行な第１の面、及び第２の面を有する第２誘電体基板と、前記第１誘電体基板の第１の面に形成された接地導体と、前記第２誘電体基板の第２の面上に、互いに電磁的に結合するように近接し、それぞれ１／４波長の長さを有する２本の結合用線路導体と、前記第２誘電体基板を貫通する複数のスルーホール内に充填され、前記２本の結合用線路導体上に配置接続された複数のビア導体とを備えたことを特徴とするものである。
【００１６】
また、本発明の請求項２記載の結合器は、請求項１記載の結合器において、前記第２誘電体基板の第２の面上に、互いに平行な第１の面、及び第２の面を有する第３誘電体基板を形成し、該第３誘電体基板の第２の面に接地導体を形成してなることを特徴とするものである。
【００１７】
また、本発明の請求項３記載の結合器は、請求項１記載の結合器において、前記第１誘電体基板から前記第２誘電体基板までを貫通するスルーホール内に充填したビア導体を有し、前記２つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向しない先端を、前記第１誘電体基板の第１の面に形成された接地導体に短絡し、インターデジタル結合されてなるものであることを特徴とするものである。
【００１８】
また、本発明の請求項４記載の結合器は、請求項２記載の結合器において、前記第１誘電体基板から前記第３誘電体基板までを貫通するスルーホール内に充填したビア導体を有し、前記３つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向しない先端を、前記第１誘電体基板の第１の面及び前記第３誘電体基板の第２の面に形成された接地導体に短絡し、インターデジタル結合されたものであることを特徴とするものである。
【００１９】
また、本発明の請求項５記載の結合器は、請求項３または４記載の結合器において、前記２つ又は３つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向する先端を、前記第１誘電体基板の第１の面、或いは前記第１誘電体基板の第１の面及び前記第３誘電体基板の第２の面に形成された接地導体に短絡し、コムライン結合されてなるものであることを特徴とするものである。
【００２０】
また、本発明の請求項６記載の結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、前記２本の結合用線路導体上に、等間隔に配置接続されたものであることを特徴とするものである。
【００２１】
また、本発明の請求項７記載の結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、前記２本の結合用線路導体上に、長手方向に沿って一直線に配置接続されたものであることを特徴とするものである。
【００２２】
また、本発明の請求項８記載の結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、対向する前記２本の結合用線路導体上の、前記２本の結合用線路導体間の中心線に近接する側に配置接続されたものであることを特徴とするものである。
【００２３】
また、本発明の請求項９記載の結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、対向する前記２本の結合用線路導体上の、前記２本の結合線路導体間の中心線に近接する側に、等間隔で、長手方向に沿って一直線に配置接続されたものであることを特徴とするものである。
【００２４】
また、本発明の請求項１０記載の結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、前記２本の結合用線路導体上に、疎部と密部を有するように配置接続されたものであることを特徴とするものである。
【００２５】
また、本発明の請求項１１記載の結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、前記２本の結合用線路導体上に、複数の前記ビア導体を１組とする密部が間欠的に配置されるように配置接続されたものであることを特徴とするものである。
【００２６】
また、本発明の請求項１２記載の結合器は、請求項１１記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、対向する前記２本の結合用線路導体上の、前記２本の結合用線路導体間の中心線に近接する側に、長手方向に沿って一直線に配置接続されたものであることを特徴とするものである。
【００２７】
また、本発明の請求項１３記載の結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体を貫通する複数のスルーホール内に充填された複数のビア導体は、前記２本の結合用線路導体上に、それぞれ互いに対向するように折線状に配置接続されたものであることを特徴とするものである。
【００２８】
また、本発明の請求項１４記載の結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体を貫通する複数のスルーホール内に充填された複数のビア導体は、前記２本の結合用線路導体上に、それぞれ互いに対向するように千鳥状に配置接続されたものであることを特徴とするものである。
【００２９】
また、本発明の請求項１５記載の結合器は、請求項３乃至５の何れかに記載の結合器において、前記第１誘電体基板の第２の面と、前記第２誘電体基板の第１の面との間に２本の第２線路導体をさらに有し、前記２本の結合用線路導体と前記２本の第２線路導体とが個々に導通し、且つ前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体が前記結合用線路導体と前記第２線路導体により挟まれ、接続されていることを特徴とするものである。
【００３０】
また、本発明の請求項１６記載の結合器は、請求項９記載の結合器において、前記第１誘電体基板の第２の面と、前記第２誘電体基板の第１の面との間に２本の第２線路導体をさらに有し、前記２本の結合用線路導体と前記２本の第２線路導体とが個々に導通し、且つ前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体が前記結合用線路導体と前記第２線路導体により挟まれ、接続されていることを特徴とするものである。
【００３１】
また、本発明の請求項１７記載の結合器は、互いに平行な第１の面、及び第２の面を有する第１誘電体基板と、前記第１誘電体基板の第２の面上に配置される、互いに平行な第１の面、及び第２の面を有する第２誘電体基板と、前記第２誘電体基板の第２の面上に配置される、互いに平行な第１の面、及び第２の面を有する第３誘電体基板と、前記第１誘電体基板の第１の面に形成された接地導体と、前記第２誘電体基板の第２の面上に、互いに電磁的に結合するように近接し、それぞれ１／４波長の長さを有する２本の結合用線路導体と、前記第２誘電体基板、または第３誘電体基板を貫通する複数のスルーホール内に充填され、前記２本の結合用線路導体上に配置接続された複数のビア導体とを備えたことを特徴とするものである。
【００３２】
また、本発明の請求項１８記載の結合器は、請求項１７記載の結合器において、前記第３誘電体基板の第２の面上に、互いに平行な第１の面と第２の面を有する第４誘電体基板を形成し、該第４誘電体基板の第２の面に接地導体を形成することを特徴とするものである。
【００３３】
また、本発明の請求項１９記載の結合器は、請求項１７記載の結合器において、前記第１誘電体基板から前記第３誘電体基板までを貫通するスルーホール内に充填したビア導体を有し、前記３つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向しない先端を、前記第１誘電体基板の第１の面に形成された接地導体に短絡し、インターデジタル結合されたものであることを特徴とするものである。
【００３４】
また、本発明の請求項２０記載の結合器は、請求項１８記載の結合器において、前記第１誘電体基板から前記第４誘電体基板までを貫通するスルーホール内に充填したビア導体を有し、前記４つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向しない先端を、前記第１誘電体基板の第１の面及び前記第４誘電体基板の第２の面に形成された接地導体に短絡し、インターデジタル結合されたものであることを特徴とするものである。
【００３５】
また、本発明の請求項２１記載の結合器は、請求項１９または２０記載の結合器において、前記３つ又は４つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向する先端を、前記第１誘電体基板の第１の面或いは、前記第１誘電体基板の第１の面及び前記第４誘電体基板の第２の面に形成された接地導体に短絡し、コムライン結合されたものであることを特徴とするものである。
【００３６】
また、本発明の請求項２２記載の結合器は、請求項１９乃至２１の何れかに記載の結合器において、前記第２誘電体基板または第３誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、前記第２誘電体基板に充填されたビア導体と、前記第３誘電体基板に充填されたビア導体とが交互に配置されるように配置接続されたものであることを特徴とするものである。
【００３７】
また、本発明の請求項２３記載の結合器は、請求項２２記載の結合器において、前記第２誘電体基板または第３誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、対向する前記２本の結合用線路導体上の、前記２本の結合用線路導体間の中心線に近接する側に、等間隔で、長手方向に沿って一直線に配置接続されたものであることを特徴とするものである。
【００３８】
また、本発明の請求項２４記載の結合器は、請求項９、１１、１４、１６または２３記載の結合器において、該結合器を、フィルタとして用いることを特徴とするものである。
【００３９】
また、本発明の請求項２５に記載の結合器は、互いに平行な第１の面、及び第２の面を有する第１誘電体基板と、前記第１誘電体基板の第１の面に形成された接地導体と、前記第１誘電体基板の第２の面上に、互いに電磁的に結合するように近接し、それぞれ１／４波長の長さを有する２本の結合用線路導体と、前記第１誘電体基板を貫通する複数のスルーホール内に前記第１誘電体基板より低誘電率の誘電体を充填され、前記２本の結合用線路導体上に配置接続された複数のビア誘電体とを備えた、ことを特徴とする。
【００４０】
また、本発明の請求項２６に記載の結合器は、請求項２５記載の結合器において、前記第１誘電体基板の第２の面上に、互いに平行な第１の面、及び第２の面を有する第２誘電体基板を形成し、該第２誘電体基板の第２の面に接地導体を形成してなる、ことを特徴とする。
【００４１】
また、本発明の請求項２７に記載の結合器は、請求項２６記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に前記第２誘電体基板より低誘電率の誘電体を充填され、前記２本の結合用線路導体上に配置接続された複数のビア誘電体とを形成してなる、ことを特徴とする。
【００４２】
また、本発明の請求項２８に記載の結合器は、請求項２５記載の結合器において、前記第１誘電体基板を貫通するスルーホール内に充填したビア導体を有し、前記１つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向しない先端を、前記第１誘電体基板の第１の面に形成された接地導体に短絡し、インターデジタル結合されてなるものである、ことを特徴とする。
【００４３】
また、本発明の請求項２９に記載の結合器は、請求項２７記載の結合器において、前記第１、２誘電体基板を貫通するスルーホール内に充填したビア導体を有し、前記２つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向しない先端を、前記第１誘電体基板の第１の面及び前記第２誘電体基板の第２の面に形成された接地導体に短絡し、インターデジタル結合されてなるものである、ことを特徴とする。
【００４４】
【発明の実施の形態】
以下、本発明の実施の形態について図面を用いて説明する。
（実施の形態１）
図１は、本発明の実施の形態１における１／４波長先端短絡型結合線路を用いた結合器を示す図である。
図１（ｃ）は、本発明の実施の形態１による結合器を上から見た平面図であり、上方から見えない部分は破線で示す。図１（ａ）は、図１（ｃ）のＡ９−Ａ１０縦断面図、図１（ｂ）は、図１（ｃ）のＡ１１−Ａ１２縦断面図である。また、図１（ｄ）は、図１（ｃ）のＡ１−Ａ２横断面図、図１（ｅ）は、図１（ｃ）のＡ３−Ａ４横断面図、図１（ｆ）は、図１（ｃ）のＡ５−Ａ６横断面図、図１（ｇ）は、図１（ｃ）のＡ７−Ａ８横断面図である。
【００４５】
図１（ａ）、及び（ｂ）に示すように、第１、第２、第３の誘電体基板１４１、１４２、１４３は、それぞれ互いに平行な第１の面（下面）、及び第２の面（上面）を有している。本発明の実施の形態１による結合器は、該第１の誘電体基板１４１の下面に接地導体１０３が形成され、第３の誘電体基板１４３の上面に接地導体１０４が形成されている。
【００４６】
また、図１（ｅ）及び（ｆ）に示すように、第３誘電体基板１４３の下面と、第２誘電体基板１４２の上面との間に、ストリップラインを用いた信号の信号入出力用線路導体１１２、１１３と、互いに電磁的に結合するように近接し、接地導体１０４の中心線に対して対称に形成された２本の結合用線路導体１２０、１２１とを形成している。
【００４７】
ここで、結合用線路導体１２０、１２１は、１／４波長の長手方向の長さ、すなわち１／４λｇ（λｇは管内波長）の長手方向の長さを有し、この周波数にて共振が発生する。
第１、第２、第３誘電体基板１４１〜１４３を貫通するスルーホール内では、ビア導体１３０〜１３２、及びビア導体１３３〜１３５が充填されている。
【００４８】
図１（ｃ）及び（ｇ）に示すように、ビア導体１３０〜１３２は、図１（ｃ）のＡ７−Ａ８線の位置で、また、図１（ｂ）、（ｃ）、及び（ｄ）に示すように、ビア導体１３３〜１３５は図１（ｃ）のＡ１−Ａ２線の位置で、結合用線路導体１２０、１２１の互いに対向しない先端部分を、接地導体１０４、及び接地導体１０３に短絡して、インターデジタル結合する。
そして、結合用線路導体１２０、１２１は、前述したように１／４波長の長手方向の長さを有するため、１／４波長である周波数で共振し、該共振周波数において、バンドパスフィルタとして動作する。
【００４９】
また、第１、第２、第３誘電体基板１４１〜１４３の側面には、図（ａ）、（ｂ）に示す接地導体１０５、１０６、及び図（ｄ）〜（ｇ）に示す接地導体１０７、１０８を形成し、結合用線路導体１２０、１２１を接地導体１０５〜１０８で囲むこと、つまりストリップラインを用いることにより、他からの電磁妨害を受けにくくなり、高密度に部品を配置でき、装置の小型化が可能となる。
【００５０】
信号入出力用線路導体１１２、１１３は、図（ｃ）に示すように、結合用線路導体１２０、１２１に互いに対向しないように、つまり点対称状に接続し、この接続した位置と結合用線路導体１２０、１２１の先端からの距離で入出力インピーダンスが決まる。
また、図（ｅ）、（ｆ）に示すようにプリント基板実装時の信号入出力用端面電極１１０、１１１を第１、第２、第３誘電体基板１４１〜１４３の側面に形成し、信号入出力用線路用導体１１２、１１３に接続させる。
【００５１】
また、図１（ｃ）に示すように、第２誘電体基板１４２を貫通するスルーホール内に充填されたビア導体１５０〜１６３は、図１（ａ）に示すように結合用線路導体１２１上に配置接続され、同様に第２誘電体基板１４２を貫通するスルーホール内に充填されたビア導体１７０〜１８３は、結合用線路導体１２０上に配置接続（図示せず）される。
【００５２】
ここで、ビア導体１５０〜１６３、及びビア導体１７０〜１８３の配置接続方法は、図１（ａ）及び（ｃ）に示すように、結合用線路導体１２０、１２１の長手方向に沿って、等間隔で、一直線に、ビア導体１５０〜１６３とビア導体１７０〜１８３とが互いに近接かつ対向するように配置接続する。
【００５３】
具体的には、図１（ｃ）に示すように、ビア導体１５０〜１６３は、結合用線路導体１２１の中心線（Ａ１１−Ａ１２線）上よりも、２本の結合用線路導体１２０、１２１間の中心側のＡ９−Ａ１０線上に配置する。
つまり、ビア導体１５０〜１６３、及びビア導体１７０〜１８３は、それぞれ結合用線路導体１２０、１２１の各中心よりも、２本の結合用線路導体１２０、１２１間の中心側に近づけ、結合用線路導体１２０、１２１の長手方向に沿って、直線状に一様かつ高密度に、互いが対向するよう配置する。
そして、以上のような構成により、図１に示す１／４波長先端短絡型結合線路を用いたインターデジタルフィルタである結合器を得る。
【００５４】
次に、以上のように構成された１／４波長先端短絡型結合線路を用いた結合器について、動作、及び作用を説明する。
ＬＴＣＣを用いた基板において、ビア導体１５０〜１６３、１７０〜１８３の上下方向の長さ、つまり誘電体基板の厚みは数十〜百ミクロンであり、一方、結合用線路導体１２０、１２１の厚みは数ミクロンなので、ビア導体１５０〜１６３、１７０〜１８３の上下方向の長さは結合用線路導体１２０、１２１の厚みに比べ、十分大きい。そのため、ビア導体１５０〜１６３、１７０〜１８３を配置接続することにより、偶モード時に、結合用線路導体１２０、１２１と接地導体１０３〜１０８との間の、〔数１〕、〔数２〕、〔数４〕に示す静電容量Ｃ１が大きくなる以上に、奇モード時に、結合用線路導体１２０と１２１間の対向する面積が増加し、〔数１〕、〔数４〕に示す静電容量Ｃ１２が増大する。
【００５５】
従って、（数４）から明らかなように、本実施の形態１による結合器は、結合線路の結合度Ｋを増大させることができる。
さらに、対向するビア導体１５０〜１６３、１７０〜１８３を近接させることで、より大きな結合度を得ることができる。
【００５６】
以上のように本実施の形態１による結合器によれば、ビア導体を結合線路上に配置接続することにより、静電容量Ｃ１２を増大させることになり、結合度Ｋを増大させ、バンドパスフィルタに用いた場合、通過帯域の幅を広げることができ、さらに多層の高密度実装が可能である。
【００５７】
また、本実施の形態１による結合器では、対向する多数の高密度なビア導体を出来るだけ近くに配置することにより、さらに強い結合度を得ることができる。これら結合線路の特性は、例えばＦＤＴＤ法、有限要素法などの解析法を用いて確認することができる。
【００５８】
なお、本実施の形態１では、第３の誘電体基板１４３と、接地導体１０４を備えるようにしたが、該第３の誘電体基板１４３、及び接地導体１０４を無くし、マイクロストリップラインで構成される結合線路で構成してもよい。
また、本実施の形態１では、ビア導体１３０〜１３５により、結合用線路導体１２０、１２１の互いに対向する先端部分を、接地導体１０３、１０４に短絡し、コムライン結合させてもよい。なお、この場合には、１／４波長先端短絡型結合線路を用いたコムラインフィルタである結合器を得ることができる。
【００５９】
また、本実施の形態１ではビア導体１３０〜１３５を備えるようにしたが、該ビア導体１３０〜１３５を無くし、結合用線路導体１２０、１２１を方向性結合器に用いてもよい。
【００６０】
また、実施の形態１では、結合用線路導体１２０、１２１の長手方向の長さを１／４波長、すなわち１／４λｇ（λｇは管内波長）としたが、これは結合用線路導体１２０、１２１の開放端にコンデンサーを付けることにより、１／４λｇより短くすることができる。
また、実施の形態１では、接地導体１０４の中心線に対して対称に２本の結合用線路導体１２０、１２１を形成しているが、２本の結合用線路導体１２０、１２１を接地導体１０４の中心に形成する必要はなく、任意の位置に配置しても同様の性能を得ることができる。
【００６１】
（実施の形態２）
図２は、本発明の実施の形態２における１／４波長先端短絡型結合線路を用いた結合器を示す図である。なお、ビア導体２３０〜２３２、２３３〜２３５、２５０〜２６１、２７０〜２８１以外に関する構成は、実施の形態１と同様であり、その説明を省略する。
【００６２】
図２（ｃ）は、本発明の実施の形態２による結合器を上から見た平面図であり、上方から見えない部分は破線で示す。図２（ａ）は、図２（ｃ）のＡ９−Ａ１０縦断面図、図２（ｂ）は、図２（ｃ）のＡ１１−Ａ１２縦断面図である。また、図２（ｄ）は、図２（ｃ）のＡ１−Ａ２横断面図、図２（ｅ）は、図２（ｃ）のＡ３−Ａ４横断面図、図２（ｆ）は、図２（ｃ）のＡ５−Ａ６横断面図、図２（ｇ）は、図２（ｃ）のＡ７−Ａ８横断面図である。
【００６３】
本発明の実施の形態２では、結合用線路導体２２０、２２１上に配置接続するビア導体２５０〜２６１、２７０〜２８１の配置法が、上記実施の形態１による結合器と異なり、２本の結合用線路導体２２０、２２１上に、疎部と密部とが形成される様に、第２誘電体基板２４２を貫通するスルーホール内に充填されたビア導体２５０〜２６１、２７０〜２８１を間欠的で不均一に配置接続したことを特徴とする。
なお、本実施の形態２では、密に配置接続した複数のビア導体を１組として密部を形成し、該密部を間欠的に配置して前記密部間に疎部を形成する。
【００６４】
具体的には、図２（ｃ）に示すように、例えば、ビア導体２５０〜２６１のうち、ビア導体２５０〜２５２、２５３〜２５５、２５６〜２５８、及び２５９〜２６１のそれぞれ３個のビア導体を１組として密に配置し、前記密に配置された１組のビア導体である密部の間隔を広くとるようにする。
このように配置したビア導体をさらに長蛇で高密度に配置すると、特にＬＴＣＣでは、絶縁体である誘電基板に歪みが生じてクラックが入ることを防止できる。
【００６５】
さらに、実施の形態１と同じく、偶モード時に結合用線路導体２２０、２２１と接地導体２０３〜２０８との間の、〔数１〕、〔数２〕、〔数４〕に示す静電容量Ｃ１が大きくなる以上に、奇モード時に結合用線路導体２２０と２２１間の対向する面積が増加し、〔数１〕、〔数４〕に示す静電容量Ｃ１２が増大する。従って、〔数４〕から明らかなように、本実施の形態２による結合器は、結合線路の結合度Ｋを増大させることができる。
【００６６】
このように本実施の形態２による結合器によれば、２本の結合用線路導体上に、３つのビア導体を１組とする密部を間欠的に配置したので、結合線路の結合度Ｋを増大させ、バンドパスフィルタに用いた場合、通過帯域を広げることができ、しかも多層の高密度実装が可能である。
【００６７】
（実施の形態３）
図３は、本発明の実施の形態３における１／４波長先端短絡型結合線路を用いた結合器を示す図である。なお、ビア導体３３０〜３３２、３３３〜３３５、３５０〜３６２、３７０〜３８２以外に関する構成は、実施の形態１と同様であり、その説明を省略する。
【００６８】
図３（ｃ）は、本発明の実施の形態３による結合器を上から見た平面図であり、上方から見えない部分は破線で示す。図３（ａ）は、図３（ｃ）のＡ９−Ａ１０縦断面図、図３（ｂ）は、図３（ｃ）のＡ１１−Ａ１２縦断面図である。また、図３（ｄ）は、図３（ｃ）のＡ１−Ａ２横断面図、図３（ｅ）は、図３（ｃ）のＡ３−Ａ４横断面図、図３（ｆ）は、図３（ｃ）のＡ５−Ａ６横断面図、図３（ｇ）は、図３（ｃ）のＡ７−Ａ８横断面図である。
【００６９】
本発明の実施の形態３による結合器は、結合用線路導体３２０、３２１上に配置接続するビア導体３５０〜３６２、３７０〜３８２の配置法が実施の形態１と異なり、第２誘電体基板３４２を貫通するスルーホール内に充填されたビア導体３５０〜３６２、３７０〜３８２を２本の結合用線路導体３２０、３２１上のそれぞれに、折れ線状に互いに対向するように配置接続したことを特徴とする。
【００７０】
本発明の実施の形態３では、図３（ｃ）に示すように、結合用線路導体３２０と３２１上にビア導体３５０〜３６２とビア導体３７０〜３８２とをそれぞれ千鳥状に配置し、結合用線路導体３２０と３２１上にそれぞれ配置されたビア導体３５０〜３６２とビア導体３７０〜３８２とがそれぞれ対向するようにする。
【００７１】
このようにビア導体を千鳥状に配置するとビア導体間隔を広く取ることができ、さらに長蛇で高密度に配置すると、特にＬＴＣＣでは、絶縁体である誘電基板に歪みが生じてクラックが入ることを防止できる。
【００７２】
さらに、実施の形態１と同じく、偶モード時に結合用線路導体３２０、３２１と接地導体３０３〜３０８との間の、〔数１〕、〔数２〕、〔数４〕に示す静電容量Ｃ１が大きくなる以上に、奇モード時に結合用線路導体３２０、３２１間の対向する面積が増加するので、〔数１〕、〔数４〕に示す静電容量Ｃ１２が増大する。
【００７３】
従って、〔数４〕から明らかなように、本実施の形態３による結合器は、結合線路の結合度Ｋを増大させることができる。
このように本実施の形態３による結合器によれば、ビア導体を千鳥状に配置したので、ビア導体間隔を広く取ることができ、結合線路の結合度Ｋを増大させ、バンドパスフィルタに用いた場合、通過帯域を広げることができ、しかも多層の高密度実装が可能である。
【００７４】
（実施の形態４）
図４は、本発明の実施の形態４における１／４波長先端短絡型結合線路を用いた結合器を示す図である。なお、ビア導体４３０〜４３２、４３３〜４３５、４５０〜４６３、４７０〜４８３、及び第２線路導体４２２、４２３以外に関する構成は、実施の形態１と同様であり、その説明を省略する。
【００７５】
図４（ｃ）は、本発明の実施の形態４による結合器を上から見た平面図であり、上方から見えない部分は破線で示す。図４（ａ）は、図４（ｃ）のＡ９−Ａ１０縦断面図、図４（ｂ）は、図４（ｃ）のＡ１１−Ａ１２縦断面図である。また、図４（ｄ）は、図４（ｃ）のＡ１−Ａ２横断面図、図４（ｅ）は、図４（ｃ）のＡ３−Ａ４横断面図、図４（ｆ）は、図４（ｃ）のＡ５−Ａ６横断面図、図４（ｇ）は、図４（ｃ）のＡ７−Ａ８横断面図である。
【００７６】
本発明の実施の形態４では、実施の形態１の構成と異なり、２本の第２線路導体４２２、４２３を第２誘電体基板４４２の下面と、第１誘電体基板４４１の上面との間に形成し、２本の結合用線路導体４２１、４２０と、２本の第２線路導体４２２、４２３が個々に導通している。
【００７７】
また、本実施の形態４では、図４（ｄ）〜（ｇ）で示すように、第２線路導体４２２、４２３が、結合用線路導体４２０、４２１とそれぞれ平行に第２誘電体基板４４２の下面と、第１誘電体基板４４１の上面との間の層に配置されている。
【００７８】
また、第２誘電体基板４４２を貫通するスルーホール内に充填されたビア導体４５０〜４６３、４７０〜４８３は、第２線路導体４２２、４２３と結合用線路導体４２０、４２１にそれぞれ挟まれ、接続されている。
ビア導体４５０〜４６３、及びビア導体４７０〜４８３の配置接続方法は、図４（ｃ）に示すように、実施の形態１の場合と同様、等間隔で、互いに近接して対向するように配置接続する。
【００７９】
このようにビア導体、結合用線路導体、及び第２線路導体を配置することによりビア導体間隔を広く取れ、さらにビア導体を長蛇で高密度に配置すると、特にＬＴＣＣでは、絶縁体である誘電基板に歪みが生じ、クラックが入ることを防止できる。
【００８０】
さらに、実施の形態１と同じく、偶モード時に結合用線路導体４２０、４２１と接地導体４０３〜４０８との間の、〔数１〕、〔数２〕、〔数４〕に示す静電容量Ｃ１が大きくなる以上に、奇モード時に結合用線路導体４２０、４２１間の対向する面積が増加するので、〔数１〕、〔数４〕に示す静電容量Ｃ１２が増大する。
従って、〔数４〕から明らかなように、本実施の形態４による結合器は、結合線路の結合度Ｋを増大させることができる。
【００８１】
このように本実施の形態４による結合器によれば、２本の結合用線路導体と２本の第２線路導体とが個々に導通し、且つ第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体が結合用線路導体と第２線路導体により挟まれ、接続されているので、ビア導体間隔を広く取ることができ、結合線路の結合度Ｋを増大させ、バンドパスフィルタに用いた場合、通過帯域を広げることができ、しかも多層の高密度実装が可能である。
【００８２】
（実施の形態５）
図５は、本発明の実施の形態５における１／４波長先端短絡型結合線路を用いた結合器を示す図である。なお、ビア導体５３０〜５３３、５３４〜５３７、５５０〜５６３、５７０〜５８３、及び第４誘電体基板５４３以外に関する構成は、実施の形態１と同様であり、その説明を省略する。
【００８３】
図５（ｃ）は、本発明の実施の形態５による結合器を上から見た平面図であり、上方から見えない部分は破線で示す。図５（ａ）は、図５（ｃ）のＡ９−Ａ１０縦断面図、図５（ｂ）は、図５（ｃ）のＡ１１−Ａ１２縦断面図である。また、図５（ｄ）は、図５（ｃ）のＡ１−Ａ２横断面図、図５（ｅ）は、図５（ｃ）のＡ３−Ａ４横断面図、図５（ｆ）は、図５（ｃ）のＡ５−Ａ６横断面図、図５（ｇ）は、図５（ｃ）のＡ７−Ａ８横断面図である。
【００８４】
本実施の形態５では、実施の形態１の構成と異なり、互いに平行な第１の面（下面）と第２の面（上面）を有する第４誘電体基板５４３を、第３誘電体基板５４２の第２の面上に形成して接地導体５０４を第４誘電体基板５４３の第２の面に形成する。そして、第２、第３の誘電体基板５４１、５４２の二層に、それぞれ結合度強化用のビア導体を形成することを特徴とする。
【００８５】
実施の形態５では、図５（ａ）及び（ｃ）に示すように、結合用線路導体５２０と５２１上に、第２誘電体基板５４１を貫通するスルーホール内に充填されたビア導体と、第３誘電体基板５４２を貫通するスルーホール内に充填されたビア導体とを、交互に配置接続する。
【００８６】
つまり、ビア導体５５０〜５６３のうちの、第３誘電体基板５４２側のビア導体５５０、５５２、５５４、５５６、５５８、５６０、５６２と、第２誘電体基板５４１側のビア導体５５１、５５３、５５５、５５７、５５９、５６１、５６３とを結合用線路導体５２１の長手方向に沿って、交互に配置接続するとともに、ビア導体５７０〜５８３のうちの第３誘電体基板５４２側のビア導体５７１、５７３、５７５、５７７、５７９、５８１、５８３と、第２誘電体基板５４１側のビア導体５７０、５７２、５７４、５７６、５７８、５８０、５８２とを結合用線路導体５２０の長手方向に沿って、交互に配置接続する。
【００８７】
このようにビア導体、及び誘電体基板を配置したことにより、ビア導体間隔を広く取れ、さらにビア導体を長蛇で高密度に配置すると、特にＬＴＣＣでは、絶縁体である誘電基板に歪みが生じ、クラックが入ることを防止できる。
【００８８】
さらに、実施の形態１と同じく、偶モード時に結合用線路導体５２０、５２１と接地導体５０３〜５０８との間の、〔数１〕、〔数２〕、〔数４〕に示す静電容量Ｃ１が大きくなる以上に、奇モード時に結合用線路導体５２０、５２１間の対向する面積が増加するので、〔数１〕、〔数４〕に示す静電容量Ｃ１２が増大する。
【００８９】
従って、〔数４〕から明らかなように、本実施の形態５による結合器は、結合線路の結合度Ｋを増大させることができる。
【００９０】
このように本実施の形態５による結合器によれば、誘電体基板を４層にし、２本の結合用線路導体のそれぞれに沿って、第２、第３の誘電体基板の二層に交互にビア導体を形成するようにしたので、ビア導体間隔を広く取ることができ、結合線路の結合度Ｋを増大させ、バンドパスフィルタに用いた場合、通過帯域を広げることができ、しかも多層の高密度実装が可能である。
【００９１】
（実施の形態６）
図７は、本発明の実施の形態６における１／４波長先端短絡型結合線路を用いた結合器を示す図である。なお、ビア誘電体７４４〜７５７、７８６〜７９９、以外に関する構成は、従来例図６と同様であり、その説明を省略する。
図７（ｃ）は、本発明の実施の形態６による結合器を上から見た平面図であり、上方から見えない部分は破線で示す。図７（ａ）は、図７（ｃ）のＡ９−Ａ１０縦断面図である。また、図７（ｄ）は、図７（ｃ）のＡ１−Ａ２横断面図、図７（ｅ）は、図７（ｃ）のＡ３−Ａ４横断面図、図７（ｆ）は、図７（ｃ）のＡ５−Ａ６横断面図、図７（ｇ）は、図７（ｃ）のＡ７−Ａ８横断面図である。
【００９２】
本実施の形態６では、従来例の構成と異なり、第１、第２の誘電体基板７３６、７３７の二層に、それぞれ結合度強化用のビア誘電体を形成することを特徴とする。
【００９３】
実施の形態６では、図７（ａ）及び（ｃ）に示すように、結合用線路導体７２０と７２１上に、第１誘電体基板７３６を貫通するスルーホール内に、第１の誘電体基板７３６より低い誘電率の誘電体を充填されたビア誘電体７４４〜７５７、７７２〜７８５と、第２誘電体基板７３７を貫通するスルーホール内に、第２の誘電体基板７３７より低い誘電率の誘電体を充填されたビア誘電体７５８〜７７１、７８６〜７９９とを、配置接続する。
【００９４】
さらに、実施の形態１と同じく、偶モード時に結合用線路導体７２０、７２１と接地導体７０３〜７０８との間の、〔数１〕、〔数２〕、〔数４〕に示す静電容量Ｃ１が小さくなるが、奇モード時に結合用線路導体７２０、７２１間の、〔数１〕、〔数４〕に示す静電容量Ｃ１２は同じである。
従って、〔数４〕から明らかなように、本実施の形態５による結合器は、結合線路の結合度Ｋを増大させることができる。
【００９５】
このように本実施の形態６による結合器によれば、２本の結合用線路導体のそれぞれに沿って、第１、第２の誘電体基板の二層に誘電体基板より低誘電率の誘電体を充填したビア誘電体を形成するようにしたので、結合線路の結合度Ｋを増大させ、バンドパスフィルタに用いた場合、通過帯域を広げることができ、しかも多層の高密度実装が可能である。
【００９６】
【発明の効果】
以上の説明から明らかなように本発明の請求項１による結合器は、互いに平行な第１の面、及び第２の面を有する第１誘電体基板と、前記第１誘電体基板の第２の面上に配置される、互いに平行な第１の面、及び第２の面を有する第２誘電体基板と、前記第１誘電体基板の第１の面に形成された接地導体と、前記第２誘電体基板の第２の面上に、互いに電磁的に結合するように近接し、それぞれ１／４波長の長さを有する２本の結合用線路導体と、前記第２誘電体基板を貫通する複数のスルーホール内に充填され、前記２本の結合用線路導体上に配置接続された複数のビア導体とを備えるようにしたので、偶モード時、前記結合用線路導体と接地導体との間の静電容量が大きくなる以上に、奇モード時、前記結合用線路導体間の対向する面積が増えることにより結合器の結合度を増大させることができるという効果がある。
【００９７】
また、本発明の請求項２による結合器は、請求項１記載の結合器において、前記第２誘電体基板の第２の面上に、互いに平行な第１の面、及び第２の面を有する第３誘電体基板を形成し、該第３誘電体基板の第２の面に接地導体を形成してなるようにしたので、接地導体で囲むことにより、他からの電磁妨害を受けにくくなり、高密度に部品を配置でき、装置の小型化を可能にすることができるという効果がある。
【００９８】
また、本発明の請求項３による結合器は、請求項１記載の結合器において、前記第１誘電体基板から前記第２誘電体基板までを貫通するスルーホール内に充填したビア導体を有し、前記２つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向しない先端を、前記第１誘電体基板の第１の面に形成された接地導体に短絡し、インターデジタル結合されてなるものであるので、インターデジタルフィルタを構成することができる。
【００９９】
また、本発明の請求項４による結合器は、請求項２記載の結合器において、前記第１誘電体基板から前記第３誘電体基板までを貫通するスルーホール内に充填したビア導体を有し、前記３つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向しない先端を、前記第１誘電体基板の第１の面及び前記第３誘電体基板の第２の面に形成された接地導体に短絡し、インターデジタル結合されたものであるので、インターデジタルフィルタを構成することができる。
【０１００】
また、本発明の請求項５による結合器は、請求項３または４記載の結合器において、前記２つ又は３つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向する先端を、前記第１誘電体基板の第１の面、或いは前記第１誘電体基板の第１の面及び前記第３誘電体基板の第２の面に形成された接地導体に短絡し、コムラインフィルタを構成することができる。
【０１０１】
また、本発明の請求項６による結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、前記２本の結合用線路導体上に、等間隔に配置接続されたものであるので、ビア導体を均一に高密度に配置することができるという効果がある。
【０１０２】
また、本発明の請求項７による結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、前記２本の結合用線路導体上に、長手方向に沿って一直線に配置接続されたものであるので、ビア導体を均一に高密度に、結合用線路導体上に配置することができるという効果がある。
【０１０３】
また、本発明の請求項８による結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、対向する前記２本の結合用線路導体上の、前記２本の結合用線路導体間の中心線に近接する側に配置接続されたものであるので、対向する多数の高密度なビア導体を出来るだけ近くに配置することによりさらに強い結合度を得ることができるという効果がある。
【０１０４】
また、本発明の請求項９による結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、対向する前記２本の結合用線路導体上の、前記２本の結合用線路導体間の中心線に近接する側に、等間隔で、長手方向に沿って一直線に配置接続されたものであるので、対向する多数の高密度なビア導体を出来るだけ近くに配置することによりさらに強い結合度を得ることができるという効果がある。
【０１０５】
また、本発明の請求項１０による結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、前記２本の結合用線路導体上に、疎部と密部を有するように配置接続されたものであるので、結合用線路導体上の一部分にビア導体を高密度に配置することができるという効果がある。
【０１０６】
また、本発明の請求項１１による結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、前記２本の結合用線路導体上に、複数の前記ビア導体を１組とする密部が間欠的に配置されるように配置接続されたものであるので、結合用線路導体上の一部分にビア導体を高密度に配置することができ、特にＬＴＣＣでは、絶縁体である誘電基板に歪みが生じ、クラックが入ることを防止することができるという効果がある。また、偶モード時、前記結合用線路導体と接地導体との間の静電容量が大きくなる以上に、奇モード時、前記結合用線路導体間の対向する面積が増えることにより結合器の結合度を増大させることができるという効果がある。
【０１０７】
また、本発明の請求項１２による結合器は、請求項１１記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、対向する前記２本の結合用線路導体上の、前記２本の結合用線路導体間の中心線に近接する側に、長手方向に沿って一直線に配置接続されたものであるので、対向する多数の高密度なビア導体を出来るだけ近くに配置することによりさらに強い結合度を得ることができるという効果がある。
【０１０８】
また、本発明の請求項１３による結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体を貫通する複数のスルーホール内に充填された複数のビア導体は、前記２本の結合用線路導体上に、それぞれ互いに対向するように折線状に配置接続されたものであるので、ビア導体の間隔を広く取ることができ、特にＬＴＣＣでは、絶縁体である誘導基板に歪が生じてクラックが入ることを防止できる。また、偶モード時、前記結合用線路導体と接地導体との間の静電容量が大きくなる以上に、奇モード時、前記結合用線路導体間の対向する面積が増えることにより結合器の結合度を増大させることができるという効果がある。
【０１０９】
また、本発明の請求項１４による結合器は、請求項３乃至５の何れかに記載の結合器において、前記第２誘電体を貫通する複数のスルーホール内に充填された複数のビア導体は、前記２本の結合用線路導体上に、それぞれ互いに対向するように千鳥状に配置接続されたものであるので、ビア導体の間隔を広く取ることができ、特にＬＴＣＣでは、絶縁体である誘導基板に歪が生じてクラックが入ることを防止できる。また、偶モード時、前記結合用線路導体と接地導体との間の静電容量が大きくなる以上に、奇モード時、前記結合用線路導体間の対向する面積が増えることにより結合器の結合度を増大させることができるという効果がある。
【０１１０】
また、本発明の請求項１５による結合器は、請求項３乃至５の何れかに記載の結合器において、前記第１誘電体基板の第２の面と、前記第２誘電体基板の第１の面との間に２本の第２線路導体をさらに有し、前記２本の結合用線路導体と前記２本の第２線路導体とが個々に導通し、且つ前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体が前記結合用線路導体と前記第２線路導体により挟まれ、接続されているので、ビア導体間隔を広く取ることができ、結合線路の結合度Ｋを増大させ、バンドパスフィルタに用いた場合、通過帯域を広げることができ、しかも多層の高密度実装ができるという効果がある。
【０１１１】
また、本発明の請求項１６による結合器は、請求項９記載の結合器において、前記第１誘電体基板の第２の面と、前記第２誘電体基板の第１の面との間に２本の第２線路導体をさらに有し、前記２本の結合用線路導体と前記２本の第２線路導体とが個々に導通し、且つ前記第２誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体が前記結合用線路導体と前記第２線路導体により挟まれ、接続されているので、ビア導体間隔を広く取ることができ、結合線路の結合度Ｋを増大させ、バンドパスフィルタに用いた場合、通過帯域を広げることができ、しかも多層の高密度実装ができるという効果がある。
【０１１２】
また、本発明の請求項１７による結合器は、互いに平行な第１の面、及び第２の面を有する第１誘電体基板と、前記第１誘電体基板の第２の面上に配置される、互いに平行な第１の面、及び第２の面を有する第２誘電体基板と、前記第２誘電体基板の第２の面上に配置される、互いに平行な第１の面、及び第２の面を有する第３誘電体基板と、前記第１誘電体基板の第１の面に形成された接地導体と、前記第２誘電体基板の第２の面上に、互いに電磁的に結合するように近接し、それぞれ１／４波長の長さを有する２本の結合用線路導体と、前記第２誘電体基板、または第３誘電体基板を貫通する複数のスルーホール内に充填され、前記２本の結合用線路導体上に配置接続された複数のビア導体とを備えるようにしたので、偶モード時、前記結合用線路導体と接地導体との間の静電容量が大きくなる以上に、奇モード時、前記結合用線路導体間の対向する面積が増えることにより結合器の結合度を増大させることができるという効果がある。
【０１１３】
また、本発明の請求項１８による結合器は、請求項１７記載の結合器において、前記第３誘電体基板の第２の面上に、互いに平行な第１の面と第２の面を有する第４誘電体基板を形成し、該第４誘電体基板の第２の面に接地導体を形成するようにしたので、接地導体で囲むことにより、他からの電磁妨害を受けにくくなり、高密度に部品を配置でき、装置の小型化を可能にすることができるという効果がある。
【０１１４】
また、本発明の請求項１９による結合器は、請求項１７記載の結合器において、前記第１誘電体基板から前記第３誘電体基板までを貫通するスルーホール内に充填したビア導体を有し、前記３つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向しない先端を、前記第１誘電体基板の第１の面に形成された接地導体に短絡し、インターデジタル結合されたものであるので、インターデジタルフィルタを構成することができる。
【０１１５】
また、本発明の請求項２０による結合器は、請求項１８記載の結合器において、前記第１誘電体基板から前記第４誘電体基板までを貫通するスルーホール内に充填したビア導体を有し、前記４つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向しない先端を、前記第１誘電体基板の第１の面及び前記第４誘電体基板の第２の面に形成された接地導体に短絡し、インターデジタル結合されたものであるので、インターデジタルフィルタを構成することができる。
【０１１６】
また、本発明の請求項２１による結合器は、請求項１９または２０記載の結合器において、前記３つ又は４つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向する先端を、前記第１誘電体基板の第１の面或いは、前記第１誘電体基板の第１の面及び前記第４誘電体基板の第２の面に形成された接地導体に短絡し、コムライン結合されたものであるので、コムラインフィルタを構成することができる。
【０１１７】
また、本発明の請求項２２による結合器は、請求項１９乃至２１の何れかに記載の結合器において、前記第２誘電体基板または第３誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、前記第２誘電体基板に充填されたビア導体と、前記第３誘電体基板に充填されたビア導体とが交互に配置されるように配置接続されたものであるので、ビア導体の間隔を広く取ることができるという効果がある。
【０１１８】
また、本発明の請求項２３による結合器は、請求項２２記載の結合器において、前記第２誘電体基板または第３誘電体基板を貫通する複数のスルーホール内に充填された複数のビア導体は、対向する前記２本の結合用線路導体上の、前記２本の結合用線路導体間の中心線に近接する側に、等間隔で、長手方向に沿って一直線に配置接続されたものであるので、ビア導体間隔を広く取れ、長蛇で高密度に配置すると、特にＬＴＣＣでは、絶縁体である誘電基板に歪みが生じ、クラックが入ることを防止することができるという効果がある。また、偶モード時、前記結合用線路導体と接地導体との間の静電容量が大きくなる以上に、奇モード時、前記結合用線路導体間の対向する面積が増えることにより結合器の結合度を増大させることができるという効果がある。
【０１１９】
また、本発明の請求項２４による結合器は、請求項９、１１、１４、１６または２３記載の結合器において、該結合器をフィルタとして用いるようにしたので、例えばバンドパスフィルタに用いた場合、通過帯域の幅を広げることができ、しかも多層の高密度実装が可能となる。
【０１２０】
また、本発明の請求項２５による結合器は、互いに平行な第１の面、及び第２の面を有する第１誘電体基板と、前記第１誘電体基板の第１の面に形成された接地導体と、前記第１誘電体基板の第２の面上に、互いに電磁的に結合するように近接し、それぞれ１／４波長の長さを有する２本の結合用線路導体と、前記第１誘電体基板を貫通する複数のスルーホール内に前記第１誘電体基板より低誘電率の誘電体を充填され、前記２本の結合用線路導体上に配置接続された複数のビア誘電体とを備えたことから、結合線路の結合度Ｋを増大させ、バンドパスフィルタに用いた場合、通過帯域を広げることができ、多層の高密度実装が可能である。
【０１２１】
また、本発明の請求項２６による結合器は、請求項２５記載の結合器において、前記第１誘電体基板の第２の面上に、互いに平行な第１の面、及び第２の面を有する第２誘電体基板を形成し、該第２誘電体基板の第２の面に接地導体を形成してなることから、接地導体で囲むことにより、他からの電磁妨害を受けにくくなり、高密度に部品を配置でき、装置の小型化を可能にすることができるという効果がある。
【０１２２】
また、本発明の請求項２７による結合器は、請求項２６記載の結合器において、前記第２誘電体基板を貫通する複数のスルーホール内に前記第２誘電体基板より低誘電率の誘電体を充填され、前記２本の結合用線路導体上に配置接続された複数のビア誘電体とを形成してなることから、結合線路の結合度Ｋを増大させ、バンドパスフィルタに用いた場合、通過帯域を広げることができ、多層の高密度実装が可能である。
【０１２３】
また、本発明の請求項２８による結合器は、請求項２５記載の結合器において、前記第１誘電体基板を貫通するスルーホール内に充填したビア導体を有し、前記１つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向しない先端を、前記第１誘電体基板の第１の面に形成された接地導体に短絡し、インターデジタル結合されてなるものであることから、インターデジタルフィルタを構成することができる。
【０１２４】
また、本発明の請求項２９による結合器は、請求項２７記載の結合器において、前記第１、２誘電体基板を貫通するスルーホール内に充填したビア導体を有し、前記２つの基板を貫通するスルーホール内に充填されたビア導体は、前記２本の結合用線路導体の互いに対向しない先端を、前記第１誘電体基板の第１の面及び前記第２誘電体基板の第２の面に形成された接地導体に短絡し、インターデジタル結合されてなるものであることから、インターデジタルフィルタを構成することができる。
【図面の簡単な説明】
【図１】本発明の実施の形態１による結合器を示す縦断面図（図（ａ）及び（ｂ））、上から見た平面図（図（ｃ））、及び横断面図（図（ｄ）、（ｅ）、（ｆ）、及び（ｇ））である。
【図２】本発明の実施の形態２による結合器を示す縦断面図（図（ａ）及び（ｂ））、上から見た平面図（図（ｃ））、及び横断面図（図（ｄ）、（ｅ）、（ｆ）、及び（ｇ））である。
【図３】本発明の実施の形態３による結合器を示す縦断面図（図（ａ）及び（ｂ））、上から見た平面図（図（ｃ））、及び横断面図（図（ｄ）、（ｅ）、（ｆ）、及び（ｇ））である。
【図４】本発明の実施の形態４による結合器を示す縦断面図（図（ａ）及び（ｂ））、上から見た平面図（図（ｃ））、及び横断面図（図（ｄ）、（ｅ）、（ｆ）、及び（ｇ））である。
【図５】本発明の実施の形態５による結合器を示す縦断面図（図（ａ）及び（ｂ））、上から見た平面図（図（ｃ））、及び横断面図（図（ｄ）、（ｅ）、（ｆ）、及び（ｇ））である。
【図６】従来の結合器を示す縦断面図（図（ａ）及び（ｂ））、上から見た平面図（図（ｃ））、及び横断面図（図（ｄ）、（ｅ）、（ｆ）、及び（ｇ））である。
【図７】本発明の実施の形態６による結合器を示す縦断面図（図（ａ））、上から見た平面図（図（ｃ））、及び横断面図（図（ｄ）、（ｅ）、（ｆ）、及び（ｇ））である。
【符号の説明】
１４１、２４１、３４１、４４１、５４０、６０１、７３６　第１誘電体基板
１４２、２４２、３４２、４４２、５４１、６０２、７３７　第２誘電体基板
１４３、２４３、３４３、４４３、５４２　　第３誘電体基板
１０３〜１０８、２０３〜２０８、３０３〜３０８、４０３〜４０８、５０３〜５０８、６０３〜６０８、７０３〜７０８　接地導体
１３０〜１３５、１５０〜１６３、１７０〜１８３、２３０〜２３５、２５０〜２６１、２７０〜２８１、３３０〜３３５、３５０〜３６２、３７０〜３８２、４３０〜４３５、４５０〜４６３、４７０〜４８３、５３０〜５３７、５５０〜５６３、５７０〜５８３、６３０〜６３３、７３１，７３２、７３４，７３５　ビア導体
１１０、１１１、２１０、２１１、３１０、３１１、４１０、４１１、５１０、５１１、６１０、６１１、７１０、７１１　信号入出力用端面電極
１１２、１１３、２１２、２１３、３１２、３１３、４１２、４１３、５１２、５１３、６１２、６１３、７１２、７１３　信号入出力用線路導体
１２０、１２１、２２０、２２１、３２０、３２１、４２０、４２１、５２０、５２１、６２０、６２１、７２０、７２１　結合用線路導体
４２２、４２３　　第２線路導体
５４３　　第４誘電体基板
７４４〜７５７、７５８〜７７１、７７２〜７８５、７８６〜７９９　ビア誘電体[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a coupler, and more particularly to a coupler used for a directional coupler in a microwave circuit or a filter, and particularly to a coupler having a large coupling degree when a strip line is used.
[0002]
[Prior art]
Conventionally, couplers have been applied to various microwave circuits such as filter circuits, balanced amplifier balanced mixers, and baluns.
FIG. 6 is a diagram showing a coupler using a conventional 1/4 wavelength tip short-circuited coupling line.
FIG. 6C is a plan view of the conventional coupler viewed from above, and a portion that cannot be seen from above is indicated by a broken line. 6A is a vertical cross-sectional view of A9-A10 in FIG. 6C, and FIG. 6B is a vertical cross-sectional view of A11-A12 in FIG. 6C. 6D is a cross-sectional view taken along line A1-A2 in FIG. 6C, FIG. 6E is a cross-sectional view taken along line A3-A4 in FIG. 6C, and FIG. 6 (c) is an A5-A6 cross-sectional view, and FIG. 6 (g) is an A7-A8 cross-sectional view of FIG. 6 (c).
[0003]
As shown in FIGS. 6A and 6B, in the conventional coupler, a ground conductor 603 is formed on a lower surface of a first dielectric substrate 601 and a ground conductor is formed on an upper surface of a second dielectric substrate 602. 604 are formed.
As shown in FIGS. 6E and 6F, a signal input / output line conductor 612 for a signal using a strip line is provided between the first dielectric substrate 601 and the second dielectric substrate 602. 613 and two coupling line conductors 620 and 621 which are close to each other so as to be electromagnetically coupled and are formed symmetrically with respect to the center line of the ground conductor 604.
[0004]
In addition, via conductors 630, 631, 632, and 633 are filled in through holes penetrating the first dielectric substrate 601 and the second dielectric substrate 602.
As shown in FIGS. 6A and 6B, the via conductors 630 and 631 are located at the position of the line A7-A8 in FIG. 6C, and the via conductors 632 and 633 are located at the position shown in FIG. At the position of the line A1-A2), the leading end portions of the coupling line conductors 620 and 621 that do not face each other are short-circuited to the ground conductor 604 and the ground conductor 603, and interdigitally coupled.
In addition, ground conductors 605, 606, 607, and 608 are formed on side surfaces of the first dielectric substrate 601 and the second dielectric substrate 602.
[0005]
As described above, in the coupler using the conventional 1/4 wavelength tip short-circuited coupling line, the coupling line conductors 620 and 621 are surrounded by the ground conductors 603, 604, 605, 606, 607, and 608, and the strip line is formed. It is configured using.
In a conventional coupler using a quarter-wavelength front-end short-circuited coupling line, the signal input / output line conductors 612 and 613 are connected to the coupling line conductors 620 and 621 in a point-symmetric manner so as not to face each other. The input and output impedance is determined by the position and the distance from the tip of the coupling line conductors 620 and 621.
[0006]
Further, the signal input / output end face electrodes 610 and 611 at the time of mounting on a printed board are formed on side surfaces of the first dielectric substrate 601 and the second dielectric substrate 602, respectively, and the signal input / output line conductors 612 and 612, respectively. 613.
Here, each of the coupling line conductors 620 and 621 has a length in the longitudinal direction of 波長 wavelength, that is, a length in the longitudinal direction of ４λg (λg is a guide wavelength).
[0007]
A quasi-TEM approximation using a known even-odd orthogonal mode excitation method (J. Reed) or a "practical microwave technology" When the analysis is performed using the even-mode and odd-mode analysis method disclosed in “Lecture—Theory and Practice—” (see Non-Patent Document 1), in-phase excitation occurs in the even mode, while in the odd mode, Excitation phase is reversed.
[0008]
Here, the characteristic impedances Zodd and Zeven of the coupled transmission line in the odd and even modes are represented by [Equation 1] and [Equation 2].
[Equation 1] Zodd = 1 / (Vp × (C1 + 2 × C12)) [Ω]
[Equation 2] Zero = 1 / (Vp × C1) [Ω]
Vp is the speed at which the electromagnetic field propagates through the transmission path. C1 is the capacitance per unit length between the coupling line conductors 620 and 621, which are strip lines, and the ground conductors 603 and 604. C12 is the unit capacitance between the coupling line conductors 620 and 621. The capacitance per length.
[0009]
Using the characteristic impedances Zodd and Zeven, the coupling degree K of the coupler using the conventional 1/4 wavelength short-circuited coupling line can be expressed by the following equation.
[Equation 3] K = 20 log {(Zeven-Zodd) / ({2 × (Zeven + Zodd))} [dB]
By substituting [Equation 1] and [Equation 2] into [Equation 3], the following [Equation 4] indicating the degree of coupling K is obtained.
[Equation 4] K = 20log {C12 / ({2 × (C1 + C12))}}
As described above, the coupling degree K of the coupler using the conventional 1/4 wavelength short-circuited coupling line is represented.
Further, a quarter-wavelength coupled line type directional coupler having a larger coupling degree than the above-mentioned conventional example has been proposed (Patent Document 1).
[0010]
[Non-patent document 1]
Yoshihiro Konishi, "Practical Microwave Technology Course-Theory and Practice", Keilabo Publishing, June 2001, Volume 3
[Patent Document 1]
JP-A-6-350313 (pages 1-13)
[0011]
[Problems to be solved by the invention]
However, the conventional coupler using a stripline has a problem that the coupling degree K cannot be increased unless the interval between the two coupling line conductors 620 and 621 is extremely reduced. However, the minimum spacing distance at which the two coupling line conductors 620 and 621 can be arranged is limited due to manufacturing problems.
Recently, low-temperature fired ceramics (LTCC) have been developed and it has become possible to make the insulating layer thinner and smaller. However, when the insulating layer is made thinner, the coupling line conductors 620 and 621 which are strip lines are formed. The capacitance C1 per unit length between the ground conductors 603 and 604 is increased, and the coupling K of the coupling line is further reduced as shown in [Equation 4].
[0012]
In order to solve this problem, a quarter-wavelength coupled line type directional coupler improved from the above-mentioned conventional example has been proposed (Patent Document 1).
[0013]
However, although the prior art disclosed in the above publication mainly relates to a line conductor made of a microstrip, it is susceptible to electromagnetic interference from other parts, and components are provided above and below the 波長 wavelength coupling line type directional coupler. However, it is not suitable for high-density mounting because it cannot be arranged, and there is a problem that it cannot be downsized.
[0014]
SUMMARY OF THE INVENTION The present invention has been made to solve the above-described conventional problems, and has as its object to provide a coupler having a high degree of coupling K, which is small and can be mounted at a high density as compared with the conventional example. I do.
[0015]
[Means for Solving the Problems]
In order to solve the conventional problem, a coupler according to claim 1 of the present invention comprises a first dielectric substrate having a first surface and a second surface parallel to each other, and a first dielectric substrate having a first surface and a second surface. A second dielectric substrate having a first surface and a second surface parallel to each other and disposed on a second surface; and a ground conductor formed on the first surface of the first dielectric substrate. Two coupling line conductors which are close to each other electromagnetically coupled to each other on the second surface of the second dielectric substrate, and each have a length of 1/4 wavelength; And a plurality of via conductors filled in a plurality of through holes penetrating the substrate and arranged and connected on the two coupling line conductors.
[0016]
A coupler according to a second aspect of the present invention is the coupler according to the first aspect, wherein a first surface and a second surface parallel to each other are provided on the second surface of the second dielectric substrate. And a ground conductor is formed on the second surface of the third dielectric substrate.
[0017]
According to a third aspect of the present invention, there is provided the coupler according to the first aspect, further comprising a via conductor filled in a through hole penetrating from the first dielectric substrate to the second dielectric substrate. The via conductor filled in the through-hole penetrating the two substrates is formed such that the ends of the two coupling line conductors that do not face each other are formed on the first surface of the first dielectric substrate. It is characterized by being short-circuited to a ground conductor and interdigitally coupled.
[0018]
A coupler according to a fourth aspect of the present invention is the coupler according to the second aspect, further comprising a via conductor filled in a through hole extending from the first dielectric substrate to the third dielectric substrate. The via conductor filled in the through-hole penetrating the three substrates may be configured such that tips of the two coupling line conductors that do not face each other are connected to the first surface of the first dielectric substrate and the third surface. It is characterized by being short-circuited to a ground conductor formed on the second surface of the dielectric substrate and interdigitally coupled.
[0019]
The coupler according to claim 5 of the present invention is the coupler according to claim 3 or 4, wherein the via conductor filled in a through hole penetrating the two or three substrates is the two conductors. Opposite ends of the coupling line conductors are formed on the first surface of the first dielectric substrate, or the first surface of the first dielectric substrate and the second surface of the third dielectric substrate. A short circuit to the ground conductor, and a comb line coupling.
[0020]
According to a sixth aspect of the present invention, there is provided the coupler according to any one of the third to fifth aspects, wherein the plurality of vias are filled in the plurality of through holes penetrating the second dielectric substrate. The conductor is arranged and connected at equal intervals on the two coupling line conductors.
[0021]
According to a seventh aspect of the present invention, there is provided the coupler according to any one of the third to fifth aspects, wherein a plurality of vias are filled in a plurality of through holes penetrating the second dielectric substrate. The conductor is arranged and connected in a straight line along the longitudinal direction on the two coupling line conductors.
[0022]
The coupler according to claim 8 of the present invention is the coupler according to any one of claims 3 to 5, wherein the plurality of vias are filled in the plurality of through holes penetrating the second dielectric substrate. The conductor is arranged and connected on the side of the two coupling line conductors facing each other on the side close to the center line between the two coupling line conductors.
[0023]
According to a ninth aspect of the present invention, there is provided the coupler according to any one of the third to fifth aspects, wherein the plurality of vias are filled in the plurality of through holes penetrating the second dielectric substrate. The conductors are arranged and connected in a straight line along the longitudinal direction at equal intervals on a side near the center line between the two coupling line conductors on the two coupling line conductors facing each other. It is characterized by having.
[0024]
According to a tenth aspect of the present invention, there is provided the coupler according to any one of the third to fifth aspects, wherein a plurality of vias are filled in a plurality of through holes penetrating the second dielectric substrate. The conductor is arranged and connected on the two coupling line conductors so as to have a sparse portion and a dense portion.
[0025]
The coupler according to claim 11 of the present invention is the coupler according to any one of claims 3 to 5, wherein the plurality of vias filled in the plurality of through holes penetrating the second dielectric substrate. The conductor is arranged and connected on the two coupling line conductors such that a dense portion having a plurality of the via conductors as a set is intermittently arranged. .
[0026]
In the coupler according to a twelfth aspect of the present invention, in the coupler according to the eleventh aspect, a plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate are opposed to each other. The two coupling line conductors are arranged and connected in a straight line along the longitudinal direction on the side close to the center line between the two coupling line conductors. .
[0027]
The coupler according to claim 13 of the present invention is the coupler according to any one of claims 3 to 5, wherein a plurality of via conductors are filled in a plurality of through holes penetrating the second dielectric. Are characterized in that they are arranged and connected on the two coupling line conductors in a folded line shape so as to face each other.
[0028]
The coupler according to claim 14 of the present invention is the coupler according to any one of claims 3 to 5, wherein the plurality of via conductors are filled in the plurality of through holes penetrating the second dielectric. Are arranged and connected on the two coupling line conductors in a staggered manner so as to face each other.
[0029]
The coupler according to claim 15 of the present invention is the coupler according to any one of claims 3 to 5, wherein the second surface of the first dielectric substrate and the second surface of the second dielectric substrate are connected to each other. And two second line conductors between the first and second surfaces, the two coupling line conductors and the two second line conductors being individually conductive, and the second dielectric substrate A plurality of via conductors filled in a plurality of through holes penetrating through are connected and connected by the coupling line conductor and the second line conductor.
[0030]
A coupler according to claim 16 of the present invention is the coupler according to claim 9, wherein the second surface of the first dielectric substrate and the first surface of the second dielectric substrate are arranged between , Further comprising two second line conductors, the two coupling line conductors and the two second line conductors being individually conductive, and a plurality of through holes penetrating the second dielectric substrate. A plurality of via conductors filled in the hole are sandwiched and connected by the coupling line conductor and the second line conductor.
[0031]
A coupler according to claim 17 of the present invention is arranged on a first dielectric substrate having a first surface and a second surface parallel to each other, and on a second surface of the first dielectric substrate. A second dielectric substrate having a first surface and a second surface parallel to each other, and a first surface parallel to each other, disposed on a second surface of the second dielectric substrate; And a third dielectric substrate having a second surface, a ground conductor formed on the first surface of the first dielectric substrate, and an electromagnetic conductor on the second surface of the second dielectric substrate. And two coupling line conductors each having a length of １／ wavelength and being filled in a plurality of through holes penetrating through the second dielectric substrate or the third dielectric substrate. And a plurality of via conductors arranged and connected on the two coupling line conductors.
[0032]
The coupler according to claim 18 of the present invention is the coupler according to claim 17, wherein a first surface and a second surface parallel to each other are formed on the second surface of the third dielectric substrate. And forming a ground conductor on the second surface of the fourth dielectric substrate.
[0033]
A coupler according to a nineteenth aspect of the present invention is the coupler according to the seventeenth aspect, further comprising a via conductor filled in a through hole penetrating from the first dielectric substrate to the third dielectric substrate. The via conductor filled in the through-hole penetrating the three substrates is formed by forming the ends of the two coupling line conductors that do not face each other on the first surface of the first dielectric substrate. It is characterized by being short-circuited to a ground conductor and interdigitally coupled.
[0034]
A coupler according to a twentieth aspect of the present invention is the coupler according to the eighteenth aspect, further comprising a via conductor filled in a through hole penetrating from the first dielectric substrate to the fourth dielectric substrate. The via conductor filled in the through-hole penetrating the four substrates may be configured such that tips of the two coupling line conductors that do not face each other are connected to the first surface of the first dielectric substrate and the fourth surface. It is characterized by being short-circuited to a ground conductor formed on the second surface of the dielectric substrate and interdigitally coupled.
[0035]
Also, in the coupler according to claim 21 of the present invention, in the coupler according to claim 19 or 20, the via conductor filled in a through hole penetrating the three or four substrates is the two conductors. Opposite ends of the coupling line conductors are formed on the first surface of the first dielectric substrate, or the first surface of the first dielectric substrate and the second surface of the fourth dielectric substrate. And short-circuited to the ground conductor, and connected by a comb line.
[0036]
A coupler according to a twenty-second aspect of the present invention is the coupler according to any one of the nineteenth to twenty-first aspects, wherein the plurality of through holes penetrate the second dielectric substrate or the third dielectric substrate. The filled plurality of via conductors are arranged and connected such that the via conductor filled in the second dielectric substrate and the via conductor filled in the third dielectric substrate are alternately arranged. It is characterized by having.
[0037]
According to a twenty-third aspect of the present invention, in the coupler according to the twenty-second aspect, the plurality of vias filled in the plurality of through holes penetrating the second dielectric substrate or the third dielectric substrate. The conductors are arranged and connected in a straight line along the longitudinal direction at equal intervals on the side of the two coupling line conductors facing each other on the side close to the center line between the two coupling line conductors. It is characterized by being.
[0038]
A coupler according to claim 24 of the present invention is the coupler according to claim 9, 11, 14, 16, or 23, wherein the coupler is used as a filter.
[0039]
The coupler according to claim 25 of the present invention is formed on a first dielectric substrate having a first surface and a second surface parallel to each other, and on a first surface of the first dielectric substrate. Grounded conductor, and two coupling line conductors which are close to each other on the second surface of the first dielectric substrate so as to be electromagnetically coupled to each other and each have a length of １／ wavelength, A plurality of via dielectrics filled in a plurality of through-holes penetrating the first dielectric substrate with a dielectric having a lower dielectric constant than the first dielectric substrate and arranged and connected on the two coupling line conductors And a body.
[0040]
A coupler according to a twenty-sixth aspect of the present invention is the coupler according to the twenty-fifth aspect, wherein a first surface parallel to the first surface and a second surface parallel to the second surface of the first dielectric substrate are provided. A second dielectric substrate having a surface is formed, and a ground conductor is formed on a second surface of the second dielectric substrate.
[0041]
The coupler according to claim 27 of the present invention is the coupler according to claim 26, wherein the plurality of through holes penetrating the second dielectric substrate have lower permittivity than the second dielectric substrate. A plurality of via dielectrics filled with a dielectric and arranged and connected on the two coupling line conductors are formed.
[0042]
A coupler according to a twenty-eighth aspect of the present invention is the coupler according to the twenty-fifth aspect, further comprising a via conductor filled in a through-hole penetrating the first dielectric substrate. The via conductor filled in the penetrating through hole short-circuits the opposite ends of the two coupling line conductors to the ground conductor formed on the first surface of the first dielectric substrate, and It is characterized by being digitally combined.
[0043]
A coupler according to a twenty-ninth aspect of the present invention is the coupler according to the twenty-seventh aspect, further comprising a via conductor filled in a through hole penetrating the first and second dielectric substrates. A via conductor filled in a through-hole penetrating the substrate may be configured such that tips of the two coupling line conductors that do not face each other are connected to the first surface of the first dielectric substrate and the second surface of the second dielectric substrate. 2 is short-circuited to the ground conductor formed on the second surface and is interdigitally coupled.
[0044]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(Embodiment 1)
FIG. 1 is a diagram showing a coupler using a 波長 wavelength short-circuited coupling line according to Embodiment 1 of the present invention.
FIG. 1C is a plan view of the coupler according to the first embodiment of the present invention as viewed from above, and a portion that cannot be seen from above is indicated by a broken line. 1A is a longitudinal sectional view of A9-A10 in FIG. 1C, and FIG. 1B is a longitudinal sectional view of A11-A12 in FIG. 1C. 1 (d) is a cross-sectional view taken along line A1-A2 of FIG. 1 (c), FIG. 1 (e) is a cross-sectional view taken along line A3-A4 of FIG. 1 (c), and FIG. 1 (c) is an A5-A6 cross-sectional view, and FIG. 1 (g) is an A7-A8 cross-sectional view of FIG. 1 (c).
[0045]
As shown in FIGS. 1A and 1B, the first, second, and third dielectric substrates 141, 142, and 143 have a first surface (lower surface) and a second surface, respectively, that are parallel to each other. It has a surface (upper surface). In the coupler according to the first embodiment of the present invention, the ground conductor 103 is formed on the lower surface of the first dielectric substrate 141, and the ground conductor 104 is formed on the upper surface of the third dielectric substrate 143.
[0046]
As shown in FIGS. 1E and 1F, a signal for signal input / output using a strip line is provided between the lower surface of the third dielectric substrate 143 and the upper surface of the second dielectric substrate 142. The line conductors 112 and 113 and two coupling line conductors 120 and 121 which are close to each other so as to be electromagnetically coupled and formed symmetrically with respect to the center line of the ground conductor 104 are formed.
[0047]
Here, the coupling line conductors 120 and 121 have a length in the longitudinal direction of すなわち wavelength, that is, a length in the longitudinal direction of ４λg (λg is a guide wavelength), and resonance occurs at this frequency. I do.
Via conductors 130 to 132 and via conductors 133 to 135 are filled in through holes penetrating the first, second, and third dielectric substrates 141 to 143.
[0048]
As shown in FIGS. 1C and 1G, the via conductors 130 to 132 are located at the positions of the lines A7 to A8 in FIG. 1C, and are also shown in FIGS. 1B, 1C, and 1D. As shown in FIG. 1), the via conductors 133 to 135 are formed by connecting the leading end portions of the coupling line conductors 120 and 121 which are not opposed to each other to the ground conductor 104 and the ground conductor 103 at the position of the line A1-A2 in FIG. Short circuit and interdigital coupling.
Since the coupling line conductors 120 and 121 have a length in the longitudinal direction of 1/4 wavelength as described above, they resonate at a frequency of 1/4 wavelength and operate as a bandpass filter at the resonance frequency. I do.
[0049]
Also, on the side surfaces of the first, second, and third dielectric substrates 141 to 143, the ground conductors 105 and 106 shown in FIGS. By forming 107 and 108 and surrounding the coupling line conductors 120 and 121 with the ground conductors 105 to 108, that is, by using a strip line, it becomes difficult to receive electromagnetic interference from others, and components can be arranged at high density. The size of the device can be reduced.
[0050]
The signal input / output line conductors 112 and 113 are connected to the coupling line conductors 120 and 121 so as not to face each other, that is, in a point-symmetrical manner, as shown in FIG. The input / output impedance is determined by the distance from the tip of the conductors 120 and 121.
Also, as shown in FIGS. 7E and 7F, the signal input / output end electrodes 110 and 111 when the printed circuit board is mounted are formed on the side surfaces of the first, second and third dielectric substrates 141 to 143, and the signal It is connected to the input / output line conductors 112 and 113.
[0051]
Also, as shown in FIG. 1C, the via conductors 150 to 163 filled in the through holes penetrating the second dielectric substrate 142 are formed on the coupling line conductor 121 as shown in FIG. And the via conductors 170 to 183 similarly filled in the through holes penetrating the second dielectric substrate 142 are arranged and connected (not shown) on the coupling line conductor 120.
[0052]
Here, the via conductors 150 to 163 and the via conductors 170 to 183 are arranged and connected along the longitudinal direction of the coupling line conductors 120 and 121, as shown in FIGS. 1A and 1C. The via conductors 150 to 163 and the via conductors 170 to 183 are arranged and connected in a straight line at intervals so that the via conductors are close to each other and face each other.
[0053]
Specifically, as shown in FIG. 1C, the via conductors 150 to 163 are two coupling line conductors 120 and 121 more than on the center line (A11-A12 line) of the coupling line conductor 121. It is arranged on the A9-A10 line on the center side between them.
That is, the via conductors 150 to 163 and the via conductors 170 to 183 are closer to the center between the two coupling line conductors 120 and 121 than the respective centers of the coupling line conductors 120 and 121, respectively. Along the conductors 120 and 121, they are arranged linearly uniformly and densely so as to face each other.
Then, with the above-described configuration, a coupler that is an interdigital filter using the 1/4 wavelength tip short-circuited coupling line shown in FIG. 1 is obtained.
[0054]
Next, the operation and operation of the coupler using the 1/4 wavelength tip short-circuited coupling line configured as described above will be described.
In the substrate using LTCC, the vertical length of the via conductors 150 to 163 and 170 to 183, that is, the thickness of the dielectric substrate is several tens to hundreds of microns, while the thickness of the coupling line conductors 120 and 121 is Since it is several microns, the vertical length of the via conductors 150 to 163 and 170 to 183 is sufficiently larger than the thickness of the coupling line conductors 120 and 121. Therefore, by arranging and connecting the via conductors 150 to 163 and 170 to 183, in the even mode, [Equation 1], [Equation 2], and [Equation 2] between the coupling line conductors 120 and 121 and the ground conductors 103 to 108 are provided. In the odd mode, the facing area between the coupling line conductors 120 and 121 increases more than the capacitance C1 shown in [Equation 4] increases, and the capacitance shown in [Equation 1] and [Equation 4] increases. C12 increases.
[0055]
Therefore, as is apparent from (Equation 4), the coupler according to the first embodiment can increase the degree of coupling K of the coupling line.
Furthermore, by bringing the opposing via conductors 150 to 163 and 170 to 183 close to each other, a higher degree of coupling can be obtained.
[0056]
As described above, according to the coupler of the first embodiment, by arranging and connecting the via conductor on the coupling line, the capacitance C12 is increased, the coupling degree K is increased, and the bandpass filter is increased. In this case, the width of the pass band can be widened, and high-density multilayer mounting is possible.
[0057]
Further, in the coupler according to the first embodiment, by arranging a large number of opposed high-density via conductors as close as possible, it is possible to obtain a stronger coupling degree. The characteristics of these coupled lines can be confirmed using an analysis method such as the FDTD method and the finite element method.
[0058]
In the first embodiment, the third dielectric substrate 143 and the ground conductor 104 are provided. However, the third dielectric substrate 143 and the ground conductor 104 are eliminated, and the third dielectric substrate 143 and the ground conductor 104 are formed. It may be constituted by a coupled line.
In the first embodiment, the via conductors 130 to 135 may be used to short-circuit the opposite end portions of the coupling line conductors 120 and 121 to the ground conductors 103 and 104 and to perform comb line coupling. In this case, it is possible to obtain a coupler which is a comb line filter using a 1/4 wavelength tip short-circuit type coupling line.
[0059]
Although the first embodiment includes the via conductors 130 to 135, the via conductors 130 to 135 may be eliminated, and the coupling line conductors 120 and 121 may be used for the directional coupler.
[0060]
Further, in the first embodiment, the length in the longitudinal direction of the coupling line conductors 120 and 121 is set to 波長 wavelength, that is, １／ λg (λg is a guide wavelength). By attaching a condenser to the open end of the above, it can be made shorter than １／ λg.
Further, in the first embodiment, the two coupling line conductors 120 and 121 are formed symmetrically with respect to the center line of the ground conductor 104, but the two coupling line conductors 120 and 121 are formed as ground conductors 104. Does not need to be formed at the center, and the same performance can be obtained even if it is arranged at an arbitrary position.
[0061]
(Embodiment 2)
FIG. 2 is a diagram showing a coupler using a 1/4 wavelength tip short-circuited coupling line according to Embodiment 2 of the present invention. The configuration other than the via conductors 230 to 232, 233 to 235, 250 to 261 and 270 to 281 is the same as that of the first embodiment, and a description thereof will be omitted.
[0062]
FIG. 2C is a plan view of the coupler according to the second embodiment of the present invention as viewed from above, and a portion that cannot be seen from above is indicated by a broken line. 2A is a vertical sectional view of A9-A10 in FIG. 2C, and FIG. 2B is a vertical sectional view of A11-A12 in FIG. 2C. 2D is a cross-sectional view of A1-A2 in FIG. 2C, FIG. 2E is a cross-sectional view of A3-A4 in FIG. 2C, and FIG. 2 (c) is an A5-A6 cross-sectional view, and FIG. 2 (g) is an A7-A8 cross-sectional view of FIG. 2 (c).
[0063]
In the second embodiment of the present invention, the arrangement method of via conductors 250 to 261 and 270 to 281 arranged and connected on coupling line conductors 220 and 221 is different from the coupler according to the first embodiment in that two couplings are used. The via conductors 250 to 261 and 270 to 281 filled in through holes penetrating through the second dielectric substrate 242 are intermittently formed so that sparse portions and dense portions are formed on the line conductors 220 and 221 for use. And are arranged and connected unevenly.
In the second embodiment, a dense portion is formed as a set of a plurality of via conductors densely arranged and connected, and the dense portion is intermittently arranged to form a sparse portion between the dense portions.
[0064]
Specifically, as shown in FIG. 2C, for example, among the via conductors 250 to 261, three via conductors 250 to 252, 253 to 255, 256 to 258, and 259 to 261 are respectively provided. Are densely arranged as a set, and the interval of the dense portion, which is the set of via conductors densely arranged, is widened.
By arranging the via conductors thus arranged in a long and dense manner, especially in LTCC, it is possible to prevent the dielectric substrate, which is an insulator, from being distorted and cracking.
[0065]
Further, as in the first embodiment, the capacitance C1 shown in [Equation 1], [Equation 2], and [Equation 4] between the coupling line conductors 220 and 221 and the ground conductors 203 to 208 in the even mode. Is larger, the area of the coupling line conductors 220 and 221 facing each other increases in the odd mode, and the capacitance C12 shown in [Equation 1] and [Equation 4] increases. Therefore, as is apparent from [Equation 4], the coupler according to the second embodiment can increase the degree of coupling K of the coupling line.
[0066]
As described above, according to the coupler according to the second embodiment, since the dense portion having three via conductors as a set is intermittently arranged on the two coupling line conductors, the coupling degree K of the coupling line is reduced. When the filter is used for a band pass filter, the pass band can be widened, and high-density mounting of multiple layers is possible.
[0067]
(Embodiment 3)
FIG. 3 is a diagram showing a coupler using a 1/4 wavelength tip short-circuited coupling line according to Embodiment 3 of the present invention. The configuration other than the via conductors 330 to 332, 333 to 335, 350 to 362, and 370 to 382 is the same as that of the first embodiment, and a description thereof will be omitted.
[0068]
FIG. 3C is a plan view of the coupler according to the third embodiment of the present invention as viewed from above, and a portion that cannot be seen from above is indicated by a broken line. FIG. 3A is a longitudinal sectional view of A9-A10 in FIG. 3C, and FIG. 3B is a longitudinal sectional view of A11-A12 in FIG. 3C. 3D is an A1-A2 cross-sectional view of FIG. 3C, FIG. 3E is an A3-A4 cross-sectional view of FIG. 3C, and FIG. 3 (c) is an A5-A6 cross-sectional view, and FIG. 3 (g) is an A7-A8 cross-sectional view of FIG. 3 (c).
[0069]
The coupler according to the third embodiment of the present invention is different from the first embodiment in the method of arranging via conductors 350 to 362 and 370 to 382 arranged and connected on coupling line conductors 320 and 321. The via conductors 350 to 362 and 370 to 382 filled in the through holes penetrating through are connected to the two coupling line conductors 320 and 321 so as to face each other in a polygonal line shape. I do.
[0070]
In the third embodiment of the present invention, as shown in FIG. 3C, via conductors 350 to 362 and via conductors 370 to 382 are arranged in a zigzag pattern on coupling line conductors 320 and 321, respectively. The via conductors 350 to 362 and the via conductors 370 to 382 arranged on the line conductors 320 and 321 are respectively opposed to each other.
[0071]
By arranging the via conductors in a staggered manner as described above, the via conductor interval can be widened. Further, when the via conductors are arranged in a long and high density, especially in the LTCC, the dielectric substrate which is an insulator may be distorted and cracked. Can be prevented.
[0072]
Further, similarly to the first embodiment, the capacitance C1 shown in [Equation 1], [Equation 2], and [Equation 4] between the coupling line conductors 320 and 321 and the ground conductors 303 to 308 in the even mode. When the odd mode is reached, the facing area between the coupling line conductors 320 and 321 increases in the odd mode, so that the capacitance C12 shown in [Equation 1] and [Equation 4] increases.
[0073]
Therefore, as is apparent from [Equation 4], the coupler according to the third embodiment can increase the degree of coupling K of the coupling line.
As described above, according to the coupler according to the third embodiment, the via conductors are arranged in a staggered manner, so that the interval between the via conductors can be widened, the coupling K of the coupling line can be increased, and the coupler can be used for a bandpass filter. In this case, the pass band can be widened, and a multilayer high-density mounting is possible.
[0074]
(Embodiment 4)
FIG. 4 is a diagram showing a coupler using a 1/4 wavelength tip short-circuited coupling line according to Embodiment 4 of the present invention. The configurations other than the via conductors 430 to 432, 433 to 435, 450 to 463, 470 to 483, and the second line conductors 422 and 423 are the same as those of the first embodiment, and the description thereof will be omitted.
[0075]
FIG. 4C is a plan view of the coupler according to the fourth embodiment of the present invention as viewed from above, and a portion that cannot be seen from above is indicated by a broken line. 4A is a vertical cross-sectional view of A9-A10 in FIG. 4C, and FIG. 4B is a vertical cross-sectional view of A11-A12 in FIG. 4C. 4D is a cross-sectional view of A1-A2 in FIG. 4C, FIG. 4E is a cross-sectional view of A3-A4 in FIG. 4C, and FIG. 4 (c) is an A5-A6 cross-sectional view, and FIG. 4 (g) is an A7-A8 cross-sectional view of FIG. 4 (c).
[0076]
In the fourth embodiment of the present invention, unlike the configuration of the first embodiment, two second line conductors 422 and 423 are provided between the lower surface of the second dielectric substrate 442 and the upper surface of the first dielectric substrate 441. And the two coupling line conductors 421 and 420 and the two second line conductors 422 and 423 are individually conductive.
[0077]
Further, in the fourth embodiment, as shown in FIGS. 4D to 4G, the second line conductors 422 and 423 are connected to the second dielectric substrate 442 in parallel with the coupling line conductors 420 and 421, respectively. It is arranged in a layer between the lower surface and the upper surface of the first dielectric substrate 441.
[0078]
The via conductors 450 to 463 and 470 to 483 filled in the through holes penetrating the second dielectric substrate 442 are sandwiched between the second line conductors 422 and 423 and the coupling line conductors 420 and 421, respectively, for connection. Have been.
As shown in FIG. 4C, the via conductors 450 to 463 and the via conductors 470 to 483 are arranged and connected at equal intervals and close to each other, as in the first embodiment. Connecting.
[0079]
By arranging the via conductor, the coupling line conductor, and the second line conductor in this manner, the interval between the via conductors can be widened, and the via conductors can be arranged long and densely. Can be prevented from being cracked.
[0080]
Further, similarly to the first embodiment, the capacitance C1 shown in [Equation 1], [Equation 2], and [Equation 4] between the coupling line conductors 420 and 421 and the ground conductors 403 to 408 in the even mode. When the odd mode is exceeded, the facing area between the coupling line conductors 420 and 421 increases in the odd mode, so that the capacitance C12 shown in [Equation 1] and [Equation 4] increases.
Therefore, as is apparent from [Equation 4], the coupler according to the fourth embodiment can increase the degree of coupling K of the coupling line.
[0081]
As described above, according to the coupler according to the fourth embodiment, the two coupling line conductors and the two second line conductors are individually conductive, and the plurality of through holes penetrate the second dielectric substrate. Since a plurality of via conductors filled in the inside are sandwiched and connected by the coupling line conductor and the second line conductor, the via conductor interval can be widened, the coupling degree K of the coupling line can be increased, and the band can be increased. When used for a pass filter, the passband can be widened and high-density multilayer mounting is possible.
[0082]
(Embodiment 5)
FIG. 5 is a diagram illustrating a coupler using a 1/4 wavelength tip short-circuited coupling line according to a fifth embodiment of the present invention. The configuration other than the via conductors 530 to 533, 534 to 537, 550 to 563, 570 to 583, and the fourth dielectric substrate 543 is the same as that of the first embodiment, and a description thereof will be omitted.
[0083]
FIG. 5C is a plan view of the coupler according to the fifth embodiment of the present invention as viewed from above, and a portion that cannot be seen from above is indicated by a broken line. 5A is a vertical cross-sectional view of A9-A10 in FIG. 5C, and FIG. 5B is a vertical cross-sectional view of A11-A12 in FIG. 5C. 5D is a cross-sectional view of A1-A2 in FIG. 5C, FIG. 5E is a cross-sectional view of A3-A4 in FIG. 5C, and FIG. 5 (c) is an A5-A6 cross-sectional view, and FIG. 5 (g) is an A7-A8 cross-sectional view of FIG. 5 (c).
[0084]
In the fifth embodiment, unlike the configuration of the first embodiment, a fourth dielectric substrate 543 having a first surface (lower surface) and a second surface (upper surface) parallel to each other is replaced with a third dielectric substrate 542. And the ground conductor 504 is formed on the second surface of the fourth dielectric substrate 543. The second and third dielectric substrates 541 and 542 are respectively formed with via conductors for enhancing the coupling degree.
[0085]
In the fifth embodiment, as shown in FIGS. 5A and 5C, via conductors filled in through holes penetrating the second dielectric substrate 541 are provided on the coupling line conductors 520 and 521, Via conductors filled in through holes penetrating the third dielectric substrate 542 are alternately arranged and connected.
[0086]
That is, of the via conductors 550 to 563, the via conductors 550, 552, 554, 556, 558, 560, and 562 on the third dielectric substrate 542 side and the via conductors 551 and 553 on the second dielectric substrate 541 side. 555, 557, 559, 561, and 563 are alternately arranged and connected along the longitudinal direction of the coupling line conductor 521, and the via conductors 571 on the third dielectric substrate 542 side among the via conductors 570 to 583. 573, 575, 577, 579, 581, 583 and the via conductors 570, 572, 574, 576, 578, 580, 582 on the second dielectric substrate 541 side along the longitudinal direction of the coupling line conductor 520, Connect alternately.
[0087]
By arranging the via conductors and the dielectric substrate in this manner, the interval between the via conductors can be widened, and furthermore, when the via conductors are long and densely arranged, in the LTCC, the dielectric substrate, which is an insulator, is distorted. Cracks can be prevented.
[0088]
Further, similarly to the first embodiment, the capacitance C1 shown in [Equation 1], [Equation 2], and [Equation 4] between the coupling line conductors 520 and 521 and the ground conductors 503 to 508 in the even mode. When the odd mode is exceeded, the facing area between the coupling line conductors 520 and 521 increases in the odd mode, so that the capacitance C12 shown in [Equation 1] and [Equation 4] increases.
[0089]
Therefore, as is apparent from [Equation 4], the coupler according to the fifth embodiment can increase the degree of coupling K of the coupling line.
[0090]
As described above, according to the coupler of the fifth embodiment, the dielectric substrate has four layers, and the two layers of the second and third dielectric substrates are alternately arranged along each of the two coupling line conductors. Since the via conductors are formed at a wide interval, the interval between the via conductors can be widened, the degree of coupling K of the coupling line can be increased, and when used for a band-pass filter, the pass band can be widened and the multilayer structure can be improved. High-density mounting is possible.
[0091]
(Embodiment 6)
FIG. 7 is a diagram illustrating a coupler using a 1/4 wavelength tip short-circuited coupling line according to a sixth embodiment of the present invention. The configuration other than the via dielectrics 744 to 757 and 786 to 799 is the same as that of the conventional example shown in FIG. 6, and a description thereof will be omitted.
FIG. 7C is a plan view of the coupler according to the sixth embodiment of the present invention as viewed from above, and a portion that cannot be seen from above is indicated by a broken line. FIG. 7A is a vertical sectional view taken along line A9-A10 in FIG. 7C. 7D is a cross-sectional view taken along line A1-A2 of FIG. 7C, FIG. 7E is a cross-sectional view taken along line A3-A4 of FIG. 7C, and FIG. 7 (c) is an A5-A6 cross-sectional view, and FIG. 7 (g) is an A7-A8 cross-sectional view of FIG. 7 (c).
[0092]
The sixth embodiment is characterized in that, unlike the configuration of the conventional example, via dielectrics for enhancing the degree of coupling are formed in two layers of the first and second dielectric substrates 736 and 737, respectively.
[0093]
In the sixth embodiment, as shown in FIGS. 7A and 7C, the first dielectric substrate 736 is provided on the coupling line conductors 720 and 721 in a through hole penetrating the first dielectric substrate 736. Via dielectrics 744 to 757 and 772 to 785 filled with a dielectric having a dielectric constant lower than 736 and a through-hole passing through the second dielectric substrate 737, have a dielectric constant lower than that of the second dielectric substrate 737. Via dielectrics 758 to 771, 786 to 799 filled with a dielectric are arranged and connected.
[0094]
Further, similarly to the first embodiment, the capacitance C1 shown in [Equation 1], [Equation 2], and [Equation 4] between the coupling line conductors 720 and 721 and the ground conductors 703 to 708 in the even mode. However, the capacitance C12 shown in [Equation 1] and [Equation 4] between the coupling line conductors 720 and 721 in the odd mode is the same.
Therefore, as is apparent from [Equation 4], the coupler according to the fifth embodiment can increase the degree of coupling K of the coupling line.
[0095]
As described above, according to the coupler according to the sixth embodiment, along each of the two coupling line conductors, the two layers of the first and second dielectric substrates have a dielectric constant lower than that of the dielectric substrate. Since a via dielectric filled with a body is formed, the degree of coupling K of the coupling line is increased, and when used for a band-pass filter, the pass band can be broadened, and high-density mounting of multiple layers is possible. is there.
[0096]
【The invention's effect】
As is apparent from the above description, the coupler according to claim 1 of the present invention includes a first dielectric substrate having a first surface and a second surface parallel to each other, and a second dielectric substrate having the first dielectric substrate. A second dielectric substrate having a first surface and a second surface parallel to each other, and a ground conductor formed on the first surface of the first dielectric substrate; Two coupling line conductors which are close to each other so as to be electromagnetically coupled to each other on the second surface of the second dielectric substrate, and each have a length of 1/4 wavelength; A plurality of via conductors filled in a plurality of through-holes penetrating and arranged and connected on the two coupling line conductors are provided, so that in the even mode, the coupling line conductor and the ground conductor In the odd mode, the facing area between the coupling line conductors is larger than the capacitance between There is an effect that it is possible to increase the degree of coupling of the coupler by increases.
[0097]
According to a second aspect of the present invention, there is provided the coupler according to the first aspect, wherein a first surface and a second surface parallel to each other are formed on the second surface of the second dielectric substrate. Since the third dielectric substrate having the third dielectric substrate is formed and the ground conductor is formed on the second surface of the third dielectric substrate, the third dielectric substrate is surrounded by the ground conductor, so that it is less susceptible to electromagnetic interference from others. Therefore, there is an effect that components can be arranged at a high density and the size of the device can be reduced.
[0098]
According to a third aspect of the present invention, there is provided a coupler according to the first aspect, further comprising a via conductor filled in a through hole penetrating from the first dielectric substrate to the second dielectric substrate. A via conductor filled in a through-hole penetrating the two substrates may be formed by connecting the ends of the two coupling line conductors that do not face each other to the ground formed on the first surface of the first dielectric substrate. Since it is short-circuited to the conductor and interdigital-coupled, an interdigital filter can be configured.
[0099]
According to a fourth aspect of the present invention, there is provided a coupler according to the second aspect, further comprising a via conductor filled in a through hole penetrating from the first dielectric substrate to the third dielectric substrate. The via conductor filled in a through hole penetrating the three substrates may be configured such that tips of the two coupling line conductors that do not face each other are connected to the first surface of the first dielectric substrate and the third dielectric substrate. Since it is short-circuited to the ground conductor formed on the second surface of the body substrate and interdigital-coupled, an interdigital filter can be configured.
[0100]
According to a fifth aspect of the present invention, there is provided the coupler according to the third or fourth aspect, wherein the via conductor filled in the through hole penetrating the two or three substrates is formed by the two couplings. The opposite ends of the line conductors are formed on the first surface of the first dielectric substrate, or the first surface of the first dielectric substrate and the second surface of the third dielectric substrate. A short circuit to the ground conductor can form a comb line filter.
[0101]
According to a sixth aspect of the present invention, there is provided the coupler according to any one of the third to fifth aspects, wherein a plurality of via conductors are filled in a plurality of through holes penetrating the second dielectric substrate. Are arranged and connected at equal intervals on the two coupling line conductors, so that there is an effect that via conductors can be uniformly arranged at high density.
[0102]
According to a seventh aspect of the present invention, there is provided the coupler according to any one of the third to fifth aspects, wherein a plurality of via conductors are filled in a plurality of through holes penetrating the second dielectric substrate. Are arranged and connected in a straight line along the longitudinal direction on the two coupling line conductors, so that the via conductors can be uniformly and densely arranged on the coupling line conductor. effective.
[0103]
The coupler according to claim 8 of the present invention is the coupler according to any one of claims 3 to 5, wherein a plurality of via conductors are filled in a plurality of through holes penetrating the second dielectric substrate. Are arranged and connected on the side of the two coupling line conductors facing each other on the side close to the center line between the two coupling line conductors. By arranging as close as possible, there is an effect that a stronger coupling degree can be obtained.
[0104]
According to a ninth aspect of the present invention, there is provided the coupler according to any one of the third to fifth aspects, wherein a plurality of via conductors are filled in a plurality of through holes penetrating the second dielectric substrate. Are arranged and connected in a straight line along the longitudinal direction at equal intervals on a side near the center line between the two coupling line conductors on the opposed two coupling line conductors. Therefore, by disposing a large number of high-density via conductors facing each other as close as possible, there is an effect that a stronger coupling degree can be obtained.
[0105]
According to a tenth aspect of the present invention, there is provided the coupler according to any one of the third to fifth aspects, wherein a plurality of via conductors are filled in a plurality of through holes penetrating the second dielectric substrate. Are arranged and connected on the two coupling line conductors so as to have a sparse part and a dense part, so that via conductors can be arranged at a high density on a part of the coupling line conductor. This has the effect.
[0106]
The coupler according to claim 11 of the present invention is the coupler according to any one of claims 3 to 5, wherein a plurality of via conductors are filled in a plurality of through holes penetrating the second dielectric substrate. Are arranged and connected on the two coupling line conductors so that dense portions each including a plurality of via conductors as a set are intermittently arranged. Via conductors can be arranged at a high density, and especially in LTCC, there is an effect that a dielectric substrate, which is an insulator, is distorted and cracks can be prevented. Further, in the even mode, the opposing area between the coupling line conductors increases in the odd mode, so that the coupling between the coupling line conductors and the grounding conductor increases. Can be increased.
[0107]
According to a twelfth aspect of the present invention, there is provided the coupler according to the eleventh aspect, wherein the plurality of via conductors filled in the plurality of through holes penetrating the second dielectric substrate are opposite to each other. On the side near the center line between the two coupling line conductors on the two coupling line conductors, they are arranged and connected in a straight line along the longitudinal direction. By arranging the via conductor as close as possible, there is an effect that a stronger coupling degree can be obtained.
[0108]
Also, in the coupler according to claim 13 of the present invention, in the coupler according to any one of claims 3 to 5, a plurality of via conductors filled in a plurality of through holes penetrating the second dielectric are provided. Since the two line conductors for coupling are arranged and connected in a fold line shape so as to face each other, the interval between the via conductors can be widened. In particular, in the LTCC, the induction conductor which is an insulator is used. It is possible to prevent the substrate from being distorted and cracking. Further, in the even mode, the opposing area between the coupling line conductors increases in the odd mode, so that the coupling between the coupling line conductors and the grounding conductor increases. Can be increased.
[0109]
Also, in the coupler according to claim 14 of the present invention, in the coupler according to any one of claims 3 to 5, the plurality of via conductors filled in the plurality of through holes penetrating the second dielectric are The via conductors are arranged in a zigzag pattern on the two coupling line conductors so as to face each other, so that the distance between the via conductors can be widened. It is possible to prevent the substrate from being distorted and cracking. Further, in the even mode, the opposing area between the coupling line conductors increases in the odd mode, so that the coupling between the coupling line conductors and the grounding conductor increases. Can be increased.
[0110]
A coupler according to claim 15 of the present invention is the coupler according to any one of claims 3 to 5, wherein the second surface of the first dielectric substrate and the first surface of the second dielectric substrate are connected to each other. Two second line conductors are further provided between the first and second surfaces, and the two coupling line conductors and the two second line conductors are electrically connected to each other. A plurality of via conductors filled in a plurality of penetrating through holes are sandwiched and connected by the coupling line conductor and the second line conductor, so that a large via conductor interval can be obtained, and When the degree of coupling K is increased and the filter is used for a bandpass filter, there is an effect that the pass band can be widened, and that a multilayer high-density mounting can be performed.
[0111]
A coupler according to claim 16 of the present invention is the coupler according to claim 9, wherein the coupler is provided between the second surface of the first dielectric substrate and the first surface of the second dielectric substrate. A plurality of through-holes, further comprising two second line conductors, wherein the two coupling line conductors and the two second line conductors are individually conductive and penetrate the second dielectric substrate; Since a plurality of via conductors filled in the inside are sandwiched and connected by the coupling line conductor and the second line conductor, the via conductor interval can be widened, and the coupling degree K of the coupling line can be increased. When used in a band-pass filter, there is an effect that the pass band can be widened, and that a multilayer high-density mounting can be achieved.
[0112]
A coupler according to claim 17 of the present invention is disposed on a first dielectric substrate having a first surface and a second surface parallel to each other, and on a second surface of the first dielectric substrate. A second dielectric substrate having a first surface and a second surface parallel to each other, a first surface parallel to each other disposed on a second surface of the second dielectric substrate, and A third dielectric substrate having a second surface; a ground conductor formed on the first surface of the first dielectric substrate; and a ground conductor formed on the second surface of the second dielectric substrate. Two coupling line conductors that are close to each other and have a length of 1/4 wavelength, and are filled in a plurality of through holes penetrating the second dielectric substrate or the third dielectric substrate. And a plurality of via conductors arranged and connected on the two coupling line conductors. More than the capacitance between the joint line conductor and the ground conductor is increased, the effect that the coupling area of the coupler can be increased by increasing the facing area between the coupling line conductors in the odd mode in the odd mode. There is.
[0113]
The coupler according to claim 18 of the present invention is the coupler according to claim 17, wherein a first surface and a second surface parallel to each other are provided on the second surface of the third dielectric substrate. Since the fourth dielectric substrate is formed and the ground conductor is formed on the second surface of the fourth dielectric substrate, by surrounding with the ground conductor, it becomes difficult to receive electromagnetic interference from others, and There is an effect that components can be arranged in the device and the size of the device can be reduced.
[0114]
According to a nineteenth aspect of the present invention, there is provided the coupler according to the seventeenth aspect, further comprising a via conductor filled in a through hole penetrating from the first dielectric substrate to the third dielectric substrate. A via conductor filled in a through-hole penetrating the three substrates may be formed by connecting the ends of the two coupling line conductors that do not face each other to the ground formed on the first surface of the first dielectric substrate. Since it is short-circuited to the conductor and interdigital-coupled, an interdigital filter can be configured.
[0115]
According to a twentieth aspect of the present invention, there is provided the coupler according to the eighteenth aspect, further comprising a via conductor filled in a through hole penetrating from the first dielectric substrate to the fourth dielectric substrate. The via conductor filled in a through hole penetrating the four substrates may be configured such that tips of the two coupling line conductors that are not opposed to each other are connected to the first surface of the first dielectric substrate and the fourth dielectric substrate. Since it is short-circuited to the ground conductor formed on the second surface of the body substrate and interdigital-coupled, an interdigital filter can be configured.
[0116]
Also, in the coupler according to claim 21 of the present invention, in the coupler according to claim 19 or 20, the via conductor filled in a through-hole penetrating the three or four substrates is formed by combining the two conductors. The opposite ends of the line conductors are formed on the first surface of the first dielectric substrate, or on the first surface of the first dielectric substrate and the second surface of the fourth dielectric substrate. Since it is short-circuited to the ground conductor and is comb line-coupled, a comb line filter can be configured.
[0117]
A coupler according to claim 22 of the present invention is the coupler according to any one of claims 19 to 21, wherein the plurality of through holes penetrating the second dielectric substrate or the third dielectric substrate are filled. The via conductors filled in the second dielectric substrate and the via conductors filled in the third dielectric substrate are arranged and connected so that the via conductors filled in the third dielectric substrate are alternately arranged. Therefore, there is an effect that the space between the via conductors can be widened.
[0118]
The coupler according to claim 23 of the present invention is the coupler according to claim 22, wherein a plurality of via conductors are filled in a plurality of through holes passing through the second dielectric substrate or the third dielectric substrate. Are arranged and connected in a straight line along the longitudinal direction at equal intervals on a side near the center line between the two coupling line conductors on the opposed two coupling line conductors. Therefore, if the via conductor spacing is widened and the density is long and densely arranged, especially in LTCC, there is an effect that a dielectric substrate, which is an insulator, is distorted and cracks can be prevented. Further, in the even mode, the opposing area between the coupling line conductors increases in the odd mode, so that the coupling between the coupling line conductors and the grounding conductor increases. Can be increased.
[0119]
Also, in the coupler according to claim 24 of the present invention, since the coupler is used as a filter in the coupler according to claim 9, 11, 14, 16, or 23, for example, when the coupler is used for a band-pass filter. Thus, the width of the pass band can be widened, and moreover, high-density mounting of multiple layers becomes possible.
[0120]
A coupler according to claim 25 of the present invention is formed on a first dielectric substrate having a first surface and a second surface parallel to each other, and on a first surface of the first dielectric substrate. A ground conductor, two coupling line conductors that are close to each other on the second surface of the first dielectric substrate so as to be electromagnetically coupled to each other and each have a length of １／ wavelength; A plurality of via dielectrics filled in a plurality of through holes penetrating through the one dielectric substrate and having a dielectric constant lower than that of the first dielectric substrate and arranged and connected on the two coupling line conductors; Therefore, when the coupling degree K of the coupling line is increased and used for a band-pass filter, the pass band can be widened, and multilayer high-density mounting is possible.
[0121]
A coupler according to claim 26 of the present invention is the coupler according to claim 25, wherein a first surface and a second surface parallel to each other are formed on the second surface of the first dielectric substrate. Since the second dielectric substrate is formed and a ground conductor is formed on the second surface of the second dielectric substrate, by surrounding the ground conductor with the ground conductor, it is less susceptible to electromagnetic interference from other components, and There is an effect that components can be arranged at a high density, and the size of the device can be reduced.
[0122]
The coupler according to claim 27 of the present invention is the coupler according to claim 26, wherein the plurality of through holes penetrating the second dielectric substrate have a lower dielectric constant than the second dielectric substrate. Is formed, and a plurality of via dielectrics arranged and connected on the two coupling line conductors are formed. Therefore, when the coupling degree K of the coupling line is increased and used for a bandpass filter, The pass band can be widened, and multilayer high-density mounting is possible.
[0123]
A coupler according to claim 28 of the present invention is the coupler according to claim 25, further comprising a via conductor filled in a through hole penetrating the first dielectric substrate, and penetrating the one substrate. The via conductor filled in the through-hole short-circuits the opposite ends of the two coupling line conductors to the ground conductor formed on the first surface of the first dielectric substrate, thereby forming an interdigital coupling. Therefore, an interdigital filter can be configured.
[0124]
A coupler according to claim 29 of the present invention is the coupler according to claim 27, further comprising a via conductor filled in a through hole passing through the first and second dielectric substrates, and The via conductor filled in the penetrating through-hole may be configured such that the ends of the two coupling line conductors that do not face each other are connected to the first surface of the first dielectric substrate and the second surface of the second dielectric substrate. Since it is short-circuited to the ground conductor formed on the surface and is interdigitally coupled, an interdigital filter can be configured.
[Brief description of the drawings]
FIG. 1 is a longitudinal sectional view (FIGS. (A) and (b)), a plan view (FIG. (C)) viewed from above, and a transverse sectional view (FIG. d), (e), (f), and (g)).
FIG. 2 is a longitudinal sectional view (FIGS. (A) and (b)), a plan view viewed from above (FIG. (C)), and a transverse sectional view (FIG. d), (e), (f), and (g)).
FIG. 3 is a longitudinal sectional view (FIGS. (A) and (b)), a plan view viewed from above (FIG. (C)), and a transverse sectional view (FIG. d), (e), (f), and (g)).
FIG. 4 is a longitudinal sectional view (FIGS. (A) and (b)), a plan view viewed from above (FIG. (C)), and a transverse sectional view (FIG. d), (e), (f), and (g)).
FIG. 5 is a longitudinal sectional view (FIGS. (A) and (b)), a plan view viewed from above (FIG. (C)), and a transverse sectional view (FIG. d), (e), (f), and (g)).
FIG. 6 is a longitudinal sectional view (FIGS. (A) and (b)) showing a conventional coupler, a plan view (FIG. (C)) viewed from above, and a transverse sectional view (FIGS. (D) and (e)). , (F), and (g)).
FIG. 7 is a longitudinal sectional view (FIG. (A)), a plan view viewed from above (FIG. (C)), and a transverse sectional view (FIG. (D)) showing a coupler according to a sixth embodiment of the present invention. e), (f), and (g)).
[Explanation of symbols]
141, 241, 341, 441, 540, 601, 736 First dielectric substrate
142, 242, 342, 442, 541, 602, 737 Second dielectric substrate
143, 243, 343, 443, 542 Third dielectric substrate
103-108, 203-208, 303-308, 403-408, 503-508, 603-608, 703-708 Ground conductor
130-135, 150-163, 170-183, 230-235, 250-261, 270-281, 330-335, 350-362, 370-382, 430-435, 450-463, 470-483, 530 537, 550-563, 570-583, 630-633, 731,732, 732,735 Via conductor
110, 111, 210, 211, 310, 311, 410, 411, 510, 511, 610, 611, 710, 711
112, 113, 212, 213, 312, 313, 412, 413, 512, 513, 612, 613, 712, 713 Signal input / output line conductor
120, 121, 220, 221, 320, 321, 420, 421, 520, 521, 620, 621, 720, 721
422, 423 Second line conductor
543 Fourth Dielectric Substrate
744-757, 758-771, 772-785, 786-799 Via dielectric

Claims

A first dielectric substrate having a first surface and a second surface parallel to each other;
A second dielectric substrate disposed on a second surface of the first dielectric substrate and having a first surface and a second surface parallel to each other;
A ground conductor formed on a first surface of the first dielectric substrate;
Two coupling line conductors close to each other electromagnetically coupled to each other on the second surface of the second dielectric substrate and each having a length of 1/4 wavelength;
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate and arranged and connected on the two coupling line conductors,
A coupler, characterized in that:

The coupler of claim 1,
A third dielectric substrate having a first surface and a second surface parallel to each other is formed on a second surface of the second dielectric substrate, and a third surface of the third dielectric substrate is formed on the second surface. Forming a ground conductor,
A coupler, characterized in that:

The coupler of claim 1,
A via conductor filled in a through hole penetrating from the first dielectric substrate to the second dielectric substrate,
A via conductor filled in a through-hole penetrating the two substrates may be formed by connecting the ends of the two coupling line conductors that do not face each other to a ground conductor formed on a first surface of the first dielectric substrate. Are short-circuited and interdigitally coupled,
A coupler, characterized in that:

The coupler according to claim 2,
A via conductor filled in a through hole penetrating from the first dielectric substrate to the third dielectric substrate,
The via conductor filled in a through-hole penetrating the three substrates may be configured such that tips of the two coupling line conductors that are not opposed to each other are connected to the first surface of the first dielectric substrate and the third dielectric substrate. Short-circuited to a ground conductor formed on the second surface of the substrate and interdigitally coupled;
A coupler, characterized in that:

The coupler according to claim 3 or 4,
The via conductor filled in a through-hole penetrating the two or three substrates may be configured such that the opposing tips of the two coupling line conductors are connected to the first surface of the first dielectric substrate, or Short-circuited to the ground conductor formed on the first surface of the first dielectric substrate and the second surface of the third dielectric substrate, and comb-line-coupled;
A coupler, characterized in that:

The coupler according to any one of claims 3 to 5,
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate,
The two coupling line conductors are arranged and connected at equal intervals on the two line conductors.
A coupler, characterized in that:

The coupler according to any one of claims 3 to 5,
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate are arranged and connected in a straight line along the longitudinal direction on the two coupling line conductors,
A coupler, characterized in that:

The coupler according to any one of claims 3 to 5,
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate,
The two coupling line conductors facing each other are arranged and connected on a side close to a center line between the two coupling line conductors,
A coupler, characterized in that:

The coupler according to any one of claims 3 to 5,
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate,
On the opposing two coupling line conductors, on the side close to the center line between the two coupling line conductors, they are arranged and connected at equal intervals in a straight line along the longitudinal direction.
A coupler, characterized in that:

The coupler according to any one of claims 3 to 5,
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate,
The two coupling line conductors are arranged and connected so as to have a sparse part and a dense part.
A coupler, characterized in that:

The coupler according to any one of claims 3 to 5,
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate,
On the two coupling line conductors, dense portions having a plurality of via conductors as a set are arranged and connected so as to be intermittently arranged.
A coupler, characterized in that:

The coupler according to claim 11,
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate,
On the two opposing coupling line conductors, on the side close to the center line between the two coupling line conductors, they are arranged and connected in a straight line along the longitudinal direction.
A coupler, characterized in that:

The coupler according to any one of claims 3 to 5,
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric,
The two coupling line conductors are arranged and connected in a fold line so as to face each other.
A coupler, characterized in that:

The coupler according to any one of claims 3 to 5,
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric,
The two coupling line conductors are arranged and connected in a staggered manner so as to face each other.
A coupler, characterized in that:

The coupler according to any one of claims 3 to 5,
Further comprising two second line conductors between a second surface of the first dielectric substrate and a first surface of the second dielectric substrate,
The two coupling line conductors and the two second line conductors are individually conductive, and a plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate are connected to the coupling conductor. Between the line conductor for use and the second line conductor,
A coupler, characterized in that:

The coupler according to claim 9,
Further comprising two second line conductors between a second surface of the first dielectric substrate and a first surface of the second dielectric substrate,
The two coupling line conductors and the two second line conductors are individually conductive, and a plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate are connected to the coupling conductor. Between the line conductor for use and the second line conductor,
A coupler, characterized in that:

A first dielectric substrate having a first surface and a second surface parallel to each other;
A second dielectric substrate disposed on a second surface of the first dielectric substrate and having a first surface and a second surface parallel to each other;
A third dielectric substrate disposed on a second surface of the second dielectric substrate and having a first surface and a second surface parallel to each other;
A ground conductor formed on a first surface of the first dielectric substrate;
Two coupling line conductors close to each other electromagnetically coupled to each other on the second surface of the second dielectric substrate and each having a length of 1/4 wavelength;
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate or the third dielectric substrate and arranged and connected on the two coupling line conductors,
A coupler, characterized in that:

The coupler of claim 17,
A fourth dielectric substrate having a first surface and a second surface parallel to each other is formed on a second surface of the third dielectric substrate, and a ground is provided on the second surface of the fourth dielectric substrate. Forming conductors,
A coupler, characterized in that:

The coupler of claim 17,
A via conductor filled in a through hole penetrating from the first dielectric substrate to the third dielectric substrate,
A via conductor filled in a through-hole penetrating the three substrates may be formed by connecting the ends of the two coupling line conductors that are not opposed to each other to a ground conductor formed on a first surface of the first dielectric substrate. Short-circuited and inter-digitally coupled,
A coupler, characterized in that:

The coupler of claim 18,
Having a via conductor filled in a through hole penetrating from the first dielectric substrate to the fourth dielectric substrate,
The via conductor filled in the through-hole penetrating the four substrates may be configured such that tips of the two coupling line conductors that do not face each other are connected to the first surface of the first dielectric substrate and the fourth dielectric substrate. Short-circuited to a ground conductor formed on the second surface of the substrate and interdigitally coupled;
A coupler, characterized in that:

The coupler according to claim 19 or 20,
The via conductor filled in a through-hole penetrating the three or four substrates may be configured such that the opposing ends of the two coupling line conductors are connected to the first surface of the first dielectric substrate or the Short-circuited to ground conductors formed on the first surface of the first dielectric substrate and the second surface of the fourth dielectric substrate, and comb-line-coupled;
A coupler, characterized in that:

The coupler according to any one of claims 19 to 21,
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate or the third dielectric substrate,
Via conductors filled in the second dielectric substrate and via conductors filled in the third dielectric substrate are arranged and connected so as to be alternately arranged.
A coupler, characterized in that:

The coupler of claim 22, wherein
A plurality of via conductors filled in a plurality of through holes penetrating the second dielectric substrate or the third dielectric substrate,
On the opposing two coupling line conductors, on the side close to the center line between the two coupling line conductors, they are arranged and connected at equal intervals in a straight line along the longitudinal direction.
A coupler, characterized in that:

The coupler according to claim 9, 11, 14, 16, or 23,
Using the combiner as a filter;
A coupler, characterized in that:

A first dielectric substrate having a first surface and a second surface parallel to each other;
A ground conductor formed on a first surface of the first dielectric substrate;
Two coupling line conductors close to each other electromagnetically coupled to each other and having a length of 1/4 wavelength on the second surface of the first dielectric substrate;
A plurality of via dielectrics filled in a plurality of through-holes penetrating the first dielectric substrate with a dielectric having a lower dielectric constant than the first dielectric substrate and arranged and connected on the two coupling line conductors With a body,
A coupler, characterized in that:

The coupler of claim 25,
On a second surface of the first dielectric substrate,
Forming a second dielectric substrate having a first surface and a second surface parallel to each other, and forming a ground conductor on the second surface of the second dielectric substrate;
A coupler, characterized in that:

The coupler of claim 26,
A plurality of via dielectrics filled in a plurality of through holes penetrating the second dielectric substrate with a dielectric having a lower dielectric constant than the second dielectric substrate, and arranged and connected on the two coupling line conductors Formed with the body,
A coupler, characterized in that:

The coupler of claim 25,
Having a via conductor filled in a through hole penetrating the first dielectric substrate,
A via conductor filled in a through-hole penetrating the one substrate may be formed by connecting a tip of the two coupling line conductors not facing each other to a ground conductor formed on a first surface of the first dielectric substrate. Are short-circuited and interdigitally coupled,
A coupler, characterized in that:

The coupler of claim 27,
Having a via conductor filled in a through hole penetrating the first and second dielectric substrates,
A via conductor filled in a through-hole penetrating the two substrates may be configured such that tips of the two coupling line conductors that do not face each other are connected to the first surface of the first dielectric substrate and the second dielectric. Short-circuited to a ground conductor formed on the second surface of the substrate and interdigital-coupled.
A coupler, characterized in that: