JP2004087701A - Method for manufacturing multilayer interconnection structure and method for mounting semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing a multilayer interconnection structure which can regulate a substrate thickness having excellent handleability and conveyability in a manufacturing process and which facilitates a mass production, and to provide a method for mounting a semiconductor device. <P>SOLUTION: The method for manufacturing the multilayer interconnection structure includes the steps of partly adhering and bonding a carrier plate 3 to a metal base 1 at an adhesive part 5 by an adhesive resin 4, forming a multilayer interconnection having a first metal pad 8, an insulating resin 7 and a second metal pad 6 on the base 1, and separating the base 1 from the plate 3 by cutting the adhered part 5 at a cutting part 9. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a multilayer wiring structure and a method for mounting a semiconductor device, and more particularly to a method for manufacturing a multilayer wiring structure using a metal base and a method for mounting a semiconductor device on the multilayer wiring structure.
[0002]
[Prior art]
With reference to FIGS. 9 and 10, a conventional method for manufacturing a multilayer wiring structure and a method for mounting a semiconductor device will be described.
[0003]
First, in the step of FIG. 9A, a plating resist 14 is selectively formed on the metal base 1. Next, in the step of FIG. 9B, a first metal pad 8 is formed on the metal base 1 by plating using the plating resist 14 as a mask. Next, in the step of FIG. 9C, an insulating resin 7 is formed on the entire surface to cover the first metal pad 8. Next, in the step of FIG. 9D, an opening exposing the surface of the first metal pad 8 is formed as a via hole 16. Next, in the step of FIG. 9E, a plating resist 17 is selectively formed on the insulating resin 7.
[0004]
Next, in the step of FIG. 10A, a second metal pad 6 connected to the first metal pad 8 through the via hole 16 is formed on the insulating resin 7 by plating using the plating resist 17 as a mask. . Next, in the step of FIG. 10B, the plating resist 17 is peeled off. Thus, a multilayer wiring including the first metal pad 8, the second metal pad 6, and the insulating resin 7 is obtained.
[0005]
Next, in the step of FIG. 10C, the semiconductor chip 10 is connected to the second metal pad 6 by the metal bump 11, and an underfill resin is provided between the semiconductor chip 10 and the second metal pad 6 and the insulating resin 7. 12 is filled and molded with a molding resin 13. Finally, in the step of FIG. 10D, the metal base 1 is removed by etching.
[0006]
In this way, as shown in FIG. 10D, the semiconductor chip 10, the metal bumps 11, the underfill resin, and the multi-layered wiring structure including the first metal pad 8, the second metal pad 6, and the insulating resin 7 are provided. Thus, a structure in which the semiconductor device having the mold resin 12 and the mold resin 13 is mounted is obtained.
[0007]
In addition, a multilayer wiring including the first metal pad 8, the second metal pad 6, and the insulating resin 7 is manufactured on the metal base 1 in an intermediate process, and the metal base 1 is removed by etching in the process of FIG. Thus, a multilayer wiring structure including the first metal pad 8, the second metal pad 6, and the insulating resin 7 is obtained.
[0008]
Then, the surface of the first metal pad 8 of the multilayer wiring structure exposed by removing the metal base 1 is used by being connected to another semiconductor device or a motherboard.
[0009]
[Problems to be solved by the invention]
In the above-described prior art, since the manufacturing method uses the metal base alone, the following problems occur.
[0010]
When a thin metal base is used, the metal base is likely to be bent or bent, which makes it difficult to obtain a multilayer wiring structure having a predetermined shape or a semiconductor device having a predetermined shape. In addition, the occurrence of bending or bending of the metal base tends to cause a failure of the manufacturing equipment. Further, the occurrence of bending or bending of the metal base may limit the jigs and tools to be used, thereby making production impossible.
[0011]
That is, in the prior art, since the multilayer wiring structure has been manufactured on a metal base alone or on a form in which two metal bases are directly adhered, the thickness of the metal base itself is reduced by the semiconductor device mounting process and the metal base removal. Determined by process factors. Therefore, a thinner thickness is required as compared with the optimum thickness in a production line for a multilayer wiring structure. For this reason, the thin metal base has a lower proof strength than a glass cloth resin-impregnated base material or the like, so that the thin metal base may be bent or bent on a production line, thereby lowering the yield. Furthermore, the restriction of the plate thickness causes the restriction of the jigs and tools, and the conventional printed circuit board manufacturing equipment has resulted in the restriction of the construction method.
[0012]
On the other hand, when a thick metal base is used, problems arise in the transportability and handling of the manufacturing equipment due to an increase in the weight of the metal base. Further, the man-hour for etching a thick metal base increases, and in the worst case, etching becomes impossible.
[0013]
Accordingly, an object of the present invention is to provide a method for manufacturing a multilayer wiring structure which has solved the above-mentioned problems.
[0014]
Another object of the present invention is to provide a method of mounting a semiconductor device which solves the above-mentioned problems.
[0015]
[Means for Solving the Problems]
A feature of the present invention is that a step of partially bonding and attaching a carrier plate and a metal base, a step of forming a multilayer wiring on the metal base, and a step of cutting the bonded portion, A method for manufacturing a multilayer wiring structure, comprising: a step of separating a base from the carrier plate; and a step of removing the metal base. Here, the metal base is preferably removed by etching.
[0016]
Further, in the method for manufacturing a multilayer wiring structure, a portion remaining by partially removing the metal base is used as a support, and the multilayer wiring is supported by the support on the semiconductor device. After mounting, the metal-based support can be removed. Alternatively, the metal base can be removed after forming the multilayer wiring and mounting a semiconductor device on the multilayer wiring.
[0017]
Further, in the method for manufacturing a multilayer wiring structure, the metal base can be attached to one or both surfaces of the carrier plate.
[0018]
In the method for manufacturing a multilayer wiring structure, the partial bonding can be performed by partially mounting an adhesive. Alternatively, the partial bonding can be performed by mounting an adhesive on the entire surface on the carrier side and mounting a release film or a release agent covering the non-bonded area on the metal base side.
[0019]
Further, in the method for manufacturing a multilayer wiring structure, it is preferable that the part to be partially bonded is an outer peripheral portion of the carrier plate and the metal base overlapping each other.
[0020]
In the method for manufacturing a multilayer wiring structure, the multilayer wiring may be formed on a first metal pad formed on the metal base and exposing a surface by removing the metal base; Comprising the formed insulating resin, and a second metal pad formed on the insulating resin and connected to the first metal pad through a via hole provided in the insulating resin. Is preferred. In this case, the second metal pad may be a pad connected to a semiconductor pellet.
[0021]
Another feature of the present invention is that the step of partially bonding and attaching the carrier plate and the metal base, the step of forming a multilayer wiring on the metal base, and the step of cutting the bonded portion are performed. A method of mounting a semiconductor device, comprising: a step of separating the metal base from the carrier plate; and a step of removing the metal base, the method including a step of mounting a semiconductor device on the multilayer wiring.
[0022]
Here, the portion remaining by partially removing the metal base is used as a support, and a step of mounting a semiconductor device on the multilayer wiring in a state where the multilayer wiring is supported by the support is performed. Thereafter, the support can be removed. Alternatively, a step of mounting a semiconductor device on the multilayer wiring with the metal base remaining under the entire surface of the multilayer wiring may be performed, and thereafter, the metal base may be removed. Alternatively, in a state where the carrier plate and the metal base are partially adhered and adhered, a step of forming the multilayer wiring and a step of mounting a semiconductor device on the multilayer wiring are performed, and then the cutting is performed. A step of separating the metal base from the carrier plate may be performed, and then a step of removing the metal base may be performed.
[0023]
Further, in the method of mounting a semiconductor device, the metal base can be attached to one or both surfaces of the carrier plate.
[0024]
In this method of mounting a semiconductor device, the partial bonding can be performed by partially mounting an adhesive. Alternatively, the partial bonding can be performed by mounting an adhesive on the entire surface on the carrier side and mounting a release film or a release agent covering the non-bonded area on the metal base side.
[0025]
Further, in this method of mounting a semiconductor device, it is preferable that the portions to be partially adhered are the outer peripheral portions of the overlapping carrier plate and metal base.
[0026]
In the method of mounting a semiconductor device, the multilayer wiring may be formed on the metal base, and may be formed on the first metal pad by exposing a surface by removing the metal base. And a second metal pad formed on the insulating resin and connected to the first metal pad through a via hole provided in the insulating resin. preferable. In this case, the second metal pad may be a pad connected to a semiconductor pellet.
[0027]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, the present invention will be described with reference to the drawings. FIG. 1 is a sectional view showing the steps of the first embodiment of the present invention in order, FIG. 2 is a sectional view showing the steps after FIG. 1 in order, and FIG. FIG.
[0028]
First, in the step of FIG. 1A, the metal bases 1 whose surfaces have been roughened are arranged on both sides (upper and lower sides) of the carrier plate 3, respectively. Further, between the metal base 1 and the carrier plate 3, a release film 2 or a release film having a length shorter than the length (dimension in the horizontal direction in the figure) where the metal base 1 and the carrier plate 3 overlap. The mold agent is arranged on the metal base side, and the adhesive resin 4 having the same length as the overlapping length is arranged on the carrier plate side.
[0029]
The metal base 1 needs to be a metal which can be removed by etching in the final stage of the process and can be removed by etching, and which has excellent electrical conductivity in order to provide a current path for the plating process. In addition, the thickness needs to have a thickness that can be removed by etching and has a strength as a support. Therefore, as the metal base 1, for example, a rolled copper plate or an electrolytic copper foil having a thickness of 0.2 mm to 0.4 mm is preferably used.
[0030]
On the other hand, the carrier plate 3 is a plate or a film made of a substance having a lower specific gravity than the above-mentioned metal base and having sufficient heat resistance, chemical resistance and sufficient rigidity for line development. It is preferable to use a glass cloth cloth polyimide substrate / glass cloth cloth epoxy substrate having a thickness of 6 mm.
[0031]
Further, as the adhesive resin 4, it is preferable to use an epoxy-based or polyimide-based resin having heat resistance and chemical resistance.
[0032]
In this embodiment, the case where the metal base 1 is arranged on both sides (upper and lower sides) of the carrier plate 3 is shown, but the same applies to the case where the metal base 1 is arranged only on one side of the carrier plate 3.
[0033]
Next, in the step of FIG. 1B, the adhesive resin 4, the release film 2, and the metal base 1 are stacked on the upper and lower sides of the carrier plate 3, and a heat treatment is performed with the weight placed thereon. Thus, the carrier plate 3 and the metal base 1 are partially bonded by the adhesive resin 4 at the bonding portion 5 on the outer peripheral portion.
[0034]
Next, in the step of FIG. 2A, a first metal pad 8 is formed on the metal base 1 by plating using a plating resist as a mask, and an insulating resin 7 is formed on the entire surface to form a first metal pad. An opening for covering the pad 8 and exposing the surface of the first metal pad 8 is formed as a via hole 16, and a plating resist is selectively formed on the insulating resin 7. A second metal pad 6 connected to the first metal pad 8 through the via hole 16 is formed on the insulating resin 7 by plating using the mask.
[0035]
Next, in the step of FIG. 2 (B), the outer peripheral portion bonded by the bonding portion 5 is cut and removed by cutting at the cutting portion 9 (FIG. 2 (A)). Separate from plate 3.
[0036]
Next, in the step of FIG. 3A, the metal base 1 is selectively removed to leave a peripheral portion, thereby forming the support 1 of the metal base 1.
[0037]
Next, in the step of FIG. 3B, the semiconductor chip 10 is connected to the second metal pad 6 by the metal bump 11, and an underfill resin is provided between the semiconductor chip 10 and the second metal pad 6 and the insulating resin 7. 12 is filled and molded with a molding resin 13.
[0038]
Finally, in the step of FIG. 3C, the support 1 made of a metal base is removed by etching.
[0039]
In this way, as shown in FIG. 3C, the semiconductor chip 10, the metal bumps 11, the underfill resin, and the multi-layer wiring structure including the first metal pad 8, the second metal pad 6, and the insulating resin 7 are provided. Thus, a structure in which the semiconductor device having the mold resin 12 and the mold resin 13 is mounted is obtained.
[0040]
Also, a multi-layer wiring composed of the first metal pad 8, the second metal pad 6, and the insulating resin 7 is manufactured on the metal base 1 in an intermediate step, and the metal base-based support 1 is formed in the step of FIG. Is removed by etching, a multilayer wiring structure including the first metal pad 8, the second metal pad 6, and the insulating resin 7 is obtained.
[0041]
Then, the surface of the first metal pad 8 of the multilayer wiring structure exposed by removing the metal base 1 is used by being connected to another semiconductor device or a motherboard.
[0042]
As described above, in the present invention, by attaching the carrier plate 3 to the metal base 1, it is possible to select the total thickness of the metal base 1 that is optimal for the production line. Further, the increase in weight due to the increase in the total plate thickness can be suppressed as compared with the case where the metal base is used alone, and the problem on the production line due to the increase in weight can be solved. As a result, the thickness of the metal base 1 can be suppressed to the minimum necessary thickness based only on the restrictions at the time of mounting the semiconductor device, and the number of steps in the metal base plate removing step can be reduced.
[0043]
FIG. 4 is a sectional view showing the steps of the second embodiment of the present invention in order, and FIG. 5 is a sectional view showing the steps after FIG. 4 in order. In FIGS. 4 and 5, the same or similar parts as those in FIGS. 1 to 3 are denoted by the same reference numerals.
[0044]
First, in the step of FIG. 4A, the metal bases 1 whose surfaces have been roughened are arranged on both sides (upper and lower sides) of the carrier plate 3, respectively. The adhesive resin 4 is selectively disposed only between the metal base 1 and the carrier plate 3 and only at the outer peripheral portion.
[0045]
In this embodiment, the case where the metal base 1 is arranged on both sides (upper and lower sides) of the carrier plate 3 is shown, but the same applies to the case where the metal base 1 is arranged only on one side of the carrier plate 3.
[0046]
Next, in the step of FIG. 4B, the adhesive resin 4, the release film 2, and the metal base 1 are stacked on the upper and lower sides of the carrier plate 3, and a heat treatment is performed with the weight placed thereon. As a result, the carrier plate 3 and the metal base 1 are partially bonded by the adhesive resin 4 in the bonding portion 5 in the outer peripheral portion, and the central portion becomes an unbonded region 18.
[0047]
Next, in the step of FIG. 5A, a multilayer wiring is formed by the first metal pad 8, the insulating resin 7, the via hole 16, and the second metal pad 6.
[0048]
Next, in the step of FIG. 5B, the outer peripheral portion bonded at the bonding portion 5 is cut and removed by cutting at the cutting portion 9 (FIG. 5A). Separate from plate 3.
[0049]
Thereafter, the same steps as in FIG. 3 of the first embodiment are performed to manufacture a multilayer wiring structure, and a semiconductor device is mounted thereon.
[0050]
FIG. 6 is a sectional view showing the steps of the third embodiment of the present invention in order. In FIG. 6, the same or similar parts as those in FIGS. 1 to 3 are denoted by the same reference numerals.
[0051]
First, the state in the step of FIG. 6A is the same as that of FIG. 5B according to the second embodiment. However, the state in the step of FIG. 6A according to the third embodiment may be the same as that of FIG. 2B according to the first embodiment.
[0052]
Next, in the step of FIG. 6B, the semiconductor chip 10 is connected to the second metal pad 6 by the metal bump 11 while the metal base 1 is provided under the entire surface, and the semiconductor chip 10 and the second The space between the metal pad 6 and the insulating resin 7 is filled with an underfill resin 12 and molded with a molding resin 13.
[0053]
Finally, in the step of FIG. 6C, the entire metal base 1 is etched away.
[0054]
7 and 8 are sectional views sequentially showing the steps of the fourth embodiment of the present invention. 7 and 8, the same or similar parts as those in FIGS. 1 to 3 are denoted by the same reference numerals.
[0055]
First, the state in the step of FIG. 7A is the same as that in FIG. 5A according to the second embodiment. However, the state in the step of FIG. 7A according to the fourth embodiment may be the same as that of FIG. 2A according to the first embodiment.
[0056]
Next, in the step of FIG. 7B, a multilayer wiring is formed by the first metal pad 8, the insulating resin 7, the via hole 16, and the second metal pad 6. Then, the semiconductor chip 10 is connected to the second metal pad 6 by the metal bump 11, the underfill resin 12 is filled between the semiconductor chip 10, the second metal pad 6 and the insulating resin 7, and the semiconductor chip 10 is molded by the molding resin 13. I do.
[0057]
Next, in the step of FIG. 8A, the outer peripheral portion bonded at the bonding portion 5 is cut and removed by cutting at the cutting portion 9 (FIG. 7B). Separate from plate 3.
[0058]
Finally, in the step of FIG. 6B, the entire metal base 1 is removed by etching.
[0059]
【The invention's effect】
As described above, according to the present invention, since the metal base is attached to the carrier plate for manufacturing, the thickness can be adjusted to be excellent in handleability and transportability in the manufacturing process, and mass production can be easily performed. In addition, the thickness of the metal base can be suppressed from being increased, so that the metal base can be easily removed after the semiconductor device is mounted.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a process of a first embodiment of the present invention in order.
FIG. 2 is a cross-sectional view showing steps subsequent to FIG. 1 in order;
FIG. 3 is a cross-sectional view showing steps subsequent to FIG. 2 in order;
FIG. 4 is a cross-sectional view showing a process of a second embodiment of the present invention in order.
FIG. 5 is a cross-sectional view showing a process after FIG. 4 in order;
FIG. 6 is a cross-sectional view sequentially showing the steps of the third embodiment of the present invention.
FIG. 7 is a sectional view showing steps of a fourth embodiment of the present invention in order.
FIG. 8 is a cross-sectional view showing steps subsequent to FIG. 7 in order;
FIG. 9 is a cross-sectional view showing steps of a conventional technique in order.
FIG. 10 is a cross-sectional view showing a process after FIG. 9 in order;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Metal base 2 Release film 3 Carrier plate 4 Adhesive resin 5 Adhesive part 6 Second metal pad 7 Insulating resin 8 First metal pad 9 Cutting part 10 Semiconductor chip 11 Metal bump 12 Underfill resin 13 Mold resin 14 Plating resist 16 Via hole
17 Plating resist 18 Non-bonded area

Claims (20)

A step of partially bonding and attaching a carrier plate and a metal base, a step of forming a multilayer wiring on the metal base, and cutting the bonded portion to remove the metal base from the carrier plate. A method for manufacturing a multilayer wiring structure, comprising a step of separating and a step of removing the metal base. 2. The method according to claim 1, wherein the removal of the metal base is performed by etching. A portion remaining by partially removing the metal base is used as a support, and a semiconductor device is mounted thereon while the multilayer wiring is supported by the support, and then the metal base is supported. 2. The method according to claim 1, wherein the body is removed. 2. The method according to claim 1, wherein said metal base is removed after said multilayer wiring is formed and a semiconductor device is mounted thereon. 2. The method according to claim 1, wherein the metal base is attached to one or both surfaces of the carrier plate. 2. The method according to claim 1, wherein the partial bonding is performed by partially mounting an adhesive. 2. The method according to claim 1, wherein the partial bonding is performed by placing an adhesive on the entire surface on the carrier side and placing a release film or a release agent on the metal base side to cover a non-bonded area. A method for manufacturing the multilayer wiring structure according to the above. 8. The method according to claim 6, wherein the portion where the partial bonding is performed is an outer peripheral portion of the overlapping carrier plate and metal base. A first metal pad formed on the metal base and exposing a surface by removing the metal base; an insulating resin formed on the first metal pad; 9. The semiconductor device according to claim 1, further comprising a second metal pad formed on the resin and connected to the first metal pad through a via hole provided in the insulating resin. The method for manufacturing a multilayer wiring structure according to any one of the above. The method according to claim 9, wherein the second metal pad is a pad connected to a semiconductor pellet. A step of partially bonding and attaching a carrier plate and a metal base, a step of forming a multilayer wiring on the metal base, and cutting the bonded portion to remove the metal base from the carrier plate. A method for mounting a semiconductor device, comprising: a step of separating; and a step of removing the metal base, and a step of mounting the semiconductor device on the multilayer wiring. A portion remaining by partially removing the metal base is used as a support, and a step of mounting a semiconductor device on the multilayer wiring in a state where the multilayer wiring is supported by the support is performed. 12. The method according to claim 11, wherein the support is removed. 12. The semiconductor according to claim 11, wherein a step of mounting a semiconductor device on the multilayer wiring is performed in a state where the metal base remains under the entire surface of the multilayer wiring, and thereafter, the metal base is removed. How to mount the device. In a state where the carrier plate and the metal base are partially adhered and adhered, a step of forming the multilayer wiring and a step of mounting a semiconductor device on the multilayer wiring are performed. 12. The method according to claim 11, wherein a step of separating the base from the carrier plate is performed, and then a step of removing the metal base is performed. The method according to claim 11, wherein the metal base is attached to one or both surfaces of the carrier plate. 12. The method according to claim 11, wherein the partial bonding is performed by partially mounting an adhesive. 12. The method according to claim 11, wherein the partial bonding is performed by placing an adhesive on the entire surface on the carrier side, and placing a release film or a release agent on the metal base side to cover a non-bonded area. The mounting method of the semiconductor device described in the above. 18. The method according to claim 16, wherein the portion to be partially adhered is an outer peripheral portion of the carrier plate and the metal base overlapping each other. A first metal pad formed on the metal base and exposing a surface by removing the metal base; an insulating resin formed on the first metal pad; 19. A second metal pad formed on a resin and connected to the first metal pad through a via hole provided in the insulating resin. The mounting method of the semiconductor device according to any one of the above. 20. The method according to claim 19, wherein the second metal pad is a pad connected to a semiconductor pellet.

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