JP2004086300A - Flash memory logical address detection method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a flash memory logical address detection method. <P>SOLUTION: According to this flash memory logical address detection method, a logical/physical address mapping table of a scaled factor in the unit of zone is initially constructed in RAM at system startup. Then, a physical zone mapped to a logical address is obtained using this address mapping table, and a search is conducted until a physical address assigned to each block in the physical zone sequentially is obtained. The present application thereby enables to obtain an effective balance point in terms of speed and space, and prevents the occupation of large space on the precondition that a high processing speed is maintained. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention provides a method for detecting a logical address of a flash memory, in which a plurality of blocks are defined as one zone, and a logical / physical address mapping table (Address Mapping Table or Look-Up Table) is manufactured for each zone. , And a method of detecting a logical address based on the address mapping table.
[0002]
[Prior art]
In the operation principle of the flash memory, when the microprocessor uses the memory as a data storage area, both the calculation result and the data are stored here, and if the program needs to be retrieved, it is retrieved from the storage area. When storing and reading data, the microprocessor defines the location of the memory in the required information, transmits the address to the memory through the location bus, and then ensures that the data is correctly transmitted to the corresponding address. To Most important to the memory is the time of the read, which is the microprocessor issuing the instruction and then obtaining the address data, the memory transmitting the data to the microprocessor after responding, and the microprocessor receiving the data reliably Until the time. The time required for this process is the memory access time.
[0003]
In the flash memory, data is stored and read in units of blocks each composed of a few bytes, and each block provided for each data access has one physical address (Physical Address). This represents a spatial order in a flash memory, for example, a location of a physical memory in an SRAM, and each one block has a logical address (Logical Address) indicated by a file system (FileSystem). As shown in FIG. 1A, each one physical address has a corresponding logical address. However, in the flash mechanism, the physical address and the logical address required for file system data access are in a non-linear correspondence, and the location of the logical address cannot be directly inferred from the physical address. Usually, corresponding logical addresses are obtained by two types of methods.
[0004]
The first type of method is to first construct a logical / physical address mapping table at system start-up, which is a table for recording the correspondence between logical addresses and physical addresses, and that a plurality of SRAMs are designed to perform this address mapping. Save and record the table. As shown in FIG. 1, when constructing an address mapping table, the arrangement order of logical addresses is main, the corresponding physical address positions are included in the contents of the table grid, and the original logical addresses are irregular. If it is not arranged once from the beginning to the end, an address mapping table as shown in FIG. 1B cannot be constructed, and this address mapping table is stored in the SRAM. Even when it is desired to build a part of the forward physical / logical address mapping table to save SRAM, the logical address contents in the memory must be searched and arranged from beginning to end. When the system accesses data, first, a search standby logical address is provided, and an address mapping table in the SRAM is searched using software, whereby a physical address corresponding to the logical address can be obtained quickly. As described above, the method of searching for a logical address using the address mapping table has the advantages that the address conversion time is short and the processing speed is fast, but it is necessary to record all address correspondences with a large amount of SRAM. Occupies a considerable space area. And now different IC functions are integrated into one single system chip, the number of SRAMs is fixed, and the number of SRAMs cannot be increased at any time as needed, thus limiting the use.
[0005]
The method of knowing the physical address from the other logical address is a design without SRAM, and does not need to construct any address mapping table, and slightly uses a software program to determine the logical address corresponding to the physical address every time. When searching, the search is started from the head in the memory, and the search is performed until a necessary logical address is searched. Such a system is designed without an SRAM and therefore does not occupy space, but it is necessary to start the search each time a logical address is searched from the beginning, the search is slow, and the data access speed of the memory is considerably slow. .
[0006]
[Problems to be solved by the invention]
Thus, the present invention overcomes the well-known drawbacks by obtaining an effective equilibrium point in the above two types of physical address / logical address conversion schemes, and at the same time, considering the speed and space issues, Effectively improve data access performance.
[0007]
SUMMARY OF THE INVENTION It is a primary object of the present invention to provide a method of detecting a logical address of a flash memory, in which a logical / physical address mapping table of a scaled factor is first defined in units of a zone. It is a method of constructing and obtaining a zone address through the logical / physical address mapping table, further searching for a logical address corresponding to a physical address, and achieving a speed-up with effective investment. .
[0008]
It is another object of the present invention to provide a method of detecting a logical address of a flash memory, which utilizes an adjustable RAM and does not increase a lot of space. It is assumed that the processing speed is increased.
[0009]
[Means for Solving the Problems]
According to a first aspect of the present invention, in a method for detecting a logical address of a flash memory,
A plurality of blocks in the flash memory are set as one zone, and a zone is used as a unit. At system startup, first, a scale factor address mapping table is constructed for a relationship between a zone address and its corresponding logical address, and the table is created. Storing in RAM;
The system transmitting a search standby logical address to a RAM, and the RAM obtaining a corresponding physical zone address from an address mapping table based on the search standby logical address;
Searching for each one block in the physical zone and performing this until a physical address corresponding to the search standby logical address is obtained;
And a method for detecting a logical address of a flash memory.
According to a second aspect of the present invention, there is provided the flash memory logical address detecting method according to the first aspect, wherein the RAM is an SRAM.
According to a third aspect of the present invention, in the logical address detection method for a flash memory according to the first aspect, when data is written or updated in the flash memory, new data is limited to the same zone. The method is characterized by a method of detecting a logical address of a flash memory.
According to a fourth aspect of the present invention, in the method for detecting a logical address of a flash memory according to the third aspect, if there is not enough space in the zone, the data originally in the zone together with the new data are all separated into another one. The method is a method of detecting a logical address of a flash memory, which is characterized in that the logical address is duplicated in one zone.
According to a fifth aspect of the present invention, there is provided the logical address detecting method for a flash memory according to the first aspect, wherein the zone is composed of ²ⁿ blocks.
According to a sixth aspect of the present invention, in the logical address detecting method for a flash memory according to the fifth aspect, the value of n is at least six.
According to a seventh aspect of the present invention, in the logical address detecting method for a flash memory according to the first aspect, the scale factor address mapping table is a logical zone address / physical address mapping table. Detection method.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
According to the present invention, a plurality of blocks in the flash memory are set in one zone, and a zone is used as a unit. At the time of system startup, a scale factor address mapping table is firstly created for a relationship between a physical zone address and its corresponding logical address. Build and save it in RAM. When the system accesses data, first, a search standby logical address is provided to a RAM, and based on the search standby logical address, a corresponding physical zone address is obtained from the address mapping table. The block is searched until a physical address corresponding to the search standby logical address is obtained.
[0011]
【Example】
According to the present invention, a plurality of blocks are set in one zone, and at the time of system startup, one address mapping table, that is, a logical / physical address mapping table is first replicated and constructed, and the characteristics of continuous reading of the RAM itself are combined. A physical zone is obtained by searching the address mapping table in the RAM, and subsequently a logical address corresponding to the physical address in the zone is obtained.
[0012]
When used to store and read data in flash memory, each one of the blocks provided for data access has a single physical address, and represents the actual physical memory location in the memory. The present invention sets the N zones into one zone, each one zone having one physical zone location and a corresponding logical address, as shown in FIG. 2 (a). In addition, the physical zone and the logical address have a non-linear correspondence. When the system is started up and initialized, first, a logical / physical address mapping table of a scaled factor is copied and constructed based on the relation table of FIG. 2A. After the completion of the logical / physical address mapping table, as shown in FIG. 2B, it is stored in the SRAM so that the system can search the search standby logical address at any time. The address mapping table is constructed in units of zones, and the scale factor logical / physical address mapping table does not need to occupy too much storage space, and thus can reduce the number of SRAMs used.
[0013]
Among them, regarding the zone composed of the above-mentioned N zones, the value of N is 2 ⁿ , in other words, this zone is composed of 2 ⁿ blocks. Preferably, the value of n is at least 6.
[0014]
At system startup, if the system is an open system, for example, a removable flash memory disk, it may have been accessed by another system, and its logical / physical address correspondence may be irregularly distributed. In this case, a domain reset process is required. As shown in FIG. 3, magnetic domains having approximate logical addresses are carried into the same zone (zone). For example, magnetic domains 10 to 19 are set to the same zone 0, magnetic domains 40 to 49 are set to the zone 1, and magnetic domains 30 to 39 are set to the same zone. Let it be zone k. The magnetic domains with approximate logical addresses are carried into the same zone, ie, magnetic domains 12 and 13 are carried into zone 0, magnetic domains 40 and 46 are carried into zone 1, and magnetic domain 30 is carried into zone k as shown. When moving the removable flash memory disk to another system for access at a later date, the logical / physical address does not need to be regular from the beginning, so that compatibility can be maintained. If the system is a closed system (flash memory is fixed in the system), the method of the present invention can be used from the beginning, ie, the reset process can be omitted. Subsequently, the system first constructs a scale factor logical / physical address mapping table as shown in FIG. 2B directly from the relationship between the physical zone address and the corresponding logical address, depending on the size of the system SRAM. The logical / physical address mapping table is stored in the SRAM. When the system host accesses the data, it first provides a search standby logical address 10 and, as shown in FIG. The corresponding physical zone 14, for example, zone 0, is obtained from the physical address mapping table 12. Subsequently, after acquiring the physical zone 14, each block in the physical zone 14 of the zone 0 is searched until a physical address corresponding to the search standby logical address is acquired.
[0015]
In addition, the present invention restricts new data within the same zone when writing or updating data in the flash memory. If there is not enough storage space in this zone, the data originally in this zone, together with the new data, are all duplicated in another zone to conform to the uniform read / write principle.
[0016]
Up to this point, the spirit of the present invention has already been described, but the following description is combined with a specific example in combination with a flowchart to supplement the above description of the flash memory search process, and those skilled in the art will refer to this example. And gain sufficient knowledge to be able to implement it.
[0017]
FIG. 5 is a flowchart of the logical address detection according to the present invention. As shown in the figure, the logical address detection method includes the following steps. First, in step S10, a scale factor logical / physical address mapping table is constructed for the relationship between the physical zone address and the corresponding logical address at the time of system startup in the manner described above, and is stored in the RAM.
[0018]
When the system transmits the search standby logical address to the RAM as shown in step S12, the RAM immediately receives the search standby logical address signal and then immediately receives the search standby logical address as shown in step S14. , The physical zone corresponding to the logical address is acquired from the built-in logical / physical address mapping table. After acquiring the physical zone, as shown in step S16, each one block in the physical zone is searched in order from top to bottom, and whether or not the corresponding physical address has been acquired as shown in step S18. Then, if it is determined that the final physical address has been obtained, the search is stopped at this time, and the search process is terminated as shown in step S20. On the other hand, if it has not been found yet, step S16 is continuously executed until the corresponding physical address is found in the physical zone.
[0019]
【The invention's effect】
The fast-building scale factor logical / physical address mapping table of the present invention builds on a zone-by-zone basis, and thus does not occupy too much RAM, with only a small portion of the address relationship. In addition, since the physical zone corresponding to the logical address is searched first, and the physical zone in a small range is searched, the processing speed is higher than that of the known technology. Thus, the present invention enhances the processing speed of the semiconductor disk device (flash memory) on the assumption that not much space is increased by combining the idea of a zone with the use of a small amount of RAM, and therefore, the speed and space considerations. In addition, it has an effective equilibrium point and effectively enhances the data access performance of the system.
[0020]
The embodiments described above are for explaining the technical idea and features of the present invention, and the purpose is to allow a person having ordinary knowledge in the technical field to which the present invention belongs to understand and implement the contents of the present invention. Is to do so. That is, any equivalent changes or modifications that can be made based on the spirit described in the present invention shall fall within the scope of the present invention.
[Brief description of the drawings]
FIGS. 1A and 1B are a display diagram of a relationship between a physical address and a logical address in a well-known memory, and a logical / physical address mapping table constructed by using this relationship. .
FIGS. 2A and 2B are a diagram showing the relationship between physical zones and logical addresses in a memory and a scale factor address mapping table constructed using the present invention, respectively.
FIG. 3 is a view showing a magnetic domain reset process performed in an open system according to the present invention.
FIG. 4 is a diagram showing the structure of logical address detection according to the present invention.
FIG. 5 is a flowchart of logical address detection according to the present invention.
[Explanation of symbols]
10 Search standby logical address 12 Logical / physical address mapping table 14 Physical zone

Claims (7)

In the method of detecting a logical address of a flash memory,
A plurality of blocks in the flash memory are set as one zone, and a zone is used as a unit. At system startup, first, a scale factor address mapping table is constructed for a relationship between a zone address and its corresponding logical address, and the table is created. Storing in RAM;
The system transmitting a search standby logical address to a RAM, and the RAM obtaining a corresponding physical zone address from an address mapping table based on the search standby logical address;
Searching for each one block in the physical zone and performing this until a physical address corresponding to the search standby logical address is obtained;
A method for detecting a logical address of a flash memory, comprising: 2. The logical address detecting method for a flash memory according to claim 1, wherein the RAM is an SRAM. 2. The method according to claim 1, wherein when data is written or updated in the flash memory, new data is restricted to the same zone. Logical address detection method. 4. The logical address detection method for a flash memory according to claim 3, wherein if there is not enough space in the zone, the data originally in the zone is copied together with new data in another zone. A method for detecting a logical address of a flash memory. 2. The logical address detecting method for a flash memory according to claim 1, wherein the zone is composed of ²ⁿ blocks. 6. The method according to claim 5, wherein the value of n is at least 6. 2. The method according to claim 1, wherein the scale factor address mapping table is a logical zone address / physical address mapping table.

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