JP2004086353A - Firmware write control method and card device to which the write control method is applied - Google Patents

Abstract

A mechanism for safely executing writing or rewriting of firmware in a nonvolatile memory after mounting the nonvolatile memory in a card device is realized.
A flash memory device includes a flash ROM register provided in a card interface unit of a card device capable of communicating with a host device without controlling a firmware. Firmware can be written to the flash memory 30 in the memory 10. Furthermore, an access protect register 212 is provided in the card interface unit 21 as a mechanism for preventing the contents of the flash memory 30 from being erroneously or intentionally rewritten. Is permitted only when the code data set by the host device 1 in the access protection register 212 is a predetermined valid value.
[Selection diagram] Fig. 1

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a firmware write control method and a card device to which the write control method is applied.
[0002]
[Prior art]
In recent years, various portable electronic devices such as personal computers, PDAs, cameras, and mobile phones have been developed. In these electronic devices, a memory card, which is one of the removable storage devices, is often used. For example, a PCMCIA card (PC card) is known as a typical memory card.
[0003]
The memory card can be freely accessed from a portable electronic device. A memory card provided with a protection function for reading and writing user data is also known (Japanese Patent Laid-Open No. 7-200767).
[0004]
As the memory card, in addition to the above-described PCMCIA card (PC card), an even smaller SD (Secure Digital) memory card is known. The SD memory card is a stamp-size memory card having a built-in nonvolatile memory, and is specially designed to meet demands for miniaturization, capacity, and high speed.
[0005]
Recently, SDIO cards such as wireless communication cards have been standardized as application products of SD memory cards, and designs, developments, and sales of new card devices are starting to be started by various companies. The SDIO card performs a function as a predetermined peripheral device such as wireless communication, for example, according to firmware stored in a nonvolatile memory built in the card.
[0006]
[Problems to be solved by the invention]
However, there are the following problems when manufacturing an SDIO card.
[0007]
That is, when manufacturing a card device, usually, necessary data is written by itself for the components mounted on the card device before mounting, and then mounted on the card.
[0008]
However, if an error is detected in the write data in the inspection after packaging of the card device, a so-called retrace process such as removal of the component and rewriting of data is required. Since the SDIO card is a very small card, it takes a lot of time to remove components after packaging.
[0009]
In particular, since an SDIO card needs to be equipped with a non-volatile memory storing firmware, if an error is detected even in a part of the firmware in the inspection after packaging, the non-volatile memory itself is removed. Work such as rewriting the firmware is required, resulting in an increase in manufacturing cost.
[0010]
The present invention has been made in view of the above circumstances, and has a firmware write control method and a card capable of safely executing writing or rewriting of firmware in a nonvolatile memory after mounting the nonvolatile memory in a card device. It is intended to provide a device.
[0011]
[Means for Solving the Problems]
In order to solve the above-mentioned problems, the present invention provides a nonvolatile memory provided in a card device detachably mounted on a host device, for writing firmware for causing the card device to execute a predetermined function. A firmware writing control method, wherein a card interface unit capable of communicating with the host device without control of the firmware is provided in the card device, and a card interface unit provided in the card interface unit of the card device is provided. Determining whether the code data set by the host device in one register is a predetermined valid value; and accessing the non-volatile memory from the host device according to the determination result Via a second register provided in the card interface unit The firmware of the write operation to the nonvolatile memory by the host apparatus, characterized by comprising a step of enabling or disabling.
[0012]
According to this firmware write control method, it is possible to safely execute the writing or rewriting of the firmware in the nonvolatile memory after the nonvolatile memory is mounted on the card device.
[0013]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 shows a relationship between a card device 10 according to an embodiment of the present invention and a host device 1 which can be used by mounting it. Hereinafter, a case where an SDIO card is used as the card device 10 will be described as an example.
[0014]
The SDIO card 10 is a card device that is used by being removably mounted in an SD card slot 2 provided in various host devices 1 such as a personal computer, a PDA, a camera, and a mobile phone. The host device 1 is provided with a host controller 11 for controlling the SDIO card 10. All communication between the SDIO card 10 and the host controller 11 is controlled by a command from the host controller 11.
[0015]
The SD bus 50 connecting the host controller 11 and the SDIO card 10 has six communication lines (data DAT0-3, command CMD, clock CLK) and three power supply lines (VDD, VSS, VSS). Including. Correspondingly, the SD memory card 10 has four data pins [DAT0-3], a command pin [CMD], a clock signal pin [CLK], a power supply pin [VDD], and two ground pins [VSS]. Is provided.
[0016]
The SDIO card 10 functions as, for example, a wireless communication card, a LAN card, a GPS card, or the like. In the following, it is assumed that this is realized as a short-range wireless communication card (Bluetooth card) of the Bluetooth (R) standard.
[0017]
As shown, the SDIO card 10 has an LSI 20, a flash memory 30, and an RF / antenna unit 40 mounted thereon.
[0018]
The LSI 20 is an LSI in which the SDIO control unit 21, the baseband core 22, and the MPU 23 are integrated into one chip. The flash memory 30 is a non-volatile memory used for storing firmware defining the operation of the SDIO card 10 and card attribute information for causing the host device 1 to recognize the card. The data input / output terminal and the address input terminal of the flash memory 30 are directly connected to the LSI 20, respectively.
[0019]
The firmware stored in the flash memory 30 is executed by the MPU 23. When the MPU 23 executes the firmware, the SDIO card 10 can function as a Bluetooth card.
[0020]
The SDIO control unit 21 is a card interface for communicating with the host controller 11. The SDIO control unit 21 is configured to be able to communicate with the host controller 11 without controlling the firmware, that is, without controlling the MPU 23. That is, the SDIO control unit 21 incorporates several registers as common function registers used for a card identification operation and the like, and the host device 1 communicates with the SDIO card 10 via the host controller 11 and the SD bus 50. By simply transmitting an operation command (SD command) to the SDIO control unit 21, a desired common function register in the SDIO control unit 21 can be accessed.
[0021]
In the present embodiment, writing of firmware and card attribute information to the flash memory 30 is performed after the flash memory 30 is mounted on the SDIO card 10. That is, the writing of the firmware and the card attribute information to the rush memory 30 is executed under the control of the host device 1 after all the component mounting and packaging of the SDIO card 10 are completed. This writing operation is performed before the SDIO card 10 is shipped from the factory. Of course, even after shipment of the SDIO card 10, the user can rewrite the firmware stored in the flash memory 30 of the SDIO card 10 using a dedicated program executed by the host device 1.
[0022]
A flash ROM access register 211 and an access protect register 212 are provided in a common function register of the SDIO control unit 21 in order to realize writing / updating of firmware after mounting the flash memory 30 as described above.
[0023]
The flash ROM access register 211 is a flash ROM control register provided for accessing the flash memory 30 from the host device 1. The host device 1 sets a command or write data in the flash ROM access register 211 by issuing an SD command for accessing the flash ROM access register 211 to the SDIO card 10 via the SD bus 50. Thereby, under the control of the host device 1, the operation of writing the firmware and the card attribute information to the flash memory 30 can be executed.
[0024]
The access protect register 212 is a register provided to protect the flash memory 30 from accessing the flash memory 30. Access to the flash memory 30 via the flash ROM access register 211 is permitted only when predetermined code data is set in the access protection register 212 by the host device 1.
[0025]
The MPU 23 executes an operation necessary for short-range wireless communication in cooperation with the baseband core 22 by executing firmware stored in the flash memory 30.
[0026]
Next, an operation of writing firmware in the flash memory 30 will be described with reference to FIGS.
[0027]
FIG. 2 shows a basic procedure for writing firmware in the flash memory 30, and FIG. 3 shows a configuration of the flash ROM access register 211.
[0028]
As shown in FIG. 3, the flash ROM access register 211 is a single 8-bit wide data register (Flash Memory Data Read Register during a read operation, and Flash during a write operation) that can be read and written from the host device 1. A memory data write register) and three address registers each having a width of 8 bits that can be read and written from the host device 1 (a flash memory lower address register used for setting the lower 8 bits of the address, and a middle 8 bits of the address setting). Flash Memory Middle Address Register used, Flash Memory High Adr used for address setting of upper 8 bits ess Register). The data register is directly connected to the data input / output terminal of the flash memory 30 via an 8-bit data line, and the three address registers are directly connected to the address input terminal of the flash memory 30 via a 24-bit address line. Connected.
[0029]
Hereinafter, a basic procedure for writing firmware and card attribute information from a state where nothing has been written to the flash memory 30 after packaging the SDIO card 10 will be described with reference to the flowchart of FIG.
[0030]
When the SDIO card 10 is inserted into the SD card slot 2 of the host device 1 (step S11), an initial power supply voltage is applied to the SDIO card 10 by the host controller 11, whereby the SDIO card 10 can be initialized. The firmware write / update program 12 initializes the SDIO card 10 by issuing an SD command for initialization to the SDIO card 10 via the host controller 11 (step S12). At this time, only the SDIO control unit 21 operates in the LSI 20.
[0031]
Next, the firmware writing / updating program 12 confirms whether or not the initialization has been completed by a response from the SDIO control unit 21 (step S13). After the initialization is completed, the flash ROM register 211 (data register and address register) can be accessed. The firmware write / update program 12 accesses the flash ROM register 211 (Step S14). Access to the flash ROM register 211 is also performed by an SD command. The firmware write / update program 12 accesses the flash ROM register 211 and sets a write command (erase command and program command) and an address in the flash ROM register 211, and further sets the write data to execute the write operation of the flash memory 30. Then, the firmware is written in the flash memory 30 (steps S14 and S15).
[0032]
The above is the basic procedure. The SDIO control unit 21 operates only with the initially applied power supply voltage, and does not require any operation of the baseband core 22, the MPU 23, or the operation of firmware to be present in the flash memory 30. Since the address and data are directly connected to the flash memory 30 from the data register and the address register of the flash ROM register 211, the normal procedure for writing data to the flash EEPROM, such as issuing a command and setting write data, is performed. Only by the host device 1 using the flash ROM register 211, the control of the flash memory 30 can be performed from the host device 1 side in which the SDIO card 10 is inserted.
[0033]
As described above, since the firmware can be written in the flash memory 30 mounted on the SDIO card 10 after the packaging of the SDIO card 10, it is possible to prevent the occurrence of the above-described return step. Further, even after the SDIO card 10 is shipped, the firmware of the SDIO card 10 can be updated by writing the firmware in the same basic procedure as described above.
[0034]
Note that if the address of the flash ROM register 211 is known only by the above-described basic procedure, reading and writing can be easily performed. Therefore, there is a possibility that firmware or card attribute information may be destroyed or rewritten by accidental access or analysis after the product is shipped. Therefore, in the present embodiment, an access protect register 212 is provided as protection means for preventing access to the flash memory 30 from being easily performed, and predetermined code data is not set in the access protect register 212. Access to the flash memory 30 via the flash ROM register 211 is prohibited.
[0035]
FIG. 4 shows the configuration of the access protect register 212. The access protect register 212 has four registers each having a width of 8 bits (Protect Register <07:00>, Protect Register <15:08>, Protect Register) so that 32-bit code data for access authentication can be set. <23:16>, Protect Register <31:24>). Different addresses are assigned to these four registers, and it is determined whether or not a total of 32 bits of code data, which is a combination of data set in each of these four registers, is a predetermined valid value. Is done.
[0036]
Unless code data having a valid value is set, use of the flash ROM register 211 is invalidated, and access to the flash memory 30 via the flash ROM register 211 is prohibited. For example, as shown in FIG. 5, a gate circuit 301 is provided in a flash ROM control interface 300 arranged between each of the data register 211a and the address register 211b of the flash ROM register 211 and the flash memory 30. The gate circuit 301 can be realized by a configuration in which each of the data register 211a and the address register 211b is connected or disconnected between the data input / output terminal DATA and the address input terminal ADDR of the flash memory 30. The flash ROM control interface 300 is a memory controller for supplying control signals such as a write enable signal and an output enable signal to the control terminal CONT of the flash memory 30.
[0037]
When code data having a valid value is set in the access protect register 212, the gate circuit 301 is turned on, and the gate circuit 301 is turned on between the data register 211a and the address register 211b and the data input / output terminal DATA and address input terminal ADDR of the flash memory 30. Connect. As a result, the data register 211a and the address register 211b become valid, and access to the flash memory 30 via these registers is permitted.
[0038]
Unless code data having a valid value is set in the access protect register 212, the data register 211a and the address register 211b are not enabled, and access to the flash memory 30 is prohibited. In this case, even if the host device 1 reads the register, only “0” can be read.
[0039]
Hereinafter, the procedure of the writing process when the access authentication using the access protection register 212 is added will be described with reference to the flowchart of FIG.
[0040]
When the SDIO card 10 is inserted into the SD card slot 2 of the host device 1 (step S21), an initial power supply voltage is applied to the SDIO card 10 by the host controller 11, whereby the SDIO card 10 can be initialized. The firmware write / update program 12 initializes the SDIO card 10 by issuing an SD command for initialization to the SDIO card 10 via the host controller 11 (step S22). At this time, only the SDIO control unit 21 operates in the LSI 20.
[0041]
Next, the firmware writing / updating program 12 checks whether or not the initialization has been completed, based on a response from the SDIO control unit 21 (step S23).
[0042]
When the initialization is completed, the common function (function number 0) register can be accessed at this point. However, the flash ROM register 211 is in a protected state at this stage, and reading this register can only read “0”. The firmware write / update program 12 sequentially accesses each of the four registers constituting the access protection register 212, and sets predetermined 32-bit predetermined code data (KEY code) in the access protection register 212 (step S24). ).
[0043]
In the SDIO control unit 21, it is determined whether or not the code data is a correct value (step S25). This determination process is realized by, for example, providing a circuit in the SDIO control unit 21 for comparing a correct code data value with a code data value set in the access protection register 212.
[0044]
When the correct code data value is set in the access protect register 212, the gate circuit 301 is turned on, so that the address and data lines directly connected to the flash ROM register 211 in the SDIO control unit 21 become valid. Access is allowed.
[0045]
The firmware write / update program 12 controls the write operation of the flash memory 30 by accessing the flash ROM register 211 and setting a write command (erase command and program command), an address, and write data in the flash ROM register 211. Then, the firmware is written to the flash memory 30 (steps S26 and S27).
[0046]
The access protect register 212 can be realized by a single register. However, in the case of 8-bit data, the value of code data enabling access may be analyzed. It is preferable to use 32 bits (a plurality of registers) in order to make it difficult to easily specify. In this case, a combination of data set in a plurality of registers having different addresses is used as a code data value, and it is determined whether or not the code data is correct, so that access is performed in consideration of a relationship between each register and a value set in the register. Authentication becomes possible.
[0047]
Even after the SDIO card 10 is shipped, the firmware of the SDIO card 10 can be updated in the same procedure as described above. Further, in order to confirm that the SDIO card 10 has nothing written in the flash memory 30, as shown in the flowchart of FIG. Step 100 of determining whether or not it is operating may be added.
[0048]
It is preferable to provide a write protect register for performing write protection of the flash memory 30 in addition to the access protect register 212. In this case, when the correct code data is set in the access protection register 212, the access permitted to the flash memory 30 is read-only, and when the specific write protection release data is set in the write protection register, the flash memory is reset. Write access to the memory 30 is permitted.
[0049]
As shown in FIG. 8, a write protect register (Write Protect) is provided in the common function register of the SDIO control unit 21 in addition to the data register and the address register constituting the flash ROM register and the access protect register. Will be done.
[0050]
As shown in FIG. 9, specific write protection release data set in the write protection register 401 by the host device 1 is transmitted to a write enable circuit (WE circuit) 302 in the flash ROM control interface 300 by a write enable signal. Is supplied as a signal that permits the occurrence of As a result, the write protection of the flash memory 30 can be released.
[0051]
Hereinafter, with reference to the flowchart of FIG. 10, a description will be given of a procedure of a write process in a case where write protection using a write protect register is used in addition to access authentication using the access protect register 212.
[0052]
When the SDIO card 10 is inserted into the SD card slot 2 of the host device 1 (step S31), an initial power supply voltage is applied to the SDIO card 10 by the host controller 11, whereby the SDIO card 10 can be initialized. The firmware write / update program 12 initializes the SDIO card 10 by issuing an SD command for initialization to the SDIO card 10 via the host controller 11 (step S32). At this time, only the SDIO control unit 21 operates in the LSI 20.
[0053]
Next, the firmware writing / updating program 12 confirms whether or not the initialization has been completed by a response from the SDIO control unit 21 (step S33).
[0054]
When the initialization is completed, the common function (function number 0) register can be accessed at this point. However, the flash ROM register 211 is in a protected state at this stage, and reading this register can only read “0”. The firmware writing / updating program 12 sequentially accesses each of the four registers constituting the access protection register 212, and sets predetermined code data (KEY code) of 32 bits in the access protection register 212 (step S34). ).
[0055]
In the SDIO control unit 21, it is determined whether or not the code data is a correct value (step S35). This determination process is realized by, for example, providing a circuit in the SDIO control unit 21 for comparing a correct code data value with a code data value set in the access protection register 212.
[0056]
When the correct code data value is set in the access protect register 212, the gate circuit 301 is turned on, so that the address and data lines directly connected to the flash ROM register 211 in the SDIO control unit 21 become valid. Access is allowed. However, since the flash memory 30 is write-protected, the flash memory 30 is in a read-only state.
[0057]
The firmware writing / updating program 12 releases the write protection to the flash memory 30 by setting data for releasing the write protection in the write protection register (steps S36 and S37). Thereafter, the firmware write / update program 12 accesses the flash ROM register 211 and sets a write command (erase command and program command) and an address in the flash ROM register 211, and further sets the write data, thereby writing the flash memory 30. The operation is controlled and the firmware is written in the flash memory 30 (steps S38 and S39).
[0058]
As described above, according to the present embodiment, by using the flash ROM register 211 provided in the SDIO control unit 21 that can communicate with the host device 1 without controlling the firmware, after the flash memory 30 is mounted, The firmware can be written into the flash memory 30 in the SDIO card 10 under the control of the host device 1. In particular, by using the access protect register 212 provided in the SDIO control unit 21 and the write protect register together, the SDIO card 10 can be written / updated after the SDIO card 10 is packaged, and the SDIO card 10 can be used. It is possible to protect against destruction of firmware due to inadvertent access or the like.
[0059]
【The invention's effect】
As described above in detail, according to the present invention, it is possible to safely execute the writing or rewriting of firmware in the nonvolatile memory after the nonvolatile memory is mounted on the card device.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a relationship between a card device according to an embodiment of the present invention and a host device which can be used by mounting the card device.
FIG. 2 is an exemplary flowchart illustrating the procedure of a firmware write operation in the embodiment.
FIG. 3 is an exemplary view showing a configuration of a flash ROM access register in the embodiment.
FIG. 4 is an exemplary view showing a configuration of an access protection register according to the embodiment;
FIG. 5 is an exemplary block diagram showing a configuration example for restricting use of a flash ROM access register by using an access protect register in the embodiment;
FIG. 6 is an exemplary flowchart illustrating a second example of the procedure of a firmware write operation in the embodiment.
FIG. 7 is an exemplary flowchart illustrating a third example of the procedure of a firmware write operation in the embodiment.
FIG. 8 is a diagram showing a configuration of a write protect register in the embodiment.
FIG. 9 is a block diagram showing a configuration example for write-protecting the flash memory using the write protect register in the embodiment.
FIG. 10 is an exemplary flowchart illustrating a fourth example of the procedure of a firmware write operation in the embodiment.
[Explanation of symbols]
1. Host device
10. SDIO card
11 Host controller
21 SDIO control unit
22 ... Baseband core
23 ... MPU
211: Flash ROM access register
212: Access protect register

Claims (12)

A firmware write control method for writing firmware for causing the card device to execute a predetermined function to a nonvolatile memory provided in a card device detachably mounted on a host device, comprising:
In the card device, a card interface unit capable of communicating with the host device without control of the firmware is provided,
Determining whether the code data set by the host device in a first register provided in the card interface unit of the card device is a predetermined valid value,
According to the result of the determination, the host device executes a firmware update to the nonvolatile memory by the host device, which is executed through a second register provided in the card interface unit in order to access the nonvolatile memory from the host device. A step of permitting or inhibiting a write operation. The first register includes a plurality of registers having different addresses from each other,
The determining step includes:
A step of determining whether or not a value of code data composed of a combination of a plurality of data respectively set in the plurality of registers by the host device is a predetermined valid value. The firmware write control method according to claim 1. The card device is provided with a write protect function for inhibiting writing to the nonvolatile memory,
2. The method according to claim 1, further comprising the step of releasing the write protect function when predetermined data is set in a third register provided in the card interface unit of the card device by the host device. The described firmware writing control method. 2. The firmware write control method according to claim 1, wherein said second register includes a data register and an address register respectively coupled to a data input / output terminal and an address input terminal of said nonvolatile memory. In a card device that is configured to be removably attachable to a host device and operates according to firmware stored in a nonvolatile memory,
A card interface unit capable of communicating with the host device without control of the firmware,
Means for determining whether the code data set by the host device in a first register provided in the card interface unit of the card device is a predetermined valid value,
According to the result of the determination, the host device executes a firmware update to the nonvolatile memory by the host device, which is executed through a second register provided in the card interface unit in order to access the nonvolatile memory from the host device. A card device comprising: means for permitting or prohibiting a writing operation. The first register includes a plurality of registers having different addresses from each other,
The determining means includes:
Means for determining whether a value of code data composed of a combination of a plurality of data respectively set in the plurality of registers by the host device is a predetermined valid value or not. The card device according to claim 5. Write protection means for write-protecting the non-volatile memory to prohibit writing to the non-volatile memory;
6. The system according to claim 5, further comprising: means for canceling write protection by said write protection means when predetermined data is set by said host device in a third register provided in said card interface unit. The card device according to the above. 6. The card device according to claim 5, wherein the second register includes a data register and an address register respectively coupled to a data input / output terminal and an address input terminal of the nonvolatile memory. A firmware write control method for writing firmware for causing the card device to execute a predetermined function to a nonvolatile memory provided in a card device attachable to a host device,
In the card device, a card interface unit capable of communicating with the host device without control of the firmware is provided,
A code data setting step of causing the host device to set code data for enabling access to the nonvolatile memory to a first register provided in the card interface unit of the card device;
By causing the host device to set a command and write data for accessing the nonvolatile memory in a second register provided in the card interface unit to access the nonvolatile memory from the host device, Causing the host device to execute an operation of writing firmware to the nonvolatile memory via the second register. The first register includes a plurality of registers having different addresses from each other,
The code data setting step includes:
10. The firmware write control method according to claim 9, further comprising the step of causing the host device to set a plurality of data constituting the code data in the plurality of registers. The card device is provided with a write protect function for inhibiting writing to the nonvolatile memory,
10. The method according to claim 9, further comprising the step of causing the host device to set data for releasing the write protect function in a third register provided in the card interface unit of the card device. Firmware writing control method. 10. The firmware write control method according to claim 9, wherein said second register includes a data register and an address register respectively coupled to a data input / output terminal and an address input terminal of said nonvolatile memory.

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