JP2004071960A - Method for forming wiring film - Google Patents
Method for forming wiring film Download PDFInfo
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- JP2004071960A JP2004071960A JP2002231595A JP2002231595A JP2004071960A JP 2004071960 A JP2004071960 A JP 2004071960A JP 2002231595 A JP2002231595 A JP 2002231595A JP 2002231595 A JP2002231595 A JP 2002231595A JP 2004071960 A JP2004071960 A JP 2004071960A
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- wiring film
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- 238000000034 method Methods 0.000 title claims abstract description 43
- 239000000758 substrate Substances 0.000 claims abstract description 39
- 238000010438 heat treatment Methods 0.000 claims abstract description 19
- 229910052751 metal Inorganic materials 0.000 claims abstract description 15
- 239000002184 metal Substances 0.000 claims abstract description 15
- 239000007789 gas Substances 0.000 claims abstract description 12
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 8
- 238000004544 sputter deposition Methods 0.000 claims description 19
- 239000011261 inert gas Substances 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 abstract description 14
- 238000012545 processing Methods 0.000 abstract description 2
- 239000013078 crystal Substances 0.000 description 11
- 239000010949 copper Substances 0.000 description 8
- 229910052802 copper Inorganic materials 0.000 description 5
- 229910000881 Cu alloy Inorganic materials 0.000 description 4
- 230000002950 deficient Effects 0.000 description 4
- 229910001279 Dy alloy Inorganic materials 0.000 description 3
- 239000000654 additive Substances 0.000 description 3
- 230000000996 additive effect Effects 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 229910002065 alloy metal Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- 229910001316 Ag alloy Inorganic materials 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229920000535 Tan II Polymers 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000009833 condensation Methods 0.000 description 1
- 230000005494 condensation Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
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- 238000009832 plasma treatment Methods 0.000 description 1
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- 229910052709 silver Inorganic materials 0.000 description 1
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【0001】
【発明の属する技術分野】
本発明は、配線膜の形成方法に関する技術分野に属し、詳細には、基板上の絶縁膜(孔を有する)の上に、金属よりなる配線膜をスパッタリング法により成膜した後、この配線膜を加圧加熱処理することにより前記絶縁膜の孔の内部に充填する配線膜の形成方法に関する技術分野に属するものである。
【0002】
【従来の技術】
特開平11−260820 号公報や特開2001−7050 号公報には、基板上の絶縁膜(孔を有する)の上に、金属(銅等)よりなる配線膜をスパッタリング法により成膜した後、この配線膜を加圧加熱処理することにより前記絶縁膜の孔の内部に充填する(埋め込む)配線膜の形成方法が記載されている。
【0003】
上記特開平11−260820 号公報に記載の方法の実施例として、最小孔径:0.15μm、アスペクト比(AR):3.3 の孔にCu配線膜の埋め込み可能との実施例がある。一方、上記特開2001−7050 号公報に記載の方法の実施例として、最小孔径:0.15μm、AR:6.67の孔にターゲット基板間距離50mm、室温の条件で成膜されたCu配線膜の埋め込み可能との実施例がある。
【0004】
【発明が解決しようとする課題】
前記従来技術のように、孔の径が0.15μm程度までの場合については、配線膜を加圧加熱処理により孔に埋め込む方法は、これまでにも提案されている。しかし、半導体技術はますます孔や溝(以下、孔という)の開口部の径が微小となる方向であり、孔の径:0.15μm未満且つアスペクト比:3以上となるような厳しい条件下においては、従来の手法では配線膜の埋め込み性は十分ではないことが分かった。
【0005】
本発明は、このような事情に着目してなされたものであって、その目的は、絶縁膜の孔の径:0.15μm未満且つアスペクト比:3以上という厳しい条件の場合であっても、この孔に配線膜を埋め込む(充填する)ことができる配線膜の形成方法を提供しようとするものである。
【0006】
【課題を解決するための手段】
上記の目的を達成するために、本発明に係る配線膜の形成方法は、請求項1〜3記載の配線膜の形成方法(第1発明〜第3発明に係る配線膜の形成方法)としており、それは次のような構成としたものである。
【0007】
即ち、請求項1記載の配線膜の形成方法は、基板上の、孔を有する絶縁膜の上に、金属よりなる配線膜をスパッタリング法により成膜した後、この配線膜を加圧加熱処理することにより前記孔の内部に充填する配線膜の形成方法において、前記スパッタリング法により成膜する際の基板温度を−40〜−5℃とすることを特徴とする配線膜の形成方法である(第1発明)。
【0008】
請求項2記載の配線膜の形成方法は、前記スパッタリング法により成膜する際の雰囲気ガスとして水素ガスを混合した不活性ガスを用いる請求項1記載の配線膜の形成方法である(第2発明)。
【0009】
請求項3記載の配線膜の形成方法は、前記孔の開口部の径が0.15μm未満であると共に、前記孔の下記式(1) で示されるアスペクト比(AR)が3以上である請求項1または2記載の配線膜の形成方法である(第3発明)。但し、下記式(1) において、D:孔の深さ(μm)、d:孔の開口部の径(μm)である。
アスペクト比(AR)=D/d −−−−−−−−−−−−−−−−−−− 式(1)
【0010】
【発明の実施の形態】
本発明は例えば次のようにして実施する。
基板上の絶縁膜(孔を有する)の上に、金属よりなる配線膜をスパッタリング法により成膜した後、この配線膜を加圧加熱処理することにより前記孔の内部に充填する。このとき、スパッタリング法により成膜する際の基板温度を−40〜−5℃とする。この成膜の際の雰囲気ガスとしては、水素ガスを混合した不活性ガス等を用いる。
【0011】
このような形態で本発明が実施される。
【0012】
本発明者らは、前述の本発明の目的を達成すべく、絶縁膜の孔の径:0.15μm未満且つアスペクト比:3以上という厳しい条件の場合であっても、この孔に配線膜を埋め込む(充填する)ことができる配線膜の形成方法について鋭意研究を行った。その結果、このような厳しい条件の場合であっても孔に配線膜を埋め込むことができるようにするには、スパッタ膜(スパッタリング法により成膜された配線膜)の「粒径の微細化」とともに「結晶粒の軟化」が必要不可欠であることを見出し、本発明を完成するに至った。
【0013】
即ち、スパッタリング法により金属(純金属もしくは合金金属)よりなる配線膜を成膜するに際し、−40〜−5℃という従来に無い、極めて低い基板温度にて成膜することによって配線膜の「結晶粒の微細化」および「結晶粒の軟化」を実現し、粒界滑り・転位滑り・拡散を促進させ、配線膜の300 〜400 ℃の加圧加熱処理時のリフロー性(孔内部への埋め込み性)を向上させることができたのである。
【0014】
従来技術の特開2001−7050 号公報に記載の方法では、0.1 μm以下の微細結晶粒子からなる膜(配線膜)をスパッタリング時点で形成することに着眼し、成膜時の基板温度としては室温〜200 ℃とすることが推奨されており、それは本公報の特許請求の範囲の請求項5にも挙げられている。このように、通常の成膜時の基板温度は室温程度以上であることが一般的である。なお、本公報(特開2001−7050 号公報)の発明の詳細な説明の欄には、成膜時の基板温度が零下数10℃でもよいと記載されてはいるが、それは微細結晶粒を得ることを阻害しないのであれば低温であってもよいという程度の認識であり、積極的に基板温度の低下を図ろうというものではなかった。即ち、本発明のように成膜時の基板温度低下によって配線膜の結晶粒の軟化を図ろうという点については、従来何ら検討されていなかったのである。しかし、その後の本発明者らの検討により、成膜時の基板温度を低温とし且つ−40〜−5℃という特定の温度範囲に限定することによって、低降伏温度、低弾性定数の配線膜が得られ(即ち、配線膜の結晶粒の軟化が充分に達成でき)、高圧埋め込み処理時における300 〜400 ℃の温度領域において、配線膜の結晶組織変形が一層促進されることが明らかになったのである。
【0015】
以上のようにスパッタリング法により金属よりなる配線膜を成膜するに際し、基板温度を−40〜−5℃とすることによって、配線膜の「結晶粒の微細化」および「結晶粒の軟化」を実現することができ、加圧加熱処理時のリフロー性に優れた配線膜が得られる(成膜される)。従って、このような条件(基板温度)で絶縁膜の上に成膜された配線膜は、これを加圧加熱処理により絶縁膜の孔の内部に充填するに際し、絶縁膜の孔の径:0.15μm未満且つアスペクト比:3以上という厳しい条件の場合であっても、この孔に充分に充填する(埋め込む)ことができることが確認された。
【0016】
本発明は以上のような知見に基づき完成された。このようにして完成された本発明に係る配線膜の形成方法は、基板上の絶縁膜(孔を有する)の上に、金属よりなる配線膜をスパッタリング法により成膜した後、この配線膜を加圧加熱処理することにより前記孔の内部に充填する配線膜の形成方法において、前記スパッタリング法により成膜する際の基板温度を−40〜−5℃とすることを特徴とする配線膜の形成方法であることとしている。この配線膜の形成方法によれば、絶縁膜の孔の径:0.15μm未満且つアスペクト比:3以上という厳しい条件の場合であっても、この孔に配線膜を充分に充填する(埋め込む)ことができるようになる。
【0017】
なお、スパッタリング法により成膜する際の基板温度を−5℃超にした場合には、スパッタリング法により得られる(成膜される)配線膜は結晶粒の軟化が不充分なものとなり、これを上記のような絶縁膜の孔の径:0.15μm未満且つアスペクト比:3以上という厳しい条件の絶縁膜の孔に充分に埋め込むことができなくなる。従って、成膜時の基板温度は−5℃以下とする必要がある。この成膜時の基板温度が−5℃以下において低いほど絶縁膜の孔への充填性(埋め込み性)が向上し、絶縁膜の孔の径:0.15μm未満且つアスペクト比:3以上の孔の中でも、孔径がより小さい孔や、アスペクト比がより大きい孔に対しても配線膜を充分に充填することができるようになる。しかし、成膜後のものは、結露防止のため、常温に戻してから成膜装置から取り出す必要があり、成膜時の基板温度を−40℃未満にすると、常温に戻すまでの時間が極めて長くなり、スループットが著しく落ちて配線膜形成工程の生産性が大幅に低下する。この点から、成膜時の基板温度は−40℃以上とする必要がある。
【0018】
本発明において、スパッタリング法により成膜する際の雰囲気ガスとしては、水素ガスを混合した不活性ガスを用いることが望ましい(第2発明)。それは、このようなガスを用いると、成膜される配線膜(金属)中に水素が入り込み、その膜中の水素による金属配線膜原子の拡散現象促進によって、配線膜の変形抵抗が小さくなり、結晶粒子自体が組成変形しやすくなり、ひいては絶縁膜の孔への充填性(埋め込み性)が向上するからである。
【0019】
配線膜は金属(純金属もしくは合金金属)よりなり、この金属の種類は特には限定されないが、純CuもしくはCu合金であることが好ましい。純AgやAg合金は抵抗値は低いものの、半導体プロセスで用いられる酸素プラズマ処理の耐性に劣るなどの問題があるのに対し、純CuやCu合金であればそのような問題がないからである。Cu合金としては、耐食性や耐エレクトロマイグレーションの向上などを含め最適な添加元素を選択する必要があるが、後述の実施例に示すように、Cu−1at%Dy合金では水素無添加成膜の場合においても確実に十分な埋め込み特性の向上が得られている。これは、合金化による結晶粒超微細化によって、塑性変形が促進されたためと考えられる。このように、純CuよりもCu合金を使用した場合の方が、より狭い孔や高アスペクト比の絶縁膜の孔への充填性に優れる可能性が高い。但し、合金を採用する場合、配線膜としての基本的な要求特性である抵抗値が増加するデメリットがあるので、求められる特性によって添加元素や添加量の最適化が必要である。
【0020】
前述のように、絶縁膜の孔の径:0.15μm程度までの場合については、この孔に配線膜を加圧加熱処理により埋め込む方法は、従来においても提案されているが、絶縁膜の孔の径:0.15μm未満且つアスペクト比:3以上という厳しい条件の場合については、従来提案されている手法では配線膜の埋め込み性は十分ではない。これに対し、本発明に係る配線膜の形成方法によれば、絶縁膜の孔の径:0.15μm未満且つアスペクト比:3以上という厳しい条件の場合であっても、この孔に配線膜を充分に充填する(埋め込む)ことができるようになる。この点から、本発明に係る配線膜の形成方法は、絶縁膜の孔の開口部の径が0.15μm未満であると共に、この孔の下記式(1) で示されるアスペクト比(AR)が3以上である場合に、特に有効であり、好適に用いることができ、効果が有効に発揮される(第3発明)。更には、絶縁膜の孔の開口部の径が0.14μm以下であると共に、この孔の下記式(1) で示されるアスペクト比(AR)が4以上である場合に、より一層に有効であり、好適に用いることができる。
【0021】
アスペクト比(AR)=D/d −−−−−−−−−−−−−−−−−−− 式(1)
但し、上記式(1) において、D:孔の深さ(μm)、d:孔の開口部の径(μm)である。
【0022】
本発明において、基板上の絶縁膜(孔を有する)は、基板に接して基板上に形成された絶縁膜(1層目の絶縁膜)に限定されず、その上のn層目の絶縁膜も対象となり得る(n:任意数)。すなわち、1層目の絶縁膜の上に形成された配線膜(1層目の配線膜)の上に形成された絶縁膜(2層目の絶縁膜)、2層目の絶縁膜の上に形成された配線膜(2層目の配線膜)の上に形成された絶縁膜(3層目の絶縁膜)、・・・・・、n層目の絶縁膜の上に形成された配線膜(n層目の配線膜)の上に形成された絶縁膜(n+1層目の絶縁膜)も対象となり得る。
【0023】
本発明において、絶縁膜の孔とは、配線形成のために絶縁膜に予め設けられる孔のことであり、この中には溝という孔も含まれる(即ち、溝も含む)ものとする。このような孔としては、絶縁膜に設けられるコンタクトホール、ヴィアホール、トレンチ(配線溝)等がある。デュアルダマシンといわれる構造の配線形成手法によるものにおいては、スリット形状の配線溝の底部の一部に貫通孔が設けられている。この場合には、絶縁膜の孔は、配線溝および貫通孔を総合したものを指す。
【0024】
このデュアルダマシン構造の場合、孔の開口部はスリット形状の配線溝の開口部に相当するものとする。前記d(:孔の開口部の径)は、スリット幅に相当するものとする。前記D(:孔の深さ)は、孔の開口部から貫通孔の最下部までの深さ(距離)、即ち、スリット形状の配線溝の深さと貫通孔自体の深さとの合計深さに相当するものとする。
【0025】
配線膜を絶縁膜の孔の内部に充填するための加圧加熱処理は、加圧すると共に加熱するという処理であり、高温下で高圧を作用させる処理である。このとき、処理条件(圧力、温度)については、特には限定されず、種々の条件を採用することができ、通常は、例えば温度:300 〜400 ℃、圧力:150MPaとする。
【0026】
【実施例】
本発明の実施例及び比較例を以下説明する。なお、本発明は本実施例に限定されるものではない。比較例は本発明の実施例に対する比較のための例であり、従来技術の例に限定されるものではない。
【0027】
2cm角のSi基板上に形成された絶縁膜であって、孔径:0.13μm、ピッチ:450nm、アスペクト比:5のVia hole(ヴィアホール)が形成された絶縁膜の上に、DCマグネトロンスパッタリング法により、厚さ:300ÅのTaN 膜(バリア層)を形成した後、厚さ:7500Åの純CuもしくはCu−Dy 合金よりなる膜(配線膜)を形成した。
【0028】
このとき、TaN 膜(バリア層)の成膜は、純Taターゲットを用いて、ターゲット−基板間距離:55mm、到達真空度:1×10−6torr、ガス圧:5mtorr 、投入電力密度DC:1.9 W/cm2 、Arと窒素の流量比を4:1としたガスによる反応性スパッタで形成した。
【0029】
純CuもしくはCu−Dy 合金よりなる膜(配線膜)は、ターゲット−基板間距離:55mm、到達真空度:1×10−6torr、ガス圧:2mtorr 、投入電力密度DC:3.3W/cm2 の条件で、基板温度およびArと水素の流量比を変化させて形成した。基板温度はチラーを用いて制御した。
【0030】
上記配線膜の形成後、絶縁膜の孔(Via hole)の内部へ配線膜を充填すべく加圧加熱処理をした。このとき、加圧加熱処理は、加圧加熱処理装置を用いて、Arガスを主成分とするガス雰囲気下、温度:400 ℃、圧力:150MPaで、60分保持して行った。
【0031】
上記加圧加熱処理の後、絶縁膜の孔への配線膜の充填性(埋め込み性)を評価した。この評価は、上記加圧加熱処理後のものを検査して完全に孔へ配線膜が充填されているものを良品とし、そうでないものを不良品とし、良品の割合(%)すなわち歩留まり(%)を求めることにより行った。なお、この歩留まり(%)は、具体的には下記式(2) により求められる値である。
歩留まり(%)=(良品のVia hole数/全Via hole数)×100 −−−−式(2)
【0032】
上記評価の結果を配線膜の成膜条件等とともに表1に示す。なお、歩留まりが80%以上のものを◎、50%以上〜80%未満のものを○、20%以上〜50%未満のものを△、20%未満のものを×と表示した。◎〜○を合格、△〜×を不合格とした。
【0033】
表1からわかるように、比較例1〜3の場合、配線膜を成膜する際の基板温度が0℃以上(0℃、20℃)であり、このため、成膜された絶縁膜の孔への配線膜の充填性が悪い(歩留まり:△〜×)。
【0034】
これに対して、本発明の実施例1〜3の場合、配線膜を成膜する際の基板温度が−5℃以下(−5℃、−15℃)であり、このため、成膜された絶縁膜の孔への配線膜の充填性が優れている(歩留まり:◎〜○)。
【0035】
このように本発明の実施例1〜3の場合、絶縁膜の孔径:0.13μm、アスペクト比:5という厳しい条件の場合であっても、絶縁膜の孔への配線膜の充填性が良好である。
【0036】
【表1】
【0037】
【発明の効果】
本発明に係る配線膜の形成方法によれば、絶縁膜の孔の径:0.15μm未満且つアスペクト比:3以上という厳しい条件の場合であっても、この孔に配線膜を充分に充填する(埋め込む)ことができるようになる。[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention belongs to a technical field related to a method of forming a wiring film, and more specifically, forms a wiring film made of metal on an insulating film (having holes) on a substrate by a sputtering method, and then forms the wiring film. In a technical field related to a method of forming a wiring film that fills the inside of the hole of the insulating film by applying a pressure and heat treatment.
[0002]
[Prior art]
In JP-A-11-260820 and JP-A-2001-7050, a wiring film made of metal (such as copper) is formed on an insulating film (having holes) on a substrate by a sputtering method. A method for forming a wiring film that fills (embeds) holes in the insulating film by subjecting the wiring film to a heat treatment under pressure is described.
[0003]
As an embodiment of the method described in JP-A-11-260820, there is an embodiment in which a Cu wiring film can be embedded in a hole having a minimum hole diameter of 0.15 μm and an aspect ratio (AR) of 3.3. On the other hand, as an embodiment of the method described in JP-A-2001-7050, a Cu wiring formed in a hole having a minimum hole diameter of 0.15 μm and an AR of 6.67 at a distance between target substrates of 50 mm and at room temperature is used. There is an embodiment in which a film can be embedded.
[0004]
[Problems to be solved by the invention]
As in the prior art, when the diameter of the hole is up to about 0.15 μm, a method of embedding the wiring film in the hole by pressurizing and heating has been proposed. However, in semiconductor technology, the diameter of the opening of a hole or a groove (hereinafter, referred to as a hole) is becoming increasingly smaller, and severe conditions such that the diameter of the hole is less than 0.15 μm and the aspect ratio is 3 or more. It was found that the embedding property of the wiring film was not sufficient in the conventional method.
[0005]
The present invention has been made in view of such circumstances, and its purpose is to provide a semiconductor device having a severe condition in which the diameter of a hole in an insulating film is less than 0.15 μm and the aspect ratio is 3 or more. An object of the present invention is to provide a method for forming a wiring film in which a wiring film can be embedded (filled) in the hole.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, a method for forming a wiring film according to the present invention is a method for forming a wiring film according to claims 1 to 3 (a method for forming a wiring film according to first to third inventions). It has the following configuration.
[0007]
That is, in the method of forming a wiring film according to the first aspect, after forming a wiring film made of metal by sputtering on an insulating film having holes on a substrate, the wiring film is subjected to pressure and heat treatment. The method for forming a wiring film that fills the inside of the hole is characterized in that the substrate temperature at the time of forming the film by the sputtering method is -40 to -5 ° C. 1 invention).
[0008]
The method for forming a wiring film according to claim 2 is the method for forming a wiring film according to claim 1, wherein an inert gas mixed with hydrogen gas is used as an atmosphere gas when the film is formed by the sputtering method. ).
[0009]
4. The method for forming a wiring film according to claim 3, wherein the diameter of the opening of the hole is less than 0.15 μm, and the aspect ratio (AR) of the hole represented by the following formula (1) is 3 or more. Item 3 is a method for forming a wiring film according to Item 1 or 2 (third invention). In the following formula (1), D: depth of the hole (μm), and d: diameter of the opening of the hole (μm).
Aspect ratio (AR) = D / d-------------Formula (1)
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
The present invention is implemented, for example, as follows.
After a wiring film made of metal is formed on an insulating film (having holes) on a substrate by a sputtering method, the wiring film is subjected to pressure and heat treatment to fill the inside of the holes. At this time, the substrate temperature when forming a film by a sputtering method is set to -40 to -5 ° C. As an atmosphere gas at the time of this film formation, an inert gas mixed with a hydrogen gas or the like is used.
[0011]
The present invention is implemented in such a form.
[0012]
In order to achieve the above-mentioned object of the present invention, the present inventors have set the wiring film in this hole even under severe conditions where the diameter of the hole in the insulating film is less than 0.15 μm and the aspect ratio is 3 or more. Intensive research was conducted on a method of forming a wiring film that can be embedded (filled). As a result, in order to be able to embed the wiring film in the hole even under such severe conditions, it is necessary to reduce the particle size of the sputtered film (wiring film formed by the sputtering method). At the same time, they found that "softening of crystal grains" was indispensable, and completed the present invention.
[0013]
That is, when a wiring film made of a metal (pure metal or alloy metal) is formed by a sputtering method, the film is formed at an extremely low substrate temperature of -40 to -5 [deg.] C., which is not conventionally used, so that the "crystal" of the wiring film is formed. It realizes “fine grain refinement” and “softening of crystal grains”, promotes grain boundary sliding, dislocation sliding and diffusion, and reflow properties during the pressurization and heat treatment of the wiring film at 300 to 400 ° C. ) Could be improved.
[0014]
In the method described in Japanese Patent Application Laid-Open No. 2001-7050, attention is focused on forming a film (wiring film) composed of fine crystal grains of 0.1 μm or less at the time of sputtering, and the substrate temperature during the film formation is set as the temperature. Is recommended to be between room temperature and 200 ° C., which is also listed in claim 5 of the present specification. As described above, the substrate temperature during normal film formation is generally about room temperature or higher. Although the column of the detailed description of the invention in this publication (Japanese Patent Application Laid-Open No. 2001-7050) states that the substrate temperature during film formation may be several tens of degrees below zero, it does not It was recognized that the temperature could be low as long as it did not hinder the obtainment, and it was not intended to actively lower the substrate temperature. That is, no attempt has been made at all to attempt to soften the crystal grains of the wiring film by lowering the substrate temperature during film formation as in the present invention. However, according to the study of the present inventors thereafter, by setting the substrate temperature during film formation to a low temperature and limiting the temperature to a specific temperature range of −40 to −5 ° C., a wiring film having a low yield temperature and a low elastic constant can be obtained. (Ie, the softening of the crystal grains of the wiring film can be sufficiently achieved), and it has been revealed that the deformation of the crystal structure of the wiring film is further promoted in the temperature range of 300 to 400 ° C. during the high-pressure embedding process. It is.
[0015]
As described above, when the wiring film made of metal is formed by the sputtering method, the substrate temperature is set to −40 to −5 ° C., so that “fine crystal grains” and “softening of crystal grains” of the wiring film are reduced. A wiring film having excellent reflow properties at the time of pressurizing and heating can be obtained (formed). Therefore, when the wiring film formed on the insulating film under such conditions (substrate temperature) is filled into the holes of the insulating film by pressurization and heat treatment, the diameter of the hole of the insulating film: 0 Even under severe conditions of less than .15 μm and an aspect ratio of 3 or more, it was confirmed that the holes could be sufficiently filled (embedded).
[0016]
The present invention has been completed based on the above findings. In the method of forming a wiring film according to the present invention completed in this way, a wiring film made of a metal is formed on an insulating film (having holes) on a substrate by a sputtering method. In the method of forming a wiring film that fills the inside of the hole by performing heat treatment under pressure, the substrate temperature when forming the film by the sputtering method is set to −40 to −5 ° C. The way to go. According to this method for forming a wiring film, the wiring film is sufficiently filled (embedded) even under severe conditions where the diameter of the hole of the insulating film is less than 0.15 μm and the aspect ratio is 3 or more. Will be able to do it.
[0017]
If the substrate temperature at the time of forming a film by the sputtering method is higher than −5 ° C., the wiring film obtained (formed) by the sputtering method has insufficient softening of crystal grains. It is impossible to sufficiently fill the holes of the insulating film under such severe conditions that the hole diameter of the insulating film is less than 0.15 μm and the aspect ratio is 3 or more. Therefore, the substrate temperature during film formation needs to be -5 ° C or lower. As the substrate temperature during film formation is lower at -5 ° C. or lower, the filling property (embedding property) into the holes of the insulating film is improved, and the diameter of the holes in the insulating film is less than 0.15 μm and the aspect ratio is 3 or more. Among them, the wiring film can be sufficiently filled even for a hole having a smaller hole diameter and a hole having a larger aspect ratio. However, after film formation, it is necessary to return to room temperature before taking out of the film forming apparatus in order to prevent dew condensation. If the substrate temperature during film formation is lower than −40 ° C., the time required to return to room temperature is extremely long. As a result, the throughput is significantly reduced, and the productivity of the wiring film forming process is significantly reduced. From this point, the substrate temperature at the time of film formation needs to be −40 ° C. or higher.
[0018]
In the present invention, it is desirable to use an inert gas mixed with hydrogen gas as an atmosphere gas when forming a film by a sputtering method (second invention). When such a gas is used, hydrogen enters the wiring film (metal) to be formed, and the hydrogen in the film promotes the diffusion phenomenon of the metal wiring film atoms, thereby reducing the deformation resistance of the wiring film. This is because the crystal grains themselves tend to be deformed in composition, and as a result, the filling property (embedding property) into the holes of the insulating film is improved.
[0019]
The wiring film is made of a metal (pure metal or alloy metal), and the type of the metal is not particularly limited, but is preferably pure Cu or Cu alloy. Pure Ag and Ag alloys have low resistance, but have problems such as poor resistance to oxygen plasma treatment used in semiconductor processes, whereas pure Cu and Cu alloy do not have such problems. . As a Cu alloy, it is necessary to select an optimum additive element including an improvement in corrosion resistance and electromigration resistance. However, as shown in an example described later, a Cu-1 at% Dy alloy is used in the case of hydrogen-free film formation. In this case, a sufficient improvement in the embedding characteristics is surely obtained. This is considered to be due to the fact that plastic deformation was promoted by the ultrafine grain refinement by alloying. As described above, when a Cu alloy is used, there is a higher possibility that a hole having a narrower hole or an insulating film having a high aspect ratio is more excellently filled than a pure Cu. However, in the case of using an alloy, there is a demerit that a resistance value, which is a basic required characteristic of a wiring film, is increased. Therefore, it is necessary to optimize an additive element and an additive amount according to required characteristics.
[0020]
As described above, in the case where the diameter of the hole of the insulating film is up to about 0.15 μm, a method of embedding the wiring film in the hole by pressurizing and heating has been conventionally proposed. In the case of severe conditions such as a diameter of less than 0.15 μm and an aspect ratio of 3 or more, the embedding property of the wiring film is not sufficient by the conventionally proposed method. On the other hand, according to the method of forming a wiring film according to the present invention, even under severe conditions such as a hole diameter of the insulating film of less than 0.15 μm and an aspect ratio of 3 or more, the wiring film is formed in this hole. It can be filled (embedded) sufficiently. From this point, in the method of forming a wiring film according to the present invention, the diameter of the opening of the hole in the insulating film is less than 0.15 μm, and the aspect ratio (AR) of the hole represented by the following formula (1) is: When it is 3 or more, it is particularly effective and can be suitably used, and the effect is effectively exhibited (third invention). Further, when the diameter of the opening of the hole in the insulating film is 0.14 μm or less and the aspect ratio (AR) of the hole is 4 or more, the effect is more effective. Yes, it can be used preferably.
[0021]
Aspect ratio (AR) = D / d-------------Formula (1)
In the above equation (1), D is the depth of the hole (μm), and d is the diameter of the opening of the hole (μm).
[0022]
In the present invention, the insulating film (having holes) on the substrate is not limited to the insulating film (first insulating film) formed on the substrate in contact with the substrate, but the n-th insulating film thereon (N: arbitrary number). That is, on the insulating film (second insulating film) formed on the wiring film formed on the first insulating film (first wiring film), on the second insulating film An insulating film (third insulating film) formed on the formed wiring film (second wiring film),..., A wiring film formed on the n-th insulating film The insulating film (the (n + 1) th insulating film) formed on the (nth wiring film) can also be a target.
[0023]
In the present invention, the hole in the insulating film is a hole provided in the insulating film in advance for forming a wiring, and includes a hole called a groove (that is, includes a groove). Such holes include a contact hole, a via hole, a trench (wiring groove) and the like provided in the insulating film. In a wiring forming method having a structure called dual damascene, a through hole is provided at a part of the bottom of a slit-shaped wiring groove. In this case, the hole in the insulating film indicates a combination of the wiring groove and the through hole.
[0024]
In the case of this dual damascene structure, the opening of the hole corresponds to the opening of the wiring groove having a slit shape. The d (the diameter of the opening of the hole) corresponds to the slit width. The D (depth of the hole) is the depth (distance) from the opening of the hole to the lowermost portion of the through hole, that is, the total depth of the depth of the slit-shaped wiring groove and the depth of the through hole itself. Shall be equivalent.
[0025]
The pressurizing and heating process for filling the wiring film into the inside of the hole of the insulating film is a process of applying pressure and heating, and a process of applying a high pressure at a high temperature. At this time, the processing conditions (pressure and temperature) are not particularly limited, and various conditions can be adopted. Usually, for example, the temperature is 300 to 400 ° C. and the pressure is 150 MPa.
[0026]
【Example】
Examples of the present invention and comparative examples will be described below. Note that the present invention is not limited to the present embodiment. The comparative example is an example for comparison with the example of the present invention, and is not limited to the example of the related art.
[0027]
DC magnetron sputtering is performed on an insulating film formed on a 2 cm square Si substrate and having a via hole with a hole diameter of 0.13 μm, a pitch of 450 nm, and an aspect ratio of 5 After forming a TaN film (barrier layer) having a thickness of 300 ° by a method, a film (wiring film) made of pure Cu or Cu-Dy alloy having a thickness of 7500 ° was formed.
[0028]
At this time, the TaN 2 film (barrier layer) was formed by using a pure Ta target, a distance between the target and the substrate: 55 mm, a degree of ultimate vacuum: 1 × 10 −6 torr, a gas pressure: 5 mtorr, and a power density DC: It was formed by reactive sputtering using a gas of 1.9 W / cm 2 and a flow ratio of Ar to nitrogen of 4: 1.
[0029]
The film (wiring film) made of pure Cu or Cu-Dy alloy has a target-substrate distance of 55 mm, a degree of ultimate vacuum of 1 × 10 −6 torr, a gas pressure of 2 mtorr, and an input power density DC of 3.3 W / cm. Under the conditions of 2 , the substrate was formed while changing the substrate temperature and the flow ratio of Ar and hydrogen. The substrate temperature was controlled using a chiller.
[0030]
After the formation of the wiring film, a pressure and heat treatment was performed to fill the wiring film into the inside of a via hole of the insulating film. At this time, the pressurized heat treatment was performed by using a pressurized heat treatment apparatus at a temperature of 400 ° C. and a pressure of 150 MPa for 60 minutes in a gas atmosphere containing Ar gas as a main component.
[0031]
After the pressurizing and heating treatment, the filling property (embedding property) of the wiring film into the holes of the insulating film was evaluated. In this evaluation, the product after the above-mentioned pressurization and heat treatment was inspected, and a product in which the wiring film was completely filled in the hole was regarded as a non-defective product, and a non-defective product was regarded as a defective product. ). The yield (%) is specifically a value obtained by the following equation (2).
Yield (%) = (Number of non-defective Via holes / Total number of Via holes) × 100 Equation (2)
[0032]
Table 1 shows the results of the above evaluation together with the conditions for forming the wiring film. In addition, の も の indicates that the yield was 80% or more, ○ indicates that the yield was 50% or more and less than 80%, Δ indicates that the yield was 20% or more and less than 50%, and X indicates that the yield was less than 20%. ◎ to ○ were passed, and × to × were rejected.
[0033]
As can be seen from Table 1, in the case of Comparative Examples 1 to 3, the substrate temperature at the time of forming the wiring film is 0 ° C. or more (0 ° C., 20 ° C.). The filling property of the wiring film into the substrate is poor (yield: Δ to ×).
[0034]
On the other hand, in Examples 1 to 3 of the present invention, the substrate temperature at the time of forming the wiring film was −5 ° C. or less (−5 ° C., −15 ° C.). The filling property of the wiring film into the holes of the insulating film is excellent (yield: 〜 to ○).
[0035]
Thus, in the case of Examples 1 to 3 of the present invention, the filling property of the wiring film into the holes of the insulating film is good even under the severe conditions of the hole diameter of the insulating film: 0.13 μm and the aspect ratio: 5. It is.
[0036]
[Table 1]
[0037]
【The invention's effect】
According to the method of forming a wiring film according to the present invention, even in a severe condition that the diameter of the hole of the insulating film is less than 0.15 μm and the aspect ratio is 3 or more, the hole is sufficiently filled with the wiring film. (Embed).
Claims (3)
アスペクト比(AR)=D/d −−−−−−−−−−−−−−−−−−− 式(1)
ただし、上記式(1) において、D:孔の深さ(μm)、d:孔の開口部の径(μm)である。The method according to claim 1, wherein the diameter of the opening of the hole is less than 0.15 μm, and the aspect ratio (AR) of the hole represented by the following formula (1) is 3 or more.
Aspect ratio (AR) = D / d-------------Formula (1)
Here, in the above formula (1), D: depth of the hole (μm) and d: diameter of the opening of the hole (μm).
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|---|---|---|---|
| JP2002231595A JP2004071960A (en) | 2002-08-08 | 2002-08-08 | Method for forming wiring film |
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| Application Number | Priority Date | Filing Date | Title |
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| JP2002231595A JP2004071960A (en) | 2002-08-08 | 2002-08-08 | Method for forming wiring film |
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| JP2004071960A true JP2004071960A (en) | 2004-03-04 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007258256A (en) * | 2006-03-20 | 2007-10-04 | Kobe Steel Ltd | Manufacturing method of semiconductor wiring |
| JP2008021807A (en) * | 2006-07-12 | 2008-01-31 | Kobe Steel Ltd | Manufacturing method of semiconductor wiring |
-
2002
- 2002-08-08 JP JP2002231595A patent/JP2004071960A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007258256A (en) * | 2006-03-20 | 2007-10-04 | Kobe Steel Ltd | Manufacturing method of semiconductor wiring |
| JP2008021807A (en) * | 2006-07-12 | 2008-01-31 | Kobe Steel Ltd | Manufacturing method of semiconductor wiring |
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