JP2003318998A - Data communication device and data communication method - Google Patents

Abstract

(57) [Problem] To provide a data communication device and a data communication method capable of improving the accuracy of data reception in data communication for transmitting and receiving data by serial communication. SOLUTION: A data receiving unit for receiving a data frame which is one data transmission unit in which signal identification data for judging the validity of data is added to data, a signal edge in the data frame received by the data receiving unit A bit determination position correction means for correcting a bit determination position by correcting a reference point of bit determination in the data frame, and the data based on the bit determination position corrected by the bit determination position correction means. Data validity determining means for determining the validity of the data received by the receiving unit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transmission / reception apparatus and a transmission / reception method for serial communication, and more particularly, in serial communication using only a signal line for data transmission / reception without using a signal line for control. The present invention relates to a data transmission / reception device and a data transmission / reception method.

[0002]

2. Description of the Related Art Conventionally, a serial communication device (also referred to as a data transmission device when transmitting and also referred to as a data receiving device when receiving) is, for example, a central processing unit and a plurality of electric units provided in an electronic device. Data is communicated serially with.

In the conventional serial communication, when serial communication is performed using only the signal line for data transmission / reception without using the signal line for control, the serial communication device on the transmission side transmits data to A data frame having a header part indicating the beginning part and communication control information is transmitted, and the serial communication device on the receiving side receives and analyzes the header part, and as a result, correct data is transmitted. By recognizing this, the reliability and communication accuracy of serial communication were improved.

[0004]

However, in the serial communication as described above, the serial communication device on the receiving side samples the transmitted data at regular intervals, and the transmitted data bit value is calculated from the sampling data value. When the determination method is adopted, there is a problem that the beginning of the transmission data may be missed depending on the sampling interval and the transmission timing, as shown in FIG.

Further, as shown in FIG. 18, there is a problem that the communication reliability between the serial communication devices is deteriorated due to the extension of the bit width of the signal and the erroneous determination of the data bit value due to the signal noise. It was

According to the present invention, at the time of transmission, a delimiter signal determined in advance is inserted in the data section, and a data frame in which the data section and the header section are combined is transmitted,
At the time of reception, at the time of receiving the beginning part of the header part and the end part of the header part, the position of the signal bit judgment is corrected and the delimiter signal in the data part or the signal edge where the value of the signal changes An object of the present invention is to provide a data communication device and a data communication method capable of improving the accuracy of data reception by correcting the position where signal bit determination is performed when a portion is detected.

[0007]

In order to solve the above problems, the present invention employs the following configurations. According to one aspect of the present invention, a data communication device of the present invention is a data communication device for transmitting and receiving data by serial communication, wherein the data is attached with signal identification data for judging the validity of the data. The data receiving unit that receives a data frame that is a data transmission unit, and the signal edge in the data frame received by the data receiving unit corrects the reference point for bit determination in the data frame to determine the bit determination position. A bit judgment position correcting means for correcting and a data validity judging means for judging the validity of the data received by the data receiving section based on the bit judgment position corrected by the bit judgment position correcting means. Is characterized by.

Further, in the data communication apparatus of the present invention, the data receiving means receives a data frame to which a delimiter signal including a signal edge is added, and the bit determination position correcting means causes the signal edge in the delimiter signal to be included. It is desirable to correct the reference point for bit determination with.

Further, according to one aspect of the present invention, the data communication apparatus of the present invention provides the above-mentioned data communication apparatus in one data transmission unit with signal identification data for judging the validity of the data. It is characterized by comprising a data transmission unit for transmitting a certain data frame.

Further, in the data communication apparatus of the present invention, it is desirable that the data transmission section transmits a data frame to which a delimiter signal including a signal edge is added.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS.

FIG. 1 is a diagram for explaining the basic configuration of a data communication device to which the present invention is applied. In FIG.
The data communication device (data transmission device) 1 and another data communication device (data reception device) 2 are connected by a data transmission path 3 such as a serial cable.

The data transmitter 1 transmits a data to the data transmission processing unit 11 having a header portion added to the head of the data signal and a function of inserting a specific identification signal into the data signal, and the data transmission path 3. And a transmission port 12 for In addition, the data receiving device 2 includes a data receiving port 2
2 corrects the bit judgment reference point in the data frame by the signal edge in the delimiter signal in the received data frame to correct the bit judgment position, and the bit judgment position correcting means. A data reception processing section 21 having a data validity judging means for judging the validity of the data received by the data reception port 22, based on the bit judgment position; and a reception port 22 for receiving the data from the data transmission path 3. Equipped with.

The data transmission processing unit 11 and the data reception processing unit 21 are realized as hardware such as firmware or electronic circuits. When bidirectional communication is performed between the data transmitting device 1 and the data receiving device 2, the data transmitting device 1 may include the data reception processing unit 21, and the data receiving device 2 may include the data transmission processing unit 11.

FIG. 2 is a signal waveform diagram for explaining the structure of the data frame. The data transmission device 1 synchronizes with a reference clock mounted on the data transmission device 1 or uses a timer to switch the bit value of the transmission data in accordance with the timing of a constant time interval to transmit the data. To execute. Here, the first bit to the last bit of the data transmitted at one time is called a data frame. Also, to identify that it is a data frame,
The bits from the first bit to the predetermined bit are called the header part of the data frame. A collection of data bits that are originally to be transmitted after the next bit of the header portion of the data frame is called a data portion. An identification symbol having a specific bit pattern and a specific number of bits is inserted in a predetermined bit position in the data section. This identification symbol is called a delimiter signal.

For example, "10000000000101"
If there is a data frame composed of bits 10010001111010000011 ", and if the header part is arranged from the first bit to 12 bits, then" 10 "
"0000000001" is a bit representing the header part, and "011001000111010000011"
Is a bit representing the data part.

When it is decided that a 2-bit delimiter signal "01" is inserted in every 8 bits in the data part, the original data part excluding the delimiter signal is "01100".
100110100001 ".

FIG. 3 is a signal waveform diagram showing the position at which the data section reception process is started. The data receiving device 2
When the reception of the header part is confirmed, the data transmission device 1
It is determined that the data frame is transmitted from, and the reception / analysis processing of the data portion is executed.

The bit length and bit pattern of the header portion may be arranged so as to be convenient for each device. However, if the same bit pattern as the header part exists in the data part, the same bit pattern as the header part in the data part may be erroneously determined as the header part, resulting in a reception error. It is desirable to select the bit pattern of the header section so that it never appears in the data section.

Further, in order to correct the reception bit determination position described later, a rising edge at which the signal changes from low level to high level or a falling edge at which the signal changes from high level to low level is provided at the end of the header section. It is desirable to select a bit pattern containing If it is not selected, the header part and the data part are selected so that the last bit value of the header part and the first bit value of the data part are always inverted and a falling edge or a rising edge exists.

The bit length of the delimiter signal, the bit pattern, and the insertion interval into the data section may be determined so as to be convenient for each device. However, it is desirable that the pattern includes a rising edge or a falling edge in order to correct the reception bit determination position using a delimiter signal described later. If you select a pattern that does not include edges in the delimiter signal, the last bit value of the delimiter signal and the bit value of the data part that follows the delimiter signal are always inverted so that there is a falling or rising edge. , Delimiter signal and data part are selected.

Further, it is assumed that the signal level is always low level or high level while the data frame is not transmitted. Here, the low level signal is bit 0
, The high-level signal represents bit 1, and it is assumed that bit 0 is constant when the data frame is not transmitted.

FIG. 4 is a flow chart showing the flow of data reception processing in the present invention. First, step S4
In step 1, it is determined whether it is in a header waiting state, a header detection state, or a data section reception state.

If it is determined in step S41 that the header is waiting, a header waiting process, which will be described later with reference to FIG. 7, is executed in step S42. If it is determined in step S41 that the header is being detected, the header detection process described later with reference to FIG. 11 is executed in step S43.

If it is determined in step S41 that the data portion is being received, in step S44, the process shown in FIG.
Is used to execute the data part reception process described later. Then, in step S45, it is determined whether or not there is an error. If there is an error (Yes), error processing is executed in step S46.

FIG. 5 is a diagram for explaining the state transition of the data receiving process. In the data receiving process, the header waiting state, the header detecting state, and the data receiving state are transited.

The data receiving device 2 samples the reception port state at regular time intervals regardless of the reception processing state. It is assumed that the sampling value takes two values of 0 and 1. It is desirable that the sampling time interval be equal to or less than the time for transmitting a unit bit of a data frame so that data is not leaked (see FIG. 6). The state of the data receiving device 2 when no data frame is received is called a header waiting state (in FIG. 5).

FIG. 7 is a flowchart showing the flow of header waiting processing. The data receiving device 2 detects the leading bit of the header part of the data frame transmitted from the data transmitting device 1 (determines whether there is 1) (step S).
72) before that, in step S71, the received bit value is determined from the sampling data in order to detect the first bit of the header part.

If the leading bit is not detected (step S72: No), the buffer is cleared, the number of received data is cleared, and the process returns in step S73. In the determination, a specific number of sampling values is determined as a sampling value for 1 bit. In the example shown in FIG. 8, the transmission time of 1 bit is 5 msec (millisecond),
Since the sampling time interval is 500 μsec (microseconds), the number of sampling values for 1 bit is 1
It becomes 0. The received bit value may be obtained from the average value of a specific number of sampled values. Further, it may be obtained from the value of the sampling value at the specific position in the specific number of sampling values. In FIG. 8, the sampling value of 1 bit,
Intermediate values are decided by three majority votes.

After the head bit of the header portion is determined (step S72: Yes), the edge search start position is corrected in step S74. First, a portion (rising edge) where the signal level changes from a low level to a high level is searched for from a sampling value a fixed number before the current sampling value search position (step S75).
Here, the location where the edge is detected by the search is called the header start edge.

In step S76, it is determined whether or not there is an edge, and if it is determined that there is no edge (No), step S77.
At, the buffer is cleared, the number of received data is cleared, and the process returns.

On the other hand, if it is determined in step S76 that there is an edge (Yes), that is, after the header start edge is detected, the edge detection position is saved in step S78, and the header start edge is determined in step S79. As the reference point, the position where the bit determination is performed next is corrected (see FIG. 9).

The correction of the position at which the bit determination is performed is adjusted to the position of the new sampling value from the detected edge by the number of sampling values for the number of received bits. For example,
In FIG. 10, the first bit of the header part and the subsequent 2
When the bit number is received, the search position is shifted by 20 sampling values of 2 bits.

Then, after correcting the position where the next bit judgment is performed, in step S80, the state of the data receiving device 2 is shifted to the header detection state (see FIG. 5).
FIG. 11 is a flowchart showing the flow of header detection processing.

When shifting to the header detection state, first, in step S111, the received bit value of the header portion is determined. Then, in step S112, it is determined whether or not reception of all bits of the header portion is completed.

After the reception of all bits of the header portion is completed (step S112: Yes), the edge detection start position is corrected in step S113 by the same method as in step S74. In step S114, a portion (rising edge) where the signal level changes from low level to high level is searched.

Then, in step S115, it is determined whether or not a rising (falling) edge provided at the end of the header portion is detected (whether or not there is an edge), and if it is determined that there is no edge (No), step S116. At, shifts to the header waiting state.

On the other hand, if it is determined in step S115 that there is an edge (Yes), that is, after the rising (falling) edge provided at the end of the header portion is detected, in step S117, the bit determination is performed next. The position of the sampling value is corrected, and in step S118,
A transition is made to the data section reception state (see FIG. 5).

If it is determined in step S112 that all bits of the header have not been received (No)
Determines in step S119 whether there is a data abnormality.

Furthermore, if it is determined in step S119 that the data is abnormal (Yes), step S120.
In, a location where the signal level changes from low level to high level (rising edge) is searched for.

Then, in step S121, it is judged whether or not the last rising (falling) edge of the bit string received up to the present time is detected (whether or not there is an edge), and if it is judged not (No). Shifts to the header waiting state in step S122, while step S12
When it is determined that there is an edge in 1 (Yes), header detection is restarted from the found edge in step S123.

FIG. 12 is a flowchart showing the flow of the data part reception process. First, similarly to the header part, in step S124, the received bit value is determined from the sampling value.

Then, in step S125, it is determined whether the reception of the delimiter signal is completed or whether the received bit value is inverted. When it is determined in step S125 that the reception of the delimiter signal is completed or the received bit value is inverted (Yes), that is, when the determination of the received bit value of the delimiter is completed or the received bit value is inverted. In step S126, the edge detection start position is corrected. (See Figure 13). The edge detection start position is corrected in the same manner as in the header section by moving to a position of a sampling value that is a fixed number before the position that refers to the current sampling value.

In step S127, step S1
From the position corrected in step 26, a portion (rising edge) where the signal level changes from low level to high level is searched.
Then, in step S128, it is determined whether or not a rising edge (falling edge) is detected (whether or not there is an edge) in the delimiter or in the bit-inverted position, and when it is determined that there is no edge (No), in step S129, On the other hand, if it is determined that the data portion is abnormal and there is an edge in step S128 (Yes), the next bit is determined using the rising (falling) edge detected in step S127 in step S130. Correct the position (see FIG. 14).

On the other hand, when it is determined in step S125 that the reception of the delimiter signal is not completed or the received bit value is not inverted (No), in step S131, it is determined whether the reception of the data portion is completed. to decide.

If it is determined in step S131 that the reception of the data portion has been completed (Yes), in step S132, a header waiting state is entered. After that, the data section reception state is continued until the value of the last bit of the data frame is determined.

The reception judgment of the last bit of the data frame is made at the time when the predetermined number of bits is received or at the time when more than the number of bits is received. When the signal bits of all the data frames are received, the processing in the data part reception state ends. The state of the data receiving device 2 shifts to the header waiting state and continues to wait until the next header start edge is detected (see FIG. 5).

Next, another embodiment of the present invention will be described. In this embodiment, in the header portion of the data frame, the start position of the data frame is determined, the bit determination position correction is performed by the reference point correction of the received bit determination at the end of the header portion, and An example will be described in which the reference point for bit determination is corrected at the falling edge or the rising edge to reduce the reception error due to the missing of the start position of the transmission data or the bit determination position shift occurring during reception.

Here, it is assumed that the reception port state is always fixed to the low level (bit 0) when the data frame is not transmitted / received. The data transmission device 1 uses a 12-bit bit string “10000000 as a header part.
0001 "is added to the beginning of the data frame to transmit the data part. The time required to transmit a 1-bit signal is 5 msec. Therefore, the 1-bit time width is 5 msec.

The data receiving device 2 samples the receiving port state at intervals of 500 μsec regardless of the state of the receiving process. Since the 1-bit time width is 5 msec, about 10 sampling values represent 1-bit signal sampling data. Sampling is 0 or 1 of 2
The sampling value is stored in the buffer by the FIFO method in the order of sampling. The received bit determination is performed using the sampling value stored in the buffer. In addition, a buffer pointer for storing a buffer position for next bit determination is prepared.

In this embodiment, the bit value judgment is
Assuming that there are 10 sampling values per bit, it is determined by the majority vote of the 3rd to 7th sampling values (see FIG. 15).

When no data frame is transmitted from the data transmitting device 1 in the header waiting state, the data receiving device 2 makes a bit determination from the sampling value and determines a bit 0.

When the data frame is transmitted from the data transmitting device 1, the data receiving device 2 is
The leading bit "1" of the data frame transmitted from is detected by bit determination.

When bit 1 is detected by the received bit determination, it is determined that it is the head of the header portion of the data frame, and the data receiving device 2 sets the buffer pointer to the bit 1 from the position where the next bit determination is started. Previous bit 0
The sampling buffer is set to the position of the last sampling value of the sampling values referred to when determining, and the sampling buffer is searched. (See FIG. 16).

When a rising edge is detected as a result of searching the sampling buffer, the detected position is set as a reference position for a new bit determination, and a buffer pointer is set at a position shifted by tens of 1-bit sampling values. , A new bit determination position. After that, the state shifts to the header detection state, and the remaining bits of the header portion are received (see FIG. 16).

When the last bit 1 of the header section is received, the rising edge is again detected from the sampling buffer. The detection method is the same as in the case of detecting the rising edge at the head of the header described above.

The position in the sampling buffer corresponding to the detected rising edge is set as a reference point for a new bit determination, and a buffer pointer is set at a position shifted from the reference point by the number 10 of the sampling value for 1 bit. Move to the reception state.

Then, after shifting to the data section receiving state,
Perform bit determination from the sampling buffer. When the determined bit value is inverted from 0 to 1, or from 1 to 0
When it is inverted to, the buffer pointer indicating the next bit determination position is corrected. The correction method is the same as the correction method performed at the head of the header section in the above-described embodiment. When inverted from 0 to 1, the rising edge is detected from the sampling buffer. On the contrary, when it is reversed from 1 to 0,
Detect the falling edge from the sampling buffer.

The buffer pointer may be corrected only when the determined bit value changes from 0 to 1, or only when the determined bit value changes from 1 to 0, or whenever the determined bit value changes. Also good.

After that, until the final bit value of the data frame is determined, the bit determination is continued while the above correction is executed at the falling / rising edges. As a result, it is possible to accurately capture the beginning of a data frame even if the data frame is transmitted at an uncertain timing, and correct the reference point for bit determination again before receiving the data section to ensure accurate correction. Data can be received. Furthermore, since the bit judgment position is always corrected at the rising edge and falling edge in the data part, the received bit value caused by the deviation of the bit judgment position caused by the change in the bit length that occurred during reception of the data part. It is possible to reduce the reception error due to the erroneous determination of.

Next, a second other embodiment will be described as a further embodiment of the present invention. In the other embodiments described above, when the same bit continues in the data part and the bit length per bit changes, a reception error may occur.

In the second other embodiment, a delimiter signal is inserted at a specific position in the data part, and the reference point for bit decision is corrected at the position of the delimiter signal. Will be reduced, and an example will be described in which data can be accurately received even when the same bit is continuously transmitted.

First, a delimiter signal bit string is inserted every N bits in the data section. The delimiter signal bit string is selected so that the delimiter signal bit string always includes a falling edge or a rising edge. Here, it is assumed that N = 8 and the delimiter signal bit string is “01”.

Until shifting to the data section reception processing state,
This is similar to the other embodiments described above. Then, in the data section reception state, the bit determination of the data section is performed until the delimiter signal bit string is received.

When the data receiving device 2 receives the delimiter signal bit string "01", it corrects the buffer pointer indicating the next bit determination position. The correction method is the same as the correction method performed at the head of the header section in the other embodiments described above.

After that, until the value of the last bit of the data frame is determined, the bit determination is continued while performing the above correction at the time when the delimiter signal is detected. By performing as described above, even when the data receiving device 2 receives a data frame in which the same bit string appears consecutively in the data portion, the data receiving apparatus 2 uses the delimiter signal bit string inserted at regular intervals to determine the reference of the bit determination position. By performing the point correction, it is possible to reduce the reception error due to the shift of the bit determination position, which is caused by the change in the bit length that occurs during the reception of the data portion. By comparison, it is possible to reduce the amount of processing for correcting the bit determination position.

Although the embodiments of the present invention have been described with reference to the drawings, the present invention is not limited to the above-described embodiments and does not depart from the gist of the present invention. Various configurations or shapes can be taken within.

[0068]

As described above, according to the present invention, in the serial communication of the data frame including the header portion, the reference point of the bit determination position is corrected at the falling edge or the rising edge in the data frame. By correcting the bit judgment position, correct bit data can always be obtained from the sampling value during reception of the data part.
It is possible to receive an accurate data frame.

Further, according to the present invention, a delimiter signal is inserted at a specific position of the data part to be transmitted, the reference point of the bit decision position is corrected at the position of the delimiter signal, and the bit decision position is corrected. As a result, it is possible to accurately receive the data frame even when the data part including the same bits consecutively is transmitted.

[Brief description of drawings]

FIG. 1 is a diagram for explaining the basic configuration of a data communication device to which the present invention has been applied.

FIG. 2 is a signal waveform diagram for explaining the structure of a data frame.

FIG. 3 is a signal waveform diagram showing a position at which a data part reception process is started.

FIG. 4 is a flowchart showing a flow of data reception processing in the present invention.

FIG. 5 is a diagram for explaining a state transition of data reception processing.

FIG. 6 is a signal waveform diagram showing a correspondence relationship between bit data in a data frame and a sampling value of a reception port.

FIG. 7 is a flowchart showing the flow of header waiting processing.

FIG. 8 is a signal waveform diagram showing an example of a method for determining a bit value from a sampling value.

FIG. 9 is a signal waveform diagram for explaining a reference position for bit determination and a method for correcting a bit determination position.

FIG. 10 is a signal waveform diagram for explaining a correction method when 2-bit determination is made in one bit determination process.

FIG. 11 is a flowchart showing a flow of header detection processing.

FIG. 12 is a flowchart showing the flow of a data part reception process.

FIG. 13 is a signal waveform diagram for explaining a portion where correction of a bit determination position is executed in a data part.

FIG. 14 is a signal waveform diagram for explaining a method of correcting a bit determination position in a data part.

FIG. 15 is a signal waveform diagram for explaining another embodiment and a second other embodiment.

FIG. 16 is a signal waveform diagram for explaining another embodiment and a second other embodiment.

FIG. 17 is a diagram for explaining a conventional problem that the beginning of transmission data may be missed depending on a sampling interval or transmission timing.

FIG. 18 is a diagram for explaining a conventional problem that the reliability of communication between serial communication devices is deteriorated due to the extension of the bit width of a signal or the erroneous determination of a data bit value due to signal noise. is there.

[Explanation of symbols]

1 Data transmitter 2 Data receiving device 3 data transmission lines 11 Data transmission processing unit 12 sending ports 21 Data reception processing unit 22 Receive port

Claims (5)

[Claims] 1. A data communication device for transmitting and receiving data by serial communication, comprising: a data receiving unit for receiving a data frame, which is one data transmission unit, in which signal identification data for judging the validity of the data is attached to the data. A bit determination position correcting means for correcting a bit determination position by correcting a bit determination reference point in the data frame at a signal edge in the data frame received by the data receiving unit; A data communication device comprising: a data validity determining unit that determines the validity of the data received by the data receiving unit based on the bit determination position corrected by the means. 2. The data receiving unit receives a data frame to which a delimiter signal including a signal edge is added, and the bit determination position correction unit corrects a reference point for bit determination with a signal edge in the delimiter signal. The data communication device according to claim 1, wherein 3. The data communication device according to claim 1, further comprising a data transmission unit for transmitting a data frame which is one data transmission unit with signal identification data for determining the validity of data. A data communication device characterized by the above. 4. The data communication device according to claim 3, wherein the data transmission unit transmits a data frame to which a delimiter signal including a signal edge is added. 5. A data communication method in a data communication device for transmitting and receiving data by serial communication, wherein a data frame which is one data transmission unit in which signal identification data for judging the validity of data is added to the data frame. Receiving, correcting the bit determination position by correcting the reference point of the bit determination in the data frame at the signal edge in the received data frame, and based on the corrected bit determination position, the reception A data communication method characterized by determining the validity of the received data.