JP2003228364A - Image display device for pachinko game machine, its display method, and computer program therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image display device for pachinko game machine which realizes more diverse representation by decreasing the frequency of read of data to a frame buffer and shortening the processing time. <P>SOLUTION: When image data are read out of each layer provided in a frame memory 6, image data of an address computed by a layer address arithmetic unit 21 are sent to the frame memory 6, image data read out of a specified layer provided in the frame memory 6 are stored in a specified address of a line buffer memory 221, and further, a mask bit indicating that the image data have been stored in the specified address of the line buffer memory 221 is written to a specified column address of a bit buffer memory 22. Therefore, the image data in the same address of a layer below it are read out, it is checked whether or not there is a mask bit in the specified column address of a mask bit buffer 222 and when the mask bit is written, the data in the column address are not read out. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display device for a pachinko machine and a display method therefor, and more particularly to an image display device for a pachinko machine which is designed to superimpose image data on a plurality of frame memories. Regarding display method.

[0002]

2. Description of the Related Art In a pachinko machine, when displaying images of a plurality of layers in an overlapping manner, an upper layer must be displayed in a portion where the images overlap. Therefore, in the conventional technique, by reading the image data from the lower layer, and sequentially writing the image data read from the next upper layer on the read lower image,
The lower layer image is masked and the upper layer image data is displayed.

Therefore, despite the overlapping of images, the data is read from each layer many times and the data is written to the line buffer each time, resulting in a long processing time. was there.

FIG. 9 is a diagram showing a state of conventional overwriting, in which layer 1 is the lowest layer and layer 4 is the highest layer.

[0005]

SUMMARY OF THE INVENTION An object of the present invention is to improve the above-mentioned drawbacks of the prior art, and in particular, to reduce the number of times of reading data to the frame buffer and shorten the processing time, so that various expressions can be realized. The present invention provides a novel image display device for a pachinko machine and a display method thereof.

[0006] Another object of the present invention is to provide a computer program therefor.

[0007]

In order to achieve the above-mentioned object, the present invention basically adopts the technical constitution as described below.

That is, the first aspect of the image display device of the pachinko machine according to the present invention is the image display device of the pachinko machine in which a plurality of image data in the frame memory are superposed and sequentially displayed on the display device. In the second aspect, when the image data is sequentially read from the frame memory, the image data is sequentially read from the image data located in the uppermost layer of the display image toward the image data located in the lower layer. In the above method, when a plurality of image data on the frame memory are overlaid, pixel data columns at the same row address in each image data are read out and then overlaid using a line buffer memory. The third aspect is that the pixel data at the same row address of a plurality of image data on the frame memory is An image display device for a pachinko machine in which columns are overlapped using a line buffer memory, and the image data in the line buffer memory is transferred to a display device to sequentially display the overlapped image data on the display device. , A mask bit buffer memory provided corresponding to each column address of the line buffer memory, a first means for reading data of a predetermined column address of the mask bit buffer memory, and the column address of the line buffer memory Second means for determining whether or not image data is already stored in the line buffer memory based on the data of the mask bit buffer memory read by the first means, and the second means When it is detected that no image data is stored in the column address, the first frame Third means for reading the image data of the column address of the memory and the line of the address corresponding to the column address when the data of the first frame memory read by the third means is image data. Fourth means for writing the image data read from the first frame memory into the buffer memory and writing mask data indicating that the image data is stored at the column address of the mask bit buffer memory. The fourth aspect is characterized in that the fourth mode is configured to perform the data processing of the next column address after the processing of the column address is finished. In addition, in the fifth aspect, when the processing of all the column addresses of the first frame memory is completed, the second frame in the lower layer of the first frame memory is processed. It is characterized in that the memory memory overwrite processing is executed.

The first aspect of the image display method in the image display device of the pachinko machine according to the present invention is to superimpose image data of the same row address on a plurality of frame memories using a line buffer memory. By transferring the image data on this line buffer memory to the display device,
The image data in the image display device of the pachinko machine, in which the superimposed image data are sequentially displayed on the display device, and the line buffer memory is provided with the mask bit buffer memories respectively corresponding to the column addresses of the line buffer memory In the display method, a first step of reading data at a predetermined column address of the mask bit buffer memory and a step of determining whether image data is already stored at the column address of the line buffer memory are determined by the first step. In the second step of making a determination based on the data of the mask bit buffer memory read in the step of, and in the second step, when it is detected that no image data is stored at the column address of the line buffer memory, A third step of reading the image data of the column address of the first frame memory, and When the data of the first frame memory read in the third step is image data, the image data read from the first frame memory is written in the line buffer memory at an address corresponding to the column address. At the same time, a fourth step of writing mask data indicating that image data is stored in the column address of the mask bit buffer memory, and after the processing of the column address is finished, the data processing of the next column address is performed. When the processing of all the column addresses of the first frame memory is completed by repeating the fifth step and the first to fifth steps, the second frame memory of the lower layer of the first frame memory is completed. A sixth step of further executing the overwriting process, and the second aspect is the second step. Oite, when detecting that the image data to the column address of the line buffer memory is already stored, without reading the data of the column address of said first frame memory,
It is characterized in that the fifth step is executed.

The first aspect of the computer program for displaying an image of a pachinko machine according to the present invention is to superimpose image data of the same row address on a plurality of frame memories using a line buffer memory, By transferring the image data in the buffer memory to the display device, the superimposed image data is sequentially displayed on the display device, and the line buffer memory has mask bits corresponding to the column addresses of the line buffer memory. A computer program for displaying an image of a pachinko machine provided with a buffer memory, comprising a first procedure for reading data at a predetermined column address of the mask bit buffer memory and image data at the column address of the line buffer memory. Read whether or not it is already stored in the first procedure. In the second procedure of determining based on the data of the mask bit buffer memory, and in the second procedure, when it is detected that the image data is not stored in the column address of the line buffer memory, the first frame A third procedure of reading the image data of the column address of the memory, and, when the data of the first frame memory read in the third procedure is image data, the line of the address corresponding to the column address The fourth step of writing the image data read from the first frame memory into the buffer memory and writing the mask data indicating that the image data is stored into the column address of the mask bit buffer memory, and the column After the processing of the address is completed, the fifth procedure for processing the data of the next column address, and When the processing of all the column addresses of the first frame memory is completed by repeating the first to fifth procedures, the overwriting processing of the second frame memory under the first frame memory is further executed. A computer program characterized by causing a computer to execute the sixth procedure,
In the second aspect, when it is detected in the second procedure that image data is already stored in the column address of the line buffer memory, the data of the column address of the first frame memory is detected. The computer program is characterized by executing the fifth procedure without reading out.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific examples of an image display device for a pachinko machine and a display method thereof according to the present invention will be described in detail below with reference to FIGS. 1 to 8.

The image display device of the pachinko machine of the present invention, for example, as shown in FIG. 1, reads from the upper layer in the order of the upper layer 4, the middle layer 3 and 2, and the lower layer 1, and overwrites them. When performing the processing, the data in the mask bit buffer memory provided in the line buffer memory is checked, and the column address where the mask bit is already stored is configured not to read the layer below the column address. It was done.

FIG. 2 shows a state in which the uppermost layer 4 is overlaid with the lower layer 3, the lower layer 2 is overlaid, and finally the lowermost layer 1 is overlaid.

FIG. 3 is a diagram showing a main part of the overall structure of the image display device of the pachinko machine of the present invention. In FIG.
Is a display unit, 2 is a display L provided for the display unit 1.
SI, 3 is a central processing unit (CPU) that controls the display of the display unit 1, and 6 is a frame memory that stores image data for display.

The display LSI 2 stores the layer address calculation device 21 for calculating the layer address of each layer provided in the frame memory 6, the line buffer device 22, and the data stored in the frame memory 6. A display driving circuit 23 for displaying on the image display device 1 is provided. The line buffer device 22 is provided with a line buffer memory 221 for storing image data and a mask bit buffer memory 222 provided corresponding to each column address of the line buffer memory 221.

Therefore, in the pachinko machine of the present invention, when the image data is read out from each layer provided in the frame memory 6, the image data of the address arithmetically processed by the layer address arithmetic unit 21 is sent to the frame memory 6. The image data read from a predetermined layer provided in the frame memory 6 is stored in a predetermined address of the line buffer memory 221, and further the image data is stored in a predetermined address of the line buffer memory 221. The mask bit indicating that the bit buffer memory 2
It is configured to write to 22 predetermined column addresses.

Therefore, when reading the image data of the same address of the lower layer, the mask bit buffer 2
Check for the presence or absence of the mask bit of the predetermined column address of 22,
If the mask bit has already been written, the data of the column address is not read.

FIG. 4 is a diagram schematically showing a state in which four layers are provided in the frame memory 6, in which the arrow X direction indicates the column direction and the arrow Y direction indicates the row direction. ing. X represents the column address, and Y
Indicates a row address.

The column address is count-controlled by the horizontal coordinate counter 31 shown in FIG. 7, and the row address is count-controlled by the vertical coordinate counter 131.

Further, in FIG. 4, the vertical coordinate counter 13
The image data of the four layers of the row address (Y) designated by the row counter designated by 1 are overwritten.

5 and 6 are flowcharts showing the procedure of this overwriting process.

First, the line buffer memory 222 is initialized and the count value (Y) of the vertical coordinate counter 131 is set to "0" (steps S1 and S2).

Next, the layer counter L (reference numeral 3 in FIG. 4).
4) is set to the number of layers, and bit buffer memory 2
22 is initialized (steps S3 and S4).

Further, the display area vertical start address YSA (L) of the layer L and the counter value (Y) of the vertical coordinate counter 131 are added, and the addition result (YA) is stored in the display area vertical address register 32. (Step S
5). Therefore, the addition result (Y
A) shows the Y coordinate of the processing target of the layer when the processing of the different layer is performed. Further, the count value (X) of the horizontal coordinate counter 31 is set to "0" for initialization (step S6).

In the following description, an example will be described in which the image data of a predetermined layer of a certain row address has already been processed and the processing of the layer below it is performed.

First, the mask bit buffer memory 22
The data of the second column address (X) is read (step S
7). Then, the data of the column address (X) of the mask bit buffer memory 222 is changed to the line buffer memory 22.
If 1 indicates that image data is not stored (step S8), the display area horizontal start address XSA (L) of the layer L and the counter value (X) of the horizontal coordinate counter 131 are added, and The addition result (XA) is stored in the display area horizontal address register 32 (step S9). Therefore, the addition result (XA) indicates the column address to be processed. Then, steps S5 and S9
The image data of (XA, YA) of the obtained layer L is read (step S10). When the read data is image data, the image data is stored in the column address (X) of the line buffer memory 222, and the mask bit is written in the column address (X) of the mask bit buffer memory 222 (steps S11 to S13). ). In step S11, if the read data is not image data, steps S12 and S13 are not executed and the process proceeds to the next column address. In this way, steps S7 to S15 are repeatedly executed until the count value (X) reaches a predetermined maximum value, and when the count value (X) reaches the maximum value, processing of the lower layer is performed. (Steps S16 and S17). When the processing of the lowermost layer is completed, the line buffer memory 22
The data stored in 1 is output to the display means 1 (step S18), the count value (Y) is incremented, and the processing of the next row address is repeated as described above. In this way, the display of one frame ends (step S2).
0-S19).

FIG. 7 and FIG. 8 are functional block diagrams for embodying the above-described operation. Therefore, the present invention can be implemented by either software or hardware. good.

In FIG. 7, 34 is a layer counter, which corresponds to step S3 in FIG. Reference numeral 35 denotes a display area horizontal start address XSA (L) of each layer,
135 is a display area vertical start address YS of each layer
It is A (L).

Reference numeral 33 is an adder for adding the display area horizontal start address XSA (L) of the layer to be processed and the value of the horizontal coordinate counter (X).
Corresponds to step S9. Further, 133 is an adder for adding the display area vertical start address YSA (L) of the layer to be processed and the value of the vertical coordinate counter (Y),
This adder 133 corresponds to step S5.

Further, 32 is a horizontal address register for latching the addition result of the adder 33 with an address latch signal when the mask bit is not set, and 132 is an adder 133 of the adder 133 when the mask bit is not set. A vertical address register for latching the addition result with an address latch signal. The address signals latched by the horizontal address register 32 and the vertical address register 132 are
It is configured to be output to the frame memory 6.
In addition, the horizontal coordinate counter 31 is the line buffer memory 2
21 and the mask bit buffer 222 are not incremented until the writing is completed.

Further, 36 is a line buffer memory 221.
When the received data is not a mask bit, the address latch signal 37,
The read signal 38 of the frame memory 6 and the write signal 39 of the line buffer device 22 are output. The mask test apparatus 36 corresponds to step S8.

FIG. 8 is a functional block diagram of a portion of steps S11 to S13.

In FIG. 8, reference numeral 41 is a transparent test device, and when the image data read from a predetermined layer of the frame memory 6 is not a transparent bit, based on the line buffer write signal, the line buffer memory 221.
Write the color data to the mask bit buffer 2
Write mask bits to 22.

The transparent test device 41 is configured to output a write end signal 42 for controlling the counter of the horizontal coordinate counter 31.

The present invention is a basic architecture that can be applied to various application software.

[0036]

The image display device for a pachinko machine and the display method thereof according to the present invention have a structure in which the layer is read from the upper layer and the lower layer is not read from the portion where the image is already stored. Therefore, the reading time from the frame memory for displaying is shortened. As a result, the display processing time is shortened, and as a result, it is possible to display a larger number of images, and it is possible to achieve more sophisticated and versatile expressions.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration example of layers of a pachinko machine according to the present invention.

FIG. 2 is a diagram showing a situation of overwriting.

FIG. 3 is a block diagram showing an overall configuration of a pachinko machine of the present invention.

FIG. 4 is a diagram for explaining a frame memory of the present invention and its address.

FIG. 5 is a flow chart for explaining the operation of the present invention.

FIG. 6 is a flowchart continued from FIG. 5;

FIG. 7 is a block diagram showing a configuration of a layer address calculation device for calculating a layer address according to the present invention.

FIG. 8 is a block diagram showing a configuration of a transparent test device and a line buffer device of the present invention.

FIG. 9 is a diagram showing a conventional overwriting situation.

[Explanation of symbols]

1 Display means 6 frame memory 21 Layer address arithmetic unit 22 Line buffer device 31 Horizontal coordinate counter 131 Vertical coordinate counter 34 Layer Counter 35 Horizontal start address of display area of each layer 135 Vertical start address of display area of each layer 36 Mask test equipment 41 Transparent test equipment 221 line buffer memory 222 mask bit buffer

Claims (9)

[Claims] 1. An image display device of a pachinko machine in which a plurality of image data on a frame memory are superimposed and sequentially displayed on a display device, when the image data is sequentially read from the frame memory,
An image display device for a pachinko machine, which is configured to sequentially read from image data located in the uppermost layer of a display image toward image data located in a lower layer. 2. When superposing a plurality of image data on the frame memory, the pixel data columns at the same row address in each image data are read out and then superposed using a line buffer memory. The image display device for a pachinko machine according to claim 1. 3. A line buffer memory is used to superimpose pixel data columns at the same row address of a plurality of image data on a frame memory, and the image data on the line buffer memory is transferred to a display device. An image display device of a pachinko machine configured to sequentially display superimposed image data on a display device, wherein a mask bit buffer memory provided corresponding to each column address of the line buffer memory, and the mask bit buffer memory Of the mask bit buffer memory which is read by the first means, and whether the image data is already stored in the column address of the line buffer memory. A second means for making a determination based on the line buffer, When it is detected that the image data is not stored in the column address of the memory, the third means for reading the image data of the column address of the first frame memory, and the first means read by the third means. When the data in the frame memory is image data, the image data read from the first frame memory is written in the line buffer memory at an address corresponding to the column address, and the column in the mask bit buffer memory is also written. An image display device for a pachinko machine, comprising: a fourth means for writing mask data indicating that image data is stored at an address; 4. The image display device of a pachinko machine according to claim 3, wherein after the processing of the column address is completed, the data processing of the next column address is performed. 5. When the processing of all the column addresses of the first frame memory is completed, the overwriting processing of the second frame memory below the first frame memory is executed. Alternatively, the image display device of the pachinko machine described in 4. 6. The image data having the same row address on a plurality of frame memories is superposed by using a line buffer memory, and the image data on the line buffer memory is transferred to a display device to superpose the image data. Are sequentially displayed on a display device, and the line buffer memory is provided with a mask bit buffer memory corresponding to each column address of the line buffer memory. , A first step of reading data at a predetermined column address of the mask bit buffer memory, and whether or not image data is already stored at the column address of the line buffer memory in the first step. A second step of making a determination based on the data in the mask bit buffer memory, and the second step And a third step of reading the image data of the column address of the first frame memory when it is detected that the image data is not stored in the column address of the line buffer memory. When the data of the first frame memory read in is image data, the line buffer memory of the address corresponding to the column address,
The fourth step of writing the image data read from the first frame memory and writing the mask data indicating that the image data is stored in the column address of the mask bit buffer memory, and the processing of the column address. After the processing is completed, the fifth step of processing the data of the next column address and the first to fifth steps are repeated to complete the processing of all the column addresses of the first frame memory.
A sixth step of further executing an overwriting process of the second frame memory, which is a lower layer of the first frame memory, and an image display method in an image display device of a pachinko machine. 7. In the second step, when it is detected that image data is already stored in the column address of the line buffer memory, the data of the column address of the first frame memory is not read. The fifth
The image display method in an image display device of a pachinko machine according to claim 6, characterized in that the step (1) is executed. 8. The image data of the same row address on a plurality of frame memories is superposed using a line buffer memory, and the image data on the line buffer memory is transferred to a display device, thereby superimposing the image data. While sequentially displaying on a display device, the line buffer memory is a computer program for image display of a pachinko machine provided with a mask bit buffer memory corresponding to the column address of the line buffer memory, the mask A first procedure for reading data at a predetermined column address in the bit buffer memory, and a mask bit buffer read in the first procedure for determining whether image data is already stored at the column address in the line buffer memory. A second procedure for making a determination based on the data in the memory; In the procedure, when it is detected that the image data is not stored in the column address of the line buffer memory, a third procedure of reading the image data of the column address of the first frame memory, and the third procedure When the data of the first frame memory read in is image data, the line buffer memory of the address corresponding to the column address,
The fourth step of writing the image data read from the first frame memory and writing the mask data indicating that the image data is stored in the column address of the mask bit buffer memory, and the processing of the column address. When the processing of all the column addresses of the first frame memory is completed by repeating the fifth procedure of performing the data processing of the next column address and the first to fifth procedures after completion,
A computer program that causes a computer to execute a sixth procedure for further executing the overwriting process of the second frame memory below the first frame memory. 9. In the second procedure, when it is detected that the image data is already stored in the column address of the line buffer memory, the data of the column address of the first frame memory is not read. The fifth
9. The computer program according to claim 8, which executes the procedure of.