JP2003298025A - Magnetic storage device - Google Patents

Abstract

[PROBLEMS] To provide a magnetic storage device which can prevent an increase in a switching magnetic field even when a device is miniaturized, and can realize a stable storage holding operation. SOLUTION: A tunnel magnetoresistance having a junction including a recording layer, an insulating layer, and a magnetization pinned layer formed of a ferromagnetic material, the recording layer being formed of a ferromagnetic material whose switching magnetic field changes with temperature and whose magnetization direction changes by an external magnetic field. An effect element, a temperature control layer laminated on a recording layer of the tunnel magnetoresistive element, and a bit line and a digit line arranged in directions intersecting each other for applying a current magnetic field for writing to the tunnel magnetoresistive element. A magnetic storage device in which a larger current is applied during writing to the tunnel magnetoresistive element than during reading.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a highly integrated magnetic memory device having a junction of ferromagnetic layer / insulating layer / ferromagnetic layer and using a tunnel magnetoresistive effect whose tunnel resistance is changed by an external magnetic field as a memory element. Regarding

[0002]

2. Description of the Related Art In recent years, a tunneling magnetoresistive effect (TMR) has been used as a magnetic memory device having characteristics such as nonvolatility, high speed, and long-term reliability.
Magnetic random access memory (MRAM:
Magnetic Random Access Memory) has been proposed.
For its operating principle, see, for example, S. Tehrani et al.
By "Recent Developments in Magnetic Tunnel J
unction MRAM "IEEE Trans. Magn., vol. 36, p.2752,
2000.

The principle of operation of the MRAM will be briefly described below. First, a magnetic tunnel junction (MTJ: Magnet) which is a main part for obtaining the tunnel magnetoresistive effect.
ic Tunnel Junction) has a structure in which an insulating layer is sandwiched between two ferromagnetic layers. One of the ferromagnetic layers is a recording layer whose magnetization direction is changed by an external magnetic field, and the other ferromagnetic layer is magnetically fixed. There are layers. This MTJ is made to have a stable state when the magnetization directions in the two ferromagnetic layers are parallel to each other and in two antiparallel directions.

When the magnetization directions are parallel to each other in the upper and lower ferromagnetic layers, the tunnel current flowing through the MTJ layer is the largest, that is, the tunnel resistance is the smallest. on the other hand,
When the magnetization directions are antiparallel to each other in the upper and lower ferromagnetic layers, the tunnel current is small, that is, the tunnel resistance is the largest. As described above, by taking two states of the tunnel resistance in a certain magnetic field range, "1" and "0" can be stored in each state.

The change of the electric resistance through the MTJ layer with respect to the external magnetic field becomes a so-called hysteresis curve as shown in FIG. At this time, the magnetic field necessary for reversing the magnetization of the recording layer is the switching magnetic field, and the magnitude thereof largely depends on the structure of the MTJ layer.

FIG. 6 schematically shows the structure of an MRAM memory cell. A gate electrode (word line) 62 is formed on a silicon substrate 61 via a gate oxide film, and the source / source is formed on the surface of the silicon substrate 61 on both sides of the gate electrode 62.
Drain regions 63 and 64 are formed. A ground line 65 is connected to the source region 63. A connection plug 66 is connected to the drain region 64. The lower electrode 68 is connected to the connection plug 66, and the lower electrode 6
An MTJ layer 69 is formed on the surface 8. Below the MTJ layer 69, a digit line 67 extending in a direction perpendicular to the paper surface of FIG. 6 is formed, and above the MTJ layer 69, a bit line 70 extending in a direction intersecting with the digit line 67 is formed.

In order to write "1" or "0" information to the MTJ layer 69 as a memory operation, a pair of bit line 70 and digit line 67 arranged in a direction intersecting with each other.
Is selected, and a current is applied to both of them to generate a current magnetic field. When the magnitude of the current magnetic field is appropriately selected, only the magnetic field applied to the MTJ layer 69 of the selected cell located at the cross point between the bit line 70 and the digit line 67 exceeds the switching magnetic field, and the target information is obtained. MT
Written to the J layer 69.

On the other hand, in order to read "1" or "0" information written in the MTJ layer, a voltage is applied to the gate electrode (read word line) 62 of the MOSFET serving as the selection transistor to select the selection transistor. By turning on, detecting the current value flowing from the bit line 70 to the ground line 65 through the MTJ layer 69, and reading the difference in tunnel resistance between different TMR elements, it is possible to determine the information of "1" or "0". Done.

As described above, the operation as the magnetic memory device can be obtained by the MRAM structure having the MTJ layer composed of the ferromagnetic layer / insulating layer / ferromagnetic layer. However, there are some problems in achieving higher integration in the future.

As described above, the amount of current flowing through the bit line and the digit line as the write wiring is determined by the switching magnetic field strength derived from the magnetic characteristics of the recording layer of each memory cell. However, there is a characteristic that the switching magnetic field increases as the size of the ferromagnetic material as the recording layer becomes smaller with the miniaturization of the element. Therefore, the amount of current flowing through the current magnetic field wiring increases, which causes a problem of increasing the power consumption of the MRAM and a problem of hindering high-speed operation.

On the contrary, when the MTJ structure is devised to suppress the increase of the switching magnetic field, or the structure which generates a large current magnetic field even with a small current due to the complicated wiring structure using the magnetic material is adopted, the current magnetic field causes There is a problem of crosstalk in which data is written also in a memory cell adjacent to a target memory cell and a problem of impairing long-term stability of a memory holding operation.

Further, with respect to the increase of the variation of the switching magnetic field due to the increase of the variation of the element shape due to the miniaturization of the element, a large peripheral circuit having an extra operation margin in consideration of the variation is required. There is a problem,
It becomes a factor that hinders high integration.

[0013]

As described above, the MTJ
The conventional MRAM using layers as storage elements has a problem in miniaturization in response to future demand for higher integration.

An object of the present invention is to provide a magnetic memory device capable of preventing an increase in switching magnetic field and realizing a stable memory holding operation even if the element is miniaturized.

[0015]

A magnetic memory device (MRAM) according to an aspect of the present invention is a recording layer and an insulating layer formed of a ferromagnetic material whose switching magnetic field changes with temperature and whose magnetization direction changes with an external magnetic field. , And a tunnel magnetoresistive effect element having a junction including a magnetization pinned layer formed of a ferromagnetic material, and bit lines arranged to intersect each other for applying a current magnetic field for writing to the tunnel magnetoresistive effect element, and It has a digit line and a temperature control layer provided between the bit line and the tunnel magnetoresistive effect element or between the digit line and the tunnel magnetoresistive effect element. .

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below. In the embodiment of the present invention, the recording layer is made of a ferromagnetic material whose switching magnetic field changes according to temperature changes, and the temperature control layer is laminated on this recording layer. As the temperature control layer, a heating resistor layer or a thermoelectric effect semiconductor layer is used,
The switching magnetic field of the recording layer is controlled by raising the temperature of the recording layer or vice versa.

With such a configuration, the recording layer can be magnetically softened at the time of writing so that the magnetization can be easily reversed by a small switching magnetic field, and the recording layer is magnetically operated at the time of the memory holding operation and the reading. It is possible to increase the stability by making it hard.

Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a sectional view showing one memory cell of a magnetic memory device (MRAM) according to one embodiment of the present invention.

As shown in FIG. 1, the word line 12 and the digit line 13 are formed at the same level. The digit line 13 extends in a direction perpendicular to the paper surface of FIG. A contact layer 15 is formed on the word line 12, and a lower electrode 16 is formed in contact with the contact layer 15. The lower electrode 16 corresponding to above the digit line 13
An MTJ layer 17 and a heating resistor layer 18 are formed on top. The MTJ layer 17 includes an antiferromagnetic layer 171, a magnetization fixed layer 172, an insulating layer (tunnel barrier) 173 made of AlO _x having a thickness of, for example, about 1 to 2 nm, and a recording layer (magnetization free layer) 1.
It has a joining structure in which 74 is sequentially laminated. Heating resistor layer 1
A bit line 21 extending in a direction intersecting with the digit line 13 is connected to 8.

In FIG. 1, the recording layer 174 and the heating resistor layer 18 adjacent to the recording layer 174 are provided on the bit line 21 side, but the heating resistor 18 and the MTJ layer 17 are turned upside down and the digit line 13 is reversed. Heat generating resistor layer 18 and recording layer 1 on the side
74 may be provided.

The recording layer 174 of the MTJ layer 17 is made of a ferromagnetic material whose switching magnetic field changes with temperature. In this embodiment, a ferromagnetic material whose switching magnetic field decreases as the temperature rises is used. .

In this MRAM, in order to write information to the MTJ layer 17, a pair of bit line 21, digit line 13 and word line 12 arranged in a direction intersecting with each other are selected. That is, both the bit line 21 and the digit line 13 are energized to generate a current magnetic field, and at the same time, from the bit line 21 to the heating resistor layers 18, M.
By passing a current through the TJ layer 17 and the word line 12, the heating resistor layer 18 is heated to heat the MTJ layer 17. As a result, the magnetic characteristics of the recording layer 174 of the MTJ layer 17 become soft and the switching magnetic field lowers.
A low current is passed through the 1 and digit lines 13 to enable writing with a low switching magnetic field, and an increase in power consumption can be prevented.

At this time, since the current flows through each cell connected to the same bit line, the heating resistor of each cell generates heat, but the magnetization of the recording layer is not reversed because the current magnetic field due to the intended digit line is not applied. Further, the current magnetic field from the digit line extends to each cell arranged on the same digit line, but since the recording layer is not heated, its magnetic characteristics remain hard, and the magnetization is not reversed by the current magnetic field from the digit line. Therefore, the switching operation is performed only in the memory cells at the cross points at which the softening of the recording layer by heating and the application of the current magnetic field are simultaneously performed.

On the other hand, in order to read the information written in the MTJ layer 17, the word line 12 is selected and a sense current is passed from the bit line 21 to the heating resistor layer 18, the MTJ layer 17 and the word line 12, and the tunnel resistance is set. To detect. Here, the memory cell structure of FIG. 1 is a simple matrix structure having no switching element, but by comparing the word line 12 and the digit line 13 with each other, comparison with the reference cell can be performed by a simple peripheral circuit structure. Can be read by. At this time, in order to effectively detect the change in magnetoresistance that occurs in the MTJ layer 17, it is desirable that the resistance value of the heating resistor 18 be equal to or less than the resistance value of the MTJ layer 17.

As described above, the MR according to the embodiment of the present invention
In AM, MTJ is used not only for reading but also for writing.
Unlike the conventional MRAM, the layer 17 is energized. Then, the current value supplied to the MTJ layer 17 for writing is set to be larger than the current value supplied to the read MTJ layer 17. That is, at the time of writing, the MTJ layer 17 is sufficiently heated by the heat generation of the heating resistor layer 18 to facilitate writing. On the other hand, at the time of reading, a low sense current that allows a change in magnetoresistance to be detected is passed. This is because the MTJ layer 17 is overheated due to the heat generated by the heating resistor layer 18 when a large current is passed during reading.
This is because the magnetization information that has already been recorded may be erased.

Next, each component of the MRAM according to the embodiment of the present invention will be described in more detail.

As the material of the recording layer, many ferromagnetic alloys containing Fe, Co, and Ni are applicable because the switching magnetic field decreases with temperature rise. The material of the recording layer has a relatively large switching magnetic field at the temperature of the recording layer at the time of reading, has a Curie temperature slightly higher than the temperature of the recording layer at the time of writing, and has a large change in the switching magnetic field with respect to the temperature. Is preferred.

As the material for the recording layer, a material in which ferromagnetism disappears by causing a magnetic phase transition due to temperature rise can also be used. In this case, information can be written in the memory cell by applying a current magnetic field by the digit line when the recording layer is heated to eliminate the ferromagnetism and then cooled to generate the ferromagnetism.

Since the heating resistor is connected in series with the MTJ layer, the resistance value is preferably as small as possible in order to obtain a large effective magnetoresistance change amount, but conversely, a large resistance value is required in order to increase the heating amount. Values are preferred. As a balance between them, the resistance value of the heating resistor is set to be, for example, approximately the same as that of the MTJ layer.

Now, assuming a 1 Gbit class MRAM, the size of the MTJ layer is 0.1 μm wide × 0.1 μm long.
m, and the desired junction resistance RA is 1 kΩμm ²
Therefore, the junction resistance at that time is about 100 kΩ. The resistance of the heating resistor is 100kΩ, which is the same as the junction resistance.
In order to set the size of the heating resistor directly connected to the MTJ layer, the width is 0.1 μm × length 0.1 μm × thickness 0.05.
Assuming about μm, a material having a specific resistance of about 2 Ωcm is selected. As a material having a specific resistance value of about several Ωcm, a semiconductor material such as poly Si doped at a high concentration of about 10 ¹⁹ cm ⁻³ , TiO _x N _y, or TaO is used.
Examples thereof include metal oxynitride films such as _{xN y} and chalcogenide.

Here, the electric power that can be applied to the heating resistor layer is limited mainly by the breakdown voltage of the MTJ layers connected in series. Since the withstand voltage of the MTJ layer of the double junction using the Al ₂ O ₃ barrier is 3 V or more, the operating range of the single junction is 1.5.
Assuming V, the voltage applied to the heating resistor having the same resistance value is also about 1.5V.

A heat generating resistor of the above size has a specific resistance of 2 Ωcm.
In the case of using the above material, the power consumed by the heating resistor is 15 μW when 1.5 V is applied. Poly S of the above size
When a power of 15 μW is applied to the heat generating resistor, the temperature rise ΔT of the heat generating resistor due to energization heating is about 88, assuming that the power pulse application time is 50 ns and there is no heat escape.
It becomes 0K. Since this heat is conducted mainly above and below the heating resistor (because it is surrounded by SiO _x having a low thermal conductivity in the lateral direction), the temperature of the recording layer of the MTJ layer in contact with the heating resistor is set to a sufficient switching magnetic field. Can be increased until

In particular, in the layer structure of the heating resistor / recording layer / tunnel barrier / fixed layer, when the heat flowing from the heating resistor heats the recording layer, Al having a low thermal conductivity thereunder is used.
_{Since the 2} O ₃ tunnel barrier layer acts as a thermal barrier, it is possible to heat the recording layer more effectively.

As described above, the characteristic feature of the operation of the MRAM according to the embodiment of the present invention is that a large amount of current is applied (bias voltage is applied) so that the heating resistor generates sufficient heat during the write operation to raise the temperature of the recording layer. Is set high), and the current is set to be small enough to obtain the output voltage required for high-speed reading during the read operation (the bias voltage is set low).

When a 1 Gbit class MRAM is assumed, the bias voltage at the time of reading is about 800 mV. The bias voltage at the time of writing is within the breakdown voltage of the MTJ layer and higher than the bias voltage at the time of reading, for example, 1.
Set to about 5V. At this time, the amount of temperature rise of the heating resistor is designed so that the switching magnetic field of the recording layer is sufficiently reduced during writing and the switching magnetic field is not significantly reduced during reading. The temperature rise amount of the heating resistor can be designed by controlling the resistance, volume and specific heat of the heating resistor material, and controlling the applied voltage and the applied pulse width in terms of a circuit.

Incidentally, in Japanese Patent Laid-Open No. 2000-285668,
It is described that information is recorded / reproduced by providing a heating means in the magnetic memory element with a small operating magnetic field and reducing the influence on adjacent cells. In this publicly known document, a cross-point type heating wire is provided above and below a sheet-shaped resistance heating layer, and a crossing portion of the selected wiring is heated. Further, the recording layer of the memory element is arranged on the wiring for applying a magnetic field, and is located on the opposite side of the resistance heating layer from the wiring. However, it is difficult to effectively heat the recording layer with such a structure. That is, since the current magnetic field wiring requires a large current, a metal material having a large wiring thickness and a small specific resistance is generally used. Metallic materials with low specific resistance also have high thermal conductivity, so even if the lower side of such thick current magnetic field wiring is heated,
Most of the heat flows through the current magnetic field wiring and escapes,
It is considered that the recording layer of the target cell is not heated sufficiently. On the contrary, when electric power is applied so that the recording layer is sufficiently heated, it is considered that the heat generation reaches the peripheral cells and causes crosstalk.

On the other hand, the MR according to the embodiment of the present invention
In the AM, the heating resistor is arranged in contact with the recording layer and is heated by energization, so that the escape of heat can be minimized and the recording layer can be effectively heated.

To summarize the above discussion, the conventional MRAM
MR according to the embodiment of the present invention with respect to the above-mentioned publicly known documents
The structural features of AM are as follows. That is, (1) the recording layer and the heating resistor are provided in contact with each other in series (2) the resistance value of the heating resistor is set to be approximately the same as the junction resistance (3) Using a high material (4) changing the magnitude of the voltage pulse (or current pulse) applied through the junction during writing and reading.

The MR shown in FIG. 1 will be described with reference to FIGS.
A method of manufacturing the AM will be described. First, as shown in FIG. 2A, a first insulating film 11 made of SiO ₂ as an interlayer insulating film is formed on a lower substrate having a peripheral circuit, and a CM
Planarization is performed by the P (Chemical Mechanical Polishing) method. An Al-Cu film having a thickness of about 200 nm to be wiring is deposited on the first insulating film by a sputtering method. Using a resist mask formed by photolithography,
The Al—Cu film is etched by the RIE (Reactive Ion Etching) method to form the word line 12 and the digit line 13.
To form. At this time, in the contact region (not shown) with the peripheral circuit, contacts for the word line and the digit line are simultaneously formed. The second insulating film 14 is formed on the entire surface.
Is deposited, and using a resist mask formed by photolithography, a groove for forming the first contact layer is formed to have a depth of about 150 nm by the RIE method. M
OCVD (Metal Organic Chemical Vapor Depositio
For example, W is embedded in the groove by the n) method, and the W is planarized by the CMP method to form the first contact layer 15.

Next, as shown in FIG. 2B, a second contact layer (lower electrode) 16 is formed on the entire surface by sputtering.
An MTJ layer 17 and a heating resistor layer 18 are formed, and DLC (Diam as a mask material is used as a mask material by a low temperature plasma CVD method.
An ond Like Carbon) layer 19 is formed. Where MTJ
The layer 17 has a junction structure in which an antiferromagnetic layer 171, a magnetization fixed layer 172, an insulating layer (tunnel barrier) 173 made of AlO _x having a thickness of, for example, about 1 to 2 nm, and a recording layer (magnetization free layer) 174 are sequentially stacked. There is. Next, after patterning the DLC layer 19, the heating resistor layer 18 and the MTJ layer 17 are etched using the DLC pattern as a mask.

Next, as shown in FIG. 2C, after removing the DLC pattern as the mask material by O ₂ plasma ashing, a third insulating layer 20 is deposited on the entire surface and a third insulating layer 20 is formed by an etch back method. The insulating layer 20 is thinned. The third insulating layer 20 is formed by etching using the resist mask.
Then, the second contact layer 16 is patterned.

Further, as shown in FIG. 2D, after the fourth insulating layer is deposited on the entire surface, planarization is performed by the CMP method. After forming a contact hole in this insulating film, an Al-Cu layer to be a wiring is deposited by a sputtering method, and RIE of the Al-Cu layer is performed using a resist mask to form the bit line 21. As a result, the MRAM structure having the heating layer of the heating resistor layer 18 is completed.

In the case of the MTJ layer having a double junction structure,
Does not require a heating resistor especially near the junction.
There is a possibility that the J layer itself can generate heat. As shown in Figure 4
, Al ₂O₃Tunnel flowing through the tunnel barrier layer 44
Le electron has almost no energy consumption,
It flows into the recording layer 43 from the fixed layer 45 as a tron. Record
The electrons flowing into the recording layer 43 are the double-junction barrier layer 4
Repeated scattering in the recording layer 43 sandwiched between 4 and 42
The energy applied as the bias voltage in the recording layer 43
To release. Release from hot electrons in the recording layer 43
The released energy is converted into heat and the temperature of the recording layer 43 is changed.
Contribute to the rise. Electron scattering in the recording layer 43 is sufficient
If it is larger, it depends on the applied bias voltage and tunnel resistance.
Most of the applied energy derived from the total amount of current is thermal energy.
Converted to energy. Therefore, the temperature rise due to it
Can be considered in the same manner as the above-mentioned electric heating. However
In this case, the recording layer 43 should be directly energized and heated.
become. At this time, the recording layer 43 is made of Al having a low thermal conductivity.₂
O₃The upper and lower sides are sandwiched by the barrier layers 44, 42 (lateral direction
Is a low thermal conductivity SiO_xBecause of the heat)
When the recording layer 43 is heated more effectively,
Conceivable.

FIGS. 3A and 3B are sectional views of the memory cell of the MRAM according to another embodiment of the present invention.
FIG. 3A and FIG. 3B are cross-sectional views taken along planes orthogonal to each other.

As shown in FIG. 3A, in this MRAM, a contact layer 31 and a thermoelectric semiconductor layer 32 are provided instead of the heating resistor layer 18 of FIG. Figure 3
As shown in (b), an N-type semiconductor and a P-type semiconductor are used as the thermoelectric semiconductor layer 32, and the two thermoelectric semiconductor layers 32 sandwich the contact layer 31 between the two bit lines 21. They are connected to form a thermoelectric effect element (Peltier element).

In the case of this MRAM, the thermoelectric semiconductor layer 32 is used as the temperature control layer for the recording layer 174, and the direction of the current flowing in the thermoelectric effect element constituted by joining two kinds of semiconductor layers is changed, Both heating and cooling are possible. In the case of heating, as in the MRAM of FIG. 1, a ferromagnetic material whose coercive force decreases with increasing temperature may be used for the recording layer 174. On the contrary, when cooling, a material such as FeRh that causes a magnetic phase transition from a ferromagnetic material to an antiferromagnetic material by cooling may be used.

[0047]

As described above, according to the present invention, it is possible to provide a magnetic memory device capable of preventing the increase of the switching magnetic field and realizing a stable memory holding operation even if the element is miniaturized.

[Brief description of drawings]

FIG. 1 is a sectional view of an MRAM according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the method for manufacturing the MRAM in FIG.

FIG. 3 is a cross-sectional view of an MRAM according to another embodiment of the present invention.

FIG. 4 is a cross-sectional view of an MTJ layer having a double junction structure.

FIG. 5 is a diagram showing an operation curve of an MRAM.

FIG. 6 is a sectional view showing an example of a conventional MRAM.

[Explanation of symbols]

11 ... First insulating film 12 ... Word line 13 ... Digit line 14 ... Second insulating film 15 ... First contact layer 16 ... Second contact layer (lower electrode) 17 ... MTJ layer 171 ... Antiferromagnetic layer 172 ... Magnetization pinned layer 173 ... Insulating layer (tunnel barrier) 174 ... Recording layer (magnetization free layer) 18 ... Heating resistor layer 19 ... DLC layer 20 ... Third insulating layer 21 ... Bit line 31 ... Contact layer 32 ... Thermoelectric semiconductor layer

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Tomomasa Ueda             1st Komukai Toshiba-cho, Sachi-ku, Kawasaki-shi, Kanagawa             Inside the Toshiba Research and Development Center (72) Inventor Hiroaki Yasuda             1st Komukai Toshiba-cho, Sachi-ku, Kawasaki-shi, Kanagawa             Inside the Toshiba Research and Development Center (72) Inventor Minoru Amano             1st Komukai Toshiba-cho, Sachi-ku, Kawasaki-shi, Kanagawa             Inside the Toshiba Research and Development Center (72) Inventor Tatsuya Kishi             1st Komukai Toshiba-cho, Sachi-ku, Kawasaki-shi, Kanagawa             Inside the Toshiba Research and Development Center (72) Inventor Katsuya Nishiyama             1st Komukai Toshiba-cho, Sachi-ku, Kawasaki-shi, Kanagawa             Inside the Toshiba Research and Development Center (72) Inventor Yoshiaki Asao             8th Shinsugita Town, Isogo Ward, Yokohama City, Kanagawa Prefecture             Ceremony company Toshiba Yokohama office (72) Inventor Yoshihisa Iwata             1st Komukai Toshiba-cho, Sachi-ku, Kawasaki-shi, Kanagawa             Ceremony Company Toshiba Microelectronics Sen             Inside F-term (reference) 5F083 FZ10 GA11 GA30 JA24 JA36                       JA37 JA39 JA40 JA60 MA06                       MA16 MA19 PR40

Claims (5)

[Claims] 1. A tunnel magnetic having a junction including a recording layer formed of a ferromagnetic material whose switching magnetic field changes according to temperature and whose magnetization direction changes according to an external magnetic field, an insulating layer, and a magnetization fixed layer formed of a ferromagnetic material. Between the resistance effect element, the bit line and the digit line which are arranged in directions intersecting each other for giving a current magnetic field for writing to the tunnel magnetoresistive effect element, between the bit line and the tunnel magnetoresistive effect element, or A magnetic memory device comprising: a temperature control layer provided between the digit line and the tunnel magnetoresistive effect element. 2. The magnetic memory device according to claim 1, wherein the temperature control layer is a heating layer formed of a heating resistor. 3. The magnetic storage device according to claim 2, wherein a current larger than that at the time of reading is supplied at the time of writing to the tunnel magnetoresistive effect element. 4. The magnetic memory device according to claim 1, wherein the temperature control layer is a layer having a thermoelectric effect. 5. The recording layer is formed of a ferromagnetic material that causes a magnetic phase transition.
The magnetic storage device according to any one of 1.