JP2003298080A - Solar cell manufacturing method - Google Patents

Abstract

(57) Abstract: A step of forming a PN junction by diffusing a semiconductor impurity into a semiconductor substrate, a step of partially removing the PN junction by sandblasting to form an electrically separated junction separation part, and a collector electrode. In the method for manufacturing a solar cell including the step of forming a junction, it is inevitable that the junction separation portion is destroyed at a microscopic level, and there is a problem that the characteristics of the entire solar cell deteriorate. SOLUTION: A step of diffusing semiconductor impurities over the entire surface including the surface of the semiconductor substrate to form a diffusion layer and a coating film covering the diffusion layer, and a step of forming a diffusion layer near an outer peripheral portion of the back surface of the semiconductor substrate. Removing the semiconductor substrate by dipping the semiconductor substrate in a wet etching solution for a certain period of time to etch the surface layer and the coating film of the portion where the diffusion layer is removed, Removing the coating film on the substrate to expose the diffusion layer;
Forming an SF layer and placing electrodes on the semiconductor substrate.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for producing a high-efficiency solar cell simply and at low cost, and particularly to a method effective for increasing the efficiency of a single crystal or polycrystalline silicon solar cell. Is.

[0002]

2. Description of the Related Art FIG. 6 shows a method of manufacturing a solar cell described in Japanese Patent Laid-Open No. 2001-68700. This is a process of diffusing semiconductor impurities in the vicinity of the surface of the semiconductor substrate 101 to form a PN junction portion 102, and a junction separation portion 10 in which the PN junction portion is partially removed and electrically separated.
In the method for manufacturing a solar cell, which includes the step of forming No. 3 and the step of forming the collecting electrode 104 in each of the separated P-type region and N-type region, the PN junction is partially polished and removed by sandblasting. It is electrically separated.

By doing so, a solar cell can be manufactured very easily and at low cost.

[0004]

However, in such a manufacturing method, since a part of the joint is polished and removed by sandblasting, it is avoided that the polished part is broken at a microscopic and crystallographic level. I can't. As a result, a low-quality junction is formed in the portion where the PN junction is separated, which deteriorates the diode characteristics of the entire solar cell, and a surface where carrier recombination is likely to occur is also formed in the portion where the PN junction is separated. However, there is a problem that the generated current of the solar cell is lowered.

[0005]

A step of forming a diffusion layer and a coating film for covering the diffusion layer on the entire surface of the semiconductor substrate by heat-treating the semiconductor substrate in a semiconductor impurity atmosphere, and the outer periphery of the back surface of the semiconductor substrate. A step of removing a diffusion layer of the semiconductor substrate to form a junction separation portion that electrically separates the front surface and the back surface of the semiconductor substrate; and a step of immersing the semiconductor substrate in a wet etching solution and etching the surface layer portion of the junction separation portion. A step of removing the coating film of the semiconductor substrate to expose the diffusion layer, and a step of forming a BSF layer on the back surface of the semiconductor substrate and installing electrodes on the semiconductor substrate.

The surface layer has a thickness of 0.3 μm or more and 0.6 μm or more.
Etched to a depth of m or less.

Further, the time for immersing the semiconductor substrate in the wet etching solution is 1 minute 15 seconds or more and 5 minutes or less.

A step of forming a diffusion layer and a coating film covering the diffusion layer on the entire surface of the semiconductor substrate by heat treating the semiconductor substrate in a semiconductor impurity atmosphere, and removing the coating film of the semiconductor substrate to form the diffusion layer. A step of exposing, a step of forming an antireflection film on the diffusion layer, and a junction separation part for electrically separating the front surface and the back surface of the semiconductor substrate by removing the diffusion layer on the outer periphery of the back surface of the semiconductor substrate. The method includes a step of forming the semiconductor substrate, a step of immersing the semiconductor substrate in a wet etching solution to etch the surface layer portion of the junction separation portion, and a step of forming a BSF layer on the back surface of the semiconductor substrate and installing electrodes on the semiconductor substrate.

The thickness of the antireflection film formed as a film is 8
It is not less than 50Å and not more than 900Å.

Further, the wet etching solution is an aqueous sodium hydroxide solution.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1. FIG. 1 is a diagram showing a process procedure of a method for manufacturing a solar cell according to Embodiment 1 of the present invention. FIG. 1A is a sectional view of a substantially circular P-type semiconductor substrate 1 made of a silicon substrate containing boron or the like. The surface shape of the semiconductor substrate 1 is not particularly limited, but if unevenness of several to several tens of μm is formed, light reflection on the light receiving surface can be suppressed, which is effective for high efficiency.

Next, as shown in FIG. 1B, the semiconductor substrate 1 is heat-treated in an atmosphere of N-type impurities such as phosphorus (P) so that 0.2 to 0 from the front surface of the semiconductor substrate 1 is entirely covered. ．
An N-type impurity is diffused to a depth of about 5 μm to form an N-type diffusion layer 2, and a boundary between the surface of the P-type semiconductor substrate 1 and the diffusion layer 2 is a PN junction 3. . When the semiconductor substrate 1 is heat-treated in an N-type impurity atmosphere such as phosphorus (P), silicon oxide (SiO ₂ )
The diffusion layer 2 is entirely covered with the coating film 4 made of phosphorus oxide (P ₂ O ₅ ). The P-type semiconductor substrate 1 is heat-treated to diffuse N-type impurities and thereby form an N-type diffusion layer 2.
The step of forming the coating film 4 that covers the diffusion layer 2 is referred to as a first step.

Next, as shown in FIG. 1C, the diffusion layer on the outer periphery of the back surface of the semiconductor substrate 1 is covered with alumina (Al
₂ O ₃ ) and silicon carbide (SiC) are partially polished and removed by a sandblasting method using a propellant to form the PN junction 3
FIG. 6 is a cross-sectional view of a structure in which the joint separation portion 5 is formed by separating the above. In this case, tape protection is not used, and
By directly injecting a propellant onto the semiconductor substrate 1 from an injection nozzle having a fine diameter of about 2 to 2.0 mm, the junction separation part 5 is formed at a desired position. As long as the diffusion layer 2 can be completely electrically separated between the front surface and the back surface of the semiconductor substrate 1, the junction separating portion 5 is limited in the polishing removal position shape and the angle of the injection nozzle with respect to the semiconductor substrate 1. It is not something that will be done. The spray nozzle used at this time sprays the semiconductor substrate 1 at an angle of about 20 to 85 degrees, thereby polishing and removing the end portion of the back surface of the semiconductor substrate 1 obliquely over the entire circumference. However, the same effect can be obtained by setting the jet nozzle so as to be perpendicular to the back surface of the semiconductor substrate 1 and jetting the same. In the present invention, the outer peripheral portion indicates a corner portion and its periphery in this sectional view, and even if the inside of the back surface is slightly removed by polishing from the corner portion of the back surface of the semiconductor substrate 1, there is a problem. Absent. The step of removing the diffusion layer on the outer peripheral portion of the back surface of the semiconductor substrate 1 having the diffusion layer 2 over the entire circumference to form the junction separating portion 5 is referred to as a second step.

Next, as shown in FIG. 1D, the low-quality surface layer portion 6 generated in the junction separation portion 5 of the semiconductor substrate 1 thus formed has a crystal structure of a processed surface damaged and a charge level of It tends to decrease and surface recombination is high, and post-treatment is performed to remove this.

The purpose of this post-treatment is to remove and stabilize the microscopically and crystallographically destroyed portion in the junction separating portion 5, and the treatment by wet etching using the wet etching solution 7 is performed. It is suitable as a mass production technology because it is simple and easy to process in large quantities. However, in the semiconductor substrate 1, the junction layer (not shown, the intersection of the pn junction 3 and the surface layer 6) and the other portions are the same material except for the conductivity type, The chemical characteristics such as the nature of wet etching with respect to the processing liquid are also very similar. Therefore, when the bonding layer is exposed, it is very difficult to perform wet etching only on the bonding separation portion 5 without affecting the bonding layer, and it is necessary to protect the bonding layer by some means.

Here, the coating film 4 covering the diffusion layer 2 formed over the entire surface of the semiconductor substrate 1 is usually removed by using a hydrofluoric acid aqueous solution or the like in order to proceed to the subsequent steps.
On the other hand, in the present invention, the bonding separation portion 5 is formed by polishing and removing the coating film 4 by sandblasting. As a result, only the portions of the coating film 4 and the diffusion layer 2 that have been removed by polishing are removed, and the remaining portions of the semiconductor substrate 1 have both the diffusion layer 2 and the coating film 4 left. By doing so, a coating film 4 made of silicon oxide and phosphorous oxide is obtained, which has different chemical properties from the semiconductor substrate 1 including the diffusion layer 2. Therefore,
With this configuration, the diffusion layer 2 is protected when performing wet etching.

In FIG. 1D, the semiconductor substrate 1 having the junction separating portion 5 is immersed in a wet etching solution 7. In the figure, the layer including the microscopically and crystallographically broken portion of the junction separation portion 5 is shown as the surface layer portion 6 with a slight emphasis (actually, it does not have such a thickness). . The characteristics of this liquid are not particularly limited as long as the coating film 4 has a certain durability and can dissolve the semiconductor substrate 1. However, for example, an aqueous solution of sodium hydroxide or potassium hydroxide is generally used for initial surface cleaning, unevenness formation (texture etching), etc. of a semiconductor substrate for solar cells such as ordinary silicon. Since it is a chemical liquid and the coating film 4 has a certain durability against these liquids, it is particularly suitable as a post-treatment liquid. According to the experiment, the temperature of 850 ° C. is 15
It was found that the coating film 4 formed in the phosphorus diffusion step of maintaining the temperature for about 5 minutes has durability for about 5 minutes with respect to a sodium hydroxide aqueous solution having a concentration of 3.2 wt% and a temperature of 60 ° C. On the other hand, for the same aqueous solution of sodium hydroxide, the semiconductor substrate 1
The raw material silicon has an etching rate of about 0.12 μm / min. Therefore, in this case, the processing time is within 5 minutes, which is 0.6 μm if expressed by the etching amount of silicon.
It may be set within the range and post-processed. After this, the whole process is completed by washing with water and drying. The step of wet-etching the semiconductor substrate 1 to etch a small amount of the coating film 4 together with the surface layer portion 6 of the junction separating portion 5 is referred to as a third step.

Next, FIG. 1E shows the surface layer portion 6 and the coating film 4.
It is sectional drawing of the semiconductor substrate 1 of the state which removed. After such a wet etching process, the coating film 4 is unnecessary, so that the diffusion layer 2 is exposed by the method using the hydrofluoric acid aqueous solution as described above, and the diffusion layer 2 is also washed and dried. . It should be noted that these are a series of treatments, and intermediate drying is omitted, and post-treatment → washing → hydrofluoric acid treatment → washing →
It does not matter if you proceed with drying. By doing this,
The surface layer portion 6 including the destroyed portion of the junction separating portion 5 is dissolved and removed, and a new stabilized junction separating portion 8 is formed.
The step of removing the coating film 4 on the semiconductor substrate 1 to expose the diffusion layer 2 is referred to as a fourth step.

Next, FIG. 1 (f) is a cross-sectional view of the semiconductor substrate 1 having a BSF (Back Surface Field) layer 9 formed on the back surface. This BSF layer 9
Is applied to the back surface side of the semiconductor substrate 1 by screening printing or the like and baked to diffuse aluminum in the vicinity of the back surface of the semiconductor substrate 1. The diffusion layer 2 on the back surface of the P-type semiconductor layer is inverted and formed into a high-concentration P-type semiconductor layer. The step of forming the BSF layer 9 on the back surface of the semiconductor substrate 1 is referred to as a fifth step.

Next, FIG. 1G is a cross-sectional view of the semiconductor substrate 1 in which the antireflection film 10 is formed on the diffusion layer 2 on the surface. The antireflection film 10 can prevent incident light from being reflected on the surface of the semiconductor substrate 1 and can be effectively taken into the inside. The antireflection film 10 is made of, for example, silicon nitride (Si ₃ N ₄ ) or the like, and is formed by a plasma CVD method using a mixed gas of silane gas (SiH ₄ ) and ammonia gas (NH ₃ ). The step of forming the antireflection film 10 on the diffusion layer 2 on the surface of the semiconductor substrate 1 is referred to as a sixth step.

Next, FIG. 1 (h) is a sectional view of a solar cell 11 completed by arranging collector electrodes and the like on the semiconductor substrate 1.
In this case, silver paste or the like is screen-printed on each of the front surface and the back surface of the semiconductor substrate 1 and baked to form the collector electrode 12 and the collector electrode 13, and then the entire semiconductor substrate 1 is immersed in a molten solder bath. Then, the solder coating 14 is formed on the surface of the collector electrode. This is performed for the purpose of protecting the collector electrode 12 and the collector electrode 13 and simplifying the wiring property when wiring the solar cell with a wiring member such as a copper foil in a later step. By doing this,
The solar cell 11 is manufactured. The step of installing collector electrodes on the semiconductor substrate 1 and covering them with the solder coating 14 is referred to as a seventh step.

In the processing step of FIG. 1, the post-processing steps after (f) are not necessarily limited to those shown in FIG. FIG. 2 is a diagram showing a process procedure of a method for manufacturing a solar cell in which the process after (f) in FIG. 1 is changed. 2A to 2E are the same as the first to fourth steps described based on FIGS. 1A to 1E, the description thereof will be omitted. ) To (e) are the corresponding steps from the 11th step to the 14th step.

FIG. 2 (f) shows an antireflection film 10 formed on the surface and side surfaces of the semiconductor substrate 1. The step of forming this antireflection film 10 is referred to as a fifteenth step. Next, FIG. 2G shows that the BSF layer 9 is formed by screening and printing the metal paste on the front and back surfaces and firing it. The step of forming this BSF layer 9 is referred to as a 16th step. Next, as shown in FIG. 2H, the collector electrode 12 is formed on the front surface and the back surface.
In addition, the collector electrode 13 is formed and immersed in a solder bath to form the solder coating 14. The step of installing collector electrodes on the semiconductor substrate 1 and covering them with the solder coating 14 is referred to as a seventeenth step. There is no problem even if the processing steps are changed in this way.

As the solar cell thus manufactured, a semiconductor substrate 1 using a p-type polycrystalline silicon substrate having a specific resistance of 1 Ωcm will be described. FIG. 3 is a relative comparison of the characteristics of the solar cell with respect to the time taken for the post-treatment of the junction separation part 5, in which the relationship between the wet etching treatment time and various parameters of the solar cell was investigated and distributed. Here, the treatment time of 0 minutes is the case where the post-treatment by wet etching was not performed, and shows the characteristics in the conventional solar cell manufacturing method. In addition, the upper limit of the time spent for the post-treatment is 5 minutes in consideration of the above-mentioned wet etching ability, and 1.25 minutes (1 minute 15 seconds), 2.50 minutes (2 minutes 30 seconds), 3.75 minutes ( (3 minutes 45 seconds) Data was collected every 5 minutes. The open circuit voltage on the vertical axis is the voltage value output when no current flows (load resistance = ∞). Further, the short-circuit current is a current value output when the load resistance = 0. Further, the fill factor is a factor indicating whether the diode is good or bad, and is represented by maximum output / (open current × short circuit current). The output is represented by open circuit voltage × short circuit current × curve factor.
Generally, the larger these values are, the better the characteristics of the solar cell are.

From this distribution, when wet etching is not performed (0 minutes) and when wet etching is performed (1.2 minutes).
5 minutes or more and 5 minutes or less), the values of all the parameters do not necessarily increase in proportion to the wet etching time, but the characteristics of wet etching are that when wet etching is not performed. It can be seen that it is improved in comparison with.

FIG. 4A shows the relationship with the wet etching time by taking the average value of the distribution of each of these parameters. In the table shown in this figure, the average value for each parameter when wet etching is not performed is set to 100%, and the change in the ratio for each wet etching time can be known based on this. Also, FIG.
(B) is a graph of this average value table for easy comparison. Comparing these averaged values based on the table and the graph makes it clear that the characteristics of the solar cell are improved by wet etching. Overall, the wet etching time is 1.25 minutes (1 minute 15
It can be said that characteristics such as short-circuit current and fill factor are improved under any condition from 5 seconds (5 seconds) to 5 minutes compared with the conventional manufacturing method. Expressed by etching amount up to 0.3 μm and 0.6 μm
It was found that a sufficient improvement in characteristics can be obtained by the following treatment.

Although a coating film made of an oxide formed in the diffusion process is used as the protective film for performing the post-treatment of the junction separating portion 5, the role of the protective film may be obtained from other materials. good.

Embodiment 2. FIG. 5 is a diagram showing process steps of a method for manufacturing a solar cell according to the second embodiment of the present invention. It should be noted that those having the same functions as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.
FIG. 5A shows a P-type semiconductor substrate 1 made of a silicon substrate containing boron or the like.

Next, as shown in FIG. 5B, the semiconductor substrate 1 is heat-treated in an N-type impurity atmosphere such as phosphorus (P), so that 0.2 to 0 from the front surface of the entire surface of the semiconductor substrate 1. ．
An N-type impurity is diffused to a depth of about 5 μm to form an N-type diffusion layer 2, and a boundary between the surface of the P-type semiconductor substrate 1 and the diffusion layer 2 is a PN junction 3. . The process of heat-treating the P-type semiconductor substrate 1 to diffuse the N-type impurities to form the N-type diffusion layer 2 and the coating film 4 covering the diffusion layer 2 is referred to as a 21st process.

Next, FIG. 5C shows a silicon oxide (SiO ₂ ) and a phosphorus oxide (P) formed in the diffusion process.
_The coating film composed of ₂ O ₅ ) was removed with an aqueous solution of hydrofluoric acid, washed with water and dried. The step of removing the coating film 4 that covers the semiconductor substrate 1 is referred to as a 22nd step.

Next, as shown in FIG. 5D, in order to prevent incident light from being reflected on the front surface of the semiconductor substrate 1 and to effectively take in the light, the front surface and the side surface of the semiconductor substrate 1 excluding the back surface are shown. The antireflection film 10 is formed. The antireflection film 10 is made of, for example, silicon nitride (Si ₃ N ₄ ) or the like, and is formed by a plasma CVD method using a mixed gas of silane gas (SiH ₄ ) and ammonia gas (NH ₃ ). The step of forming the antireflection film 10 on the semiconductor substrate 1 and the twenty-third step.

Next, FIG. 5E shows this antireflection film 10.
As a protective film, the entire edge of the back surface of the semiconductor substrate 1 is partially polished and removed by a sandblast method using a propellant such as alumina (Al ₂ O ₃ ) or silicon carbide (SiC) to separate the junction. The portion 5 is formed and the PN junction portion 3 is separated. If the diffusion layer 2 can be electrically completely separated between the front surface and the back surface of the semiconductor substrate 1, the position shape of the polishing removal, the angle of the injection nozzle with respect to the semiconductor substrate 1, the material of the propellant, etc. It is not limited. The step of removing the diffusion layer 2 on the outer peripheral portion of the back surface of the semiconductor substrate 1 having the diffusion layer 2 over the entire circumference to form the junction separating portion 5 is referred to as a 24th step.

Next, in FIG. 5 (f), post-treatment of the junction separating portion 5 is performed using the antireflection film as a protective film, and a low quality joint or surface re-formation formed on at least a part of the junction separating portion 5 is performed. Remove high-bond surfaces. The method of this post-treatment is also not particularly limited, but wet etching with an aqueous solution of sodium hydroxide or potassium hydroxide is suitable from the viewpoint of simplicity and mass productivity.

When the durability of the antireflection film 10 to the post-treatment liquid was examined, for example, plasma CV at a film forming temperature of 400 ° C.
It was confirmed that the antireflection film formed of D having a thickness of 700 Å and a refractive index of 2.2 has durability for about 10 minutes with respect to a sodium hydroxide aqueous solution having a concentration of 3.2 wt% and 60 ° C. It was

However, since the antireflection film 10 has an original purpose of preventing reflection of incident light, in order to keep the characteristics high, an extra film is formed in advance and adjustment is made by a reduction amount due to post-treatment. Ingenuity is important. For example, when the above-described antireflection film 10 formed by plasma CVD with a refractive index of 2.2 at 400 ° C. is used and post-treatment is performed for 2.5 minutes with an aqueous sodium hydroxide solution having a concentration of 3.2 wt% and 60 ° C. If the desired film thickness is 700Å, the film thickness in advance is 850-
An appropriate film thickness is 900Å.

For example, when a shallow junction is required in the process of designing a device, or when polishing removal with strong damage is required, the thickness of the coating film may be insufficient in order to obtain a sufficient effect of post-treatment. Occurs. In this case, the antireflection film 10
The method of using as a protective film is likely to obtain a sufficient effect. By the above processing, the surface layer portion 6 of the junction separating portion 5 is dissolved and removed, and a stabilized new junction separating portion 8 is formed. The step of wet-etching the semiconductor substrate 1 to etch a small amount of the antireflection film 10 together with the surface layer portion 6 of the junction separating portion 5 is referred to as a 25th step.

Next, FIG. 5 (g) shows that the BSF layer 9 is provided by screen-printing and firing the metal paste on the front and back surfaces after washing and drying with water. The step of forming the BSF layer 9 on the back surface of the semiconductor substrate 1
6 steps

Next, as shown in FIG. 5 (h), the collector electrode 12 and the collector electrode 13 are formed and further immersed in a solder bath to solder-coat 1
4 is formed and the solar cell 11 is completed. A collector electrode is installed on this semiconductor substrate 1, and these are attached to the solder film 1
The step of covering with 4 is the 27th step.

By doing so, since the antireflection film having high durability against wet etching can prevent the diffusion layer of the semiconductor substrate from being etched, wet etching having a long etching depth and a large etching depth can be prevented. It is possible to reliably remove the destroyed surface layer portion.

[0040]

As described above, by dissolving and removing the surface layer portion of the semiconductor substrate, a highly efficient solar cell can be manufactured.

[Brief description of drawings]

FIG. 1 is a method for manufacturing a solar cell according to a first embodiment of the present invention.

FIG. 2 is a method for manufacturing a solar cell according to the first embodiment of the present invention.

FIG. 3 is a distribution diagram comparing the performances of the solar cells according to the first embodiment of the present invention.

FIG. 4 is a graph etc. comparing the performance of the solar cells in the first embodiment of the present invention.

FIG. 5 is a method for manufacturing a solar cell according to a second embodiment of the present invention.

FIG. 6 shows a conventional method for manufacturing a solar cell.

[Explanation of symbols]

1 semiconductor substrate, 2 diffusion layer, 3 PN junction,
4 coating film, 5 junction separation part, 6 wet etching liquid, 7 surface layer part, 8 new junction separation part, 9
BSF layer, 10 antireflection film, 11 solar cell,
12 collecting electrodes, 13 collecting electrodes, 14 solder films.

Claims (6)

[Claims] 1. A step of forming a diffusion layer and a coating film for covering the diffusion layer on the entire surface of the semiconductor substrate by heat-treating the semiconductor substrate in a semiconductor impurity atmosphere, and an outer peripheral portion of the back surface of the semiconductor substrate. A step of removing the diffusion layer to form a junction separating portion that electrically separates the front surface and the back surface of the semiconductor substrate; and immersing the semiconductor substrate in a wet etching solution to etch the surface layer portion of the junction separating portion. And a step of removing the coating film of the semiconductor substrate to expose the diffusion layer, and a step of forming a BSF layer on the back surface of the semiconductor substrate and installing electrodes on the semiconductor substrate. And a method for manufacturing a solar cell. 2. The surface layer is etched to a depth of 0.3 μm or more and 0.6 μm or less.
A method for manufacturing the solar cell described. 3. The method for manufacturing a solar cell according to claim 1, wherein the time for immersing the semiconductor substrate in the wet etching solution is 1 minute 15 seconds or more and 5 minutes or less. 4. A step of forming a diffusion layer and a coating film for coating the diffusion layer on the entire surface of the semiconductor substrate by heat-treating the semiconductor substrate in a semiconductor impurity atmosphere, and the coating film of the semiconductor substrate. To expose the diffusion layer, to form an antireflection film on the diffusion layer, and to remove the diffusion layer on the outer peripheral portion of the back surface of the semiconductor substrate to remove the diffusion layer from the front surface and the back surface of the semiconductor substrate. A step of electrically forming a junction separation part for electrically separating the semiconductor substrate, a step of immersing the semiconductor substrate in a wet etching solution to etch a surface layer part of the junction separation part, and a BSF layer formed on the back surface of the semiconductor substrate. A step of installing electrodes on the semiconductor substrate. 5. The thickness of the formed antireflection film is 850Å
It is above 900 Å or less, The manufacturing method of the solar cell according to claim 4 characterized by things. 6. The wet etching solution is an aqueous sodium hydroxide solution, as claimed in any one of claims 1 to 5.
The method for manufacturing a solar cell according to any one of the items.