JP2003282898A - Solar cell element and method for forming the same - Google Patents
Solar cell element and method for forming the sameInfo
- Publication number
- JP2003282898A JP2003282898A JP2002078194A JP2002078194A JP2003282898A JP 2003282898 A JP2003282898 A JP 2003282898A JP 2002078194 A JP2002078194 A JP 2002078194A JP 2002078194 A JP2002078194 A JP 2002078194A JP 2003282898 A JP2003282898 A JP 2003282898A
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- Japan
- Prior art keywords
- output
- surface side
- glass frit
- solar cell
- cell element
- Prior art date
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Classifications
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Photovoltaic Devices (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は太陽電池素子とその
形成方法に関し、特に裏面電極を帯状の出力取出部と集
電部とで構成した太陽電池素子とその形成方法に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solar cell element and a method of forming the same, and more particularly to a solar cell element having a back electrode composed of a strip-shaped output extraction portion and a current collector and a method of forming the same.
【0002】[0002]
【従来の技術】従来のシリコン太陽電池を図4に示す。
図4に示すように、P型半導体基板1の表面近傍全面に
一定の深さまでN型不純物を拡散させてN型を呈する拡
散層2を形成するとともに、この拡散層2の表面に反射
防止膜3を形成したものである。また、表面側には表面
電極4が形成され、裏面側には出力取出部5と集電部6
から成る裏面電極5、6が形成されている。2. Description of the Related Art A conventional silicon solar cell is shown in FIG.
As shown in FIG. 4, an N-type impurity is diffused to a certain depth to form an N-type diffusion layer 2 on the entire surface near the surface of the P-type semiconductor substrate 1, and an antireflection film is formed on the surface of the diffusion layer 2. 3 is formed. Further, the front surface electrode 4 is formed on the front surface side, and the output extracting portion 5 and the current collecting portion 6 are formed on the rear surface side.
Are formed on the back electrodes 5 and 6.
【0003】この裏面電極5、6の形成方法について
は、特開平5−326990号公報、あるいは特表平6
−509910号公報に開示されているように、半導体
基板1の裏面の一領域に銀ペースト(5)を塗布して乾
燥した後、その領域の周辺部の一部に重なるようにアル
ミニウムペースト(6)を塗布して乾燥して同時に焼成
する方法、すなわち同時焼成法(一段階焼成)が用いら
れている。この従来の太陽電池素子では、裏面電極の出
力取出部5は10μm程度の厚みに形成され、集電部6
は50μm程度の厚みに形成され、重なり部は60μm
程度の総厚に形成される。A method for forming the back electrodes 5 and 6 is described in Japanese Patent Laid-Open No. 5-326990 or Japanese Patent Publication No.
As disclosed in Japanese Patent No. 509910, a silver paste (5) is applied to one region on the back surface of the semiconductor substrate 1 and dried, and then an aluminum paste (6) is formed so as to partially overlap the peripheral portion of the region. ) Is applied, dried and simultaneously fired, that is, a simultaneous firing method (one-step firing) is used. In this conventional solar cell element, the output extracting portion 5 of the back electrode is formed to have a thickness of about 10 μm, and the current collecting portion 6 is formed.
Is formed to a thickness of about 50 μm, and the overlapping portion is 60 μm
It is formed to a total thickness of about.
【0004】このようにして製造された太陽電池素子で
は、複数の素子同士を配線材を用いて直列に接続して電
圧を昇圧して使用するのが一般的である。この素子間の
接続にははんだが必要となるため、表面電極4と裏面電
極5、6にはんだコーティングを行っている。このとき
裏面電極の出力取出部5にはんだ濡れ性が良好な素材を
用いてこれに配線材(不図示)をはんだ付けしている。In the solar cell element manufactured as described above, it is general that a plurality of elements are connected in series by using a wiring material to boost the voltage for use. Since solder is required for connection between these elements, the front surface electrode 4 and the back surface electrodes 5 and 6 are coated with solder. At this time, a material having good solder wettability is used for the output extraction portion 5 of the back surface electrode, and a wiring material (not shown) is soldered thereto.
【0005】[0005]
【発明が解決しようとする課題】ところが、上記のよう
な裏面電極5、6の構造では、図5に示すように、出力
取出部5と集電部6を同時焼成するときに、集電部6の
成分が出力取出部5の一部に拡散して合金層7が形成さ
れるが、この合金層7は焼結による収縮率が大きいた
め、これと接合する半導体基板1との界面8で引張り応
力が発生し、半導体基板1の一部に応力集中が起こる。
そのため、焼成後の工程で出力取出部5と集電部6の重
なり部を起点とするセル割れが多発するという問題があ
った。However, in the structure of the back electrodes 5 and 6 as described above, as shown in FIG. 5, when the output extracting portion 5 and the current collecting portion 6 are simultaneously fired, the current collecting portion is The component 6 diffuses into a part of the output extraction portion 5 to form the alloy layer 7. However, since the alloy layer 7 has a large shrinkage rate due to sintering, the interface 8 between the alloy layer 7 and the semiconductor substrate 1 bonded to the alloy layer 7 is large. Tensile stress is generated, and stress concentration occurs in a part of the semiconductor substrate 1.
Therefore, there has been a problem that cell cracking from the overlapping portion of the output extracting portion 5 and the current collecting portion 6 frequently occurs in the process after firing.
【0006】上記のような問題を回避するために、裏面
電極の出力取出部5の焼成後の厚みを2μm以上6μm
以下にすると有効であることが分かっている。しかし、
裏面電極5、6の出力取出部5の全体の厚みを薄くする
と、出力取出部5と半導体基板1の接着強度が低下する
ため、はんだコーティングやモジュール作成の際に出力
取出部5aが剥離しやすくなるという問題があった。In order to avoid the above problems, the thickness of the output extraction portion 5 of the back electrode after firing is set to 2 μm or more and 6 μm or more.
The following has been found to be effective: But,
If the entire thickness of the output extraction portion 5 of the back surface electrodes 5, 6 is reduced, the adhesive strength between the output extraction portion 5 and the semiconductor substrate 1 is reduced, so that the output extraction portion 5a is easily peeled off during solder coating or module fabrication. There was a problem of becoming.
【0007】本発明は上記問題に鑑みてなされたもので
あり、出力取出部と集電部を一部重ねてスクリーン印刷
して焼成して電極を形成すると、出力取出部と集電部と
の重なり部分を起点とするセル割れが発生するという従
来の問題点を解消した太陽電池素子を提供することを目
的とする。The present invention has been made in view of the above problems. When the output extraction part and the current collecting part are partially screen-printed and baked to form an electrode, the output extraction part and the current collecting part are combined. It is an object of the present invention to provide a solar cell element that solves the conventional problem of cell cracking starting from an overlapping portion.
【0008】[0008]
【課題を解決するための手段】上記目的を達成するため
に、請求項1に係る太陽電池素子では、半導体基板の一
主面側と他の主面側に異なる導電領域を形成して、一主
面側に表面電極を形成するとともに、他の主面側に帯状
の出力取出部とこの出力取出部が形成された領域以外の
略全面に形成された集電部とで構成されるガラスフリッ
トを含有する裏面電極を設けた太陽電池素子において、
前記集電部を前記出力取出部の周縁部に重なるように設
けるとともに、この出力取出部の重なり部分におけるガ
ラスフリット含有量をこの出力取出部のそれ以外の領域
のガラスフリット含有量よりも少なくした。In order to achieve the above object, in a solar cell element according to claim 1, different conductive regions are formed on one main surface side and another main surface side of a semiconductor substrate, A glass frit having a surface electrode formed on the main surface side and a band-shaped output extraction portion on the other main surface side and a current collection portion formed on substantially the entire surface other than the area where the output extraction portion is formed. In a solar cell element provided with a back electrode containing
The current collecting portion was provided so as to overlap the peripheral portion of the output extraction portion, and the glass frit content in the overlapping portion of the output extraction portion was made smaller than the glass frit content in the other area of the output extraction portion. .
【0009】上記太陽電池素子では、前記出力取出部が
銀を主成分とし、かつ前記集電部がアルミニウムを主成
分とすることが望ましい。In the above solar cell element, it is desirable that the output extracting portion contains silver as a main component and the current collecting portion contains aluminum as a main component.
【0010】また、請求項3に係る太陽電池素子の形成
方法では、半導体基板の一主面側と他の主面側に異なる
導電領域を形成して、一主面側に表面電極を形成すると
ともに、他の主面側に帯状の出力取出部とこの出力取出
部が形成された領域以外の略全面に形成された集電部と
で構成されるガラスフリットを含有する裏面電極を形成
する太陽電池素子の形成方法において、前記集電部を前
記出力取出部の周縁部に重なるように設けるとともに、
この出力取出部の重なり部分を実質的にガラスフリット
を含有しない銀ペーストを用いて形成するとともに、こ
の出力取出部のそれ以外の領域をガラスフリットを含有
する銀ペーストを用いて形成することを特徴とする。In the method of forming a solar cell element according to a third aspect, different conductive regions are formed on one main surface side and another main surface side of the semiconductor substrate, and a surface electrode is formed on the one main surface side. At the same time, the sun forming the back electrode containing the glass frit composed of the strip-shaped output extraction portion on the other main surface side and the current collection portion formed on substantially the entire surface other than the area where the output extraction portion is formed In the method of forming a battery element, the current collecting portion is provided so as to overlap the peripheral portion of the output extraction portion,
The overlapping portion of the output extraction portion is formed by using a silver paste containing substantially no glass frit, and the other region of the output extraction portion is formed by using a silver paste containing a glass frit. And
【0011】[0011]
【発明の実施の形態】以下、本発明の実施形態を詳細に
説明する。本発明の太陽電池素子も基本構造は図4に示
す従来の太陽電池素子の構造と同じである。すなわち、
一導電型例えばP型の半導体基板1の表面近傍全面に一
定の深さまで逆導電型例えばN型不純物を拡散させて逆
導電型例えばN型を呈する拡散層2を形成するととも
に、この拡散層2の表面に反射防止膜3を形成したもの
である。また、表面側には表面電極4が形成され、裏面
側には出力取出部5と集電部6から成る裏面電極5、6
が形成されている。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below. The basic structure of the solar cell element of the present invention is the same as the structure of the conventional solar cell element shown in FIG. That is,
A diffusion layer 2 of the opposite conductivity type, for example N type, is formed by diffusing an impurity of the opposite conductivity type, for example N type, to a certain depth all over the surface of the semiconductor substrate 1 of one conductivity type, for example P type, and the diffusion layer 2 is formed. The antireflection film 3 is formed on the surface of the. Further, the front surface electrode 4 is formed on the front surface side, and the rear surface electrodes 5, 6 including the output extracting portion 5 and the current collecting portion 6 are formed on the rear surface side.
Are formed.
【0012】半導体基板1は単結晶もしくは多結晶のシ
リコン基板などで構成される。この半導体基板1はp
型、n型いずれでもよい。単結晶シリコンの場合は引き
上げ法などで形成され、多結晶シリコンの場合は鋳造法
などで形成される。多結晶シリコンは、大量生産が可能
で製造コスト面で単結晶シリコンよりもきわめて有利で
ある。引き上げ法や鋳造法で形成されたシリコンブロッ
クを10cm×10cmもしくは15cm×15cm程
度の大きさに切断してインゴットとし、300μm程度
の厚みにスライスして半導体基板1とする。The semiconductor substrate 1 is composed of a monocrystalline or polycrystalline silicon substrate or the like. This semiconductor substrate 1 is p
Type or n-type may be used. In the case of single crystal silicon, it is formed by a pulling method, and in the case of polycrystalline silicon, it is formed by a casting method. Polycrystalline silicon can be mass-produced and is extremely advantageous over single crystal silicon in terms of manufacturing cost. A silicon block formed by a pulling method or a casting method is cut into a size of about 10 cm × 10 cm or 15 cm × 15 cm to form an ingot, and the semiconductor block 1 is sliced to a thickness of about 300 μm.
【0013】半導体基板1の表面側には、逆導電型半導
体不純物が拡散された拡散層2が形成されている。この
逆導電型半導体不純物が拡散された拡散層2は、半導体
基板1内に半導体接合部を形成するために設けるもので
あり、例えばn型の不純物を拡散させる場合、POCl
3を用いた気相拡散法、P2O5を用いた塗布拡散法、お
よびP+イオンを電界で基板1に直接導入するイオン打
ち込み法などで形成される。この逆導電型半導体不純物
を含有する拡散層2は0.3〜0.5μm程度の深さに
形成される。A diffusion layer 2 in which semiconductor impurities of opposite conductivity type are diffused is formed on the surface side of the semiconductor substrate 1. The diffusion layer 2 in which the semiconductor impurities of the opposite conductivity type are diffused is provided to form a semiconductor junction in the semiconductor substrate 1. For example, when diffusing n-type impurities, POCl
It is formed by a vapor phase diffusion method using 3 , a coating diffusion method using P 2 O 5 , and an ion implantation method in which P + ions are directly introduced into the substrate 1 by an electric field. The diffusion layer 2 containing the opposite conductivity type semiconductor impurities is formed to a depth of about 0.3 to 0.5 μm.
【0014】また、半導体基板1の表面側には、反射防
止膜3が形成されている。この反射防止膜3は、半導体
基板1の表面で光が反射するのを防止して、半導体基板
1内に光を有効に取り込むために設ける。この反射防止
膜3は半導体基板1との屈折率差等を考慮して屈折率が
2程度の材料で構成され、厚み500〜2000Å程度
の窒化シリコン膜や酸化シリコン(SiO2)膜などで
構成される。An antireflection film 3 is formed on the surface side of the semiconductor substrate 1. The antireflection film 3 is provided to prevent light from being reflected on the surface of the semiconductor substrate 1 and to effectively take in the light into the semiconductor substrate 1. The antireflection film 3 is made of a material having a refractive index of about 2 in consideration of a difference in refractive index with the semiconductor substrate 1, and is made of a silicon nitride film or a silicon oxide (SiO 2 ) film having a thickness of about 500 to 2000Å. To be done.
【0015】半導体基板1の裏面側には、一導電型半導
体不純物が高濃度に拡散されたBSF層(不図示)を形
成することが望ましい。この一導電型半導体不純物が高
濃度に拡散されたBSF層は、半導体基板1の裏面近く
でキャリアの再結合による効率の低下を防ぐために、半
導体基板1の裏面側に内部電界を形成するものである。On the back surface side of the semiconductor substrate 1, it is desirable to form a BSF layer (not shown) in which one conductivity type semiconductor impurity is diffused at a high concentration. The BSF layer in which the one-conductivity-type semiconductor impurity is diffused at a high concentration forms an internal electric field on the back surface side of the semiconductor substrate 1 in order to prevent a decrease in efficiency due to recombination of carriers near the back surface of the semiconductor substrate 1. is there.
【0016】つまり、半導体基板1の裏面近くで発生し
たキャリアがこの電界で加速される結果、電力が有効に
取り出されることとなり、特に長波長の光感度が増大す
ると共に、高温における太陽電池特性の低下を軽減でき
る。このように一導電型半導体不純物が高濃度に拡散さ
れたBSF層が形成された半導体基板1の裏面側のシー
ト抵抗は15Ω/□程度になる。That is, the carriers generated near the back surface of the semiconductor substrate 1 are accelerated by this electric field, and as a result, electric power is effectively taken out, the photosensitivity particularly at long wavelength is increased, and the solar cell characteristics at high temperature are improved. The decrease can be reduced. As described above, the sheet resistance on the back surface side of the semiconductor substrate 1 on which the BSF layer in which the one-conductivity-type semiconductor impurity is diffused at a high concentration is formed is about 15 Ω / □.
【0017】半導体基板1の表面側および裏面側には、
表面電極4および裏面電極5、6が形成されている。こ
の表面電極4および裏面電極5、6は主にAg紛、バイ
ンダー、ガラスフリットなどからなるAgペーストをス
クリーン印刷して焼成し、その上にはんだ層を形成す
る。表面電極4は、例えば幅200μm程度に、またピ
ッチ3mm程度に形成される多数のフィンガー電極(不
図示)と、この多数のフィンガー電極を相互に接続する
2本のバスバー電極で構成される。この表面電極4は厚
み10〜30μm程度に形成される。On the front surface side and the back surface side of the semiconductor substrate 1,
The front surface electrode 4 and the back surface electrodes 5 and 6 are formed. The front surface electrode 4 and the back surface electrodes 5 and 6 are formed by screen-printing an Ag paste mainly composed of Ag powder, a binder, a glass frit, etc. and firing it to form a solder layer thereon. The surface electrode 4 is composed of, for example, a large number of finger electrodes (not shown) formed with a width of about 200 μm and a pitch of about 3 mm, and two bus bar electrodes that connect the large number of finger electrodes to each other. The surface electrode 4 is formed to have a thickness of about 10 to 30 μm.
【0018】裏面電極は、例えば半導体基板1の略全長
にわたって例えば幅10mm程度に形成された帯状の出
力取出部5とこの出力取出部5以外の略全面にわたって
形成された集電部6とで構成される。この出力取出部5
は焼成後の厚みで10μm程度、集電部6は焼成後の厚
みで50μm程度に形成される。The back surface electrode is composed of, for example, a strip-shaped output extracting portion 5 formed to have a width of, for example, about 10 mm over substantially the entire length of the semiconductor substrate 1, and a current collecting portion 6 formed over substantially the entire surface other than the output extracting portion 5. To be done. This output extraction unit 5
Is about 10 μm in thickness after firing, and the current collector 6 is formed in about 50 μm in thickness after firing.
【0019】本発明の太陽電池素子では、図1よび図2
に示すように、帯状の出力取出部5とこの出力取出部5
が形成された領域以外の略全面に形成された集電部6と
から成る裏面電極5、6を、この集電部6が出力取出部
5の周縁部に重なるように設けている。In the solar cell element of the present invention, as shown in FIGS.
As shown in FIG. 5, the strip-shaped output extracting unit 5 and the output extracting unit 5
The back surface electrodes 5 and 6 each including a current collecting portion 6 formed on substantially the entire surface other than the region where the current collecting portion is formed are provided so that the current collecting portion 6 overlaps the peripheral portion of the output extracting portion 5.
【0020】この出力取出部5と集電部6との重なり部
分においては、重なり部分における出力取出部5aのガ
ラスフリット含有量をこの出力取出部5のそれ以外の領
域5bのガラスフリット含有量よりも少なくする。例え
ば集電部6と出力取出部5の重なり部分以外の領域5b
には1重量%以下でガラスフリットを含有する銀ペース
トを塗布し、集電部6と出力取出部5と重なり部分5a
にはフリットレスの銀ペーストを塗布する。しかし、焼
成することによって拡散が生じるため、完成品ではこの
領域5aにも若干ガラスフリットを含有することになる
が、他の領域5bよりも多くはならない。したがって、
集電部6と出力取出部5の重なり部分5aはそれ以外の
領域5bよりもガラスフリットの含有量が少なくなる。In the overlapping portion of the output extracting portion 5 and the current collecting portion 6, the glass frit content of the output extracting portion 5a at the overlapping portion is calculated from the glass frit content of the other area 5b of the output extracting portion 5a. Also reduce. For example, a region 5b other than the overlapping portion of the current collector 6 and the output take-out unit 5
Is coated with a silver paste containing 1% by weight or less of glass frit, and the current collecting portion 6 and the output extracting portion 5 overlap with each other 5a.
Is coated with fritless silver paste. However, since firing causes diffusion, the finished product will also contain some glass frit in this region 5a, but not in a greater amount than in other regions 5b. Therefore,
The overlapping portion 5a between the current collecting portion 6 and the output extracting portion 5 has a smaller glass frit content than the other area 5b.
【0021】このように構成すると、焼成によって形成
される合金層7と半導体基板1の界面の接着力が低下し
て一部が剥離するため、半導体基板1に発生する応力集
中が軽減され、裏面電極5、6の重なり部分を起点とす
る半導体基板1の割れの発生率を低下させることができ
る。また、出力取出部5と集電部6が重なる部分以外の
出力取出部5bはガラスフリットを多く含有しているた
め、出力取出部5bと半導体基板1の間に十分な接着強
度があり、出力取出部5の剥離を防止できる。With this structure, the adhesive force at the interface between the alloy layer 7 formed by firing and the semiconductor substrate 1 is reduced and a part is peeled off, so that the stress concentration generated in the semiconductor substrate 1 is reduced and the back surface is reduced. It is possible to reduce the occurrence rate of cracks in the semiconductor substrate 1 starting from the overlapping portion of the electrodes 5 and 6. Further, since the output take-out portion 5b other than the portion where the output take-out portion 5 and the current collecting portion 6 overlap contains a large amount of glass frit, there is sufficient adhesive strength between the output take-out portion 5b and the semiconductor substrate 1, It is possible to prevent the take-out portion 5 from peeling off.
【0022】また、出力取出部5にはんだ塗れ性のよい
銀を用いることで配線材のはんだ付けを容易にすると共
に、集電部6にアルミニウムを用いることで、焼成時に
半導体裏面にP+層を形成してキャリア再結合を防ぎ、
セル特性を向上させることができる。Further, by using silver having good solderability for the output extraction portion 5 to facilitate the soldering of the wiring material, and by using aluminum for the current collecting portion 6, the P + layer on the back surface of the semiconductor during firing. To prevent carrier recombination,
The cell characteristics can be improved.
【0023】次に、本発明に係る太陽電池素子の形成方
法を説明する。まず、図3(a)のように一導電型例え
ばP型半導体基板を準備する。そして、図3(b)に示
すように半導体基板1を逆導電型例えばN型不純物雰囲
気中で熱処理などして、半導体基板1の表面近傍全面に
一定の深さまでN型不純物を拡散させてN型を呈する拡
散層2を形成する。次に、図3(c)に示すように、半
導体基板1の表面にプラズマCVD法などで反射防止膜
3を形成する。Next, a method of forming the solar cell element according to the present invention will be described. First, as shown in FIG. 3A, one conductivity type, for example, a P-type semiconductor substrate is prepared. Then, as shown in FIG. 3B, the semiconductor substrate 1 is heat-treated in an atmosphere of an opposite conductivity type, for example, an N-type impurity, to diffuse the N-type impurities to a certain depth all over the surface near the surface of the semiconductor substrate 1 to form an N-type impurity. A diffusion layer 2 having a mold is formed. Next, as shown in FIG. 3C, the antireflection film 3 is formed on the surface of the semiconductor substrate 1 by a plasma CVD method or the like.
【0024】次に、拡散層2を分離した後、表面電極4
を印刷して乾燥させる。その後に、図1(a)に示した
パターンのようにガラスフリットを含む銀ペースト(5
b)を印刷して乾燥して、さらにその周囲にガラスフリ
ットを実質的に含まない銀ペースト(5a)を印刷して
乾燥させる。その後、ガラスフリットを実質的に含まな
い銀ペースト(5a)の一部と重なるようにアルミニウ
ムペースト(6)をスクリーン印刷して焼成することに
より図3(d)に示すような太陽電池素子を得ることが
できる。なお、ガラスフリットを含む銀ペースト(5
b)とガラスフリットを含まない銀ペースト(5a)の
プリント順は逆でもよい。焼成によって銀電極5のガラ
スフリットを含まない部分5aに、アルミニウムペース
ト(6)や銀電極5をガラスフリットを含む部分(5
b)からガラスフリットが若干拡散されるが、元々ガラ
スフリットを含んでいた部分に比べるとその量は少なく
なる。Next, after separating the diffusion layer 2, the surface electrode 4 is formed.
Print and dry. After that, as shown in FIG. 1A, a silver paste containing glass frit (5
b) is printed and dried, and then a silver paste (5a) substantially free of glass frit is printed and dried around it. Thereafter, an aluminum paste (6) is screen-printed and baked so as to overlap with a part of the silver paste (5a) which does not substantially contain the glass frit, and a solar cell element as shown in FIG. 3 (d) is obtained. be able to. The silver paste containing glass frit (5
The print order of b) and the silver paste (5a) containing no glass frit may be reversed. The portion (5a) not containing the glass frit of the silver electrode 5 due to the firing, the portion (5) containing the glass paste with the aluminum paste (6) or the silver electrode 5
Although the glass frit is slightly diffused from b), the amount thereof is smaller than that in the portion that originally contained the glass frit.
【0025】その後、半導体基板1をベルト炉等の焼成
炉において焼成することによって、表面電極4および裏
面電極5、6が同時に形成される。このとき、アルミニ
ウムから成る集電部6からアルミニウムが銀から成る出
力取出部5に拡散してAg/Al合金層7が形成され
る。Ag/Al合金層7はガラスフリット含有量が比較
的少ない部分5aに形成されるため、Ag/Al合金層
7と半導体基板1の接着強度は弱く、これら界面に働く
応力は比較的小さくなる。その後、各電極4、5、6が
形成された半導体基板1をはんだ槽に浸漬して表面電極
4と裏面電極の出力取出部5にはんだコーティング層
(不図示)を形成する。Thereafter, the semiconductor substrate 1 is fired in a firing furnace such as a belt furnace to simultaneously form the front surface electrodes 4 and the back surface electrodes 5 and 6. At this time, aluminum diffuses from the current collector 6 made of aluminum to the output take-out portion 5 made of silver to form the Ag / Al alloy layer 7. Since the Ag / Al alloy layer 7 is formed in the portion 5a having a relatively small glass frit content, the adhesive strength between the Ag / Al alloy layer 7 and the semiconductor substrate 1 is weak and the stress acting on the interface between them is relatively small. Then, the semiconductor substrate 1 on which the electrodes 4, 5 and 6 are formed is dipped in a solder bath to form a solder coating layer (not shown) on the front electrode 4 and the output extraction portion 5 of the back electrode.
【0026】本発明は上記実施形態に限定されるもので
はなく本発明の範囲内で上記実施形態に多くの修正およ
び変更を加えうることはもちろんである。例えばアルミ
ニウムペーストに代わる金属ペーストとして、ガリウ
ム、インジウムをベースとした金属ペーストを使用する
ことも可能である。また銀ペーストに代わる金属ペース
トとして銅、金、白金をベースとした金属ペーストを使
用することも可能である。また、図1の裏面電極パター
ンは例であって、この形状に制限されるものではない。The present invention is not limited to the above embodiment, and it is needless to say that many modifications and changes can be made to the above embodiment within the scope of the present invention. For example, a metal paste based on gallium or indium can be used as the metal paste instead of the aluminum paste. It is also possible to use a metal paste based on copper, gold or platinum as a metal paste instead of the silver paste. Further, the back surface electrode pattern of FIG. 1 is an example, and the shape is not limited to this shape.
【0027】[0027]
【実施例】次に、本発明の実施例を示す。図3(a)に
示すように半導体基板1として15cm角で厚さ0.3
mm、比抵抗1.5Ω・cmのP型シリコン基板を準備
した。そして、図3(b)に示すように、熱拡散法でオ
キシ塩化リン(POCl3)を拡散源として深さ0.5
μmのN型拡散層2を形成した。EXAMPLES Next, examples of the present invention will be shown. As shown in FIG. 3A, the semiconductor substrate 1 is 15 cm square and has a thickness of 0.3.
A P-type silicon substrate having a mm resistance and a specific resistance of 1.5 Ω · cm was prepared. Then, as shown in FIG. 3B, a depth of 0.5 is obtained by using phosphorus oxychloride (POCl 3 ) as a diffusion source by a thermal diffusion method.
An N-type diffusion layer 2 having a thickness of μm was formed.
【0028】次に、表面にプラズマCVD法で窒化シリ
コンから成る反射防止膜3を800Åの厚さで形成した
後、拡散層2を分離した。Next, an antireflection film 3 made of silicon nitride having a thickness of 800 Å was formed on the surface by plasma CVD, and then the diffusion layer 2 was separated.
【0029】次に、一部のセルに、図3(d)に示す構
造で裏面にガラスフリットを含まない銀ペースト(5
a、5b)を印刷・焼成した。また、残りのセルに、図
1(e)に示す構造で裏面にガラスフリットを含まない
銀ペースト(5a)、ガラスフリットを含む銀ペースト
(5b)、アルミニウムペースト(6)をスクリーン印
刷した。また、表面にも銀ペースト(4)をスクリーン
印刷して焼成することで電極4、5、6を形成した。こ
のとき、図1(b)に示すように、銀から成る出力取出
用部5(5a、5b)とアルミニウムから成る集電部6
との重なり部とその周辺の約0.5mmの領域に合金層
7が形成された。Next, in some of the cells, a silver paste (5) having a structure shown in FIG.
a, 5b) were printed and fired. Further, in the remaining cells, a silver paste (5a) containing no glass frit, a silver paste containing glass frit (5b), and an aluminum paste (6) having the structure shown in FIG. Further, electrodes 4, 5, 6 were formed by screen-printing silver paste (4) on the surface and baking it. At this time, as shown in FIG. 1B, the output extracting portion 5 (5a, 5b) made of silver and the current collecting portion 6 made of aluminum.
The alloy layer 7 was formed in a region of about 0.5 mm around the overlapping portion with and.
【0030】その後、200℃のはんだ浴槽に上記基板
1を浸漬して引き上げることで、表面電極4と裏面電極
の出力取出部5にはんだ被覆して太陽電池素子を作成し
た。また、その太陽電池素子を用いて太陽電池モジュー
ルを作成した。この太陽電池素子の焼成後工程における
出力取出部5と集電部6との重なり部を起点とする割れ
と剥離の発生率および光電変換効率を従来の方法と比較
して表1に示した。Thereafter, the substrate 1 was dipped in a solder bath at 200 ° C. and pulled up to cover the output extraction portions 5 of the front surface electrode 4 and the rear surface electrode with a solder to prepare a solar cell element. Moreover, the solar cell module was created using the solar cell element. Table 1 shows the rates of occurrence of cracking and peeling starting from the overlapping portion of the output extracting portion 5 and the current collecting portion 6 and the photoelectric conversion efficiency in the post-firing process of this solar cell element, as compared with the conventional method.
【0031】[0031]
【表1】 [Table 1]
【0032】表1に示す通り、本発明の方法を用いた場
合は、従来に比べて焼成後に発生する出力取出部5と集
電部6との重なり部を起点とする割れを軽減することが
できた。また、出力取出部5と集電部6との重なり部の
みガラスフリットを含まないペーストを用いた場合は、
割れが低減すると共に、出力取出部5の剥離もなかっ
た。また、これらの太陽電池素子の光電変換効率は従来
の方法を用いた場合とほぼ同等であった。As shown in Table 1, when the method of the present invention is used, cracks originating from the overlapping portion of the output extracting portion 5 and the current collecting portion 6 occurring after firing can be reduced as compared with the conventional method. did it. When a paste containing no glass frit is used only in the overlapping portion between the output extracting portion 5 and the current collecting portion 6,
The cracks were reduced and the output take-out portion 5 was not peeled off. In addition, the photoelectric conversion efficiency of these solar cell elements was almost the same as when the conventional method was used.
【0033】[0033]
【発明の効果】以上のように、本発明に係る太陽電池素
子によれば、裏面電極の集電部を出力取出部の周縁部に
重なるように設けるとともに、出力取出部の重なり部分
におけるガラスフリット含有量をこの出力取出部のそれ
以外の領域のガラスフリット含有量よりも少なくしたこ
とから、この重なり部分を起点とする太陽電池素子の割
れを防止できるとともに、裏面電極と半導体基板との間
に十分な接着強度が強固となって裏面電極の剥離を防止
することもできる。また、太陽電池素子の光電変換効率
を損なうこともない。As described above, according to the solar cell element of the present invention, the current collecting portion of the back electrode is provided so as to overlap the peripheral portion of the output extracting portion, and the glass frit in the overlapping portion of the output extracting portion is provided. Since the content was made smaller than the content of the glass frit in the region other than that of the output extraction part, it is possible to prevent cracking of the solar cell element starting from this overlapping part, and between the back electrode and the semiconductor substrate. Sufficient adhesive strength can be strengthened to prevent peeling of the back electrode. Further, the photoelectric conversion efficiency of the solar cell element is not impaired.
【図1】本発明に係る太陽電池素子の焼成前後の裏面電
極構造を説明するための図である。FIG. 1 is a diagram for explaining a back electrode structure before and after firing of a solar cell element according to the present invention.
【図2】本発明に係る太陽電池素子の裏面電極パターン
を説明するための図である。FIG. 2 is a diagram for explaining a back electrode pattern of the solar cell element according to the present invention.
【図3】本発明に係る太陽電池素子の形成方法の工程を
説明するための図である。FIG. 3 is a diagram for explaining the steps of the method for forming a solar cell element according to the present invention.
【図4】従来の太陽電池素子を示す図である。FIG. 4 is a diagram showing a conventional solar cell element.
【図5】従来の太陽電池素子の裏面電極部分を拡大して
示す図である。FIG. 5 is an enlarged view showing a back electrode portion of a conventional solar cell element.
1・・・半導体基板、2・・・n型拡散層、2a・・・
接合分離部、3・・・反射防止膜、4・・・表面電極、
5・・・出力取出部、6・・・集電部、5a・・・出力
取出部の集電部との重なり部1 ... Semiconductor substrate, 2 ... N-type diffusion layer, 2a ...
Junction separating part, 3 ... Antireflection film, 4 ... Surface electrode,
5 ... Output extraction part, 6 ... Current collection part, 5a ... Overlap part of output extraction part with current collection part
Claims (3)
なる導電領域を形成して、一主面側に表面電極を形成す
るとともに、他の主面側に帯状の出力取出部とこの出力
取出部が形成された領域以外の略全面に形成された集電
部とで構成されるガラスフリットを含有する裏面電極を
設けた太陽電池素子において、前記集電部を前記出力取
出部の周縁部に重なるように設けるとともに、この出力
取出部の重なり部分におけるガラスフリット含有量をこ
の出力取出部のそれ以外の領域のガラスフリット含有量
よりも少なくしたことを特徴とする太陽電池素子。1. A semiconductor substrate having one main surface side and another main surface side having different conductive regions to form surface electrodes on the one main surface side, and a strip-shaped output extraction portion on the other main surface side. In a solar cell element provided with a back electrode containing a glass frit, which is composed of a current collecting portion formed on substantially the entire surface other than the region where the output extracting portion is formed, the current collecting portion is the output extracting portion. And a glass frit content in the overlapping portion of the output extraction portion is set to be smaller than the glass frit content in other areas of the output extraction portion.
前記集電部がアルミニウムを主成分とすることを特徴と
する請求項1に記載の太陽電池素子。2. The solar cell element according to claim 1, wherein the output extraction part contains silver as a main component, and the current collection part contains aluminum as a main component.
なる導電領域を形成して、一主面側に表面電極を形成す
るとともに、他の主面側に帯状の出力取出部とこの出力
取出部が形成された領域以外の略全面に形成された集電
部とで構成されるガラスフリットを含有する裏面電極を
形成する太陽電池素子の形成方法において、前記集電部
を前記出力取出部の周縁部に重なるように設けるととも
に、この出力取出部の重なり部分を実質的にガラスフリ
ットを含有しない銀ペーストを用いて形成するととも
に、この出力取出部のそれ以外の領域をガラスフリット
を含有する銀ペーストを用いて形成することを特徴とす
る太陽電池素子の形成方法。3. A semiconductor substrate having one main surface side and another main surface side having different conductive regions to form surface electrodes on the one main surface side, and a strip-shaped output extracting portion on the other main surface side. In the method of forming a solar cell element for forming a back electrode containing a glass frit, which comprises a current collector formed on substantially the entire surface other than the region where the output extraction portion is formed, the current collector is It is provided so as to overlap the peripheral portion of the output take-out portion, and the overlapping portion of the output take-out portion is formed by using a silver paste containing substantially no glass frit, and the other area of the output take-out portion is made into a glass frit. A method for forming a solar cell element, which is characterized by forming using a silver paste containing.
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|---|---|---|---|
| JP2002078194A JP4203247B2 (en) | 2002-03-20 | 2002-03-20 | Method for forming solar cell element |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002078194A JP4203247B2 (en) | 2002-03-20 | 2002-03-20 | Method for forming solar cell element |
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| JP4203247B2 JP4203247B2 (en) | 2008-12-24 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007059503A (en) * | 2005-08-23 | 2007-03-08 | Shin Etsu Handotai Co Ltd | Solar cell |
| JP2008091620A (en) * | 2006-10-02 | 2008-04-17 | Mitsubishi Heavy Ind Ltd | Solar cell module, solar cell panel, and its manufacturing method |
| JP2012514865A (en) * | 2009-06-04 | 2012-06-28 | エルジー エレクトロニクス インコーポレイティド | Solar cell and manufacturing method thereof |
| JP2015159276A (en) * | 2014-01-24 | 2015-09-03 | 京セラ株式会社 | Solar battery element, and solar battery module |
-
2002
- 2002-03-20 JP JP2002078194A patent/JP4203247B2/en not_active Expired - Fee Related
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007059503A (en) * | 2005-08-23 | 2007-03-08 | Shin Etsu Handotai Co Ltd | Solar cell |
| JP2008091620A (en) * | 2006-10-02 | 2008-04-17 | Mitsubishi Heavy Ind Ltd | Solar cell module, solar cell panel, and its manufacturing method |
| JP2012514865A (en) * | 2009-06-04 | 2012-06-28 | エルジー エレクトロニクス インコーポレイティド | Solar cell and manufacturing method thereof |
| US8680392B2 (en) | 2009-06-04 | 2014-03-25 | Lg Electronics Inc. | Solar cell and method of manufacturing the same |
| JP2015159276A (en) * | 2014-01-24 | 2015-09-03 | 京セラ株式会社 | Solar battery element, and solar battery module |
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| Publication number | Publication date |
|---|---|
| JP4203247B2 (en) | 2008-12-24 |
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