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JP2003280590A - Organic el display device - Google Patents

Organic el display device

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Publication number
JP2003280590A
JP2003280590A JP2002081635A JP2002081635A JP2003280590A JP 2003280590 A JP2003280590 A JP 2003280590A JP 2002081635 A JP2002081635 A JP 2002081635A JP 2002081635 A JP2002081635 A JP 2002081635A JP 2003280590 A JP2003280590 A JP 2003280590A
Authority
JP
Japan
Prior art keywords
voltage drop
power supply
organic
display
pixel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002081635A
Other languages
Japanese (ja)
Other versions
JP3995504B2 (en
Inventor
Toru Sasaki
徹 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP2002081635A priority Critical patent/JP3995504B2/en
Publication of JP2003280590A publication Critical patent/JP2003280590A/en
Application granted granted Critical
Publication of JP3995504B2 publication Critical patent/JP3995504B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Control Of El Displays (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an organic EL (electroluminescence) display device capable of preventing degradation of brightness or unevenness of luminance from being caused by a voltage drop in a power supply line. <P>SOLUTION: The organic EL display device provided with a color organic EL display comprises a mean brightness calculation means for calculating mean brightness of an input video signal for each vertical period, a voltage drop calculation means for calculating a power source voltage drop in a power supply line at each pixel position in the color organic EL display based on the mean brightness calculated by the mean brightness calculation means, and a correction means for correcting the input video signal so as to supplement the degradation of brightness due to the power supply voltage drop based on the power supply voltage drop at each pixel calculated by the voltage drop calculation means. <P>COPYRIGHT: (C)2004,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、有機エレクトロルミ
ネッセンス(EL)ディスプレイを備えた有機ELディ
スプレイ装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic EL display device having an organic electroluminescence (EL) display.

【0002】[0002]

【従来の技術】現在、フラットパネルディスプレイの主
流である液晶ディスプレイ(LCD)に比べて様々な優
位性を持ち、次世代フラットパネルディスプレイとして
期待されているものに有機エレクトロルミネッセンス
(EL)素子を用いた有機ELパネルがある。
2. Description of the Related Art Organic electroluminescence (EL) devices are used in what are expected as next-generation flat panel displays because they have various advantages over liquid crystal displays (LCD) which are the mainstream of flat panel displays at present. There is an organic EL panel.

【0003】有機EL素子の構造は、良く知られている
ように、ガラス基板上に陽極(ITO)上に、ホール輸
送層、発光層、電子輸送層および陰極が順次積層された
構造である。また、有機ELディスプレイは、LCDと
同様に、駆動方法によって、パッシブマトリックス型と
アクティブマトリックス型とに大別できる。
As is well known, the structure of an organic EL element is a structure in which a hole transport layer, a light emitting layer, an electron transport layer and a cathode are sequentially laminated on a glass substrate on an anode (ITO). Further, the organic EL display can be roughly classified into a passive matrix type and an active matrix type, depending on the driving method, like the LCD.

【0004】パッシブマトリックス型は、陽極と陰極と
が交差した部分が発光可能となる単純マトリクスで構成
されている。これに対して、アクティブマトリックス型
は、各画素にスイッチング用TFTを配置したものであ
る。
The passive matrix type is composed of a simple matrix in which the portion where the anode and the cathode intersect can emit light. On the other hand, the active matrix type has a switching TFT arranged in each pixel.

【0005】有機ELディスプレイは、自己発光型であ
るので、バックライトを必要とせず、LCDに比べてデ
ィスプレイ全体では低消費電力化が実現できるという優
位性を持っている。しかしながら、パッシブマトリック
ス型であるかアクティブマトリックス型であるかにかか
わらず、有機EL素子そのものは電流駆動であるため、
駆動時において液晶素子に比べて比較的大きな電流量を
必要とする。このため、電源供給線による電圧降下によ
って、電流(電圧)供給源より遠くに位置する画素ほど
輝度が低下するという問題がある。
Since the organic EL display is a self-luminous type, it does not require a backlight and has an advantage that it can realize lower power consumption than the LCD as a whole. However, regardless of whether it is a passive matrix type or an active matrix type, the organic EL element itself is current driven,
A relatively large amount of current is required during driving as compared with a liquid crystal element. Therefore, there is a problem that a pixel located farther from the current (voltage) supply source has lower brightness due to a voltage drop due to the power supply line.

【0006】今、水平方向画素数が320で、垂直方向
画素数が240の有機ELデイスプレイの電源供給線が
図1に示すように配線されているものとする。
It is assumed that the organic EL display power supply line having 320 horizontal pixels and 240 vertical pixels is wired as shown in FIG.

【0007】図1において、W1は有機ELディスプレ
イの左端から水平方向200画素の範囲を、W3は有機
ELディスプレイの右端から水平方向100画素の範囲
を、それぞれ示している。W1の範囲とW3の範囲の間
の水平方向20画素の範囲W2に対する電源供給線が電
源供給源100に直接接続されているものとする。
In FIG. 1, W1 indicates a range of 200 pixels in the horizontal direction from the left end of the organic EL display, and W3 indicates a range of 100 pixels in the horizontal direction from the right end of the organic EL display. It is assumed that the power supply line for the range W2 of 20 pixels in the horizontal direction between the range of W1 and the range of W3 is directly connected to the power supply source 100.

【0008】電源供給線の抵抗は均一であるとする。つ
まり、1画素距離間の配線の抵抗をrとする。また、各
有機EL素子(画素)で同じ電流量iが消費されている
とすると、範囲W1内における位置であって、有機EL
ディスプレイの左端から水平方向にn画素離れておりか
つ垂直方向に電源供給源100に最も近い位置E点での
電圧降下(水平方向の電圧降下)Vn1は、次式(1)
で表される。
It is assumed that the resistance of the power supply line is uniform. That is, the resistance of the wiring for one pixel distance is r. If the same amount of current i is consumed in each organic EL element (pixel), it is a position within the range W1 and
The voltage drop (horizontal voltage drop) Vn1 at the point E, which is n pixels in the horizontal direction from the left end of the display and is closest to the power supply source 100 in the vertical direction, is expressed by the following equation (1).
It is represented by.

【0009】 Vn1 ={240ri ・W1(W1-1)/2}−{240ri ・n(n-1)/2} …(1) [0009]   Vn1 = {240ri ・ W1 (W1-1) / 2}-{240ri ・ n (n-1) / 2} (1)

【0010】上記式(1)における{240ri ・W1(W1-1)
/2}は、範囲W1全体での電源供給線の配線による電圧
降下を示し、{240ri ・n(n-1)/2}は有機ELディスプ
レイの左端から水平方向にn画素までの範囲での電源供
給線の配線による電圧降下を示している。
{240ri · W1 (W1-1) in the above formula (1)
/ 2} indicates the voltage drop due to the wiring of the power supply line in the entire range W1, and {240ri · n (n-1) / 2} is the range from the left end of the organic EL display to n pixels in the horizontal direction. The voltage drop due to the wiring of the power supply line is shown.

【0011】範囲W3内における位置であって、有機E
Lディスプレイの右端から水平方向にn’画素離れてお
りかつ垂直方向に電源供給源100に最も近い位置での
電圧降下(水平方向の電圧降下)Vn3は、次式(2)
で表される。
The position within the range W3, which is the organic E
The voltage drop (horizontal voltage drop) Vn3 at a position horizontally n'pixels away from the right end of the L display and closest to the power supply source 100 in the vertical direction is expressed by the following equation (2).
It is represented by.

【0012】 Vn3 ={240ri ・W3(W3-1)/2}−{240ri ・n'(n'-1)/2} …(2) [0012]   Vn3 = {240ri ・ W3 (W3-1) / 2}-{240ri ・ n '(n'-1) / 2} (2)

【0013】上記式(2)における{240ri ・W3(W3-1)
/2}は、範囲W3全体での電源供給線の配線による電圧
降下を示し、{240ri ・n'(n'-1)/2}は有機ELディス
プレイの右端から水平方向にn’画素までの範囲での電
源供給線の配線による電圧降下を示している。
{240ri · W3 (W3-1) in the above equation (2)
/ 2} indicates the voltage drop due to the wiring of the power supply line in the entire range W3, and {240ri · n '(n'-1) / 2} is from the right end of the organic EL display to the n'pixel in the horizontal direction. It shows the voltage drop due to the wiring of the power supply line in the range.

【0014】また、W1とW3との間の範囲W2では、
水平方向の電圧降下Vn2は0となる。したがって、各
水平方向位置であって垂直方向に電源供給源100に最
も近い位置での電圧降下は、図2に示すようになる。
In the range W2 between W1 and W3,
The voltage drop Vn2 in the horizontal direction becomes zero. Therefore, the voltage drop at each horizontal position and the position closest to the power supply source 100 in the vertical direction is as shown in FIG.

【0015】水平方向が任意の位置でかつ有機ELディ
スプレイの上端から垂直方向にm画素離れたF点での電
圧降下(垂直方向の電圧降下)Vmは、次式(3)で表
される。
The voltage drop (vertical voltage drop) Vm at a point F at an arbitrary position in the horizontal direction and at a distance of m pixels in the vertical direction from the upper end of the organic EL display is expressed by the following equation (3).

【0016】 Vm={240(240-1)ri/2}−{m(m-1)ri/2} …(3)[0016] Vm = {240 (240-1) ri / 2}-{m (m-1) ri / 2} (3)

【0017】上記式(3)における{240(240-1)ri/2}
は、水平方向が任意の位置での垂直全体での電源供給線
の配線による電圧降下を示し、{m(m-1)ri/2}は有機E
Lディスプレイの上端から垂直方向にm画素までの範囲
での電源供給線の配線による電圧降下を示している。
{240 (240-1) ri / 2} in the above equation (3)
Indicates the voltage drop due to the wiring of the power supply line in the vertical direction at any position in the horizontal direction, and {m (m-1) ri / 2} is the organic E
It shows the voltage drop due to the wiring of the power supply line in the range from the upper end of the L display to m pixels in the vertical direction.

【0018】つまり、任意の水平位置における各垂直方
向位置における電源供給線による電圧降下は、図3に示
すようになる。
That is, the voltage drop due to the power supply line at each vertical position at any horizontal position is as shown in FIG.

【0019】したがって、範囲W1内において、画面左
上端から水平方向にn画素、垂直方向にm画素離れたG
点での電圧降下Vnm1は、次式(4)で表される。
Therefore, in the range W1, G which is n pixels in the horizontal direction and m pixels in the vertical direction is separated from the upper left corner of the screen.
The voltage drop Vnm1 at the point is expressed by the following equation (4).

【0020】 Vnm1 =Vn1+Vm={240ri ・W1(W1-1)/2}−{240ri ・n(n-1)/2} +{240(240-1)ri/2}−{m(m-1)ri/2} …(4) [0020]   Vnm1 = Vn1 + Vm = {240ri ・ W1 (W1-1) / 2}-{240ri ・ n (n-1) / 2}                 + {240 (240-1) ri / 2}-{m (m-1) ri / 2}… (4)

【0021】また、範囲W3内において、画面右上端か
ら水平方向にn’画素、垂直方向にm画素離れた点での
電圧降下Vnm3は、次式(5)で表される。
Further, within the range W3, the voltage drop Vnm3 at the point separated from the upper right end of the screen by n'pixels in the horizontal direction and m pixels in the vertical direction is expressed by the following equation (5).

【0022】 Vnm3=Vn3+Vm={240ri ・W3(W3-1)/2}−{240ri ・n'(n'-1)/2} +{240(240-1)ri/2}−{m(m-1)ri/2} …(5) [0022]   Vnm3 = Vn3 + Vm = {240ri ・ W3 (W3-1) / 2}-{240ri ・ n '(n'-1) / 2}                 + {240 (240-1) ri / 2}-{m (m-1) ri / 2}… (5)

【0023】また、W1とW3との間の範囲W2では、
画面上端から垂直方向にm画素離れた点での電圧降下V
nm2は、次式(6)で表される。
In the range W2 between W1 and W3,
Voltage drop V at the point m pixels vertically from the top of the screen
nm2 is represented by the following equation (6).

【0024】 Vnm2=Vn2+Vm={240(240-1)ri/2}−{m(m-1)ri/2} …(6) [0024]   Vnm2 = Vn2 + Vm = {240 (240-1) ri / 2}-{m (m-1) ri / 2} (6)

【0025】図2および図3に示したように、水平方向
の電圧降下の最大値は4.8×10 6 riであるのに対
し、垂直方向の電圧降下の最大値は2.8×104 ri
であるので、垂直方向位置による輝度ムラはさほど目立
たないが、水平方向位置による輝度ムラは明るい画面ほ
ど目立つという問題があった。
As shown in FIGS. 2 and 3, the horizontal direction
The maximum value of voltage drop is 4.8 × 10 6Even though it is ri
However, the maximum vertical voltage drop is 2.8 × 10Fourri
Therefore, the uneven brightness due to the vertical position is notable
However, the uneven brightness due to the horizontal position is
There was a problem of being conspicuous.

【0026】[0026]

【発明が解決しようとする課題】この発明は、電源供給
線による電圧降下によって、輝度低下および輝度ムラが
発生するのを防止することができる有機ELディスプレ
イ装置を提供することを目的とする。
SUMMARY OF THE INVENTION It is an object of the present invention to provide an organic EL display device capable of preventing a decrease in brightness and uneven brightness due to a voltage drop due to a power supply line.

【0027】[0027]

【課題を解決するための手段】請求項1に記載の発明
は、カラー有機ELディスプレイを備えた有機ELディ
スプレイ装置において、1垂直期間毎に入力映像信号の
平均輝度を算出する平均輝度算出手段、平均輝度算出手
段によって算出された平均輝度に基づいて、カラー有機
ELディスプレイ内の各画素位置ごとの電源供給線によ
る電源電圧降下を算出する電圧降下算出手段、および電
圧降下算出手段によって算出された各画素毎の電源電圧
降下に基づいて、電源電圧降下による輝度低下を補完す
るように入力映像信号を補正する補正手段を備えている
ことを特徴とする。
According to a first aspect of the present invention, in an organic EL display device having a color organic EL display, an average luminance calculating means for calculating an average luminance of an input video signal every vertical period, Based on the average brightness calculated by the average brightness calculation means, a voltage drop calculation means for calculating a power supply voltage drop due to a power supply line for each pixel position in the color organic EL display, and each calculated by the voltage drop calculation means It is characterized in that a correction means is provided for correcting the input video signal so as to complement the luminance decrease due to the power supply voltage drop based on the power supply voltage drop for each pixel.

【0028】請求項2に記載の発明は、請求項1に記載
のカラー有機ELディスプレイにおいて、補正手段は、
各画素に対する映像入力信号を、その画素に対して算出
された電源電圧降下が大きいほど、その画素の発光輝度
が高くなるように、入力映像信号を補正するものである
ことを特徴とする。
According to a second aspect of the invention, in the color organic EL display according to the first aspect, the correction means is
The video input signal for each pixel is characterized in that the input video signal is corrected such that the larger the power supply voltage drop calculated for that pixel, the higher the light emission luminance of that pixel.

【0029】[0029]

【発明の実施の形態】以下、この発明の実施の形態につ
いて説明する。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below.

【0030】図4は、有機ELディスプレイを備えた有
機ELディスプレイ装置に設けられた信号処理回路の構
成を示している。
FIG. 4 shows the configuration of a signal processing circuit provided in an organic EL display device having an organic EL display.

【0031】入力映像信号は、A/D変換器1によって
デジタル化された後、DSP2に入力される。DSP2
は、電源供給線による電圧降下によって輝度ムラが発生
するのを防止するために、輝度ムラ防止用の補正処理を
行う。DSP2によって補正された映像データはA/D
変換器3によってアナログ信号に変換された後、有機E
Lディスプレイ4に送られる。
The input video signal is digitized by the A / D converter 1 and then input to the DSP 2. DSP2
Performs a correction process for preventing uneven brightness in order to prevent uneven brightness from occurring due to a voltage drop due to the power supply line. Video data corrected by DSP2 is A / D
After being converted into an analog signal by the converter 3, the organic E
It is sent to the L display 4.

【0032】輝度ムラ防止用の補正処理について説明す
る。以下の説明では、白の階調が0であり、黒の階調が
255であるとする。
A correction process for preventing uneven brightness will be described. In the following description, it is assumed that the gradation of white is 0 and the gradation of black is 255.

【0033】有機ELディスプレイ4の電源供給線の配
線が図1に示すようなものであるとすると、A点での電
圧降下が最も大きくなり、A点で輝度低下が最も大きく
なる。電源供給源100の電圧V0からA点までの電圧
降下分VaをA点での映像信号成分Vsaから減じる
と、A点での電源電圧(V0−Va)と信号電圧(Va
s−Va)との差は、電圧降下が存在しない場合の電源
電圧と信号電圧との差(V0−Vsa)に等しくなる。
Assuming that the wiring of the power supply line of the organic EL display 4 is as shown in FIG. 1, the voltage drop at the point A is the largest and the luminance drop is the largest at the point A. When the voltage drop Va from the voltage V0 of the power supply source 100 to the point A is subtracted from the video signal component Vsa at the point A, the power supply voltage (V0-Va) at the point A and the signal voltage (Va).
s-Va) is equal to the difference (V0-Vsa) between the power supply voltage and the signal voltage when there is no voltage drop.

【0034】上記式(4)、(5)、(6)で求めたV
nm1,Vnm3,Vnm2は、各画素での消費電流が
同じであると仮定した場合の電圧降下であるので、ri
/2の代わりに平均輝度レベルkを用いることにする
と、上記式(4)、(5)、(6)は、それぞれ次式
(7)、(8)、(9)となる。
V obtained by the above equations (4), (5) and (6)
Since nm1, Vnm3, and Vnm2 are voltage drops when it is assumed that the current consumption in each pixel is the same, ri
If the average luminance level k is used instead of / 2, the above equations (4), (5), and (6) become the following equations (7), (8), and (9), respectively.

【0035】 Vnm1={240 W1(W1-1)−240 n(n-1)+240(240-1)−m(m-1)}k …(7) [0035]   Vnm1 = {240 W1 (W1-1) −240 n (n-1) +240 (240-1) −m (m-1)} k… (7)

【0036】 Vnm3={240 W3(W3-1)−240 n'(n'-1)+240(240-1)−m(m-1)}k …(8) [0036]   Vnm3 = {240 W3 (W3-1) -240 n '(n'-1) +240 (240-1) -m (m-1)} k (8)

【0037】Vnm2={240(240-1)−m(m-1)}k …(9)Vnm2 = {240 (240-1) -m (m-1)} k (9)

【0038】Vnm1、Vnm2およびVnm3を総称してVnmk
とすると、W1の範囲内の画素に対しては上記式(7)
のVnm1を、W3の範囲内の画素に対しては上記式
(8)のVnm3を、W1とW3との間の範囲W2内の
画素に対しては上記式(9)のVnm2を、各画素の映
像信号Vsから減じるといった補正を行うことにより、
各画素での実際の電源電圧(V0−電圧降下)と補正後
の信号電圧(Vs−Vnmk)との差は、電圧降下が存
在しない場合の電源電圧と信号電圧との差(V0−V
s)に近づく。
Vnm1, Vnm2 and Vnm3 are collectively referred to as Vnmk
Then, for the pixels within the range of W1, the above equation (7)
Of the above formula (8) for pixels within the range of W3, and Vnm2 of the above formula (9) for pixels within the range W2 between W1 and W3. By performing correction such as subtracting from the video signal Vs of
The difference between the actual power supply voltage (V0-voltage drop) and the corrected signal voltage (Vs-Vnmk) in each pixel is the difference (V0-V) between the power supply voltage and the signal voltage when there is no voltage drop.
s) is approached.

【0039】なお、平均輝度レベルkは、各画素の信号
成分を1垂直期間分加算し、その加算結果を全画素数で
除算することにより、求められる。
The average brightness level k is obtained by adding the signal components of each pixel for one vertical period and dividing the addition result by the total number of pixels.

【0040】入力映像信号に対して以上のような補正処
理を行うことにより、有機ELディスプレイ4内の各有
機EL素子には、電源電圧と信号電圧との差電圧に比例
した電流が流れる。各有機EL素子は電流に比例した輝
度で発光するので、各画素での配線による電源電圧の降
下分の影響が小さくなり、輝度ムラが改善される。
By performing the above-described correction processing on the input video signal, a current proportional to the difference voltage between the power supply voltage and the signal voltage flows through each organic EL element in the organic EL display 4. Since each organic EL element emits light with a brightness proportional to the current, the influence of the power supply voltage drop due to the wiring in each pixel is reduced, and the uneven brightness is improved.

【0041】図5は、DSP2内の輝度ムラ防止用の補
正処理回路の構成(機能ブロック)を示している。
FIG. 5 shows a configuration (functional block) of a correction processing circuit for preventing uneven brightness in the DSP 2.

【0042】図5において、Vは入力映像信号の垂直同
期信号であり、Hは水平同期信号であり、Dはドットク
ロック信号である。
In FIG. 5, V is a vertical synchronizing signal of the input video signal, H is a horizontal synchronizing signal, and D is a dot clock signal.

【0043】輝度ムラ防止用の補正処理回路は、平均輝
度レベル算出部11、電圧降下算出部12および減算部
13を備えている。
The correction processing circuit for preventing uneven brightness includes an average brightness level calculating section 11, a voltage drop calculating section 12 and a subtracting section 13.

【0044】平均輝度レベル算出部11は、入力映像デ
ータに基づいて、1垂直期間毎に平均輝度レベルを算出
する。電圧降下算出部12は、平均輝度レベル算出部1
1によって算出された平均輝度レベルと上記式(7)、
(8)、(9)に基づいて各画素毎の電圧降下Vnmk
を算出する。減算部13は、入力映像データからその画
素位置に対応した電圧降下Vnmkを減算する。
The average brightness level calculator 11 calculates the average brightness level for each vertical period based on the input video data. The voltage drop calculation unit 12 includes the average brightness level calculation unit 1
The average luminance level calculated by 1 and the above equation (7),
Voltage drop Vnmk for each pixel based on (8) and (9)
To calculate. The subtraction unit 13 subtracts the voltage drop Vnmk corresponding to the pixel position from the input video data.

【0045】[0045]

【発明の効果】この発明によれば、電源供給線による電
圧降下によって、輝度低下および輝度ムラが発生するの
を防止することができるようになる。
According to the present invention, it is possible to prevent the decrease in brightness and the uneven brightness due to the voltage drop due to the power supply line.

【図面の簡単な説明】[Brief description of drawings]

【図1】カラー有機ELディスプレイの電源供給線の配
線を示す模式図である。
FIG. 1 is a schematic diagram showing wiring of a power supply line of a color organic EL display.

【図2】各水平方向位置であって垂直方向に電源供給源
100に最も近い位置での電圧降下を示すグラフであ
る。
FIG. 2 is a graph showing a voltage drop at each horizontal position and in a position closest to the power supply source 100 in the vertical direction.

【図3】任意の水平位置における各垂直方向位置におけ
る電源供給線による電圧降下を示すグラフである。
FIG. 3 is a graph showing a voltage drop due to a power supply line at each vertical position at an arbitrary horizontal position.

【図4】カラー有機ELディスプレイを備えた表示装置
に設けられた信号処理回路の構成を示すブロック図であ
る。
FIG. 4 is a block diagram showing a configuration of a signal processing circuit provided in a display device including a color organic EL display.

【図5】DSP2内の輝度ムラ防止用の補正処理回路の
構成(機能ブロック)を示すブロック図である。
FIG. 5 is a block diagram showing a configuration (functional block) of a correction processing circuit for preventing uneven brightness in the DSP 2.

【符号の説明】[Explanation of symbols]

1 A/D変換器 2 DSP 3 A/D変換器 4 有機ELディスプレイ 11 平均輝度レベル算出部 12 電圧降下算出部 13 減算部 1 A / D converter 2 DSP 3 A / D converter 4 Organic EL display 11 Average Brightness Level Calculation Unit 12 Voltage drop calculator 13 Subtraction unit

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H05B 33/14 H05B 33/14 A ─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. 7 Identification code FI theme code (reference) H05B 33/14 H05B 33/14 A

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 カラー有機ELディスプレイを備えた有
機ELディスプレイ装置において、 1垂直期間毎に入力映像信号の平均輝度を算出する平均
輝度算出手段、 平均輝度算出手段によって算出された平均輝度に基づい
て、カラー有機ELディスプレイ内の各画素位置ごとの
電源供給線による電源電圧降下を算出する電圧降下算出
手段、および電圧降下算出手段によって算出された各画
素毎の電源電圧降下に基づいて、電源電圧降下による輝
度低下を補完するように入力映像信号を補正する補正手
段を備えていることを特徴とする有機ELディスプレイ
装置。
1. In an organic EL display device having a color organic EL display, an average luminance calculating means for calculating an average luminance of an input video signal for each vertical period, and based on the average luminance calculated by the average luminance calculating means. A voltage drop calculation means for calculating a power supply voltage drop due to a power supply line for each pixel position in the color organic EL display, and a power supply voltage drop based on the power supply voltage drop for each pixel calculated by the voltage drop calculation means An organic EL display device comprising: a correction unit that corrects an input video signal so as to complement the decrease in brightness due to.
【請求項2】 補正手段は、各画素に対する映像入力信
号を、その画素に対して算出された電源電圧降下が大き
いほど、その画素の発光輝度が高くなるように、入力映
像信号を補正するものであることを特徴とする請求項1
に記載の有機ELディスプレイ装置。
2. The correcting means corrects the video input signal for each pixel such that the larger the power supply voltage drop calculated for that pixel, the higher the emission brightness of that pixel. 2. The method according to claim 1, wherein
The organic EL display device described in 1.
JP2002081635A 2002-03-22 2002-03-22 Organic EL display device Expired - Fee Related JP3995504B2 (en)

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