JP2003273100A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

[PROBLEMS] To provide a semiconductor device and a method of manufacturing the same capable of laminating a coating insulating film and a film having a different etching rate from the coating type insulating film in a shorter time and at lower cost than in the past. To provide. SOLUTION: A step of forming a first coating film 48 above a silicon substrate (semiconductor substrate) 30, a first heat treatment (baking) step of heating the first coating film 48, and A step of forming a polycarbosilane film 49 by applying a polycarbosilane solution; a second heat treatment (baking) step of heating the polycarbosilane film 49; Forming the first coating film 48 as the first coating insulating film 51 and forming the polycarbosilane film 4
A third heat treatment (curing) step in which 9 is an SiC-based insulating film 52 and the second coating 50 is a second coated insulating film 53.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its manufacturing method. More specifically, the present invention relates to a semiconductor device including a coating insulating film and a laminated film of a coating insulating film and a film having an etching rate different from that of the coating insulating film, and a manufacturing method thereof.

[0002]

2. Description of the Related Art In recent years, as the integration of semiconductor devices has increased, the wiring interval between them has become narrower. The propagation speed of the signal transmitted through the wiring becomes slower as the wiring resistance and the parasitic capacitance between the wirings increase. Of these, the parasitic capacitance becomes larger as the wiring interval becomes narrower. However, an increase in parasitic capacitance slows down the operation speed of the semiconductor device, which is not preferable.

There are several ways to reduce parasitic capacitance.
For example, there is a method in which the side area of the wiring is reduced by thinning the wiring in the same layer and the facing area of adjacent wirings is reduced to reduce the capacitance between the wirings. However, this method is not preferable because the wiring resistance is increased by thinning the wiring, resulting in a slower operation speed.

At present, the most effective method for reducing the parasitic capacitance is to reduce the dielectric constant of the insulating film filling the space between the wirings. A silicon oxide film has been widely used conventionally as an insulating film. By using an insulating film having a dielectric constant (4.1 or less) lower than that of a silicon oxide film (hereinafter referred to as a low dielectric constant insulating film), the parasitic capacitance can be reduced.

There are various low dielectric constant insulating films. Among them,
The coating type low dielectric constant insulating film has an advantage that it can be easily formed by spin coating.

One of the coating type insulating films is a Teflon type insulating film. Although such a Teflon-based insulating film can realize a dielectric constant of 2 or less, it has a problem of poor adhesion with other films. Note that Teflon is a registered trademark of DuPont in the United States in Japan.

The linear hydrocarbon insulating film is also a kind of coating type low dielectric constant insulating film. However, this film has a problem that it is easily oxidized and that it is thermally decomposed at a temperature of 400 ° C. or lower.

Therefore, use of the above-mentioned film cannot provide a semiconductor device having desired characteristics.

In order to solve the above-mentioned inconvenience, at present, an attempt has been made to reduce the dielectric constant of the film by reducing the density of the film formed by spin coating. The low density of the film can be achieved by baking and curing the coating film by spin coating to form a large number of voids in the coating film to make the coating film porous. The film thus obtained is hereinafter referred to as a porous low dielectric constant insulating film.

It is rare to use such a porous low dielectric constant insulating film as a single layer. Usually, an etching mask film necessary for etching the porous low dielectric constant insulating film and an etching stopper film for stopping the etching at a desired position are laminated on the porous low dielectric constant insulating film.

18 to 20 are shown in detail.

In this method, as shown in FIG. 18A, the first coating insulating film 4 is formed on the base 2. This first
The coating insulating film 4 is formed by coating a liquid material on the base 2. A coating device such as a spin coater is used for coating. The base 2 is an insulating film that covers elements such as transistors formed on a semiconductor substrate (not shown).

Next, as shown in FIG. 18B, the first coated insulating film 4 is baked. This baking is performed to dry the solvent component in the first coating insulating film 4, and is performed by heating the first coating insulating film 4 for about 3 minutes in the air, for example.

Next, as shown in FIG. 18C, the first coating insulating film 4 is cured. This cure accelerates the crosslinking of the first coating insulating film 4 to increase the crosslinking density, and
This is done to make it a porous low dielectric constant insulating film.

This curing is carried out in a nitrogen atmosphere, and its treatment time is much longer than that of baking and requires about 30 minutes.

Then, as shown in FIG. 18D, the first
A silicon nitride film 5 is formed on the coated insulating film 4. The silicon nitride film 5 is formed not by coating but by the CVD method. As will be described later, this silicon nitride film 5 functions as an etching stopper film and an etching mask film.

Next, as shown in FIG. 19A, a second coating insulating film 6 is formed on the silicon nitride film 5. This second
The coating insulating film 6 is formed by coating a liquid material on the silicon nitride film 5 using a coating device, like the first coating insulating film 4.

Then, as shown in FIG. 19B, the second
The coating insulating film 6 is baked. The baking condition is the same as that of the first coating insulating film 4, and the baking time is about 3 minutes.

Then, as shown in FIG. 19C, the second
The coating insulating film 6 is cured. The curing is performed in the same manner as the first coated insulating film 4, and the processing time is about 30 minutes. By this curing, the second coated insulating film 6 becomes a porous low dielectric constant film.

After that, the dual damascene structure shown in FIG. 20 is completed through a predetermined etching process, a metal film burying process and the like.

In FIG. 20, reference numeral 12 is a wiring, which is embedded in the wiring groove 14. This wiring groove 14
Is formed by etching the second coating insulating film 6, and during this etching, the silicon nitride film 5 is used as an etching stopper film.

Reference numeral 11 is a conductive plug, which is embedded in the via hole 13. This beer hole 1
3 is formed by etching the first coating insulating film 4. Then, during this etching, the silicon nitride film 5 functions as a mask film.

[0023]

However, in the above-described manufacturing method, it is necessary to cure the first coating insulating film 4 and the second coating insulating film 6 separately (FIG. 18).
(C) and FIG. 19 (c)), the cure must be performed twice in total, but if the cure that requires a long time of about 30 minutes each time is performed twice, the entire process time becomes long. As a result, the manufacturing cost of the semiconductor device increases.

Moreover, in this manufacturing method, different kinds of devices are required to form each of the first coating insulating film 4, the silicon nitride film 5, and the second coating insulating film 6. That is, a spin coater is required to form the first coating insulating film 4 and the second coating insulating film 6, and a CVD apparatus is required to form the silicon nitride film 5.

Of these apparatuses, the CVD apparatus is not preferable because it is expensive and therefore increases the manufacturing cost of the semiconductor device.

Furthermore, when different kinds of devices are required,
The manufacturing time of the semiconductor device is lengthened by the time required to move between the film forming devices, which further increases the manufacturing cost, which is not preferable.

The present invention was created in view of the problems of the conventional example, and a coating insulating film and a film having a different etching rate from that of the coating type insulating film are stacked in a shorter time than the conventional case. It is also an object of the present invention to provide a semiconductor device that can be manufactured at low cost and a manufacturing method thereof.

[0028]

Means for Solving the Problems The above-mentioned problems are as follows: a step of applying a coating liquid for forming an insulating film on a semiconductor substrate to form a coating film; a first heat treatment step of heating the coating film; On the coating film after the first heat treatment step, the general formula

[0029]

[Chemical 6]

By applying a polycarbosilane solution containing polycarbosilane represented by the following to form a polycarbosilane film, and heating the coating film and the polycarbosilane film at the same time to cross-link them. And a second heat treatment step in which the coating film is used as a coating insulating film and the polycarbosilane film is used as a SiC-based insulating film.

Next, the operation of the present invention will be described.

According to the present invention, both the coating film and the polycarbosilane film can be formed only by the coating device,
Different types of equipment (coating equipment and CVD equipment) are not required unlike in the prior art. Therefore, it is not necessary to perform film formation by moving between different types of devices, and the time required for moving between different types of devices can be shortened.

Further, since the expensive CVD apparatus is not required, the manufacturing cost of the semiconductor device can be reduced.

Moreover, since the coating film and the polycarbosilane film are not separately cured, but they are simultaneously cured together after the lamination (second heat treatment step). The process time is shortened by one time of curing time.

The order of stacking the coating film and the polycarbosilane film is not limited, and the coating film may be formed on the polycarbosilane film.

Further, the above-mentioned problems include the step of applying a first coating liquid for forming an insulating film on a semiconductor substrate to form a first coating film, and a first heat treatment step of heating the first coating film. ,
On the first coating film after the first heat treatment step, the general formula

[0037]

[Chemical 7]

A step of forming a polycarbosilane film by applying a polycarbosilane solution containing polycarbosilane represented by: and a second step of heating the polycarbosilane film
A heat treatment step, a step of applying a second coating liquid for forming an insulating film on the polycarbosilane film after the second heat treatment step to form a second coating film, the first coating film, the polycarbosilane film , And the second coating film are simultaneously heated and crosslinked to form the first coating film as a first coating insulating film, the polycarbosilane film as a SiC-based insulating film, and the second coating film as a second coating film. This is solved by a method for manufacturing a semiconductor device including a third heat treatment step of forming a coated insulating film.

Next, the operation of the present invention will be described.

According to the present invention, the first coating film and the second coating film are not separately cured as in the conventional case, but a polycarbosilane film is formed between them to form a coating film between them. At the same time, curing (third heat treatment step) is performed. Therefore, in the present invention, the curing step, which conventionally needs to be performed twice, is required only once, so the process time is shortened by one curing time. Since curing generally takes a long time, the present invention significantly reduces the process time.

In the first heat treatment step of baking the first coating film, the first coating film is not dissolved in the polycarbosilane film during the step of forming the polycarbosilane film on the first coating film. It is preferable to crosslink the first coating film.

Similarly, in the second heat treatment step of baking the polycarbosilane film, the polycarbosilane film is secondly formed during the step of forming the second coating film on the polycarbosilane film.
It is preferable to crosslink the polycarbosilane to such an extent that it does not dissolve in the coating film.

The first heat treatment step, the second heat treatment step,
Also, at least one of the third heat treatment step may be performed in an oxygen-containing atmosphere. By doing so, Si—O bonds are formed in the film even at a low temperature and crosslinking is promoted, so that the baking temperature and the curing temperature can be lowered.

[0044]

BEST MODE FOR CARRYING OUT THE INVENTION Next, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

(1) First Embodiment Next, a first embodiment of the present invention will be described with reference to FIGS.
This will be described with reference to 1. 1 to 11 are sectional views showing a method of manufacturing a semiconductor device according to a first embodiment of the present invention.

First, as shown in FIG. 1A, a known MOS transistor TR is formed on a silicon substrate (semiconductor substrate) 30. To form such a MOS transistor TR, a gate insulating film 65 made of, for example, a silicon oxide film is formed on the silicon substrate 30, and a gate electrode 32 made of, for example, polysilicon is formed thereon. Then, ion implantation is performed using the gate electrode 32 as a mask, so that the silicon substrate 3 on both sides of the gate electrode 32 is implanted.
A low-concentration impurity diffusion layer is formed on 0. After that, a sidewall insulating film 33 made of, for example, a silicon oxide film is formed on both side surfaces of the gate electrode 32, and ion implantation is performed again using the sidewall insulating film 33 and the gate electrode 32 as a mask. As a result, a so-called LDD (Lightly Doped Dr
ain) structure source diffusion layer 34S and drain diffusion layer 34
And D.

In the figure, reference numeral 31 is an element isolation film made of an insulating material for electrically isolating adjacent MOS transistors. The element isolation film 31 is formed by forming a shallow trench in the silicon substrate 30 and burying an insulating film such as a silicon oxide film therein. The element isolation film 31 is formed of LOCOS (Local Oxidation of Silicon).
It may be formed by a method.

Then, as shown in FIG.
An interlayer insulating film 35 having a film thickness of 350 nm and a stopper film 36 having a film thickness of 50 nm are stacked on the structure formed in (a). Of these, as the interlayer insulating film 35, phosphosilicate glass (PSG) is used, which is formed by the CVD method. As the stopper film 36, for example, a silicon nitride film is used, which is also formed by the CVD method.

Next, as shown in FIG. 1C, the interlayer insulating film 35 and the stopper film 36 are patterned, and openings 35a and 36a are formed in them. A contact hole 37 reaching the drain diffusion layer 34D is formed by the openings 35a and 36a.

Subsequently, as shown in FIG. 2A, the conductive plug 40 is embedded in the contact hole 37. The conductive plug 40 has a two-layer structure including a barrier metal layer 39 and a blanket tungsten film 38. this house,
The barrier metal layer 39 is made of a refractory metal such as TiN.

To obtain this structure, first, the stopper film 3
A barrier metal layer 39 having a film thickness of 15 nm is formed on the inner surface of the contact hole 37 and on the upper portion 6 by sputtering or the like. Then, a blanket tungsten film 38 of, eg, a 500 nm-thickness is formed on the barrier metal layer 39 so that the contact hole 37 is completely filled. The blanket tungsten film 38 is formed by, for example, a CVD method using WF ₆ and hydrogen as reaction gases. Then, the excess barrier metal layer 39 and the blanket tungsten film 38 formed above the stopper film 36 are removed by the CMP method,
The structure shown in FIG. 2A is obtained.

Next, as shown in FIG. 2B, a film having a thickness of, for example, 30 is formed on the conductive plug 40 and the stopper film 36.
An insulating film 41 having a thickness of 0 to 400 nm and a cap film 42 having a thickness of 50 nm are laminated. Of these, as the insulating film 41,
It is preferable to use a porous low dielectric constant insulating film made of porous silica. Such a film is used for HSQ (Hydrogen Sil
sesquioxane), MSQ (Methyl Silsesquioxane), MHSQ (Methylated Hydrogen Silsesquioxane), and the like are applied on the conductive plug 40 and the stopper film 36, and baked and cured to form a film.

A silicon oxide film is suitable for the cap film 42, which can be formed by the CVD method. The cap film 42 prevents the insulating film 41 from being deteriorated by the slurry or the cleaning liquid in the CMP performed later.

Next, as shown in FIG. 2C, a photoresist layer 43 is formed on the cap film 42. In the photoresist layer 43 above the conductive plug 40, a resist opening 4 having a wiring shape is formed by photolithography.
3a is formed. Then, this photoresist layer 43
As an etching mask film, the insulating film 41 and the cap film 4
2 and 7 are selectively etched. Such etching is performed by, for example, RIE (Reactive Ion Etching), and C ₄ F ₆ is used as the etching gas.

By this etching, openings 41a and 42a are formed in the insulating film 41 and the cap film 42, respectively. Then, by these openings 41a and 42a,
The wiring groove 44 is formed. After this etching is finished, the photoresist 43 is ashed and removed.

Subsequently, as shown in FIG. 3A, a barrier metal layer 45 of, eg, a 30 nm-thickness is formed on the cap film 42 and the inner wall (including the bottom surface) of the wiring groove 44. The barrier metal layer 45 is, for example, Ta (tantalum) or T
It is made of a refractory metal such as aN (tantalum nitride) and is formed by sputtering or the like.

On the barrier metal layer 45, for example, the film thickness on the flat surface of the barrier metal layer 45 is 500.
A copper film 46 having a thickness of nm is formed. The copper film 46 is formed by sputtering, for example. The method of forming the copper film 46 is not limited. For example, instead of the above, the barrier metal layer 4
A copper seed layer having a thickness of 30 nm is thinly formed on the substrate 5, and the seed layer is used as a power supply layer, and a thickness of 500 is obtained by electrolytic plating.
You may form the copper film 46 of nm.

Next, as shown in FIG. 3B, an extra barrier metal layer 45 formed above the cap film 42.
And the copper film 46 are removed by polishing by the CMP method. As a result, the wiring 47 having a two-layer structure of the barrier metal layer 45 and the copper film 46 is embedded in the wiring groove 44.

The method of forming the wiring 47 is a so-called single damascene method.

Then, as shown in FIG.
7 and the cap film 42, for example, a film thickness of 30 to 50 nm
Then, the silicon nitride film 60 is formed. This silicon nitride film 60 is formed by the CVD method.

Next, as shown in FIG. 4B, the first coating liquid for forming an insulating film is applied on the silicon nitride film 60,
For example, the first coating film 48 having a film thickness of 350 to 400 nm is formed. To form the first coating film 48, a known coating device such as a spin coater, a dip coater, or a roller coater can be used. The first coating liquid for forming the insulating film is not limited, but a coating liquid for forming porous silica is suitable. As the coating liquid, HSQ, MSQ, and MHS are used.
Q, etc., and any one of these may be used.

Next, as shown in FIG. 5A, the first coating film 48 is heated and baked on a hot plate in a coater, for example, and the solvent component thereof is dried (first heat treatment step). In this baking, it is preferable not only to simply dry the solvent component but also to slightly crosslink the first coating film 48. This is made by cross-linking the first coating film 48.
However, it is prevented from being mixed (dissolved) with the polycarbosilane film 49 formed thereon. Specifically, the atmospheric flow rate is 200 cc / min and the temperature is about 200 to 250.
By performing the above baking for about 3 minutes at ℃, the first coating film 4
8 can be slightly crosslinked to prevent the above mixing.

In particular, when baking is performed in an oxygen-containing atmosphere such as the atmosphere as described above, S in the first coating film 48 even at a low temperature.
Since the i-O bond is formed and crosslinking is promoted, the baking temperature can be lowered as compared with the case without oxygen. Without oxygen, the bake temperature would need to be about 350 ° C, which is higher than the above. When the bake temperature is lowered, there is an advantage that thermal damage to the MOS transistor TR and the like can be reduced.

Next, as shown in FIG. 5B, a polycarbosilane solution is applied on the first coating film 48 to form a polycarbosilane film 49 having a film thickness of 50 nm, for example. Such polycarbosilane is represented by the following general formula (1).

[0065]

[Chemical 8]

This polycarbosilane can be obtained at a low cost as a material for the silicon carbide fiber. This leads to cost reduction of the manufactured semiconductor device.

The solvent of the polycarbosilane solution is not limited. However, as the solvent, for example, hydrocarbon solvents such as methyl isobutyl ketone (MIBK), xylene, toluene, hexane, cyclohexane, octane and decane are suitable.

Then, a polycarbosilane solution of 5 to 7 wt% can be prepared by mixing any of these solvents with the polycarbosilane powder. In applying the polycarbosilane solution, a known coating device such as a spin coater, a dip coater, or a roller coater can be used.

Then, as shown in FIG. 6A, for example, a polycarbosilane film 49 is formed on a hot plate in a coater.
Is heated and baked to dry its solvent component (second
Heat treatment process). Similar to the case where the first coating film 48 is baked, in this baking, not only the solvent component is simply dried but also the polycarbosilane film 49 is preferably slightly crosslinked. By doing so, the polycarbosilane film 4
9 is prevented from mixing with the second coating 50 which will be subsequently formed thereon. Specifically, the above-mentioned mixing can be prevented by performing the above-mentioned baking at an air flow rate of 200 cc / min and a temperature of about 200 to 250 ° C. for about 3 minutes.

In particular, when baking is performed in an oxygen-containing atmosphere such as the air as described above, the polycarbosilane film 49 is exposed to oxygen, Si—O bonds are formed even at low temperature, and crosslinking is promoted. The baking temperature can be lowered. Without oxygen, the bake temperature would need to be about 350 ° C, which is higher than the above.

Next, as shown in FIG. 6B, a second coating liquid for forming an insulating film is applied on the polycarbosilane film 49 to form a second coating film 50 having a film thickness of 300 nm, for example.
The second coating liquid for forming an insulating film is not limited, but a coating liquid for forming porous silica is suitable. As mentioned above,
As the coating liquid, there are HSQ, MSQ, MHSQ and the like, and any one of them can be used.

Next, as shown in FIG. 7A, the second coating film 50 is baked and the solvent component thereof is dried. This baking is carried out, for example, on the hot plate in the coater with an air flow rate of 2
It is carried out at 00 cc / min and a temperature of about 200 to 250 ° C. for about 3 minutes.

Then, as shown in FIG. 7B, the first coating film 48, the polycarbosilane film 49, and the second coating film 50 are heated at the same time to cure them all at once (third part). Heat treatment process). This cure is done in a furnace,
The conditions are a temperature of about 400 ° C. and a curing time of about 30 minutes in a nitrogen atmosphere. As a result, the crosslinking reaction of each of the above films is promoted and the crosslinking density thereof is increased.

Note that this curing may be performed in an oxygen-containing atmosphere. As in the case of baking, the curing temperature is lowered because crosslinking of the film is promoted in the oxygen-containing atmosphere. Specifically, 500 p of oxygen is added to the nitrogen atmosphere.
The curing temperature can be lowered to about 350 ° C. by adding about pm. When the cure temperature is lowered, MO
It is possible to reduce thermal damage to the S transistor TR and the like.

By this curing, the polycarbosilane film 49 becomes the SiC type insulating film 52. The SiC insulating film 52 thus formed from polycarbosilane
The composition of has the following characteristics. -Si (silicon) content: 8-14 atm% -C (carbon) content: 20-25 atm% -O (oxygen) content: 8-14 atm% Moreover, the dielectric constant of the film is 2.5-3.0. Is. Furthermore, the density of the film is 1.1 to 1.3 g / cm ³ .

In the present specification, the SiC type insulating film means a film having these characteristics.

On the other hand, the first coating film 48 and the second coating film 50 are
The first coating insulating film 51 and the second coating insulating film 53 are made of porous silica, respectively. Such first coated insulating film 51
The second coating insulating film 53 is a porous low dielectric constant insulating film having a low dielectric constant of about 2.2.

By the steps up to this point, the first coating insulating film 5 is formed.
A laminated film of 1, the SiC-based insulating film 52, and the second coating insulating film 53 is obtained. Of these, the etching rate of the SiC-based insulating film 52 is the same as that of the first coating insulating film 51 and the second coating insulating film 5.
It is less than 1/10 of that of 3.

According to this embodiment, this laminated film is
Instead of separately curing the coating film 48 and the second coating film 50 as in the conventional case, a polycarbosilane film 49 is formed between them by coating, and the entire body is cured at once. can get. That is, the cure, which was conventionally required twice, is now required only once in the present embodiment. Therefore, in the present embodiment, the process time can be shortened by the amount of cure time (about 45 minutes to 3 hours) reduced by one time.

Moreover, each film in the above-mentioned laminated film can be formed by only the coating device, and a CVD device is not required unlike the conventional case. Therefore, since it is not necessary to move between different kinds of devices (coating device and CVD device), it is possible to shorten the time required to move between different kinds of devices.

Since no expensive CVD apparatus is required, this laminated film can be obtained at a lower cost than before.

Furthermore, according to the present embodiment, since the SiC type insulating film 52 having a lower dielectric constant than the silicon nitride film 5 (see FIG. 18, dielectric constant: about 7) according to the conventional example can be formed, Films having different etch rates can be stacked without increasing the dielectric constant.

The subsequent steps are the steps of forming wiring trenches and via holes in the laminated film obtained above.

That is, as shown in FIG. 8A, the cap film 54 and the mask film 55 are laminated on the second coating insulating film 53. Among them, as the cap film 54, for example, a silicon oxide film having a film thickness of 150 nm is used, and a CVD method is used for forming the film. Also, the mask film 5
An SiC-based insulating film (having a different composition from that of the SiC-based insulating film 52) formed by the CVD method, a silicon nitride film, or the like is used as 5, and the film thickness thereof is, for example, 100 nm.

Next, as shown in FIG. 8B, a photoresist layer 56 is formed on the mask film 55. The photoresist layer 56 is formed by photolithography with a first resist opening 56a having a wiring pattern shape.
Is formed.

Then, by using the photoresist layer 56 as an etching mask film and selectively etching the mask film 55, the first resist opening 56a is formed in the mask film 55.
Is transcribed to. This etching is performed by RIE, for example, and CHF ₃ is used as an etching gas. As a result, the first opening 55a having a wiring pattern shape is formed in the mask film 55. Then, the photoresist layer 56 is ashed and removed.

Next, as shown in FIG. 9A, another photoresist layer 57 is formed. Such photoresist layer 5
The formation site of 7 is on the mask film 55 and on the cap film 54 exposed in the first opening 55a. In the photoresist layer 57, a second resist opening 57a having a via pattern shape is formed by photolithography.
The second resist opening 57a is formed so as to partially overlap the first opening 55a.

After that, the photoresist film 57 is used as an etching mask film to selectively etch the cap film 54 and the second coating insulating film 53. This etching is performed by, for example, RIE, and C ₄ F ₆ is used as the etching gas.

As a result, the second resist opening 57a is transferred to these films, and the second opening 53a having a via pattern shape is formed in the second porous low dielectric constant insulating film 53. The second opening 53a is formed so as to partially overlap the first opening 55a. Then, an opening 54a having the same via pattern shape is formed in the cap film 54.

Then, as shown in FIG. 9B, this time, the second coating insulating film 53 is used as an etching mask film to etch the SiC insulating film 52 through the second opening 53a. Such etching is performed by RIE, for example, and CHF ₃ is used as the etching gas.

By this etching, the third opening 52a having a via pattern shape is formed into the SiC insulating film 52.
Is formed. Further, after this etching is completed, the photoresist layer 57 is removed by ashing.

Next, as shown in FIG.
The cap film 54 and the second coating insulating film 53 are etched through the first opening 55a of the mask film 55 while using the system insulating film 52 as an etching stopper film. This etching is performed by, for example, RIE, and C ₄ F ₆ is used as the etching gas.

As a result, the fourth opening 53b having a wiring pattern shape is formed in the second coating insulating film 53. Further, an opening 54b having the same wiring pattern shape is formed in the cap film 54.

In this etching, the third opening 52 is also used.
The first coated insulating film 51 exposed at a is also etched.
For the first coating insulating film 51, the SiC insulating film 52 functions as an etching mask film. Therefore, in this etching, the third opening 52a is transferred to the first coating insulating film 51, and the fifth opening 51a having a via pattern shape is formed in the first coating insulating film 51.

By this step, the wiring groove 58 is completed.
The wiring groove 58 is composed of the first opening 55a, the opening 54b, and the fourth opening 53b.

Next, as shown in FIG. 10B, the silicon nitride film 60 is etched through the fifth opening 51a,
The opening 60a is formed there. This etching is performed by RIE, for example, and CHF ₃ is used as the etching gas.

By this process, the via hole 59 communicating with the wiring groove 58 is completed. This via hole 59 is the third
The opening 52a, the fifth opening 51a, and the opening 60a are included.

Next, as shown in FIG. 11A, a barrier metal layer 61 having a film thickness of 30 nm, for example, is formed. The formation site of the barrier metal layer 61 is on the cap film 55 and each inner wall of the wiring groove 58 and the via hole 59. The barrier metal layer 61 is formed by, for example, sputtering or the like, and is made of a high melting point metal such as Ta (tantalum) or TaN (tantalum nitride).

Then, a film thickness of 700 is formed on the barrier metal layer 61, for example, on the flat surface of the barrier metal layer 61.
A copper film 62 having a thickness of nm is formed by sputtering or the like, and the wiring groove 58 and the via hole 59 are completely filled with copper. Copper film 6
The method of forming 2 is not limited. For example, instead of the above,
For example, a copper seed layer having a film thickness of 50 nm is used as a barrier metal layer 6
The copper film 62 may be formed by electrolytic plating using the seed layer as a power feeding layer.

Subsequently, as shown in FIG. 11B, an extra barrier metal layer 6 formed above the mask film 55.
1 and the copper film 62 are polished and removed by the CMP method.

Incidentally, the mask film 55 and the second coating insulating film 53.
Since the cap film 54 is provided between and, the mask film 55 can be hardly peeled from the second porous low dielectric constant insulating film 53 during this CMP.

By this CMP, the wiring 63 made of a conductor having a two-layer structure of the barrier metal layer 61 and the copper film 62 is embedded in the wiring groove 58. Then, a conductive plug 64 integrated with the wiring 63 is embedded in the via hole 59. The conductive plug 64 is also related to the barrier metal layer 6
1 and a copper film 62 are formed of a two-layer conductor.

The conductive plug 64 and the wiring 63 are formed by the so-called dual damascene method.

With the above, the semiconductor device according to the present embodiment is completed.

According to the investigation result of the inventor of the present application, no conduction failure was observed between the wiring 63 formed as above and the conductive plug 64. Further, it was not observed that the conductive plug 64 was separated from the via hole 59.

(2) Second Embodiment Next, a second embodiment of the present invention will be described with reference to FIGS. 12 to 14 show
It is sectional drawing shown about the manufacturing method of the semiconductor device which concerns on the 2nd Embodiment of this invention.

In the first embodiment, as shown in FIG. 7B, a three-layer laminated film (first coating insulating film 51, SiC
A system insulating film 52 and a second coating insulating film 53) were formed. However, the number of laminated films is not limited in the present invention, and the following two-layer laminated film may be formed.

First, as shown in FIG. 12 (a),
A coating film 21 is formed on the base 20. The base 20 has a structure in which, for example, a transistor is formed on a silicon substrate, an interlayer insulating film is formed on the transistor, and a conductive plug is embedded therein (see FIG. 2A). Alternatively, the wiring may be further formed on the conductive plug by the single damascene method (see FIG. 3B).

On the other hand, the coating film 21 is formed by coating HSQ, MSQ, MHSQ, etc. on the base 20, and the film thickness thereof is about 350 to 400 nm. The coating film 21 is formed using a known coating device such as a spin coater, a dip coater, or a roller coater.

Next, as shown in FIG. 12B, the coating film 21 is heated and baked on a hot plate in a coater, for example, and the solvent component thereof is dried (first heat treatment step).

The polycarbosilane film 2 is formed on the coating film 21 later.
2 is formed, but in order to prevent mixing of these films, it is preferable that the coating film 21 is slightly crosslinked in addition to simply drying the solvent component. Specifically, the atmospheric flow rate is 200 cc / min and the temperature is about 200.
By performing the above baking at about 250 ° C. for about 3 minutes, the coating film 21 is slightly cross-linked and the above mixing can be prevented.

In particular, as described in the first embodiment,
When baking is performed in an oxygen-containing atmosphere such as the atmosphere, the coating film 2
Since 1 is exposed to oxygen to promote crosslinking, the baking temperature can be lowered.

Next, as shown in FIG. 12C, the coating film 2
1 is coated with a polycarbosilane solution to give a film thickness of 5
A 0 nm polycarbosilane film 22 is formed. The method for producing and applying this polycarbosilane solution is the same as that in the first embodiment, and therefore its explanation is omitted.

Next, as shown in FIG. 12D, the polycarbosilane film 22 is baked and the solvent component thereof is dried. This baking is performed on a hot plate in a coater, for example, at an air flow rate of 200 cc / min and a temperature of about 200 to 250 ° C.
It takes about 3 minutes.

Subsequently, as shown in FIG. 13A, the coating film 21 and the polycarbosilane film 22 are heated so that they are simultaneously and collectively cured (second heat treatment step). This curing is performed in a furnace under the conditions of a temperature of about 400 ° C. and a curing time of about 30 minutes in a nitrogen atmosphere. As a result, the cross-linking reaction of each of the above-mentioned films is promoted to increase the cross-linking density, the coating film 21 becomes the coating insulating film 23 made of porous silica, and the polycarbosilane film 22 becomes the SiC insulating film 24.

Note that this curing may be performed in an oxygen-containing atmosphere. As described in the first embodiment, the curing temperature is lowered because the crosslinking of the film is promoted in the oxygen-containing atmosphere. Specifically, by adding about 500 ppm of oxygen to the above-mentioned nitrogen atmosphere, the curing temperature is set to 350.
It can be lowered to about ℃.

By the steps up to this point, a two-layer laminated film of the coating insulating film 23 and the SiC type insulating film 24 was formed. Of these, the etching rate of the SiC insulating film 24 is 1/10 or less of that of the coating insulating film 23.

According to this method, the coating film 21 and the polycarbosilane film 22 are not individually cured, but they are simultaneously cured at the same time after lamination. Thus, the process time can be shortened by one curing time (about 45 minutes to 3 hours).

Further, the coating insulating film 23 and the SiC insulating film 2
Since 4 and 4 are formed by a coating apparatus, they are formed by different kinds of film forming apparatuses (coating apparatus and CVD
Equipment) is not required. Therefore, it is not necessary to move the film between different types of devices to perform film formation, and the time required to move between different types of devices can be shortened.

Since an expensive CVD device is not required, the coating insulating film 23 and the SiC type insulating film 24 can be laminated at a lower cost than before.

Further, according to this method, by using the polycarbosilane solution, S having a lower dielectric constant than the silicon nitride film 5 (see FIG. 18, dielectric constant: about 7) according to the conventional example is used.
The iC insulating film 24 can be formed. Therefore, the SiC-based insulating film 24 having a different etching rate from that of the coating insulating film 23 can be stacked on the coating insulating film 23 without increasing the dielectric constant of the stacked film. Therefore, when this laminated film is used as an insulating film in which wiring is embedded, the parasitic capacitance of the wiring can be reduced and the operation speed of the semiconductor device can be increased.

In the following steps, the SiC insulating film 24 obtained above is used as an etching mask film for the coating insulating film 23.

First, as shown in FIG. 13B, SiC
A photoresist layer 29 is formed on the system insulating film 24. A resist opening 29a is formed in the photoresist layer 29 by photolithography.

Next, as shown in FIG. 13 (c), this photoresist layer 29 is used as an etching mask film, and Si is used.
The C insulating film 24 is etched. Such etching is
The etching gas is C by RIE.
HF ₃ is used. The coating insulating film 23 has etching resistance to this etching gas, and thus is not etched.

By this etching, the resist opening 29a of the photoresist layer 29 is formed into the SiC type insulating film 2.
4 and the opening 24a is formed in the SiC insulating film 24. After this etching is completed, the photoresist layer 2
9 is ashed and removed.

Subsequently, as shown in FIG. 13D, the coated insulating film 23 is etched by using the SiC insulating film 24 having the opening 24a as an etching mask film. This etching is performed by RIE, and C ₄ F ₆ is used as the etching gas. This allows
The opening 24a of the SiC-based insulating film 24 is transferred to the coating insulating film 23 to form the opening 23a.

The use of the openings 23a and 24a is not limited, but they are used as the wiring groove 28 in the following steps.

First, as shown in FIG. 14A, the barrier metal layer 2 having a film thickness of, for example, 30 nm is formed on the inner wall of the wiring groove 28.
5 is formed by sputtering or the like. The barrier metal layer 25 is made of a refractory metal such as Ta (tantalum) or TaN (tantalum nitride). Then, a copper film 26 having a film thickness of, for example, 500 nm on the flat surface of the barrier metal layer 25 is formed on the barrier metal layer 25 by sputtering or the like.

Then, as shown in FIG.
The extra barrier metal layer 25 and the copper film 26 formed above the C insulating film 24 are polished and removed by the CMP method.

As a result, the wiring 27 made of a conductor having a two-layer structure of the barrier metal layer 25 and the copper film 26 is buried in the wiring groove 28.

(3) Third Embodiment Next, a third embodiment of the present invention will be described with reference to FIGS. 15 to 17 are sectional views showing a method for manufacturing a semiconductor device according to the third embodiment of the present invention.

In the above second embodiment, the SiC type insulating film formed of polycarbosilane was used as the etching mask film for the coating insulating film. In contrast,
In the present embodiment, the stacking order of these films is reversed and the SiC
The system insulating film is used as an etching stopper film for the coating insulating film. In the following, the same members as those described in the second embodiment will be denoted by the same reference numerals, and the description thereof will be omitted.

In this embodiment, first, as shown in FIG.
As shown in (a), a polycarbosilane solution is applied on the underlayer 20 to form a polycarbosilane film 22 having a film thickness of 50 nm, for example. The manufacturing method and coating method of this polycarbosilane solution are the same as those in the first embodiment.

Then, as shown in FIG. 15B, for example, the polycarbosilane film 2 is formed on a hot plate in a coater.
2 is heated and baked, and the solvent component thereof is dried (first heat treatment step). The coating film 21 is formed on the polycarbosilane film 22 later, but in order to prevent these films from being mixed, this baking not only drys the solvent component but also removes the polycarbosilane film 22. It is preferable to slightly crosslink. Specifically, the atmospheric flow rate is 200cc
By performing the above-mentioned baking at a temperature of about 200 to 250 ° C. for about 3 minutes, the polycarbosilane film 22 is slightly cross-linked and the above-mentioned mixing can be prevented.

In particular, as described in the first embodiment,
When baking is performed in an oxygen-containing atmosphere such as the air, the polycarbosilane film 22 is exposed to oxygen and crosslinking thereof is promoted. Therefore, a high temperature is not required for crosslinking, and the baking temperature can be lowered.

Next, as shown in FIG. 15C, HS
Q, MSQ, MHSQ, etc. are treated with the polycarbosilane film 22.
It is applied on top to form a coating film 21. The film thickness of the coating film 21 is about 350 to 400 nm.

Subsequently, as shown in FIG. 15D, the coating film 21 is baked to dry the solvent component thereof. This baking is performed, for example, on a hot plate in a coater at an air flow rate of 200 cc / min and a temperature of about 200 to 250 ° C. for about 3 minutes.

Next, as shown in FIG. 16A, by heating the polycarbosilane film 22 and the coating film 21,
They are collectively and simultaneously cured (second heat treatment step). This curing is performed in a furnace under the conditions of a temperature of about 400 ° C. and a curing time of about 30 minutes in a nitrogen atmosphere. As a result, the cross-linking reaction of each of the above-mentioned films is promoted to increase the cross-linking density, the coating film 21 becomes the coating insulating film 23 made of porous silica, and the polycarbosilane film 22 becomes the SiC insulating film 24.

This curing may be performed in an oxygen-containing atmosphere. As described in the first embodiment, the curing temperature is lowered because the crosslinking of the film is promoted in the oxygen-containing atmosphere. Specifically, by adding about 500 ppm of oxygen to the above-mentioned nitrogen atmosphere, the curing temperature becomes 35%.
It can be lowered to about 0 ℃.

By the steps up to this point, the coating insulating film 23 is formed.
Then, a two-layer laminated film including the SiC-based insulating film 24 having a different etching rate from the above was formed. This method also has the same effect as that of the second embodiment.

In the following steps, the SiC type insulating film 24 obtained above is used as an etching stopper film when the coated insulating film 23 is etched.

First, as shown in FIG. 16B, a photoresist layer 29 is formed on the coating insulating film 23. By applying photolithography to the photoresist layer 29,
The resist opening 29a is formed.

Next, as shown in FIG. 16C, the coating insulating film 23 is etched using the photoresist layer 29 as an etching mask film. Such etching is RI
The etching gas is C ₄ F ₆
Is used.

Since the SiC type insulating film 24 has etching resistance against this etching gas, it is not etched. In other words, the SiC insulating film 24 functions as an etching stopper film.

By this etching, the resist opening 29a of the photoresist layer 29 is transferred to the coating insulating film 23, and the opening 23a is formed in the coating insulating film 23.
After this etching is completed, the photoresist layer 29 is ashed and removed.

The intended use of the opening 23a is not limited. In the following steps, the opening 23a is used as a wiring groove.

That is, first, as shown in FIG. 17A, a barrier metal layer 25 of, eg, a 30 nm-thickness is formed on the inner wall of the opening 23a by sputtering or the like. The barrier metal layer 25 is formed of, for example, Ta (tantalum) or Ta.
It is made of a refractory metal such as N (tantalum nitride). And
A copper film 26 having a film thickness of 500 nm is formed on the barrier metal layer 25 by sputtering or the like.

Then, as shown in FIG. 17B, the extra barrier metal layer 25 and the copper film 26 formed above the coating insulating film 23 are polished by the CMP method (chemical mechanical polishing method), Remove.

As a result, the wiring 27 made of a conductor having a two-layer structure of the barrier metal layer 25 and the copper film 26 is buried in the opening 23a.

Although the embodiments of the present invention have been described in detail above, the present invention is not limited to the above embodiments.

For example, although porous silica is used as the first coating insulating film 51, the second coating insulating film 53, and the coating insulating film 23 in the above, these films may be coating films,
A hydrocarbon-based coating type organic insulating film such as SiLK (registered trademark of Dow Chemical) or flare (registered trademark of Honeywell) may be used.

Further, in each of the above embodiments, the copper film 2
Instead of 6, 46 and 62, an aluminum film may be used. In this case, the barrier metal layers 25, 45, 61 are unnecessary.

In addition, in the step of laminating the cap film 54 and the mask film 55 shown in FIG. 8A of the first embodiment,
The second embodiment of the present invention may be applied. When applied in this way, the cap film 54 becomes a coating insulating film, and the mask film 55 becomes a SiC-based insulating film formed of polycarbosilane. According to this, since the mask film 55 and the cap film 54 are both formed by the coating device, an expensive CV
The D device becomes unnecessary, and the manufacturing cost of the semiconductor device can be reduced.

The features of the present invention will be additionally described below.

(Supplementary Note 1) A semiconductor substrate and a general formula formed above the semiconductor substrate.

[0156]

[Chemical 9]

A semiconductor having a SiC insulating film formed by crosslinking polycarbosilane represented by and a coating insulating film formed on at least one of the upper surface and the lower surface of the SiC insulating film. apparatus.

(Supplementary Note 2) A semiconductor substrate, a first coating insulating film formed above the semiconductor substrate, and a general formula:

[0159]

[Chemical 10]

A SiC type insulating film formed by cross-linking polycarbosilane represented by and formed on the first coating insulating film, and a second coating insulating film formed on the SiC type insulating film. A semiconductor device provided with.

(Supplementary Note 3) A first opening that forms a part of a via hole is formed in the first coating insulating film, and
A second opening forming a part of the via hole is formed in the C-based insulating film, and a third opening forming a part of a wiring groove communicating with the via hole is formed in the second coating insulating film; 3. The semiconductor device according to appendix 2, wherein a conductive plug is embedded in the first opening and the second opening, and a wiring integrated with the conductive plug is embedded in the third opening.

(Supplementary Note 4) The semiconductor device according to Supplementary Note 3, wherein the conductive plug and the wiring include copper or aluminum.

(Supplementary Note 5) At least one of the first coating insulating film and the second coating insulating film is HSQ (Hydrogen).
Silsesquioxane), MSQ (Methyl Silsesquioxan)
e), and MHSQ (Methylated Hydrogen Silsesquiox)
(a) The semiconductor device according to any one of appendices 2 to 4, which is formed by crosslinking any one of the

(Supplementary Note 6) Si is contained in the SiC insulating film.
(Si) is contained in 8 to 14 atm%, and C (carbon) is 20
˜25 atm%, O (oxygen) is 8˜14 atm%, and the dielectric constant of the SiC insulating film is 2.5˜.
3.0, and the density of the SiC insulating film is 1.
The semiconductor device according to any one of appendices 1 to 5, which is 1 to 1.3 g / cm ³ .

(Supplementary Note 7) A step of applying a coating liquid for forming an insulating film on a semiconductor substrate to form a coating film, a first heat treatment step of heating the coating film, and a coating after the first heat treatment step. On the membrane, the general formula

[0166]

[Chemical 11]

By applying a polycarbosilane solution containing polycarbosilane represented by the following to form a polycarbosilane film, and heating the coating film and the polycarbosilane film at the same time to crosslink them. A second heat treatment step in which the coating film is used as a coating insulating film and the polycarbosilane film is used as a SiC insulating film.

(Supplementary Note 8) General Formula

[0169]

[Chemical 12]

A step of forming a polycarbosilane film by applying a polycarbosilane solution containing polycarbosilane represented by the above above a semiconductor substrate, and a first heat treatment step of heating the polycarbosilane film, A step of applying a coating liquid for forming an insulating film to form a coating film on the polycarbosilane film after the first heat treatment step, and heating the polycarbosilane film and the coating film at the same time to crosslink them. Due to
A second heat treatment step in which the polycarbosilane film is a SiC insulating film and the coating film is a coating insulating film.

(Supplementary Note 9) A step of applying a first coating solution for forming an insulating film on a semiconductor substrate to form a first coating film,
A first heat treatment step of heating the first coating film and a general formula on the first coating film after the first heat treatment are performed.

[0172]

[Chemical 13]

A step of forming a polycarbosilane film by applying a polycarbosilane solution containing polycarbosilane represented by: and a second step of heating the polycarbosilane film
A heat treatment step, a step of applying a second coating liquid for forming an insulating film on the polycarbosilane film after the second heat treatment step to form a second coating film, the first coating film, the polycarbosilane film , And the second coating film are simultaneously heated and crosslinked to form the first coating film as a first coating insulating film, the polycarbosilane film as a SiC-based insulating film, and the second coating film as a second coating film. A method of manufacturing a semiconductor device, comprising a third heat treatment step of forming a coated insulating film.

(Supplementary Note 10) In the first heat treatment step, the first coating film is not dissolved in the polycarbosilane film during the step of forming the polycarbosilane film on the first coating film. 10. The method of manufacturing a semiconductor device according to appendix 9, wherein the coating film is crosslinked.

(Supplementary Note 11) The method for producing a semiconductor device according to Supplementary Note 10, wherein the first heat treatment step is performed in the atmosphere at a temperature of about 200 to 250 ° C.

(Supplementary Note 12) In the second heat treatment step, the polycarbosilane film is not dissolved in the second coating film during the step of forming the second coating film on the polycarbosilane film. 12. The method of manufacturing a semiconductor device according to any one of appendices 9 to 11, wherein carbosilane is crosslinked.

(Supplementary Note 13) The method for producing a semiconductor device according to Supplementary Note 12, wherein the second heat treatment step is performed in the atmosphere at a temperature of about 200 to 250 ° C.

(Supplementary Note 14) The semiconductor device according to Supplementary Note 9, wherein at least one of the first heat treatment step, the second heat treatment step, and the third heat treatment step is performed in an oxygen-containing atmosphere. Manufacturing method.

(Supplementary Note 15) A step of forming a mask film above the second coating insulating film, a step of forming a first opening having a wiring pattern shape in the mask film, and a second step
A step of forming a second opening in the coated insulating film, the second opening overlapping a part of the first opening and having a via pattern shape; and etching the SiC-based insulating film through the second opening to obtain the SiC-based insulating film. A step of forming a third opening in the second coating insulating film by etching the second coating insulating film through the first opening of the mask film while using the SiC-based insulating film as an etching stopper film. A fourth opening having a pattern shape is formed, and a fifth opening having a via pattern shape is formed in the first coating insulating film by etching the first coating insulating film through the third opening of the SiC-based insulating film. And the step of simultaneously embedding a conductor in the first opening, the third opening, the fourth opening, and the fifth opening,
The method according to claim 9, further comprising: forming a wiring in the first opening and the fourth opening, and forming a conductive plug in the third opening and the fifth opening.
15. The method for manufacturing a semiconductor device according to any one of Supplementary Notes 14.

(Supplementary Note 16) The method of manufacturing a semiconductor device according to Supplementary Note 15, wherein the conductor contains copper or aluminum.

(Supplementary Note 17) At least one of the first coating liquid for forming an insulating film and the second coating liquid for forming an insulating film is a coating liquid for forming porous silica. A method for manufacturing a semiconductor device according to any one of 1.

(Supplementary Note 18) The coating liquid for forming the porous silica is HSQ (Hydrogen Silsesquioxane), M
SQ (Methyl Silsesquioxane), MHSQ (Methylate
d Hydrogen Silsesquioxane).

(Supplementary Note 19) The method for producing a semiconductor device according to Supplementary Note 17, wherein a coating liquid for forming a hydrocarbon-based coating type insulating film is used in place of the coating liquid for forming the porous silica.

[0184]

As described above, according to the present invention,
Since the coating film and the polycarbosilane film are not cured separately, they are cured at the same time after lamination, so compared to the case where they are cured separately, a single cure is performed. The process time can be shortened by the time.

Further, since both the coating film and the polycarbosilane film can be formed only by the coating apparatus, an expensive CVD apparatus is not required and the conventional film forming apparatus (the CVD apparatus and the coating apparatus) can be moved. The time spent can be shortened.

Further, when forming a three-layer laminated film of the first coating film, the polycarbosilane film and the second coating film, the first coating film and the second coating film are separately cured as in the conventional case. Instead, the entire body including the polycarbosilane film is simultaneously cured (third heat treatment step). Therefore, in the present invention, the curing step, which conventionally needs to be performed twice, is required only once, so that the process time can be shortened by one curing time.

In the first heat treatment step of baking the first coating film, the first coating film is not dissolved in the polycarbosilane film during the step of forming the polycarbosilane film on the first coating film. The first coating film may be crosslinked.

Similarly, in the second heat treatment step of baking the polycarbosilane film, during the step of forming the second coating film on the polycarbosilane film, the polycarbosilane film is formed into the second film.
Polycarbosilane may be crosslinked to such an extent that it does not dissolve in the coating film.

A first heat treatment step of baking the first coating film, a second heat treatment step of baking the polycarbosilane film,
By performing at least one of the curing step (third heat treatment step) in the oxygen-containing atmosphere, the baking temperature and the curing temperature can be lowered.

[Brief description of drawings]

FIG. 1 is a sectional view (1) showing a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a sectional view (No. 2) showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.

FIG. 3 is a sectional view (3) showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.

FIG. 4 is a cross-sectional view (4) showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.

FIG. 5 is a cross-sectional view (5) showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.

FIG. 6 is a cross-sectional view (6) showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.

FIG. 7 is a cross-sectional view (7) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the invention.

FIG. 8 is a cross-sectional view (8) showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.

FIG. 9 is a cross-sectional view (9) illustrating the method for manufacturing the semiconductor device according to the first embodiment of the invention.

FIG. 10 is a cross-sectional view (10) showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.

FIG. 11 is a cross-sectional view (11) showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.

FIG. 12 is a sectional view (1) showing the method for manufacturing the semiconductor device according to the second embodiment of the invention.

FIG. 13 is a sectional view (No. 2) showing the method for manufacturing the semiconductor device according to the second embodiment of the invention.

FIG. 14 is a sectional view (3) showing the method for manufacturing the semiconductor device according to the second embodiment of the invention.

FIG. 15 is a cross-sectional view (No. 1) showing the method for manufacturing the semiconductor device according to the third embodiment of the invention.

FIG. 16 is a cross-sectional view (No. 2) showing the method for manufacturing the semiconductor device according to the third embodiment of the invention.

FIG. 17 is a sectional view (3) showing the method for manufacturing the semiconductor device according to the third embodiment of the invention.

FIG. 18 is a sectional view (1) illustrating the method for manufacturing the semiconductor device according to the conventional example.

FIG. 19 is a sectional view (2) illustrating the method for manufacturing the semiconductor device according to the conventional example.

FIG. 20 is a cross-sectional view (3) illustrating the method for manufacturing the semiconductor device according to the conventional example.

[Explanation of symbols]

2, 20 ... Base, 30 ... Silicon substrate, 23a, 24a, 35a, 36a, 41a, 42a, 5
4a, 60a ... Opening, 5 ... Silicon nitride film, 9, 14, 25, 39, 45, 61 ... Barrier metal layer, 10 ... Metal film, 12, 27, 47, 63 ... -Wiring, 4, 51 ... First coating insulating film, 6, 53 ... Second coating insulating film, 21 ... Coating film, 22, 49 ... Polycarbosilane film, 23 ... Coating Insulating film, 24, 52 ... SiC insulating film, 29, 43, 56, 57 ... Photoresist layer, 29a, 43a ... Resist opening, 26, 46, 62 ... Copper film, 14, 28, 44, 58 ... Wiring groove, 31 ... Element isolation film, 32 ... Gate electrode, 33 ... Sidewall insulating film, 34S ... Source diffusion layer, 34 ... Drain diffusion layer , 35 ... interlayer insulating film, 36 ... stopper film, 37 ... contour Blank hole, 38 ... Blanket tungsten film, 11, 40 ... Conductive plug, 41 ... Insulating film, 42, 54 ... Cap film, 48 ... First coating film, 50 ... 2 coating film, 51a ... 5th opening, 52a ... 3rd opening, 53a ... 2nd opening, 53b ... 4th opening, 55 ... Mask film, 55a ... 1st opening 56a ... First resist opening 57a ... Second resist opening 59 ... Via hole, 64 ... Conductive plug.

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Yuko Sakuma             4-1, Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa             No. 1 within Fujitsu Limited F-term (reference) 4J035 JA02 LB01                 5F033 HH11 HH21 HH32 JJ11 JJ19                       JJ21 JJ32 JJ33 KK11 KK21                       KK32 MM02 MM12 MM13 NN06                       NN07 PP06 PP15 PP27 QQ09                       QQ13 QQ25 QQ28 QQ37 QQ48                       QQ74 RR01 RR04 RR06 RR09                       RR14 RR21 RR25 RR29 SS11                       SS22 TT01 XX24 XX33 XX34                 5F058 AC10 AD05 AD10 AF04 AG01                       AH02 BA20 BD01 BD04 BD18                       BH01 BH03 BJ02

Claims (8)

[Claims] 1. A semiconductor substrate, which is formed on the semiconductor substrate and has the general formula: Si formed by crosslinking polycarbosilane represented by
A semiconductor device comprising: a C-based insulating film; and a coating insulating film formed on at least one of the upper surface and the lower surface of the SiC-based insulating film. 2. A semiconductor substrate, a first coating insulating film formed above the semiconductor substrate, a first opening formed in the first coating insulating film and forming a part of a via hole, and a general formula: Chemical 2] And a SiC-based insulating film formed by cross-linking polycarbosilane represented by the above, formed on the first coating insulating film, and a second insulating film formed on the SiC-based insulating film and forming a part of the via hole. An opening; a second coating insulating film formed on the SiC-based insulating film; a third opening formed in the second coating insulating film and forming a part of a wiring groove communicating with the via hole; A semiconductor device comprising: a conductive plug embedded in one opening and the second opening; and a wiring embedded in the third opening and integrated with the conductive plug. 3. A step of applying a coating liquid for forming an insulating film on a semiconductor substrate to form a coating film, a first heat treatment step of heating the coating film, and a coating film after the first heat treatment step. And the general formula: The step of forming a polycarbosilane film by applying a polycarbosilane solution containing polycarbosilane represented by, and simultaneously heating the coating film and the polycarbosilane film to crosslink the coating solution. A second heat treatment step in which the film is a coated insulating film and the polycarbosilane film is a SiC-based insulating film. 4. A general formula: And a step of forming a polycarbosilane film by applying a polycarbosilane solution containing polycarbosilane above the semiconductor substrate; a first heat treatment step of heating the polycarbosilane film; On the polycarbosilane film after the heat treatment step, a step of applying a coating liquid for forming an insulating film to form a coating film, and heating the polycarbosilane film and the coating film at the same time to crosslink them, Polycarbosilane film as Si
A second heat treatment step of using a C-based insulating film and using the coating film as a coating insulating film. 5. A step of applying a first coating liquid for forming an insulating film on a semiconductor substrate to form a first coating film, a first heat treatment step of heating the first coating film, and a first heat treatment. On the first coating film after the process, the general formula: And a step of forming a polycarbosilane film by applying a polycarbosilane solution containing polycarbosilane, a second heat treatment step of heating the polycarbosilane film, and a polycarbosilane after the second heat treatment step. Applying a second coating liquid for forming an insulating film on the carbosilane film to form a second coating film, the first coating film, the polycarbosilane film, and the second coating film.
By simultaneously heating the coating film to crosslink it, the first
A third heat treatment step, wherein the coating film is a first coating insulating film, the polycarbosilane film is a SiC insulating film, and the second coating film is a second coating insulating film. 6. The first heat treatment step is performed during the step of forming the polycarbosilane film on the first coating film.
The method for manufacturing a semiconductor device according to claim 5, wherein the first coating film is cross-linked so that the coating film does not dissolve in the polycarbosilane film. 7. The second heat treatment step is performed to the extent that the polycarbosilane film is not dissolved in the second coating film during the step of forming the second coating film on the polycarbosilane film. 6. Crosslinking
Alternatively, the method for manufacturing the semiconductor device according to claim 6. 8. The semiconductor device according to claim 5, wherein at least one of the first heat treatment step, the second heat treatment step, and the third heat treatment step is performed in an oxygen-containing atmosphere. Production method.