JP2003110211A - Circuit board and method of manufacturing the same - Google Patents

Abstract

(57) [Problem] To provide a method for forming a via hole having high adhesion, electrical characteristics, and connection reliability in a circuit board having a conductor layer as a circuit pattern on both surfaces of an insulating layer.
Provided is a circuit board that can cope with miniaturization of wiring.
Also, unlike conventional processing, the processing time does not increase in proportion to the number of holes, and it can respond to future finer wiring and higher density.
Provide a new processing method. SOLUTION: In a circuit board having a first conductor layer and a second conductor layer separated by an insulating layer, as shown in FIG. 1 (i), a circuit board having a multi-stage rivet-type fill via, and A method of manufacturing a circuit board, wherein the circuit board is entirely formed with via holes by a photographic method.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board having a fill via and a method for manufacturing the same.

[0002]

2. Description of the Related Art Circuit boards used in various electric and electronic devices have a structure in which conductor layers as circuit patterns separated by insulating layers are laminated with the miniaturization and high density of electronic devices. Will be required. In this case, holes are provided between the patterns to perform conduction by plating. Above all, a double-sided flexible circuit board having conductor layers as a circuit pattern on both sides of a flexible insulating layer is effectively used in a field in which a flexible and bendable board is required.

FIG. 3 is a schematic view of various conventional via holes of a circuit board. As a conduction path (via hole) between both conductor layers of the circuit board, the structures shown in FIGS. 3 (a) and 3 (b) are known. ing. However, the via holes having these structures have the following problems.

In the structure as shown in FIG. 3 (a), since the adhesion between the surface of the insulating layer 2 in the hole and the conductive material 3 is poor, cracks and the like occur in the thermal shock test, the high temperature and high humidity test and the like. There is a risk. In the structure shown in FIG. 3B, since the filled conductive material 3 has one structure of reverse puncture in the conductor layer 1, it has excellent adhesion and excellent characteristics in the thermal shock test, the high temperature and high humidity test and the like. Indicates. However, it cannot be said that it is sufficient under the worse thermal shock and temperature environment.

[0005]

In view of the above circumstances, the present invention provides a circuit board having a via hole having a structure in which the above-mentioned problems do not easily occur, that is, a circuit board having high adhesion, electrical characteristics, and connection reliability of the via hole portion. The purpose is to do. In addition, the processing time increases in proportion to the number of holes in the conventional processing using a drill or laser, but in order to respond to future wiring miniaturization and high density, the new number of holes is not proportional to the processing time. The provision of a processing method is also an object of the present invention.

[0006]

[Means for Solving the Problems] The inventors of the present invention have studied the structure of via holes to solve the above problems.
The present invention has been completed having the following features. (1) In a circuit board having a first conductor layer and a second conductor layer separated by at least an insulating layer, the two conductor layers are electrically connected to each other by penetrating the insulating layer. A circuit board having a fill via having a structure satisfying a condition. (A) The hole circumference of the fill via on the insulating layer side at the boundary between the first conductor layer and the insulating layer is larger than the hole circumference of the fill via on the first conductor layer side at the boundary. (B) The hole circumference of the fill via on the second conductor layer side at the boundary between the insulating layer and the second conductor layer is wider than the hole circumference of the fill via on the insulating layer side at the boundary. (2) The circuit board according to (1), which is a double-sided circuit board including an insulating layer and a first conductor layer and a second conductor layer on both sides of the insulating layer. (3) The following 9 steps, (I) a step of forming a circuit pattern including a fill via pattern in the first conductor layer and the second conductor layer by etching, (II) a fill via pattern of the first conductor layer A step of applying a photosensitive resist layer to a portion other than the area, (III) a step of forming a through hole by etching in the fill via pattern portion of the insulating layer to expose the second conductor layer, and then peeling the resist layer, (IV) A step of applying a power feeding film to the surface of the insulating layer exposed on the second conductor layer side, (V) A photosensitive resist layer is provided on the first conductor layer and the power feeding film in addition to the fill via pattern portion. A step of applying, (VI) a step of forming a non-penetrating hole in the second conductor layer by soft etching, (VII) a step of supplying power only to the power supply film, forming plating of fill via, and filling a conductive material, ( Removing the III) resist layer, (IX) wherein method of manufacturing a circuit board according to any one of the power supply layer step of removing, said comprising (1) or (2). (4) The following seven steps, (I) a step of forming a fill via pattern in the first conductor layer by etching, and (II) a through hole is formed in the insulating layer by etching to expose the second conductor layer. Step (III) A step of applying a photosensitive resist layer to the first conductor layer and the second conductor layer other than the fill via pattern portion, and (IV) Forming a non-through hole in the second conductor layer by soft etching. Forming step, (V)
A step of supplying power to the second conductor layer or both the second conductor layer and the first conductor layer to form a fill via plating;
The method according to any one of (1) and (2) above, including I) a step of removing the resist layer, and (VII) a step of processing a predetermined pattern on the first conductor layer and the second conductor layer by etching. Circuit board manufacturing method.

[0007]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described below with reference to the drawings as appropriate, but the present invention is not limited to the embodiments shown in the drawings.

A circuit board according to the present invention is shown in FIGS.
Will be described with reference to. 1 and 2 are explanatory views of a method for forming a circuit board according to the present invention. A circuit board according to the present invention has a conductor layer 1 as a circuit pattern, which is separated by an insulating layer 2, and the conductor layers are electrically connected by fill vias of a multi-stage rivet type (described later). To do.

The conductor layer 1 is not particularly limited as long as it is usually used as a conductor layer of a circuit board, and for example, metal such as copper, gold, stainless steel, aluminum, nickel, and metal foils such as alloys thereof. Is mentioned. Of these, copper foil and copper alloy foil are preferable in consideration of flexibility, processability, electrical characteristics, cost, and the like.

The insulating layer 2 is not particularly limited as long as it is usually used as an insulating layer of a circuit board, and examples thereof include polyimide, polyethylene terephthalate and polyethylene naphthalate. Of these,
Considering flexibility, flexibility, heat resistance, etc., polyimide or polyethylene naphthalate, particularly polyimide is preferable.

The term "fill via" used in the present invention is similar to the case commonly used in the art, and is used to electrically connect a plurality of conductor layers 1 separated by an insulating layer 2 of a circuit board (hereinafter referred to as a via hole). That means that the non-through holes are filled with a conductive material. Hereinafter, the structure of the multi-stage rivet type fill via included in the circuit board according to the present invention will be described with reference to FIG.

The multi-stage rivet type fill via has a conductive layer 1
Is characterized by the structure (hole circumference) of the fill via at the boundary between the insulating layer 2 and the insulating layer 2. First, attention is paid to the boundary between the first conductor layer 1 (the conductor layer 1 in the upper part of the drawing in FIG. 1I) and the insulating layer 2. At the boundary, the hole circumference of the fill via on the insulating layer 2 side is expanded from the hole circumference of the fill via on the first conductor layer 1 side. Next, attention is paid to the boundary between the insulating layer 2 and the second conductor layer 1 (the conductor layer 1 in the lower part of the drawing in FIG. 1I). At the boundary, the hole circumference of the fill via on the second conductor layer 1 side is expanded from the hole circumference of the fill via on the insulating layer 2 side. A fill via having a structure having both of these two requirements is the multi-stage rivet type fill via in the present invention.

Here, it is arbitrary which one of the conductor layers 1 on both sides of the insulating layer 2 is used as the first conductor layer. In the multi-stage rivet type according to the present invention, either of the two conductor layers 1 is used. A material that meets the above requirements when regarded as the first conductor layer. The structure of the fill via other than the boundary between the insulating layer 2 and the conductor layer 1 is not particularly limited. For example, in FIG.
In (i), the hole circumference of the fill via becomes narrower in the insulating layer 2 toward the lower side of the drawing, and the fill via has a conical shape in the second conductor layer 1. It is not limited to such a structure.

Since such a fill via has a plurality of rivet structures in the circuit board and is filled with the conductive material 3 in conformity with the holes, it has high mechanical strength, electrical characteristics, adhesion and connection. It has excellent reliability.

As the conductive material 3 filled in the multi-stage rivet type structure fill via, a material usually used in via holes can be used, and examples thereof include copper, silver, gold and solder. Of these, copper is preferable in consideration of electrical characteristics, cost, and the like. A specific filling method of the conductive material 3 will be described later.

Next, a method of manufacturing a circuit board according to the present invention will be described with reference to FIGS. Hereinafter, the first and second embodiments will be shown, but the method according to the present invention is not limited to these.

(First Embodiment: Method of Forming Fill Via Simultaneously with Formation of Circuit Pattern of Conductor Layer) First, a substrate having conductor layers 1 of copper or the like on both surfaces of an insulating layer 2 of polyimide or the like (FIG. 1A). 2) The resist layer 4 (photoresist) is applied to the first and second conductor layers 1). As the resist layer 4, a known material such as a dry film or an ink resist can be arbitrarily used, but it is preferable to use a dry film capable of alkali development because it is simple. Then, the resist layer 4 is exposed through a photomask,
By forming a photographic latent image of a predetermined pattern and developing it, the resist layer 4 corresponding to the pattern of circuits and via holes can be formed (FIG. 1B).

Next, the conductor layer 1 is etched to obtain a predetermined pattern. The conductor layer 1 may be etched by a conventional method, but chemical etching with a ferric chloride aqueous solution or the like is preferable from the viewpoints of controllability and etching rate. Then, the resist layer 4 is removed to obtain the structure shown in FIG. The removal of the resist layer 4 may be carried out by a conventional method, and removal by an alkaline aqueous solution such as an aqueous sodium hydroxide solution is exemplified.

Then, the resist layer 4 for forming via holes is formed again by pasting, exposing and developing a dry film or the like as described above (FIG. 1 (d)). At this time, the opening in the resist layer 4 is
It is preferable that the size is made 5 to 100 μm, preferably 15 to 50 μm smaller than the hole of the first conductor layer opened earlier. afterwards,
The exposed insulating layer 2 is etched to form the first conductor layer 1
The second conductor layer 1 is exposed by forming a hole having the above-mentioned rivet-type structure at the boundary between the first conductor layer 1 and the second conductor layer 1. The etching of the insulating layer 2 can be performed by chemical etching, plasma etching, or laser, but it is preferable that the etching is performed by chemical etching in order to sufficiently etch the insulating layer 2 and form a rivet structure under the insulating layer 2. . After that, the resist layer 4 is removed by the same method as when obtaining the structure of FIG.

In the practice of the present invention, the method of forming a hole having a rivet type structure at the boundary between the first conductor layer 1 and the insulating layer 2 is not particularly limited. Since the above-described chemical etching and plasma etching are isotropic etching, these over-etching (for example, extension of etching processing time) can be an example of a method of forming a hole having a rivet type structure.

After that, a feeding film 5 is provided on the second conductor layer side as shown in FIG. 1 (e) so that the entire surface of the second conductor layer can be fed with power. Although the form of application is sputtering, vapor deposition, electroless plating, etc., in the present invention, it is preferable to apply the power supply film 5 by sputtering because it is simple and easy. The material of the power supply film 5 is not particularly limited as long as it is a material capable of supplying power, and examples thereof include metals such as chromium, nickel, copper and alloys thereof, and nickel-chromium alloys are preferable. In addition, the thickness of the power feeding film 5 is preferably 1000 Å or more so as to reliably perform power feeding.

Next, a resist layer 4 (protective resist film) having an opening diameter smaller than the via hole pattern opening diameter is applied to the first conductor layer 1, and the resist layer 4 is also applied to the entire power supply film 5 (see FIG. 1 (f)). Resist layer 4 here
Can be applied by the same method as the resist layer 4 shown in FIGS. 1 (b) and 1 (d). Then, the second conductor layer 1 is opened by soft etching, and the insulating layer 2 is formed.
A non-through hole having the above-mentioned rivet structure is formed at the boundary between the second conductor layer 1 and the second conductor layer 1 (FIG. 1 (g)). Soft etching may be a general acid aqueous solution capable of dissolving the conductor layer 1,
It is preferable to use ultrasonic waves together in an aqueous solution of sodium persulfate.

Then, as shown in FIG. 1H, a conductive material 3 is filled. Examples of the method of filling the conductive material 3 include a conductive paste, electroless plating, electrolytic plating, etc. However, from the viewpoint of easy filling, power is supplied to the first and second conductor layers 1 to It is preferable to deposit the plating from the conductor layer 1 to form the fill via, and in particular, a method of supplying power only to the second conductor layer 1 to deposit the plating is preferable. Thereafter, as shown in FIG. 1I, the resist layer 4 is removed with an alkaline aqueous solution or the like, and the sputtered film is further removed to obtain the circuit board according to the present invention. The sputtered film may be removed with an acid-based aqueous solution which is usually used, but an aqueous solution of potassium ferricyanide, potassium permanganate or the like is preferable.

(Second Mode: Method of Forming Circuit Pattern of Conductor Layer After Forming Fill Via) In this mode,
This will be described with reference to FIG. This embodiment is basically the same as the first embodiment, and the steps of applying the resist layer 4, forming holes by etching, and removing the resist layer 4 are performed by the first conductor layer 1,
This is performed for two layers of the insulating layer 2 (see FIG. 2 (a)-
(D)), application of the resist layer 4 (FIG. 2E), and formation of holes in the second conductor layer 1 by soft etching (FIG. 2).
After performing (f)), the conductive material 3 is filled (see FIG.
(G)), the resist layer 4 is removed to obtain the substrate of FIG. After that, a circuit pattern is formed on the second conductor layer 1 to obtain the circuit board according to the present invention.

In this embodiment, the difference from the first embodiment is that the second conductor layer 1 is processed after the fill via formation. Therefore, as in the first embodiment, without forming the feeding film 5 shown in FIGS. 1E to 1H before forming the fill via, only the second conductor layer 1 or the first and second conductors is formed. Electroplating can be performed by supplying power to both layers 1.

As described above, in the method of manufacturing a circuit board according to the present invention, since the via holes are all formed by the photographic method, the processing time is constant regardless of the number of holes, and when the number of holes is large. Processing time is shortened as compared with the conventional method. In addition, the first mode (“0017” to “00”)
23), the circuit can be formed prior to the plating, so that the circuit shape is less likely to be affected by the dimensional shrinkage during the plating. Therefore, the positional alignment accuracy of the patterns on both surfaces of the insulating layer 2 becomes very high. Further, since the position accuracy of the via holes can be determined by the photomask alignment accuracy at the time of exposure, it can be applied to a high-definition circuit board that requires fine wiring. On the other hand, in the case of the second aspect (paragraphs “0024” to “0025”), the fill via can be formed without providing the power feeding film 5 shown in FIG. Yes, there is a cost advantage. In the practice of the present invention, an advantageous method can be adopted in consideration of the required processing accuracy, cost and the like.

[0027]

EXAMPLES Examples of the present invention will be described below with reference to the drawings (FIGS. 1 and 2) used in describing the embodiments of the present invention, but the present invention is not limited to the examples. Not something.

Example 1 A copper conductor 1 having a thickness of 18 μm was formed on both surfaces of an insulating layer 2 made of polyimide having a thickness of 25 μm.
An adhesive-free double-sided copper-clad laminate (Fig. 1 (a)) attached with a thermoplastic polyimide was prepared. First,
A dry film manufactured by Asahi Kasei Co., Ltd. is attached using a resist laminator, exposed through a photomask and developed to form a resist layer 4 corresponding to a predetermined circuit and via hole pattern (via hole opening diameter: 300 μm).
(Photoresist) was formed (FIG. 1B). Then, using the resist layer 4 as a mask, a conductor of 40 g / l
After chemically etching with the ferric chloride aqueous solution, the resist layer 4 was removed with a 3% aqueous sodium hydroxide solution to obtain a predetermined circuit pattern and via hole pattern as shown in FIG. 1 (c).

Then, in order to etch the insulating layer 2, the resist layer 4 made of a dry film was formed by the same operation as described above. At this time, the opening diameter of the resist layer 4 was made smaller than the via hole pattern by 50 μm in radius. Then, using the resist layer 4 as a mask, the insulating layer 2 is etched (over-etched) with a potassium hydroxide aqueous solution to form a rivet structure between the first conductor layer 1 and the insulating layer 2 as shown in FIG. To form a hole. Then, the second conductor layer 1 was exposed by removing the resist layer 4 with a 3% sodium hydroxide aqueous solution.

Then, the power feeding film 5 is formed on the entire surface of the second conductor layer 1.
(Nickel-chromium film, thickness 0.1 μm) was formed by sputtering, and after supplying power as shown in FIG. 1E, a resist layer 4 made of a dry film was formed by the same operation as above. At this time, the opening diameter of the resist layer 4 was made smaller than the via-hole pattern by 50 μm in radius so that the convex portions would not protrude from the conductor layer 1 (FIG. 1).
(F)). Then, it was dipped in a soft etching solution consisting of a 100 g / l sodium persulfate aqueous solution, and ultrasonic waves (20 to 1
(00 kHz) at 35 ° C. for 2 minutes for insulation layer 2
A hole having a rivet structure as shown in FIG. 1 (g) was formed between and the second conductor layer 1.

Then, as shown in FIG. 1 (h), power is supplied to the power supply film 5 on the second conductor layer 1 side (0.5 to 2.5 A / dm).
² ) and treated with a plating solution (copper sulfate-based plating solution) to deposit copper plating from the bottom of the hole and fill the formed hole to form a fill via. Finally, the resist layer 4 is removed with a 3% sodium hydroxide aqueous solution, and the power feeding film 5 is removed by immersing the power feeding film 5 in a 10% sodium persulfate aqueous solution for 5 seconds, which is shown in FIG. A double rivet type fill via which is a kind of multi-stage rivet type fill via having a structure was obtained.

The structure of the double rivet type fill via in this embodiment is as follows. That is, the first conductor layer 1 has a substantially cylindrical shape having a bottom surface of a substantially circle having a radius of 150 μm, and the insulating layer 2 has a boundary with the first conductor layer 1 having a radius of 175 μm and a second conductor. Boundary with layer 1 is radius 1
A shape of a part of a cone formed of a substantially circle of 50 μm, and in the second conductor layer 1 is a substantially circular cone having a radius of 160 μm as a bottom surface and a depth of 10 μm.

During the plating process in the above embodiment, not only the second conductor layer 1 but also the first conductor layer 1 is formed with a power supply film 5 (chromium film or the like) by a direct plating method or the like. Even if power is supplied to both sides to deposit plating,
It was confirmed that a fill via similar to the above was obtained.

[Embodiment 2] This embodiment will be described with reference to FIG. Also in this example, the same double-sided copper-clad laminate as in Example 1 (FIG. 2A) was used. This embodiment is different from the first embodiment in that the second conductor layer 1 is processed after the fill via is formed.

The processing from FIG. 2A to FIG. 2D is the same as that of the first embodiment. That is, the steps of forming the resist layer 4, etching, and removing the resist layer 4 are performed on the first conductor layer 1 and the insulating layer 2 in the same manner as in the conditions of Example 1 to obtain the structure of FIG. Was given. However, as described above, in this embodiment, the processing of the circuit pattern of the second conductor layer 1 was not performed at this stage.

Then, in this embodiment, the sputtering step is omitted, and the resist layer 4 made of a dry film is formed by the same operation as in Embodiment 1 (FIG. 2E), and the insulating layer 2 is formed by soft etching. A hole having a rivet structure was formed between the second conductor layers 1 (FIG. 2 (f)). When the resist layer 4 is formed, the opening diameter of the resist layer 4 is smaller than the via hole pattern by 50 μm in radius as in the first embodiment. Then, power was supplied to the second conductor layer 1 side under the same conditions as in Example 1, and a fill via was formed by plating (FIG. 2 (g)). Finally, the resist layer 4 is removed by using a 3% aqueous solution of sodium hydroxide.
A double rivet type fill via, which is a kind of multi-stage rivet type fill via having a desired structure, was obtained as shown in (h).
The structure of this fill via was the same as that of the fill via of the first embodiment.

As in Example 1, during the plating process,
It was confirmed that the same fill via as described above can be obtained by feeding not only the second conductor layer 1 but also the first conductor layer 1 to deposit the plating by the direct plating method or the like.

Comparative Example As a comparative example, a fill via as shown in FIG. 3B, that is, a fill via having a rivet type structure only at the boundary between the insulating layer 2 and the second conductor layer 1 was manufactured. This fill via is manufactured in Example 2.
It was performed according to the method of. However, in this comparative example,
Since no rivet type structure was formed at the boundary between the first conductor layer 1 and the insulating layer 2, the first conductor layer 1 and the insulating layer 2 were simultaneously laser-processed to form holes. as a result,
The structure corresponding to FIG. 2D (however, the first conductor layer 1
The boundary between the insulating layer 2 and the insulating layer 2 is not a rivet type). After that, by the same processing as in Example 2, FIG.
The fill via described in 1. was manufactured.

The structure of the rivet type fill via in this comparative example is as follows. That is, the first conductor layer 1
The inside of the insulating layer 2 is a substantially columnar shape having a substantially circular surface with a radius of 150 μm as the bottom surface, and the second conductor layer 1 has a substantially circular shape having a radius of 160 μm as the bottom surface and a substantially conical shape with a depth of 10 μm.

[Reliability Evaluation] The resistance change rate of the double-sided circuit board of Example 2 and the double-sided circuit board of Comparative Example were measured under the condition 1 based on JIS-C5016 (n =
5). The result is shown in FIG. The rate of change in resistance after 300 cycles was 1.42% for the double-sided circuit board of Example 2 and 2.43% for the double-sided circuit board of the comparative example. As described above, it was revealed that the double-sided circuit board having the double rivet type fill via manufactured according to the present invention exhibits excellent reliability even under a bad temperature environment.

[0041]

In the circuit board according to the present invention, the multi-stage rivet type fill via acts as a back piercing and the conductive material is filled in conformity with the conductive path, so that the mechanical strength is high and the electrical characteristics and adhesion are improved. It has excellent properties and connection reliability, and can reduce the occurrence of cracks in the conductive paths during thermal shock tests and high temperature and high humidity tests. Therefore, it is expected that the electronic device can be used even when the operating frequency of the electronic device increases in the future. Also,
Since the method for manufacturing a circuit board according to the present invention is all via hole formation using a photographic method, the processing time is constant even if the number of holes is large, and a circuit board suitable for high-density wiring can be efficiently manufactured. be able to. Further, in the circuit board manufacturing method according to the specific embodiment of the present invention (the invention according to claim 3), the circuit can be formed prior to the plating, and the influence of the dimensional shrinkage during the plating can be prevented. Since the pattern alignment accuracy is very high on both sides of the insulating layer, the position accuracy of the via holes can be entirely determined by the alignment accuracy of the photomask during exposure. It can be applied to substrates. In another embodiment of the present invention (the invention according to claim 4), a multi-stage rivet type fill via can be manufactured by a relatively simple operation. Therefore, it is possible to obtain the multi-stage rivet type fill via according to the present invention by adopting an appropriate manufacturing method in consideration of desired processing accuracy, cost and the like.

[Brief description of drawings]

1A to 1I are explanatory views of a method for forming a circuit board according to the present invention.

2A to 2H are explanatory views of a method for forming a circuit board according to the present invention.

3A and 3B are schematic views of various conventional via holes of a circuit board.

4A is a graph showing a resistance change rate in a reliability test of Example 2, and FIG. 4B is a graph showing a resistance change rate in a reliability test of a comparative example.

[Explanation of symbols]

1: Conductor layer 2: Insulation layer 3: Conductive material 4: Resist layer 5: Power supply film

Continued front page    F-term (reference) 5E317 AA24 BB01 BB11 CC31 CC44                       CD17 CD25 GG09 GG11                 5E339 AB02 AC01 AD03 AD05 BC02                       BD02 BD08 BD11 BE13 GG01                 5E346 AA06 AA12 AA15 AA32 AA35                       AA43 BB01 CC02 CC08 DD02                       DD32 FF04 GG15 GG17 GG22                       HH07

Claims (4)

[Claims] 1. In a circuit board having a first conductor layer and a second conductor layer separated by at least an insulating layer, the insulating layers are penetrated to electrically connect the two conductor layers (A) and (B). ) A circuit board having a fill via having a structure satisfying the condition of 1). (A) The hole circumference of the fill via on the insulating layer side at the boundary between the first conductor layer and the insulating layer is larger than the hole circumference of the fill via on the first conductor layer side at the boundary. (B) The hole circumference of the fill via on the second conductor layer side at the boundary between the insulating layer and the second conductor layer is wider than the hole circumference of the fill via on the insulating layer side at the boundary. 2. The circuit board according to claim 1, which is a double-sided circuit board including an insulating layer and a first conductor layer and a second conductor layer on both sides of the insulating layer. 3. The following 9 steps, (I) a step of forming a circuit pattern including a fill via pattern on the first conductor layer and the second conductor layer by etching, (II) a fill via of the first conductor layer A photosensitive resist layer in addition to the resist pattern portion, (III) After forming a through hole by etching in the fill via pattern portion of the insulating layer to expose the second conductor layer, the resist layer is peeled off Step (IV) Applying a feeding film to the surface of the insulating layer exposed on the second conductor layer side, (V) Except for the fill via pattern portion, a photosensitive resist layer is provided on the first conductor layer and the feeding layer. (VI) forming a non-penetrating hole in the second conductor layer by soft etching, (VII) supplying power only to the power supply film, forming fill via plating, and filling a conductive material That step, (VIII) removing the resist layer, (IX) method of manufacturing a circuit board according to claim 1 or 2 comprising the steps, of removing the power feeding layer. 4. The following 7 steps, (I) a step of forming a fill via pattern in the first conductor layer by etching, (II) a through hole is formed in the insulating layer by etching to form a second conductor layer. Exposing, (III) applying a photosensitive resist layer to the first conductor layer and the second conductor layer in addition to the fill via pattern portion, and (IV) non-penetrating the second conductor layer by soft etching. Forming a hole; (V) supplying power to the second conductor layer or both the second conductor layer and the first conductor layer to form fill via plating; (VI) removing the resist layer; The method for manufacturing a circuit board according to claim 1, further comprising (VII) a step of processing a predetermined pattern on the first conductor layer and the second conductor layer by etching.