JP2003197828A - Resin-sealing semiconductor device - Google Patents
Resin-sealing semiconductor deviceInfo
- Publication number
- JP2003197828A JP2003197828A JP2001395704A JP2001395704A JP2003197828A JP 2003197828 A JP2003197828 A JP 2003197828A JP 2001395704 A JP2001395704 A JP 2001395704A JP 2001395704 A JP2001395704 A JP 2001395704A JP 2003197828 A JP2003197828 A JP 2003197828A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor device
- lead terminal
- sealed
- encapsulated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 61
- 238000007789 sealing Methods 0.000 title abstract description 19
- 239000011347 resin Substances 0.000 claims abstract description 89
- 229920005989 resin Polymers 0.000 claims abstract description 89
- 229910000679 solder Inorganic materials 0.000 abstract description 16
- 238000011179 visual inspection Methods 0.000 abstract description 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000005538 encapsulation Methods 0.000 description 5
- 238000007747 plating Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 239000013585 weight reducing agent Substances 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/37099—Material
- H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/37147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/4005—Shape
- H01L2224/4009—Loop shape
- H01L2224/40095—Kinked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する分野】本発明は、電気及び電子機器等に
使用される小形、薄型、軽量化された表面実装型の樹脂
封止型半導体装置の構造に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a small, thin and lightweight surface mount type resin-sealed semiconductor device used in electric and electronic equipment and the like.
【０００２】[0002]
【従来の技術】電気及び電子機器等に使用される電子回
路基板の小形、薄型、軽量化並びに高密度実装の要求に
応えるため、ダイオード、バイポーラトランジスタ、Ｍ
ＯＳＦＥＴなどの表面実装型の樹脂封止型半導体装置に
おける小型、薄型、軽量化が、急激に進んでいる。2. Description of the Related Art In order to meet the demands for miniaturization, thinness, weight reduction and high-density mounting of electronic circuit boards used in electric and electronic equipment, etc., diodes, bipolar transistors, M
Surface mount type resin-sealed semiconductor devices such as OSFETs are rapidly becoming smaller, thinner and lighter.
【０００３】図６は従来の面実装型小型ダイオードの第
１の例を説明する断面図である。本図には、ダイオード
チップ６１、第一のリード端子６２、第二のリード端子
６３、接続子６４および樹脂部６５からなる面実装型小
型ダイオードが示されている。ダイオードチップ６１は
第二のリード端子６３に搭載されており、ダイオードチ
ップ６１のもう一方の面と第一のリード端子６２は接続
子６４で接続される。第一のリード端子６２、接続子６
４、ダイオードチップ６１、第二のリード端子６３の間
は半田付けされる。第一のリード端子６２と第二のリー
ド端子６３は予め折曲部６２ａ、６３ａが設けられてお
り、その折曲部６２ａ、６３aの一部を樹脂部６５の下
側から露出させる。その折り曲げ部の設置面６２ｂ、６
３ｂを回路基板のパッドと低融点半田で接続することに
より表面実装できる。FIG. 6 is a sectional view for explaining a first example of a conventional surface-mount type small diode. This figure shows a surface-mount type small diode including a diode chip 61, a first lead terminal 62, a second lead terminal 63, a connector 64, and a resin portion 65. The diode chip 61 is mounted on the second lead terminal 63, and the other surface of the diode chip 61 and the first lead terminal 62 are connected by a connector 64. First lead terminal 62, connector 6
4, the diode chip 61 and the second lead terminal 63 are soldered together. The first lead terminal 62 and the second lead terminal 63 are provided with bent portions 62a and 63a in advance, and a part of the bent portions 62a and 63a is exposed from the lower side of the resin portion 65. Installation surfaces 62b, 6 of the bent portion
Surface mounting can be achieved by connecting 3b to the pads of the circuit board with low melting point solder.
【０００４】図７は従来の面実装型小型ダイオードの第
2の例を説明する断面図である。本図には、ダイオード
チップ７１、第一のリード端子７２、第二のリード端子
７３、接続子７４および樹脂部７５からなる面実装型小
型ダイオードが示されている。ダイオードチップ７１は
第二のリード端子端子７３に搭載され、ダイオードチッ
プ７１のもう一方の面と第一のリード端子７２は接続子
７４で接続される。第一のリード端子７２、接続子７
４、ダイオードチップ７１、第二のリード端子７３の間
は半田付けされる。第一のリード端子７２と第二のリー
ド端子７３は予め二段に折り曲げられ、上記接続の各平
面の反対側に接地面７２ｂ、７３ｂが設けられている。
第一のリード端子７２、第二のリード端子７３はそれぞ
れ、内方分が上記樹脂部７５の底面より内部に入り込ん
で位置していると共に、樹脂部７５の下面両端部におい
て下面が樹脂部７５の下面を面一上に露出させられたう
え、そのまま水平方向に延出させられていることを特徴
としている。FIG. 7 shows a conventional surface mounting type small diode.
FIG. 6 is a cross-sectional view illustrating an example of 2. This figure shows a surface-mount type small diode including a diode chip 71, a first lead terminal 72, a second lead terminal 73, a connector 74, and a resin portion 75. The diode chip 71 is mounted on the second lead terminal 73, and the other surface of the diode chip 71 and the first lead terminal 72 are connected by a connector 74. First lead terminal 72, connector 7
4, the diode chip 71 and the second lead terminal 73 are soldered. The first lead terminal 72 and the second lead terminal 73 are preliminarily bent in two steps, and grounding surfaces 72b and 73b are provided on the opposite sides of the respective planes of the connection.
The first lead terminal 72 and the second lead terminal 73 are positioned so that the inner portions of the first lead terminal 72 and the second lead terminal 73 are located inside the bottom surface of the resin portion 75. It is characterized in that the lower surface of is exposed in the same plane and is extended in the horizontal direction as it is.
【０００５】図６に示される従来の面実装型小型ダイオ
ードの場合、接地面付近以外全部樹脂に覆われているの
で、使用する樹脂量は図７の第２の実施例より多く、小
型軽量化の支障になる。また、外部回路との接続を行な
うために回路基板に半田接続すると、樹脂部が邪魔にな
って、半田接続部の接続状態が見えなく接続状態の外観
検査ができない。In the case of the conventional surface-mount type small diode shown in FIG. 6, the amount of resin used is larger than that of the second embodiment shown in FIG. Interferes with. Further, when the solder connection is made to the circuit board for connection with an external circuit, the resin portion interferes with the connection state of the solder connection portion and the connection state cannot be visually inspected.
【０００６】図７に示される従来の面実装型小型ダイオ
ードの第２の例の場合、図６の従来の面実装型小型ダイ
オードの第１の例に比較し、樹脂の量が大幅に少なくな
っている。しかしながら、第一のリード端子７２、第二
のリード端子７３の切断時などにおいて、樹脂部７５と
第一のリード端子７２及び第二のリード端子７３のリー
ド樹脂界面７７の部分に応力がかかりやすく、特に樹脂
封止後のリード切断時において、この部分より両者が剥
離し易いため湿度に弱いなど信頼度上の問題がある。接
地面７２ｂ、７３ｂ以外樹脂部で覆うことにより信頼度
は改善できる可能性はあるが必要な樹脂の量は大幅に多
くなり、図６に示される従来の面実装型小型ダイオード
の第１の例とほとんど同じ状況になってしまう。In the case of the second example of the conventional surface-mount type small diode shown in FIG. 7, the amount of resin is much smaller than that in the first example of the conventional surface-mount type small diode of FIG. ing. However, when the first lead terminal 72 and the second lead terminal 73 are cut, stress is likely to be applied to the resin portion 75 and the lead resin interface 77 of the first lead terminal 72 and the second lead terminal 73. In particular, when the lead is cut after the resin is sealed, there is a problem in reliability such that the both are easily peeled off from this portion and are weak to humidity. Although the reliability may be improved by covering with a resin portion other than the ground planes 72b and 73b, the amount of resin required is significantly increased, and the first example of the conventional surface mount type small diode shown in FIG. It will be almost the same situation as.
【０００７】一般に、リードフレームを使用して面実装
型小型ダイオードを量産するが、樹脂封止、リード端子
の半田めっき後リードフレームを切断するため、第一の
リード端子７２、第二のリード端子７３の折曲部７２
ｂ、７３ｂの側壁部７２ｄ、７３ｄが切断面になり、半
田メッキがない。このため、半田強度は第一のリード端
子７２、第二のリード端子７３の接地面２２ｂ、７３ｂ
できまる。図６の折曲部６２ａ、６３ａのように突出部
の形状であってこの側面にも半田がつくものと同様な強
度を保つためには、接地面７２ｂ、７３ｂを広げざるを
得なく、小型、軽量化の障害になっている。Generally, a surface mount type small diode is mass-produced using a lead frame. However, since the lead frame is cut after resin encapsulation and solder plating of the lead terminal, the first lead terminal 72 and the second lead terminal are used. Bent portion 72 of 73
Side walls 72d and 73d of b and 73b are cut surfaces, and there is no solder plating. For this reason, the solder strength is the ground planes 22b and 73b of the first lead terminal 72 and the second lead terminal 73.
Made up. In order to maintain the strength similar to that of the bent portions 62a and 63a of FIG. 6 such as the bent portions 62a and 63a and soldering to the side surfaces, the ground planes 72b and 73b have to be widened and the size is small. , Is an obstacle to weight reduction.
【０００８】[0008]
【発明が解決しようとする課題】本発明は、上記従来技
術の問題点を鑑みてなされたもので、その目的は、実装
時の半田接続部の外観検査ができ、信頼度を落とすこと
なく必要な樹脂量を少なくできると共に小型軽量化も可
能な面実装型小型ダイオードの構造にある。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and an object thereof is to perform a visual inspection of a solder connection portion at the time of mounting, and to perform the inspection without lowering the reliability. This is a structure of a small surface mount type diode that can reduce the amount of resin and can be made smaller and lighter.
【０００９】[0009]
【課題を解決しようとする手段】上記課題を解決するた
めに、請求項１記載の発明は半導体素子と、この半導体
素子と接続されたリード端子を樹脂封止してなる樹脂封
止型半導体装置において、前記リード端子に凸部を設
け、この凸部底面を含む凸部の一部を樹脂封止部より露
出するように配置し、前記リード端子の前記凸部の他方
となる凹部の一部と前記半導体素子を含む前記樹脂封止
型半導体装置の中央部とを一体として前記樹脂封止部に
樹脂封止してなることを特徴とする樹脂封止型半導体装
置である。請求項２記載の発明は請求項1の樹脂封止型
半導体装置において、前記凸部の底面が前記樹脂封止部
の下面と同一面となるように前記樹脂封止部より露出す
るように配置されたことを特徴とする樹脂封止型半導体
装置である。請求項３記載の発明は請求項1又は請求項2
いずれか１項記載の樹脂封止型半導体装置において、前
記凹部に充填された樹脂部を有することを特徴とする樹
脂封止型半導体装置である。請求項４記載の発明は請求
項３の樹脂封止型半導体装置において、前記凹部に充填
された樹脂部の少なくとも一部から前記樹脂封止部の側
壁まで緩い傾斜をもって上方に延在せしめた樹脂部を有
することを特徴とする樹脂封止型半導体装置である。請
求項５記載の発明は請求項３の樹脂封止型半導体装置に
おいて、前記凹部に充填された樹脂部の少なくとも一部
から前記樹脂封止部の上面の高さを限度としてほぼ垂直
に延在せしめた樹脂部を有することを特徴とする樹脂封
止型半導体装置である。In order to solve the above problems, the invention according to claim 1 is a resin-encapsulated semiconductor device in which a semiconductor element and a lead terminal connected to the semiconductor element are resin-encapsulated. In the above, the lead terminal is provided with a convex portion, and a portion of the convex portion including the bottom surface of the convex portion is arranged so as to be exposed from the resin sealing portion, and a portion of the concave portion which is the other of the convex portions of the lead terminal. And a central part of the resin-encapsulated semiconductor device including the semiconductor element, which is integrally resin-encapsulated in the resin-encapsulated part. According to a second aspect of the invention, in the resin-encapsulated semiconductor device according to the first aspect, the bottom surface of the convex portion is arranged so as to be exposed from the resin encapsulation portion so that the bottom surface thereof is flush with the lower surface of the resin encapsulation portion. The resin-encapsulated semiconductor device is characterized in that The invention according to claim 3 is claim 1 or claim 2.
The resin-encapsulated semiconductor device according to any one of claims 1 to 3, further comprising a resin portion filled in the recess. According to a fourth aspect of the present invention, in the resin-encapsulated semiconductor device according to the third aspect, the resin is extended upward with a gentle slope from at least a part of the resin portion filled in the recess to a side wall of the resin-encapsulated portion. A resin-encapsulated semiconductor device having a portion. According to a fifth aspect of the present invention, in the resin-encapsulated semiconductor device according to the third aspect, the resin-encapsulated semiconductor device extends substantially vertically from at least a part of the resin portion filled in the recess with a height of an upper surface of the resin-encapsulated portion as a limit. A resin-encapsulated semiconductor device having a resin portion formed by bending.
【００１０】[0010]
【発明の実施の形態】樹脂封止型半導体装置として、半
導体素子としてダイオードチップを用いた面実装型小型
ダイオードの実施例を述べる。BEST MODE FOR CARRYING OUT THE INVENTION As a resin-sealed semiconductor device, an embodiment of a surface-mount type small diode using a diode chip as a semiconductor element will be described.
【００１１】第１の実施例について説明する。図１は本
発明の第１の実施の形態に係る樹脂封止型半導体装置の
構造を説明するための平面図である。図２は本発明の第
１の実施の形態に係る樹脂封止型半導体装置の構造を説
明するための図１の切断線Ａ−Ａ線断面図である。図３
は本発明の第１の実施の形態に係る樹脂封止型半導体装
置の構造を説明するための斜視図である。図１、図２及
び図３の同一部分には同じ符号を付す。The first embodiment will be described. FIG. 1 is a plan view for explaining the structure of the resin-sealed semiconductor device according to the first embodiment of the present invention. FIG. 2 is a sectional view taken along the line AA of FIG. 1 for explaining the structure of the resin-sealed semiconductor device according to the first embodiment of the present invention. Figure 3
FIG. 3 is a perspective view for explaining the structure of the resin-sealed semiconductor device according to the first embodiment of the present invention. The same parts in FIGS. 1, 2 and 3 are designated by the same reference numerals.
【００１２】図１の平面図に見られるように樹脂封止型
半導体装置の中心部は樹脂部１５で被覆されており、こ
の樹脂部１５の左右に第一のリード端子１２、第二のリ
ード端子１３が出ている。第一のリード端子１２及び第
二のリード端子１３における樹脂部１５の左右の部分に
は凹部１６（図示していない）が設けられており、樹脂
部１５の本体部分である樹脂封止部１５ａはこの凹部１
６の一部と樹脂封止型半導体装置の中央部側を含め矩形
に成形されている。凹部１６の残りの部分も樹脂で充填
されており、その一部が樹脂封止部１５aの側壁上部ま
で延びている。As shown in the plan view of FIG. 1, the central portion of the resin-encapsulated semiconductor device is covered with a resin portion 15, and the first lead terminal 12 and the second lead are provided on the left and right sides of the resin portion 15. Terminal 13 is out. Recesses 16 (not shown) are provided in the left and right portions of the resin portion 15 in the first lead terminal 12 and the second lead terminal 13, and the resin sealing portion 15a which is the main body portion of the resin portion 15 is provided. This recess 1
A part of 6 and the central portion of the resin-encapsulated semiconductor device are formed in a rectangular shape. The remaining portion of the recess 16 is also filled with resin, and a part thereof extends to the upper portion of the side wall of the resin sealing portion 15a.
【００１３】本発明の第１の実施の形態に係る樹脂封止
型半導体装置の構造を説明するための図１の切断線Ａ−
Ａ線の断面図である図２により、断面構造、製造方法に
ついて説明する。銅板材から切り出した矩形の第一のリ
ード端子１２、第二のリード端子１３の一部を打ち出し
成形により凸部１２a、１３aを作り外部回路との接続用
の部分、接地面１２ｂ、１３ｂを作る。第一のリード端
子１２、第二のリード端子１３を左右向かい合わせに組
立て治具内に配置すると共に、接続用の接地面１２ｂ、
１３ｂの面が同一平面になるように設置し、第二のリー
ド端子１３の上面にダイオードチップ１１を搭載し、銅
板で作られた接続子１４をダイオードチップ上面と、第
一のリード端子１２上に搭載し、各界面に半田を塗布
し、この治具を熱処理することにより、半田接続する。
樹脂封止部１５aの側壁の延長部（または仮想的に延長
したところ）が第一のリード端子１２、第二のリード端
子１３の凹部１６にかかるように、また、同凹部１６が
樹脂により充填されるように、また、この充填された樹
脂１５ｃの一部が樹脂封止部１５aの側壁上部まで緩い
傾斜をもって上方に延在せしめた樹脂部１５ｄの形状に
なるように、また、樹脂封止部１５aの下面が外部回路
との接続用の接地面１２ｂ、１３ｂの面と一致するよう
に樹脂モールドの金型を作製する。この金型により、半
田付けされた第一のリード端子１２、第二のリード端子
１３、ダイオードチップ１１、接続子１４とモールド用
樹脂とを一体成形する。樹脂封止されていない第一のリ
ード端子１２、第二のリード端子１３の面、少なくとも
接地面１２ｂ、１３ｂの金属酸化膜をとり、必要におい
て、半田接続用に半田メッキをしておくのがよい。ここ
では、樹脂封止部１５の下面が外部回路との接続用の接
地面１２ｂ、１３ｂの面と一致するように樹脂モールド
の金型を作製したが、実装方法に合わせて、樹脂封止部
１５の下面と接地面１２ｂ、１３ｂとに差を設けること
もできる。A cutting line A-- in FIG. 1 for explaining the structure of the resin-sealed semiconductor device according to the first embodiment of the present invention.
A sectional structure and a manufacturing method will be described with reference to FIG. 2 which is a sectional view taken along line A. Part of the rectangular first lead terminal 12 and the second lead terminal 13 cut out from the copper plate material is formed by stamping to form the convex portions 12a and 13a, and the portions for connecting to an external circuit and the ground planes 12b and 13b are formed. . The first lead terminal 12 and the second lead terminal 13 are assembled in a jig so as to face each other in the left-right direction, and a grounding surface 12b for connection is provided.
13b is placed so that the surfaces thereof are flush with each other, the diode chip 11 is mounted on the upper surface of the second lead terminal 13, and the connector 14 made of a copper plate is placed on the upper surface of the diode chip and the first lead terminal 12. Then, solder is applied to each interface, and this jig is heat-treated for solder connection.
The side wall extension of the resin encapsulation portion 15a (or a virtual extension) is placed on the recesses 16 of the first lead terminal 12 and the second lead terminal 13, and the recess 16 is filled with resin. So that a portion of the filled resin 15c extends to the upper portion of the side wall of the resin sealing portion 15a with a gentle inclination upward, and the resin sealing is performed. A resin mold die is manufactured so that the lower surface of the portion 15a is flush with the ground planes 12b and 13b for connection with an external circuit. With this mold, the soldered first lead terminal 12, second lead terminal 13, diode chip 11, connector 14, and molding resin are integrally molded. It is preferable to remove the metal oxide film on the surfaces of the first lead terminal 12 and the second lead terminal 13 that are not resin-sealed, at least the ground planes 12b and 13b, and, if necessary, perform solder plating for solder connection. Good. Here, the mold of the resin mold is manufactured so that the lower surface of the resin sealing portion 15 is aligned with the surfaces of the ground planes 12b and 13b for connection with the external circuit. It is also possible to provide a difference between the lower surface of 15 and the ground contact surfaces 12b and 13b.
【００１４】半田接続にあたっては接地面１２ｂ、１３
ｂだけではなく、樹脂に覆われていない凸部側面１２
c、１３cにも半田がつくため、接続強度が強くなる。For solder connection, ground planes 12b, 13
Not only b, but also the convex side surface 12 not covered with resin
Since solder is also attached to c and 13c, the connection strength is increased.
【００１５】樹脂封止型半導体の全体図を示す斜視図、
図３に見られるように凹部の下面は第一のリード端子１
２より下側に打ち出し成形部１２ａのように突出し、外
部回路との接続部分となる。凹部１６の残りの部分を埋
めた樹脂が樹脂封止部１５ａの側壁上部まで延びてお
り、図において１５ｄの符号で示されている。凹部１６
の残りの部分を埋めた樹脂の一部が樹脂封止部１５ａの
側壁上部まで延びていてもよい。A perspective view showing an overall view of a resin-sealed semiconductor,
As shown in FIG. 3, the lower surface of the recess is the first lead terminal 1.
It protrudes below 2 like a stamped molding portion 12a and becomes a connection portion with an external circuit. The resin filling the remaining portion of the concave portion 16 extends to the upper portion of the side wall of the resin sealing portion 15a, and is indicated by the symbol 15d in the figure. Recess 16
Part of the resin that fills the remaining portion may be extended to the upper portion of the side wall of the resin sealing portion 15a.
【００１６】第２の実施例について説明する。図４は本
発明の第２の実施の形態に係る樹脂封止型半導体装置の
構造を説明するための斜視図である。The second embodiment will be described. FIG. 4 is a perspective view for explaining the structure of the resin-sealed semiconductor device according to the second embodiment of the present invention.
【００１７】第一の実施例と異なる所は樹脂部１５の形
状である。凹部（図２における１６に相当する）を充填
した樹脂を樹脂封止部１５aと同じ急激な角度で、上方
に柱状に作る。勿論樹脂封止部１５aの高さを限度とす
る。また、溝部分と同じ底面での柱でなくてもよいし、
柱の底面に対応する凹部１６だけが樹脂で充填されてい
てもよい。The difference from the first embodiment is the shape of the resin portion 15. The resin filling the concave portion (corresponding to 16 in FIG. 2) is formed in a column shape upward at the same steep angle as the resin sealing portion 15a. Of course, the height of the resin sealing portion 15a is limited. Also, it does not have to be a pillar on the same bottom as the groove,
Only the concave portion 16 corresponding to the bottom surface of the pillar may be filled with the resin.
【００１８】第３の実施例について説明する。図５は本
発明の第３の実施の形態に係る樹脂封止型半導体装置の
構造を説明するための斜視図である。The third embodiment will be described. FIG. 5 is a perspective view for explaining the structure of the resin-sealed semiconductor device according to the third embodiment of the present invention.
【００１９】第一、第二の実施例と異なる所は樹脂部１
５の形状である。凹部（図２における１６に相当する）
を充填した樹脂から上方に延びる樹脂、第一の実施例と
第二の実施例で示した１５dがない。この実施例では凹
部全部を充填した例を示したが、樹脂封止部１５ａ側面
延長線から外側に外れる部分の凹部の樹脂はなくともよ
い。The resin part 1 is different from the first and second embodiments.
The shape is 5. Recess (corresponding to 16 in FIG. 2)
There is no resin extending upwardly from the resin filled with, 15d shown in the first and second embodiments. In this embodiment, an example in which the entire concave portion is filled has been shown, but the resin in the concave portion at the portion that deviates outside from the side surface extension line of the resin sealing portion 15a may be omitted.
【００２０】本発明において半導体素子としてダイオー
ドチップの例を示したが、半導体素子はバイポーラトラ
ンジスタ、ＭＯＳＦＥＴ、ＩＧＢＴなどのチップであっ
てもよい。半導体素子とリード間の接続に対し半田接続
の例を示したが、導電性接着剤あるいは金線などのボン
ディング技術を利用してもよい。接続子を用いず半導体
素子とリード端子を直接つなぐことも本発明に属する。
また半導体素子は複数であってもよいし、複数の異なる
組み合わせ、例えばＩＧＢＴチップとダイオードのチッ
プの組み合わせであってもよい。従って、リード端子は
２本に限らず更に多くの本数であってもよいし、奇数で
あることもある。また、場合によっては半導体素子と接
続しないリードもあり得る。リード端子の凹部より先の
リード端子は本発明の効果に直接影響しないため、種々
の加工を施すことが可能であり、この部分で外部回路と
接続をとることも可能である。従って、本発明を表面実
装型でない構造に適用することも可能である。In the present invention, the example of the diode chip is shown as the semiconductor element, but the semiconductor element may be a chip such as a bipolar transistor, a MOSFET, or an IGBT. Although an example of solder connection is shown for the connection between the semiconductor element and the lead, a bonding technique such as a conductive adhesive or a gold wire may be used. Directly connecting the semiconductor element and the lead terminal without using a connector also belongs to the present invention.
There may be a plurality of semiconductor elements, or a plurality of different combinations, for example, a combination of an IGBT chip and a diode chip. Therefore, the number of lead terminals is not limited to two and may be a larger number or may be an odd number. In some cases, there may be leads that are not connected to the semiconductor element. Since the lead terminal beyond the recess of the lead terminal does not directly affect the effects of the present invention, various processing can be performed, and it is also possible to connect to an external circuit at this portion. Therefore, the present invention can be applied to a structure other than the surface mounting type.
【００２１】[0021]
【発明の効果】接続子の凹部を横切る面は、リード端子
に加えられた応力の影響を受けづらい。このため、この
部分まで、樹脂封止部１５ａがきているものは、樹脂部
とリード端子の界面が剥離しやすい現象は少なく、湿度
に対して強い。樹脂を凹部に充填し、この部分を上方ま
で延在させれば、密着強度もあがり樹脂の剥離現象が少
なくなる。外部雰囲気から半導体素子までの樹脂とリー
ド端子間の沿面距離も長くなり耐湿性もよくなる。この
部分の樹脂を断面から見て、樹脂本体側面まで、緩やか
に伸ばしても同様に沿面距離が長いままであり、応力が
かかった場合に、この角度により応力が分散しクラック
が入りにくく、内部に剥離現象が進行しない特徴があ
る。いずれも、リード端子、半導体素子、接続子全部を
樹脂で覆う方法に比べ、使用する樹脂量を大幅に少なく
し、対湿等の信頼度を落とすことない。リード端子の周
辺まで樹脂で覆うこともないため、使用する樹脂量を減
らし、小型軽量にできる。リード端子の凸部の接地面を
回路基板に半田付けした場合、接地面より外側には樹脂
がないため、半田の接着具合が外観検査できる。The surface of the connector that crosses the recess is unlikely to be affected by the stress applied to the lead terminal. Therefore, in the case where the resin sealing portion 15a is provided up to this portion, there is little phenomenon that the interface between the resin portion and the lead terminal is easily peeled off, and it is resistant to humidity. When the resin is filled in the concave portion and this portion is extended upward, the adhesion strength is increased and the peeling phenomenon of the resin is reduced. The creepage distance between the resin and the lead terminal from the external atmosphere to the semiconductor element is increased, and the moisture resistance is improved. When the resin of this part is seen from the cross section, the creepage distance remains the same even if extended gently to the side surface of the resin body, and when stress is applied, the stress is dispersed due to this angle and cracks are less likely to occur. Is characterized in that the peeling phenomenon does not proceed. In both cases, the amount of resin used is greatly reduced and reliability against moisture etc. is not reduced as compared with the method of covering all of the lead terminals, semiconductor elements, and connectors with resin. Since the area around the lead terminals is not covered with resin, the amount of resin used can be reduced and the size and weight can be reduced. When the ground surface of the convex portion of the lead terminal is soldered to the circuit board, there is no resin outside the ground surface, and therefore the appearance of solder adhesion can be inspected.
【図１】 本発明の第１の実施の形態に係る樹脂封止型
半導体装置の構造を説明するための平面図である。FIG. 1 is a plan view for explaining the structure of a resin-sealed semiconductor device according to a first embodiment of the present invention.
【図２】 本発明の第１の実施の形態に係る樹脂封止型
半導体装置の構造を説明するための図１のＡ−Ａ線断面
図である。FIG. 2 is a cross-sectional view taken along the line AA of FIG. 1 for explaining the structure of the resin-sealed semiconductor device according to the first embodiment of the present invention.
【図３】 本発明の第１の実施の形態に係る樹脂封止型
半導体装置の構造を説明するための斜視図である。FIG. 3 is a perspective view for explaining the structure of the resin-sealed semiconductor device according to the first embodiment of the invention.
【図４】 本発明の第２の実施の形態に係る樹脂封止型
半導体装置の構造を説明するための斜視図である。FIG. 4 is a perspective view for explaining a structure of a resin-sealed semiconductor device according to a second embodiment of the present invention.
【図５】 本発明の第３の実施の形態に係る樹脂封止型
半導体装置の構造を説明するための斜視図である。FIG. 5 is a perspective view for explaining the structure of a resin-sealed semiconductor device according to a third embodiment of the present invention.
【図６】 従来の面実装型小型ダイオードの第１の例を
説明する断面図である。FIG. 6 is a sectional view illustrating a first example of a conventional surface-mount type small diode.
【図７】 従来の面実装型小型ダイオードの第2の例を説
明する断面図である。FIG. 7 is a sectional view illustrating a second example of a conventional surface-mount type small diode.
１１ ダイオードチップ
１２ 第一のリード端子
１３ 第二のリード端子
１２ａ、１３ａ 凸部
１２ｂ、１３ｂ 接地面
１２ｃ、１３ｃ 樹脂に覆われていない凸部側面
１２ｄ リード端子側面
１４ 接続子
１５ 樹脂部
１５ａ 樹脂封止部
１５ｂ 凹部にかかる樹脂封止部の一部
１５ｃ 凹部に充填された樹脂部
１５ｄ 凹部に充填された樹脂部から樹脂封止部側壁に
延在せしめた樹脂部
１５ｅ 凹部に充填された樹脂部から垂直に延在する樹
脂部
１６ 凹部
６１ ダイオードチップ
６２ 第一のリード端子
６２ 第二のリード端子
６２ａ、６３ａ 折曲部
６２ｂ、６３ｂ 接地面
６４ 接続子
６５ 樹脂部
７１ ダイオードチップ
７２ 第一のリード端子
７２ 第二のリード端子
７２ａ、７３ａ 折曲部
７２ｂ、７３ｂ 接地面
７２ｄ、７３ｄ 切断面
７４ 接続子
７５ 樹脂部
７７ リード樹脂部界面11 diode chip 12 first lead terminal 13 second lead terminals 12a, 13a convex portions 12b, 13b ground planes 12c, 13c side surface 12d of convex portion not covered by resin lead terminal side surface 14 connector 15 resin portion 15a resin sealing Stop 15b Part of resin encapsulation part 15c over recessed part 15c Resin part filled in recessed part 15d Resin part 15e extended from resin part filled in recessed part to resin sealing part side wall Resin part filled in recessed part Resin portion 16 extending vertically from the concave portion 61 diode chip 62 first lead terminal 62 second lead terminals 62a, 63a bent portions 62b, 63b ground plane 64 connector 65 resin portion 71 diode chip 72 first lead Terminal 72 Second lead terminal 72a, 73a Bent portion 72b, 73b Grounding surface 72d, 73d Cutting surface 74 Connector 75 Resin portion 7 Lead resin portion interface
Claims (5)
れたリード端子を樹脂封止してなる樹脂封止型半導体装
置において、前記リード端子に凸部を設け、この凸部底
面を含む凸部の一部を樹脂封止部より露出するように配
置し、前記リード端子の前記凸部の他方となる凹部の一
部と前記半導体素子を含む前記樹脂封止型半導体装置の
中央部とを一体として前記樹脂封止部に樹脂封止してな
ることを特徴とする樹脂封止型半導体装置。1. A resin-sealed semiconductor device comprising a semiconductor element and a lead terminal connected to the semiconductor element, which is resin-sealed, wherein the lead terminal is provided with a convex portion, and the convex portion includes a bottom surface of the convex portion. A part of the concave portion which is the other of the convex portions of the lead terminal and the central portion of the resin-encapsulated semiconductor device including the semiconductor element are integrated so as to be exposed from the resin-encapsulated portion. The resin-sealed semiconductor device is characterized in that the resin-sealed portion is resin-sealed.
て、前記凸部の底面が前記樹脂封止部の下面と同一面と
なるように前記樹脂封止部より露出するように配置され
たことを特徴とする樹脂封止型半導体装置。2. The resin-encapsulated semiconductor device according to claim 1, wherein the bottom surface of the convex portion is arranged so as to be exposed from the resin-sealed portion so as to be flush with the lower surface of the resin-sealed portion. A resin-encapsulated semiconductor device characterized by the above.
樹脂封止型半導体装置において、前記凹部に充填された
樹脂部を有することを特徴とする樹脂封止型半導体装
置。3. The resin-encapsulated semiconductor device according to claim 1, wherein the resin-encapsulated semiconductor device has a resin portion filled in the recess.
て、前記凹部に充填された樹脂部の少なくとも一部から
前記樹脂封止部の側壁まで緩い傾斜をもって上方に延在
せしめた樹脂部を有することを特徴とする樹脂封止型半
導体装置。4. The resin-encapsulated semiconductor device according to claim 3, wherein the resin portion is extended upward with a gentle slope from at least a part of the resin portion filled in the recess to a side wall of the resin-encapsulated portion. A resin-encapsulated semiconductor device having.
て、前記凹部に充填された樹脂部の少なくとも一部から
前記樹脂封止部の上面の高さを限度としてほぼ垂直に延
在せしめた樹脂部を有することを特徴とする樹脂封止型
半導体装置。5. The resin-encapsulated semiconductor device according to claim 3, wherein the resin-encapsulated semiconductor device is made to extend substantially vertically from at least a part of the resin portion filled in the recess with a height of an upper surface of the resin-encapsulated portion as a limit. A resin-sealed semiconductor device having a resin portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001395704A JP2003197828A (en) | 2001-12-27 | 2001-12-27 | Resin-sealing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001395704A JP2003197828A (en) | 2001-12-27 | 2001-12-27 | Resin-sealing semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2003197828A true JP2003197828A (en) | 2003-07-11 |
Family
ID=27602009
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001395704A Pending JP2003197828A (en) | 2001-12-27 | 2001-12-27 | Resin-sealing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2003197828A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011066178A3 (en) * | 2009-11-25 | 2011-09-22 | Miasolé | Diode leadframe for solar module assembly |
| CN102752966A (en) * | 2011-04-22 | 2012-10-24 | 杰特普拉斯株式会社 | Gasket for printed circuit board |
| US8586857B2 (en) | 2008-11-04 | 2013-11-19 | Miasole | Combined diode, lead assembly incorporating an expansion joint |
| US9018513B2 (en) | 2008-05-15 | 2015-04-28 | Apollo Precision (Kunming) Yuanhong Limited | Solar-cell module with in-laminate diodes and external-connection mechanisms mounted to respective edge regions |
| US9059351B2 (en) | 2008-11-04 | 2015-06-16 | Apollo Precision (Fujian) Limited | Integrated diode assemblies for photovoltaic modules |
-
2001
- 2001-12-27 JP JP2001395704A patent/JP2003197828A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9018513B2 (en) | 2008-05-15 | 2015-04-28 | Apollo Precision (Kunming) Yuanhong Limited | Solar-cell module with in-laminate diodes and external-connection mechanisms mounted to respective edge regions |
| US8586857B2 (en) | 2008-11-04 | 2013-11-19 | Miasole | Combined diode, lead assembly incorporating an expansion joint |
| US9059351B2 (en) | 2008-11-04 | 2015-06-16 | Apollo Precision (Fujian) Limited | Integrated diode assemblies for photovoltaic modules |
| WO2011066178A3 (en) * | 2009-11-25 | 2011-09-22 | Miasolé | Diode leadframe for solar module assembly |
| US8203200B2 (en) | 2009-11-25 | 2012-06-19 | Miasole | Diode leadframe for solar module assembly |
| CN102752966A (en) * | 2011-04-22 | 2012-10-24 | 杰特普拉斯株式会社 | Gasket for printed circuit board |
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