JP2003168620A - Laminated capacitor - Google Patents
Laminated capacitorInfo
- Publication number
- JP2003168620A JP2003168620A JP2001368548A JP2001368548A JP2003168620A JP 2003168620 A JP2003168620 A JP 2003168620A JP 2001368548 A JP2001368548 A JP 2001368548A JP 2001368548 A JP2001368548 A JP 2001368548A JP 2003168620 A JP2003168620 A JP 2003168620A
- Authority
- JP
- Japan
- Prior art keywords
- inner conductor
- terminal
- multilayer capacitor
- protrusion
- dielectric body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 title claims abstract description 93
- 239000004020 conductor Substances 0.000 claims abstract description 174
- 238000010030 laminating Methods 0.000 claims description 6
- 239000000919 ceramic Substances 0.000 abstract description 29
- 238000010586 diagram Methods 0.000 description 8
- 239000003985 ceramic capacitor Substances 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 230000007423 decrease Effects 0.000 description 2
- 238000009499 grossing Methods 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、ESR(等価直列
抵抗)を増加させて電源の電圧振動を抑制することで種
々の用途に適用可能とした積層コンデンサに係る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer capacitor which can be applied to various purposes by increasing ESR (equivalent series resistance) and suppressing voltage oscillation of a power supply.
【0002】[0002]
【従来の技術】積層コンデンサの内の積層セラミックコ
ンデンサは、電解系コンデンサに比ベESR(等価直列
抵抗)が小さく、高周波特性に優れている特長を有して
いるが、材料技術や厚膜形成技術の進歩による誘電体の
薄層化及び多層化が近年著しく進んでいる。この結果、
アルミ電解コンデンサやタンタル電解コンデンサに匹敵
するような大きな静電容量を有した大容量の積層セラミ
ックコンデンサが、登場するようになった。2. Description of the Related Art Among multilayer capacitors, a multilayer ceramic capacitor has a characteristic that ESR (equivalent series resistance) is smaller than electrolytic capacitors and is excellent in high frequency characteristics. Due to technological advances, thinning and multi-layering of dielectrics have made remarkable progress in recent years. As a result,
Large-capacity monolithic ceramic capacitors, which have a large electrostatic capacity comparable to that of aluminum electrolytic capacitors and tantalum electrolytic capacitors, have begun to appear.
【0003】そして、近年における積層セラミックコン
デンサの一層の多層化は、静電容量を増加させるだけで
なく、ESRがさらに低下する傾向を生じさせた。つま
り、電流の高周波変動時のESRは、内部導体の電気抵
抗によるものが支配的である為、より一層の多層化によ
って積層セラミックコンデンサの内部導体の密度が増え
た場合、ESRはさらに減少することになる。Further, in recent years, the multilayer structure of multilayer ceramic capacitors not only increases the capacitance, but also tends to further lower the ESR. In other words, the ESR at the time of high-frequency fluctuation of the current is dominated by the electric resistance of the internal conductor, so if the density of the internal conductor of the multilayer ceramic capacitor increases due to further multilayering, the ESR will further decrease. become.
【0004】ここで、この従来の積層セラミックコンデ
ンサである積層コンデンサ100の外観を図13に示
し、内部構造を図14に示し、等価回路を図15に示
す。そして、これらの図を基にして以下に従来の積層コ
ンデンサ100を説明する。つまり、この積層コンデン
サ100は、大きな静電容量が得られるように図14に
示す2種類の内部導体114、116がセラミック層1
12Aを介して重なり合う構造とされている。Here, FIG. 13 shows the appearance of the multilayer capacitor 100 which is the conventional multilayer ceramic capacitor, the internal structure is shown in FIG. 14, and the equivalent circuit is shown in FIG. The conventional multilayer capacitor 100 will be described below based on these drawings. That is, in this multilayer capacitor 100, the two types of internal conductors 114 and 116 shown in FIG.
The structure is such that they overlap with each other via 12A.
【0005】そして、これらセラミック層112Aを多
数積層して形成した積層体112が有する4つの側面の
内の何れかの側面に、この内部導体114は突き出され
ており、また、内部導体114が突き出される側面と対
向する側面に内部導体116が突き出されている。さら
に、内部導体114に接続される端子電極118及び、
内部導体116に接続される端子電極120が、図13
に示す積層コンデンサ100の相互に対向する側面にそ
れぞれ設置されている。尚、図示しないものの、内部導
体114及び内部導体116は積層体112の積層方向
に沿って順番にそれぞれ多数枚配置されている。The internal conductor 114 is projected on any one of the four side surfaces of the laminated body 112 formed by laminating a large number of these ceramic layers 112A, and the internal conductor 114 is projected. The internal conductor 116 is projected to the side surface opposite to the side surface. Furthermore, a terminal electrode 118 connected to the internal conductor 114, and
The terminal electrode 120 connected to the inner conductor 116 is shown in FIG.
Are installed on the side surfaces of the multilayer capacitor 100 shown in FIG. Although not shown, a large number of internal conductors 114 and internal conductors 116 are arranged in sequence along the stacking direction of the multilayer body 112.
【0006】このような構造から、従来の多層の積層コ
ンデンサ100における等価回路は図15に示すように
なる。つまり、内部導体114自体の等価抵抗がRC1〜
RCnで表され、また、内部導体116自体の等価抵抗が
RD1〜RDnで表されており、このnはそれぞれの内部導
体の枚数を表している。そして、RC1〜RCn及びRD1〜
RDnがそれぞれ並列に配置されることから理解できるよ
うに、積層数に反比例してESRは減少していくことに
なる。With such a structure, an equivalent circuit of the conventional multilayer multilayer capacitor 100 is as shown in FIG. That is, the equivalent resistance of the inner conductor 114 itself is R C1 ~
It is represented by R Cn , and the equivalent resistance of the inner conductor 116 itself is represented by R D1 to R Dn, where n represents the number of the respective inner conductors. Then, R C1 to R Cn and R D1 to
As can be understood from R Dn arranged in parallel, the ESR decreases in inverse proportion to the number of stacked layers.
【0007】[0007]
【発明が解決しようとする課題】一方、大容量のコンデ
ンサは、主にスイッチング電源の出力平滑に用いられて
いる。但し、ESRが小さいコンデンサを使用すると、
出力リップル電圧の低減化に効果があるものの、ESR
が過小な場合には、スイッチング電源の制御系にとっ
て、出力電圧が不安定になったり、或いは異常発振を起
こしたりするという欠点があった。これは、ESRが過
小なコンデンサを用いた場合、制御回路の帰還回路にお
いて位相が遅れ易くなり、制御回路が正常に機能しなく
なるからである。On the other hand, large-capacity capacitors are mainly used for smoothing the output of switching power supplies. However, if a capacitor with a small ESR is used,
Although effective in reducing output ripple voltage, ESR
If is too small, the control system of the switching power supply has a drawback that the output voltage becomes unstable or abnormal oscillation occurs. This is because when a capacitor with an excessively small ESR is used, the phase of the feedback circuit of the control circuit is likely to be delayed and the control circuit does not function normally.
【0008】その為、従来よりスイッチング電源の出力
を平滑化する等の用途では、積層コンデンサよりもES
Rが大きい電解系コンデンサが使用されることが多かっ
た。これに対して、低コスト化及び小型化等の観点よ
り、このような用途でも積層コンデンサを採用すること
が望まれているが、一層の大容量化を今後めざすことに
よる積層コンデンサのさらなる多層化は、上記のように
ESRのより一層の減少を招いてESRが過小化する虞
を有していた。本発明は上記事実を考慮し、ESRを増
加することで種々の用途に適用可能な積層コンデンサを
提供することを目的とする。Therefore, in applications such as smoothing the output of a switching power supply, the ES is more useful than the multilayer capacitor.
Electrolytic capacitors with a large R were often used. On the other hand, from the viewpoints of cost reduction and miniaturization, it is desired to use a multilayer capacitor even in such applications, but further multilayering of the multilayer capacitor by aiming for even larger capacity in the future Had a possibility that the ESR would be further reduced and the ESR would be too small, as described above. In view of the above facts, the present invention aims to provide a multilayer capacitor which can be applied to various applications by increasing the ESR.
【0009】[0009]
【課題を解決するための手段】請求項1による積層コン
デンサは、誘電体層を積層して形成された誘電体素体
と、誘電体素体の外側に配置されて外部回路にそれぞれ
接続され得る少なくとも一対の端子電極と、誘電体素体
内に配置され且つ、誘電体層の端部に突き出されて一方
の端子電極に接続される第1端子用突出部及びこの第1
端子用突出部と異なる誘電体層の端部に突き出される第
1接続用突出部を有する第1の内部導体と、第1の内部
導体と誘電体層で隔てられつつ誘電体素体内に配置され
且つ、誘電体層の端部に突き出されて他方の端子電極に
接続される第2端子用突出部を有する第2の内部導体
と、第1の内部導体及び第2の内部導体と誘電体層で隔
てられつつ誘電体素体内に配置され且つ、誘電体層の端
部に突き出された第2接続用突出部を有する第3の内部
導体と、誘電体素体の外側に配置されて第1接続用突出
部と第2接続用突出部との間を誘電体素体の外側にて接
続させる連結電極と、を備えることを特徴とする。A multilayer capacitor according to a first aspect of the present invention can be respectively connected to an external circuit and a dielectric body formed by laminating dielectric layers and arranged outside the dielectric body. At least a pair of terminal electrodes, a first terminal protrusion that is disposed in the dielectric body and protrudes from an end of the dielectric layer and is connected to one of the terminal electrodes, and the first terminal protrusion.
A first inner conductor having a first connecting protrusion protruding from an end of a dielectric layer different from the terminal protrusion, and a first inner conductor arranged in the dielectric body while being separated from the first inner conductor by the dielectric layer. And a second inner conductor having a second terminal projecting portion that projects from the end of the dielectric layer and is connected to the other terminal electrode, the first inner conductor and the second inner conductor, and the dielectric. A third inner conductor which is arranged in the dielectric body while being separated by a layer, and has a second connecting protrusion protruding from an end of the dielectric layer; and a third inner conductor which is arranged outside the dielectric body. And a connecting electrode for connecting between the first connecting protrusion and the second connecting protrusion on the outside of the dielectric body.
【0010】請求項1に係る積層コンデンサは、誘電体
層を積層して形成された誘電体素体内に、第1の内部導
体、第2の内部導体及び第3の内部導体が、相互に誘電
体層で隔てられつつ配置された構造となっている。さら
に、外部回路にそれぞれ接続され得る少なくとも一対の
端子電極が誘電体素体の外側に配置されている。誘電体
層の端部に突き出されてこれら一対の端子電極の内の一
方の端子電極に接続される第1端子用突出部を第1の内
部導体が有しており、また、誘電体層の端部に突き出さ
れて他方の端子電極に接続される第2端子用突出部を第
2の内部導体が有している。In the multilayer capacitor according to the first aspect, the first inner conductor, the second inner conductor and the third inner conductor are mutually dielectric in a dielectric body formed by laminating dielectric layers. The structure is such that they are separated by a body layer. Further, at least a pair of terminal electrodes that can be connected to external circuits are arranged outside the dielectric body. The first inner conductor has a first terminal protrusion protruding from the end of the dielectric layer and connected to one terminal electrode of the pair of terminal electrodes. The second inner conductor has a second terminal projecting portion that projects from the end portion and is connected to the other terminal electrode.
【0011】一方、第1端子用突出部と異なる誘電体層
の端部に突き出された第1接続用突出部を第1の内部導
体が有すると共に、誘電体層の端部に突き出された第2
接続用突出部を第3の内部導体が有している。そして、
誘電体素体の外側に配置される連結電極が、これら第1
接続用突出部と第2接続用突出部との間を誘電体素体の
外側にて接続させている。On the other hand, the first inner conductor has a first connecting protrusion protruding at the end of the dielectric layer different from the first terminal protrusion, and the first connecting conductor protrudes at the end of the dielectric layer. Two
The third inner conductor has a connecting protrusion. And
The connection electrodes arranged outside the dielectric body are the first
The connection protrusion and the second connection protrusion are connected outside the dielectric body.
【0012】従って、一方の端子電極に接続される第1
の内部導体が、第1接続用突出部、連結電極及び第2接
続用突出部を介して第3の内部導体まで接続されて、第
3の内部導体が第1の内部導体と同極性として機能する
ので、積層コンデンサ内で電流の流れる流路が長くなる
のに伴って、積層コンデンサの等価直列抵抗が増加す
る。Therefore, the first terminal connected to one of the terminal electrodes
Inner conductor is connected to the third inner conductor through the first connecting protrusion, the connecting electrode, and the second connecting protrusion, and the third inner conductor functions as the same polarity as the first inner conductor. Therefore, the equivalent series resistance of the multilayer capacitor increases as the flow path of the current in the multilayer capacitor becomes longer.
【0013】この為、等価直列抵抗が増加するのに伴っ
て、スイッチング電源の出力を平滑化する等の用途であ
っても、電解系コンデンサの替わりに、多層化して一層
の大容量化が図られた積層コンデンサを用いることが可
能となった。つまり、本請求項に係る積層コンデンサ
は、ESRが増加するので、スイッチング電源を含む種
々の用途に適用可能になる。Therefore, even when the output of the switching power supply is smoothed as the equivalent series resistance increases, the electrolytic capacitor is replaced with a multilayer structure to further increase the capacity. It is now possible to use the laminated capacitor. That is, since the ESR of the multilayer capacitor according to the present claim increases, it can be applied to various applications including switching power supplies.
【0014】請求項2に係る積層コンデンサによれば、
請求項1の積層コンデンサと同様の構成の他に、誘電体
素体内に第1の内部導体を複数積層したという構成を有
している。従って、本請求項によれば、単にESRが大
きくなるだけでなく、第1の内部導体の積層数を適切に
設定するのに伴ってESRが任意の大きさに調整される
ので、ESRを所望の値に制御可能となる。According to the multilayer capacitor of the second aspect,
In addition to the same structure as the multilayer capacitor according to claim 1, it has a structure in which a plurality of first internal conductors are stacked in a dielectric body. Therefore, according to the present claim, not only the ESR is increased, but also the ESR is adjusted to an arbitrary size as the number of stacked first internal conductors is appropriately set. The value of can be controlled.
【0015】請求項3に係る積層コンデンサによれば、
請求項1及び請求項2の積層コンデンサと同様の構成の
他に、第1接続用突出部及び第2接続用突出部がそれぞ
れ複数設けられると共に、これらの間を接続する連結電
極を誘電体素体の外部に複数配置したという構成を有し
ている。従って、第1の内部導体と第3の内部導体との
間が複数の連結電極で接続される結果として、接触箇所
が増えてこれら内部導体間が確実に接続されるのに伴っ
て、接触不良等が生じ難くなる。According to the multilayer capacitor of the third aspect,
In addition to the structure similar to that of the multilayer capacitor according to claim 1 or 2, a plurality of first connecting protrusions and a plurality of second connecting protrusions are respectively provided, and a connecting electrode connecting between these is formed of a dielectric element. It has a configuration in which a plurality of them are arranged outside the body. Therefore, as a result of the plurality of connecting electrodes connecting the first inner conductor and the third inner conductor, the number of contact points increases, and the inner conductors are reliably connected, resulting in poor contact. Etc. are less likely to occur.
【0016】請求項4に係る積層コンデンサによれば、
請求項1から請求項3の積層コンデンサと同様の構成の
他に、第1の内部導体に切込部が設けられるという構成
を有している。従って、第1の内部導体に切込部が設け
られることで、電流の流路が屈曲する形で細長くなり、
請求項1の等価直列抵抗を増加する効果が、一層増大す
るようになる。According to the multilayer capacitor of the fourth aspect,
In addition to the configuration similar to that of the multilayer capacitor according to the first to third aspects, the first internal conductor has a configuration in which a cut portion is provided. Therefore, by providing the cut portion in the first inner conductor, the flow path of the current is elongated in a bent shape,
The effect of increasing the equivalent series resistance of claim 1 is further increased.
【0017】請求項5に係る積層コンデンサによれば、
請求項1から請求項4の積層コンデンサと同様の構成の
他に、第1端子用突出部を除く第1の内部導体の部分の
幅が、第1端子用突出部の幅より狭く形成されたという
構成を有している。つまり、第1端子用突出部の幅を一
定の寸法に維持すると共に、第1の内部導体の幅を狭く
形成することにより、第1端子用突出部が確実に一方の
端子電極に接続されつつ、電流が狭い第1の内部導体内
を流れるのに伴い、第1の内部導体の電気抵抗が高まっ
て等価直列抵抗を増加する効果が一層増大するようにな
る。According to the multilayer capacitor of the fifth aspect,
In addition to the structure similar to that of the multilayer capacitor according to any one of claims 1 to 4, the width of the portion of the first inner conductor excluding the first terminal protrusion is formed to be narrower than the width of the first terminal protrusion. It has the following configuration. That is, by maintaining the width of the first terminal projecting portion at a constant size and forming the width of the first inner conductor narrow, the first terminal projecting portion is reliably connected to one of the terminal electrodes. As the current flows through the narrow first inner conductor, the electric resistance of the first inner conductor increases and the effect of increasing the equivalent series resistance further increases.
【0018】[0018]
【発明の実施の形態】以下、本発明に係る積層コンデン
サの実施の形態を図面に基づき説明する。本発明の第1
の実施の形態に係る積層セラミックコンデンサである積
層コンデンサ10を図1から図4に示す。これらの図に
示すように、セラミックグリーンシートを複数枚積層し
た積層体を焼成することで得られた直方体状の焼結体で
ある誘電体素体12を主要部として、積層コンデンサ1
0が構成されている。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a multilayer capacitor according to the present invention will be described below with reference to the drawings. First of the present invention
1 to 4 show a monolithic capacitor 10 which is a monolithic ceramic capacitor according to the embodiment. As shown in these figures, the laminated capacitor 1 is mainly composed of a dielectric body 12 which is a rectangular parallelepiped sintered body obtained by firing a laminated body in which a plurality of ceramic green sheets are laminated.
0 is configured.
【0019】つまり、誘電体素体12は、焼成されたセ
ラミックグリーンシートである誘電体層が積層されて形
成されている。この誘電体素体12内の所定の高さ位置
には、面状の第1の内部導体である内部導体14が配置
されており、誘電体素体12内において誘電体層とされ
るセラミック層12Aを隔てた内部導体14の下方に
は、同じく面状の第2の内部導体である内部導体16が
配置されている。同じく誘電体素体12内においてセラ
ミック層12Aを隔てた内部導体16の下方には、同じ
く面状の第3の内部導体である内部導体18が配置され
ており、以下同様にセラミック層12Aをそれぞれ隔て
て、同様にそれぞれ形成された内部導体14、内部導体
16及び内部導体18が繰り返して順次複数配置されて
いる。That is, the dielectric body 12 is formed by laminating dielectric layers which are fired ceramic green sheets. An internal conductor 14, which is a planar first internal conductor, is arranged at a predetermined height position in the dielectric body 12, and a ceramic layer that is a dielectric layer in the dielectric body 12. Below the inner conductor 14 that is separated by 12A, an inner conductor 16 that is a planar second inner conductor is arranged. Similarly, in the dielectric element body 12, below the inner conductor 16 that separates the ceramic layer 12A, an inner conductor 18 that is also a planar third inner conductor is disposed. A plurality of the inner conductors 14, the inner conductors 16 and the inner conductors 18 which are respectively formed in the same manner are repeatedly arranged at intervals.
【0020】この為、これら内部導体14から内部導体
18までの3種類の内部導体が、誘電体素体12内にお
いてセラミック層12Aで隔てられつつ相互に対向して
配置されることになる。そして、これら内部導体14か
ら内部導体18までの中心は、各セラミック層12Aの
中心とほぼ同位置に配置されており、また、内部導体1
4から内部導体18までの縦横寸法は、対応するセラミ
ック層12Aの辺の長さよりそれぞれ小さくされてい
る。Therefore, the three types of internal conductors from the internal conductor 14 to the internal conductor 18 are arranged in the dielectric body 12 so as to be opposed to each other while being separated by the ceramic layer 12A. The centers of the inner conductors 14 to 18 are arranged at substantially the same positions as the centers of the respective ceramic layers 12A.
The vertical and horizontal dimensions from 4 to the internal conductor 18 are smaller than the lengths of the sides of the corresponding ceramic layer 12A.
【0021】さらに、図1に示すように、内部導体14
の左側部分からセラミック層12Aの左側の端部に向か
って導体が内部導体14の幅寸法と同じ幅寸法で突き出
されることで、内部導体14に第1端子用突出部14A
が形成されている。これとは別に、この内部導体14の
手前側の部分と奥側の部分から、それぞれセラミック層
12Aの手前側の端部及び奥側の端部に向かって、導体
が1箇所づつ突き出されることで、内部導体14に2つ
の第1接続用突出部15も形成されている。Further, as shown in FIG.
By protruding the conductor with the same width dimension as the width dimension of the inner conductor 14 from the left side portion toward the left side end portion of the ceramic layer 12A, the first conductor protruding portion 14A for the inner terminal 14 is formed.
Are formed. Separately from this, the conductors are projected from the front side portion and the back side portion of the internal conductor 14 toward the front side end and the back side end of the ceramic layer 12A one by one. Then, two first connecting protrusions 15 are also formed on the inner conductor 14.
【0022】また、内部導体16の右側部分からセラミ
ック層12Aの右側の端部に向かって、導体が内部導体
16の幅寸法と同じ幅寸法で突き出されることで、内部
導体16に第2端子用突出部16Aが形成されている。
一方、内部導体18の手前側部分と奥側部分から、それ
ぞれセラミック層12Aの手前側の端部及び奥側の端部
に向かって、導体が1箇所づつ突き出されることで、内
部導体18に2つの第2接続用突出部19が形成されて
いる。Further, the conductor is projected from the right side portion of the inner conductor 16 toward the right end portion of the ceramic layer 12A with the same width dimension as the width dimension of the inner conductor 16, so that the second terminal is formed on the inner conductor 16. 16A for protrusions are formed.
On the other hand, conductors are protruded one by one from the front side portion and the back side portion of the inner conductor 18 toward the front side end and the back side end of the ceramic layer 12A, respectively. Two second connecting projections 19 are formed.
【0023】さらに、図2及び図3に示すように、内部
導体14の第1端子用突出部14Aに接続される端子電
極21が、誘電体素体12の外側となる左側の側面12
Bに配置されており、また、内部導体16の第2端子用
突出部16Aに接続される端子電極22が、誘電体素体
12の外側となる右側の側面12Bに配置されている。Further, as shown in FIGS. 2 and 3, the terminal electrode 21 connected to the first terminal projecting portion 14A of the inner conductor 14 has the left side surface 12 outside the dielectric body 12.
In addition, the terminal electrode 22 connected to the second terminal protrusion 16A of the internal conductor 16 is disposed on the right side surface 12B, which is the outside of the dielectric body 12.
【0024】また、内部導体14の2つの第1接続用突
出部15及び内部導体18の2つの第2接続用突出部1
9にそれぞれ接続される図2に示す連結電極23、24
が、誘電体素体12の外側となる手前側の側面12Cと
奥側の側面12Cとにそれぞれ配置されている。つま
り、2つの連結電極23、24が、第1接続用突出部1
5と第2接続用突出部19との間を誘電体素体12の外
側にて接続させている。但し、これら連結電極23、2
4は内部導体間を誘電体素体12の外部で接続させるこ
とのみを目的としている為、外部回路へ接続されていな
い。Also, the two first connecting protrusions 15 of the inner conductor 14 and the two second connecting protrusions 1 of the inner conductor 18.
The connecting electrodes 23 and 24 shown in FIG.
Are disposed on the front side surface 12C and the back side surface 12C, which are outside the dielectric body 12. That is, the two connecting electrodes 23, 24 are connected to each other by the first connecting protrusion 1
5 and the second connecting protrusion 19 are connected outside the dielectric body 12. However, these connecting electrodes 23, 2
No. 4 is not connected to an external circuit because it is intended only to connect the internal conductors outside the dielectric body 12.
【0025】以上より、本実施の形態では、積層コンデ
ンサ10の直方体であって六面体形状とされる誘電体素
体12の4つの側面12B、12Cに端子電極21、2
2及び連結電極23、24がそれぞれ配置されることに
なる。そして、各内部導体14〜18がコンデンサの電
極となるように、左右の側面12Bに配置された端子電
極21、22の内の端子電極21が例えばCPUの電極
に接続されると共に、端子電極22が例えば接地側に接
続されている。As described above, in the present embodiment, the terminal electrodes 21, 2 are provided on the four side faces 12B, 12C of the dielectric body 12 which is a rectangular parallelepiped and has a hexahedral shape of the multilayer capacitor 10.
2 and the connecting electrodes 23 and 24 are arranged respectively. Then, the terminal electrodes 21 among the terminal electrodes 21 and 22 arranged on the left and right side surfaces 12B are connected to, for example, the electrodes of the CPU and the terminal electrodes 22 so that the internal conductors 14 to 18 serve as the electrodes of the capacitor. Is connected to the ground side, for example.
【0026】従って、図1及び図3に示すように、例え
ば内部導体14が+極になると同時にこの内部導体14
と隣合った内部導体16が−極になった場合、これに伴
って第1接続用突出部15、連結電極23、24及び第
2接続用突出部19を介して、内部導体14と接続され
る内部導体18が+極になる。Therefore, as shown in FIGS. 1 and 3, for example, the inner conductor 14 becomes a positive pole and at the same time, the inner conductor 14 becomes
When the adjacent inner conductor 16 becomes a negative pole, the inner conductor 16 is connected to the inner conductor 14 via the first connecting protrusion 15, the connecting electrodes 23 and 24, and the second connecting protrusion 19 accordingly. The inner conductor 18 which becomes a positive pole.
【0027】次に、本実施の形態に係る積層コンデンサ
10の作用を説明する。本実施の形態に係る積層コンデ
ンサ10は、セラミック層12Aを積層して形成された
誘電体素体12内に、内部導体14、内部導体16及び
内部導体18からなる3種類の内部導体が、相互にセラ
ミック層12Aで隔てられつつそれぞれ複数配置された
構造となっている。さらに、外部回路にそれぞれ接続さ
れ得る一対の端子電極21、22が誘電体素体12の外
側に配置されている。これら一対の端子電極21、22
の内の端子電極21に接続される第1端子用突出部14
Aを内部導体14が有しており、また、端子電極22に
接続される第2端子用突出部16Aを内部導体16が有
している。Next, the operation of the multilayer capacitor 10 according to this embodiment will be described. In the multilayer capacitor 10 according to the present embodiment, three types of internal conductors, which are an internal conductor 14, an internal conductor 16 and an internal conductor 18, are interconnected in a dielectric body 12 formed by laminating ceramic layers 12A. In the structure, a plurality of ceramic layers are arranged while being separated by the ceramic layers 12A. Furthermore, a pair of terminal electrodes 21 and 22 that can be connected to an external circuit are arranged outside the dielectric body 12. These pair of terminal electrodes 21, 22
First terminal protrusion 14 connected to the terminal electrode 21
The internal conductor 14 has A, and the internal conductor 16 has a second terminal protrusion 16A connected to the terminal electrode 22.
【0028】一方、第1端子用突出部14Aと異なるセ
ラミック層12Aの手前側と奥側の端部にそれぞれ突き
出された2つの第1接続用突出部15を内部導体14が
有すると共に、同じくセラミック層12Aの手前側と奥
側の端部にそれぞれ突き出された2つの第2接続用突出
部19を内部導体18が有している。そして、誘電体素
体12の外側にそれぞれ配置される2つの連結電極2
3、24が、これら第1接続用突出部15と第2接続用
突出部19との間を誘電体素体12の外側にて接続させ
ている。On the other hand, the inner conductor 14 has two first connecting projecting portions 15 projecting from the front and rear ends of the ceramic layer 12A different from the first terminal projecting portion 14A, and the ceramic is also the same. The inner conductor 18 has two second connecting projections 19 that are respectively projected at the front and rear ends of the layer 12A. Then, the two connecting electrodes 2 respectively arranged outside the dielectric body 12
3, 24 connect the first connecting protrusion 15 and the second connecting protrusion 19 outside the dielectric body 12.
【0029】従って、端子電極21に接続される内部導
体14が、第1接続用突出部15、連結電極23、24
及び第2接続用突出部19を介して内部導体18まで接
続されて、内部導体18が内部導体14と同極性として
機能するので、積層コンデンサ10内で電流の流れる流
路が長くなるのに伴って、積層コンデンサ10の等価直
列抵抗が増加する。Therefore, the inner conductor 14 connected to the terminal electrode 21 has the first connecting protrusion 15 and the connecting electrodes 23 and 24.
Also, since the internal conductor 18 is connected to the internal conductor 18 via the second connecting protrusion 19, and the internal conductor 18 functions as the same polarity as the internal conductor 14, as the flow path of the current in the multilayer capacitor 10 becomes longer, As a result, the equivalent series resistance of the multilayer capacitor 10 increases.
【0030】この為、等価直列抵抗が増加するのに伴っ
て、スイッチング電源の出力を平滑化する等の用途であ
っても、電解系コンデンサの替わりに、多層化して一層
の大容量化が図られた積層コンデンサを用いることが可
能となった。つまり、本実施の形態に係る積層コンデン
サ10は、ESRが増加するので、スイッチング電源を
含む種々の用途に適用可能になる。Therefore, even when the output of the switching power supply is smoothed as the equivalent series resistance increases, the electrolytic capacitor is replaced with a multilayer structure to further increase the capacity. It is now possible to use the laminated capacitor. That is, since the ESR of the multilayer capacitor 10 according to the present embodiment increases, it can be applied to various applications including switching power supplies.
【0031】他方、本実施の形態によれば、第1接続用
突出部15及び第2接続用突出部19がそれぞれ複数設
けられると共に、これらの間を接続する連結電極23、
24が誘電体素体12の外部に複数である例えば2つ配
置されているので、内部導体14と内部導体18との間
が、これら2つの連結電極23、24で接続されること
になる。この結果として、接触箇所が増えてこれら内部
導体間が確実に接続されるのに伴って、接触不良等が生
じ難くなる。On the other hand, according to the present embodiment, the plurality of first connecting protrusions 15 and the plurality of second connecting protrusions 19 are respectively provided, and the connecting electrodes 23 connecting between them are provided.
Since a plurality of, for example, two 24 are arranged outside the dielectric body 12, the inner conductor 14 and the inner conductor 18 are connected by these two connecting electrodes 23, 24. As a result, as the number of contact points increases and these internal conductors are reliably connected, contact failure or the like becomes less likely to occur.
【0032】さらに、本実施の形態によれば、誘電体素
体12内に内部導体14を複数積層しているので、単に
ESRが大きくなるだけでなく、内部導体14の積層数
を適切に設定することでESRを任意の大きさに調整で
きるので、ESRを所望の値に制御可能となる。Further, according to the present embodiment, since the plurality of inner conductors 14 are laminated in the dielectric body 12, not only the ESR is increased, but also the number of laminated inner conductors 14 is appropriately set. By doing so, the ESR can be adjusted to an arbitrary size, so that the ESR can be controlled to a desired value.
【0033】具体的には、本実施の形態に係る積層コン
デンサ10の等価回路は図4に示すようになる。この回
路図において、Cはコンデンサであり、またR11〜R1n
は複数の内部導体14がそれぞれ有する等価抵抗であ
り、R21〜R2nは複数の内部導体16がそれぞれ有する
等価抵抗であり、R31〜R3nは複数の内部導体18がそ
れぞれ有する等価抵抗であり、nは内部導体14、1
6、18それぞれの積層数である。尚、図3において、
各内部導体はそれぞれ2枚づつとされているが、実際に
はそれぞれ多数積層されている。Specifically, the equivalent circuit of the multilayer capacitor 10 according to this embodiment is as shown in FIG. In this circuit diagram, C is a capacitor, and R 11 to R 1n
Is an equivalent resistance of each of the plurality of inner conductors 14, R 21 to R 2n is an equivalent resistance of each of the plurality of inner conductors 16, and R 31 to R 3n is an equivalent resistance of each of the plurality of inner conductors 18. Yes, n is the inner conductor 14, 1
The numbers are 6 and 18 respectively. In addition, in FIG.
Each of the internal conductors has two sheets, but in reality, a large number of layers are laminated.
【0034】以上より、内部導体14を任意の数だけ加
え、他の内部導体16、18をその分減らすことで、全
体の積層数を変えずにESRを調整できることが、この
回路図から理解される。そして、この際の内部導体14
の積層数量によるESRの変化量を図5に示す。つま
り、この図より内部導体14の積層数量の変化により、
ESRが変化することが理解できる。From the above circuit diagram, it is understood from this circuit diagram that the ESR can be adjusted without changing the total number of laminated layers by adding an arbitrary number of the inner conductors 14 and reducing the other inner conductors 16 and 18. It Then, the inner conductor 14 at this time
FIG. 5 shows the amount of change in ESR depending on the number of stacked layers. In other words, from this figure, due to the change in the number of laminated inner conductors 14,
It can be understood that the ESR changes.
【0035】次に、本発明の第2の実施の形態に係る積
層コンデンサを図6に基づき説明する。尚、第1の実施
の形態で説明した部材と同一の部材には同一の符号を付
して、重複した説明を省略する。図6に示すように本実
施の形態では、内部導体14の奥側から内側にそれぞれ
延びる一対の1切込部31と、これら一対の1切込部間
に形成されて、内部導体14の手前側から内側に延びる
2切込部32とが、内部導体14に切り込むように設け
られた構造となっている。従って、このように内部導体
14に切込部31、32が複数設けられることで、電流
の流路がジグザグに屈曲する形で細長くなり、等価直列
抵抗を増加する効果が一層増大するようになる。Next, a multilayer capacitor according to a second embodiment of the present invention will be described with reference to FIG. The same members as those described in the first embodiment are designated by the same reference numerals, and the duplicate description will be omitted. As shown in FIG. 6, in the present embodiment, a pair of one cut portions 31 extending inward from the inner side of the inner conductor 14 and a pair of one cut portions formed between the pair of one cut portions are provided in front of the inner conductor 14. The two cutout portions 32 extending inward from the side are provided so as to cut into the internal conductor 14. Therefore, by providing the plurality of cut portions 31 and 32 in the inner conductor 14 as described above, the flow path of the current is elongated in a zigzag shape, and the effect of increasing the equivalent series resistance is further increased. .
【0036】次に、本発明の第3の実施の形態に係る積
層コンデンサを図7に基づき説明する。尚、第1の実施
の形態で説明した部材と同一の部材には同一の符号を付
して、重複した説明を省略する。図7に示すように本実
施の形態では、第1端子用突出部14Aの幅寸法より第
1端子用突出部14Aを除く内部導体14の部分の幅寸
法が狭く形成された構造となっている。Next, a multilayer capacitor according to a third embodiment of the present invention will be described with reference to FIG. The same members as those described in the first embodiment are designated by the same reference numerals, and the duplicate description will be omitted. As shown in FIG. 7, the present embodiment has a structure in which the width dimension of the portion of the internal conductor 14 excluding the first terminal protrusion 14A is narrower than the width dimension of the first terminal protrusion 14A. .
【0037】つまり、第1端子用突出部14Aの幅寸法
を一定の大きさに維持すると共に、内部導体14の幅寸
法を狭く形成することにより、第1端子用突出部14A
が確実に端子電極21に接続されつつ、電流が狭い内部
導体14内を流れるのに伴い、内部導体14の電気抵抗
が高まって等価直列抵抗を増加する効果が一層増大する
ようになる。That is, the width dimension of the first terminal protrusion 14A is maintained at a constant size, and the width dimension of the inner conductor 14 is narrowed, whereby the first terminal protrusion 14A is formed.
As the current flows through the narrow inner conductor 14 while being reliably connected to the terminal electrode 21, the electric resistance of the inner conductor 14 increases, and the effect of increasing the equivalent series resistance further increases.
【0038】次に、本発明の第4の実施の形態に係る積
層コンデンサを図8及び図9に基づき説明する。尚、第
1の実施の形態で説明した部材と同一の部材には同一の
符号を付して、重複した説明を省略する。図8及び図9
に示すように本実施の形態に係る積層コンデンサ40の
第1の内部導体である内部導体44は、セラミック層1
2Aの手前側及び奥側の端部にそれぞれ突き出される第
1端子用突出部44Aを2つづつの計4つ有している。
また、この内部導体44は、この第1端子用突出部44
Aと異なるセラミック層12Aの端部である左右の端部
にそれぞれ突き出される一対の第1接続用突出部45を
も有している。Next, a multilayer capacitor according to a fourth embodiment of the present invention will be described with reference to FIGS. 8 and 9. The same members as those described in the first embodiment are designated by the same reference numerals, and the duplicate description will be omitted. 8 and 9
As shown in FIG. 5, the inner conductor 44 that is the first inner conductor of the multilayer capacitor 40 according to the present embodiment is the ceramic layer 1
It has a total of four first terminal projecting portions 44A, two projecting portions 44A projecting from the front and rear ends of 2A, respectively.
In addition, the inner conductor 44 has the first terminal protrusion 44.
It also has a pair of first connecting protrusions 45 protruding from the left and right ends which are the ends of the ceramic layer 12A different from A.
【0039】第2の内部導体である内部導体46は、セ
ラミック層12Aの手前側及び奥側の端部にそれぞれ突
き出される第2端子用突出部46Aを2つづつの計4つ
有している。但し、これら第2端子用突出部46Aは第
1端子用突出部44Aと重ならない位置となるように、
第1端子用突出部44Aに対してずらされて配置されて
いる。さらに、第3の内部導体である内部導体48は、
セラミック層12Aの左右の端部にそれぞれ突き出され
た第2接続用突出部49を有している。そして、図9に
示すように誘電体素体12の外側となる左右端に配置さ
れた一対の連結電極53、54が、第1接続用突出部4
5と第2接続用突出部49との間を誘電体素体12の外
側にて接続させている。The inner conductor 46, which is the second inner conductor, has four second protrusions 46A for the second terminal, each of which protrudes from the front and rear ends of the ceramic layer 12A. . However, these second terminal projecting portions 46A are arranged so as not to overlap the first terminal projecting portions 44A,
The first terminal protruding portion 44A is displaced from the first terminal protruding portion 44A. Further, the inner conductor 48 that is the third inner conductor is
The ceramic layer 12A has second connecting protrusions 49 protruding from the left and right ends thereof, respectively. Then, as shown in FIG. 9, the pair of connecting electrodes 53, 54 arranged at the left and right ends on the outer side of the dielectric body 12 are provided with the first connecting protrusions 4.
5 and the second connecting protrusion 49 are connected to each other outside the dielectric body 12.
【0040】一方、図9に示すように、誘電体素体12
の外側には、4つづつの計8個の端子電極51、52が
配置されて外部回路にそれぞれ接続され得るようになっ
ている。つまり、本実施の形態の積層コンデンサ40は
多端子型積層コンデンサとされ、隣り合う端子電極5
1、52同士が相互に逆の極性で使用される形となって
いる。具体的には、第1端子用突出部44Aに接続され
る端子電極51の組みと、第2端子用突出部46Aに接
続される端子電極52の組みとに分けられて、外部回路
にそれぞれ接続され得ることになる。On the other hand, as shown in FIG.
A total of eight terminal electrodes 51, 52, each of which is four, are arranged on the outer side of, so that they can be connected to an external circuit. That is, the multilayer capacitor 40 of the present embodiment is a multi-terminal type multilayer capacitor, and the adjacent terminal electrodes 5 are
1, 52 are used in the opposite polarities. Specifically, it is divided into a set of terminal electrodes 51 connected to the first terminal projecting portion 44A and a set of terminal electrodes 52 connected to the second terminal projecting portion 46A, each of which is connected to an external circuit. Can be done.
【0041】以上より本実施の形態も、端子電極51に
接続される内部導体44が、第1接続用突出部45、連
結電極53、54及び第2接続用突出部49を介して内
部導体48まで接続されて、内部導体48が内部導体4
4と同極性として機能するので、積層コンデンサ40内
で電流の流れる流路が長くなるのに伴って、積層コンデ
ンサ40の等価直列抵抗が増加することになる。この結
果、第1の実施の形態と同様に、本実施の形態に係る積
層コンデンサ40は、スイッチング電源を含む種々の用
途に適用可能になる。As described above, also in the present embodiment, the internal conductor 44 connected to the terminal electrode 51 is connected to the internal conductor 48 via the first connecting protrusion 45, the connecting electrodes 53 and 54, and the second connecting protrusion 49. The inner conductor 48 is connected to the inner conductor 4
4, the equivalent series resistance of the multilayer capacitor 40 increases as the flow path of the current in the multilayer capacitor 40 becomes longer. As a result, similarly to the first embodiment, the multilayer capacitor 40 according to the present embodiment can be applied to various uses including a switching power supply.
【0042】次に、本発明の第5の実施の形態に係る積
層コンデンサを図10に基づき説明する。尚、第1の実
施の形態で説明した部材と同一の部材には同一の符号を
付して、重複した説明を省略する。図10に示すように
本実施の形態では、第1の実施の形態と同様に内部導体
14、内部導体16及び内部導体18を有している。但
し、本実施の形態では、内部導体14に形成される第1
接続用突出部15が、セラミック層12Aの奥側の端部
に向かって突き出される一つのみとされ、また、内部導
体18に形成される第2接続用突出部19が、これに合
わせてセラミック層12Aの奥側の端部に向かって突き
出される一つのみとされている。Next, a multilayer capacitor according to a fifth embodiment of the present invention will be described with reference to FIG. The same members as those described in the first embodiment are designated by the same reference numerals, and the duplicate description will be omitted. As shown in FIG. 10, in the present embodiment, the inner conductor 14, the inner conductor 16 and the inner conductor 18 are provided as in the first embodiment. However, in the present embodiment, the first conductor formed on the inner conductor 14
The number of the connecting protrusion 15 is only one protruding toward the rear end of the ceramic layer 12A, and the second connecting protrusion 19 formed on the inner conductor 18 corresponds to this. Only one is projected toward the rear end of the ceramic layer 12A.
【0043】これに対して内部導体16には、セラミッ
ク層12Aの手前側の端部に向かって突き出される一つ
の第1接続用突出部17が形成されている。そして、誘
電体素体12内においてセラミック層12Aを隔てた内
部導体18の下方には、同じく面状の第3の内部導体で
ある内部導体60が配置されており、この内部導体60
には、セラミック層12Aの手前側の端部に向かって突
き出される一つの第2接続用突出部61が形成されてい
る。On the other hand, the inner conductor 16 is provided with one first connecting protrusion 17 protruding toward the front end of the ceramic layer 12A. An internal conductor 60, which is also a planar third internal conductor, is arranged below the internal conductor 18 that separates the ceramic layer 12A in the dielectric element body 12.
One second connecting protrusion 61 is formed on the side of the ceramic layer 12A so as to protrude toward the front end of the ceramic layer 12A.
【0044】さらに、図2に示す第1の実施の形態と同
様に、図示しないものの本実施の形態でも、端子電極2
1、22が誘電体素体12の左右の側面12Bに配置さ
れていると共に、連結電極23、24が、誘電体素体1
2の手前側の側面12Cと奥側の側面12Cとにそれぞ
れ配置されており、この連結電極23が第1接続用突出
部17と第2接続用突出部61との間を誘電体素体12
の外側にて接続させている。Further, similarly to the first embodiment shown in FIG. 2, the terminal electrode 2 is also provided in the present embodiment (not shown).
1, 22 are arranged on the left and right side surfaces 12B of the dielectric body 12, and the connecting electrodes 23, 24 are arranged on the dielectric body 1.
2 are arranged on the front side surface 12C and the rear side surface 12C, respectively, and the connecting electrode 23 is provided between the first connection projecting portion 17 and the second connection projecting portion 61.
Is connected outside.
【0045】つまり、本実施の形態では、内部導体16
が第1の内部導体を兼ねることになると共に、内部導体
60が第3の内部導体とされることになるので、本実施
の形態でも第1の実施の形態と同様の効果を奏するよう
になる。That is, in this embodiment, the inner conductor 16
Also serves as the first inner conductor, and the inner conductor 60 serves as the third inner conductor, so that the same effects as those of the first embodiment can be obtained in this embodiment. .
【0046】一方、インピーダンスアナライザを用い
て、実施の形態に係る積層コンデンサと従来例のコンデ
ンサとの間でのインピーダンスを比較する試験を行った
結果を下記に示す。尚、ここで比較される従来例のコン
デンサとして、図13に示す積層コンデンサ100を用
いた。これに対して、実施の形態に係る積層コンデンサ
として、第1の実施の形態のものを例えば用いた。On the other hand, the result of a test for comparing the impedance between the multilayer capacitor according to the embodiment and the capacitor of the conventional example using an impedance analyzer is shown below. As the conventional capacitor to be compared here, the multilayer capacitor 100 shown in FIG. 13 was used. On the other hand, as the multilayer capacitor according to the embodiment, for example, the one according to the first embodiment is used.
【0047】測定結果を表す図11に示すように、従来
例のコンデンサの特性を表す特性曲線Aでは、周波数が
1000KHzを越えた付近において、インピーダンス
が極端に低下して共振が生じる箇所を有しているが、実
施の形態に係る積層コンデンサ10の特性を表す特性曲
線Bでは、このような箇所が無く共振が生じないように
なる。As shown in FIG. 11 showing the measurement result, the characteristic curve A showing the characteristic of the conventional capacitor has a portion where the impedance is extremely lowered and resonance occurs in the vicinity of the frequency exceeding 1000 KHz. However, in the characteristic curve B representing the characteristics of the multilayer capacitor 10 according to the embodiment, there is no such portion, and resonance does not occur.
【0048】また、これら試料の等価直列抵抗値を測定
した結果、従来例のコンデンサの等価直列抵抗値は3.
0mΩであった。これに対して、実施の形態に係る積層
コンデンサ10の等価直列抵抗値は56.5mΩであっ
た。つまり、実施の形態に係る積層コンデンサ10のE
SRが、従来例のコンデンサと比較して明らかに増加し
ていることが確認された。Further, as a result of measuring the equivalent series resistance value of these samples, the equivalent series resistance value of the conventional capacitor is 3.
It was 0 mΩ. On the other hand, the equivalent series resistance value of the multilayer capacitor 10 according to the embodiment was 56.5 mΩ. That is, E of the multilayer capacitor 10 according to the embodiment
It was confirmed that SR was clearly increased as compared with the conventional capacitor.
【0049】尚、このESRの値は図12に示す自己共
振周波数f0 における値である。ここでこの図におい
て、ESLは等価直列インダクタンスであり、Cは静電
容量である。また、試験に用いた各コンデンサは321
6タイプで、静電容量値が共に10μFとされるもので
ある。ここで3216タイプとは、縦が3.2mmで横
が1.6mmの大きさのものを言う。The ESR value is the value at the self-resonant frequency f 0 shown in FIG. Here, in this figure, ESL is the equivalent series inductance and C is the capacitance. Also, each capacitor used in the test is 321
There are 6 types, and the electrostatic capacitance values are both 10 μF. Here, the 3216 type refers to a size of 3.2 mm in length and 1.6 mm in width.
【0050】他方、内部導体の枚数は、上記実施の形態
に係る積層コンデンサ10の枚数に限定されず、さらに
多くの枚数としても良く、また積層方向における内部導
体の順序を任意に変更しても良い。さらに、内部導体の
構造も上記実施の形態で説明したものに限定されず、例
えば、端子電極の数をさらに増やしたり、切込部の数を
4つ以上の数としても良い。On the other hand, the number of the internal conductors is not limited to the number of the multilayer capacitors 10 according to the above-mentioned embodiment, and may be larger, and the order of the internal conductors in the stacking direction may be arbitrarily changed. good. Further, the structure of the internal conductor is not limited to that described in the above embodiment, and the number of terminal electrodes may be further increased or the number of cuts may be four or more, for example.
【0051】[0051]
【発明の効果】本発明によれば、ESRを増加すること
で種々の用途に適用可能な積層コンデンサを提供するこ
とが可能となる。According to the present invention, it is possible to provide a multilayer capacitor applicable to various uses by increasing the ESR.
【図1】本発明の第1の実施の形態に係る積層コンデン
サを示す分解斜視図である。FIG. 1 is an exploded perspective view showing a multilayer capacitor according to a first embodiment of the present invention.
【図2】本発明の第1の実施の形態に係る積層コンデン
サを示す斜視図である。FIG. 2 is a perspective view showing a multilayer capacitor according to the first embodiment of the present invention.
【図3】本発明の第1の実施の形態に係る積層コンデン
サを示す断面図であって、図2の3−3矢視線断面に対
応する図である。3 is a cross-sectional view showing the multilayer capacitor according to the first embodiment of the present invention, which is a view corresponding to a cross section taken along the line 3-3 of FIG.
【図4】本発明の第1の実施の形態に係る積層コンデン
サの等価回路を示す回路図である。FIG. 4 is a circuit diagram showing an equivalent circuit of the multilayer capacitor according to the first embodiment of the invention.
【図5】第1の内部導体の積層数量によるESRの変化
量を表すグラフを示す図である。FIG. 5 is a diagram showing a graph showing the amount of change in ESR according to the number of stacked first internal conductors.
【図6】本発明の第2の実施の形態に係る積層コンデン
サを示す分解斜視図である。FIG. 6 is an exploded perspective view showing a multilayer capacitor according to a second embodiment of the present invention.
【図7】本発明の第3の実施の形態に係る積層コンデン
サを示す分解斜視図である。FIG. 7 is an exploded perspective view showing a multilayer capacitor according to a third embodiment of the present invention.
【図8】本発明の第4の実施の形態に係る積層コンデン
サを示す分解斜視図である。FIG. 8 is an exploded perspective view showing a multilayer capacitor according to a fourth embodiment of the present invention.
【図9】本発明の第4の実施の形態に係る積層コンデン
サを示す斜視図である。FIG. 9 is a perspective view showing a multilayer capacitor according to a fourth embodiment of the present invention.
【図10】本発明の第5の実施の形態に係る積層コンデ
ンサを示す分解斜視図である。FIG. 10 is an exploded perspective view showing a multilayer capacitor according to a fifth embodiment of the present invention.
【図11】従来例と実施の形態のインピーダンス特性を
比較するグラフを示す図である。FIG. 11 is a diagram showing a graph comparing the impedance characteristics of the conventional example and the embodiment.
【図12】コンデンサのインピーダンス特性を表すグラ
フを示す図である。FIG. 12 is a diagram showing a graph showing impedance characteristics of a capacitor.
【図13】従来の積層コンデンサを示す斜視図である。FIG. 13 is a perspective view showing a conventional multilayer capacitor.
【図14】従来の積層コンデンサを示す分解斜視図であ
る。FIG. 14 is an exploded perspective view showing a conventional multilayer capacitor.
【図15】従来の積層コンデンサの等価回路を示す回路
図である。FIG. 15 is a circuit diagram showing an equivalent circuit of a conventional multilayer capacitor.
10 積層コンデンサ 12 誘電体素体 12A セラミック層 14 内部導体(第1の内部導体) 16 内部導体(第2の内部導体) 18 内部導体(第3の内部導体) 21、22 端子電極 23、24 連結電極 40 積層コンデンサ 44 内部導体(第1の内部導体) 46 内部導体(第2の内部導体) 48 内部導体(第3の内部導体) 51、52 端子電極 53、54 連結電極 10 Multilayer capacitors 12 Dielectric body 12A ceramic layer 14 Inner conductor (first inner conductor) 16 inner conductor (second inner conductor) 18 inner conductor (third inner conductor) 21, 22 terminal electrodes 23, 24 connecting electrodes 40 Multilayer Capacitor 44 inner conductor (first inner conductor) 46 inner conductor (second inner conductor) 48 inner conductor (third inner conductor) 51, 52 terminal electrodes 53, 54 connection electrode
Claims (5)
体と、 誘電体素体の外側に配置されて外部回路にそれぞれ接続
され得る少なくとも一対の端子電極と、 誘電体素体内に配置され且つ、誘電体層の端部に突き出
されて一方の端子電極に接続される第1端子用突出部及
びこの第1端子用突出部と異なる誘電体層の端部に突き
出される第1接続用突出部を有する第1の内部導体と、 第1の内部導体と誘電体層で隔てられつつ誘電体素体内
に配置され且つ、誘電体層の端部に突き出されて他方の
端子電極に接続される第2端子用突出部を有する第2の
内部導体と、 第1の内部導体及び第2の内部導体と誘電体層で隔てら
れつつ誘電体素体内に配置され且つ、誘電体層の端部に
突き出された第2接続用突出部を有する第3の内部導体
と、 誘電体素体の外側に配置されて第1接続用突出部と第2
接続用突出部との間を誘電体素体の外側にて接続させる
連結電極と、 を備えることを特徴とする積層コンデンサ。1. A dielectric body formed by laminating dielectric layers, at least a pair of terminal electrodes arranged outside the dielectric body and respectively connectable to an external circuit, and a dielectric body. A first terminal protrusion that is arranged and protrudes from an end of the dielectric layer and is connected to one of the terminal electrodes, and a first protrusion that protrudes from an end of the dielectric layer different from the first terminal protrusion. A first inner conductor having a connecting protrusion, and a first inner conductor arranged in the dielectric body while being separated from the first inner conductor by a dielectric layer, and protruding to an end of the dielectric layer to the other terminal electrode. A second inner conductor having a second terminal projecting portion to be connected, and a first inner conductor and a second inner conductor are arranged in the dielectric body while being separated from each other by the dielectric layer, and A third inner conductor having a second connecting protrusion protruding at an end, and a dielectric The first connection protruding portion is disposed outside the body and the second
A multi-layer capacitor, comprising: a connecting electrode for connecting the connecting projection to the outside of the dielectric body.
層したことを特徴とする請求項1記載の積層コンデン
サ。2. The multilayer capacitor according to claim 1, wherein a plurality of first internal conductors are laminated in a dielectric body.
がそれぞれ複数設けられると共に、これらの間を接続す
る連結電極を誘電体素体の外側に複数配置したことを特
徴とする請求項1或いは請求項2に記載の積層コンデン
サ。3. A plurality of first connecting protrusions and a plurality of second connecting protrusions are provided respectively, and a plurality of connecting electrodes for connecting these are arranged outside the dielectric body. The multilayer capacitor according to claim 1 or 2.
とを特徴とする請求項1から請求項3の何れかに記載の
積層コンデンサ。4. The multilayer capacitor according to claim 1, wherein a cut portion is provided in the first inner conductor.
の部分の幅が、第1端子用突出部の幅より狭く形成され
たことを特徴とする請求項1から請求項4の何れかに記
載の積層コンデンサ。5. The width of a portion of the first inner conductor excluding the protrusion for the first terminal is formed to be narrower than the width of the protrusion for the first terminal. The multilayer capacitor according to any one of the above.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001368548A JP3727575B2 (en) | 2001-12-03 | 2001-12-03 | Multilayer capacitor |
| TW091134943A TWI266342B (en) | 2001-12-03 | 2002-12-02 | Multilayer capacitor |
| US10/307,298 US6765781B2 (en) | 2001-12-03 | 2002-12-02 | Multilayer capacitor |
| CNB021399638A CN100431067C (en) | 2001-12-03 | 2002-12-03 | Multilayer Capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001368548A JP3727575B2 (en) | 2001-12-03 | 2001-12-03 | Multilayer capacitor |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005254745A Division JP4011080B2 (en) | 2005-09-02 | 2005-09-02 | Multilayer capacitor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003168620A true JP2003168620A (en) | 2003-06-13 |
| JP3727575B2 JP3727575B2 (en) | 2005-12-14 |
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ID=19178124
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001368548A Expired - Lifetime JP3727575B2 (en) | 2001-12-03 | 2001-12-03 | Multilayer capacitor |
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| Country | Link |
|---|---|
| JP (1) | JP3727575B2 (en) |
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|---|---|---|---|---|
| JP2007165801A (en) * | 2005-12-16 | 2007-06-28 | Rohm Co Ltd | Multilayer capacitor for filter and its manufacturing method |
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| JP2008199047A (en) * | 2008-03-24 | 2008-08-28 | Tdk Corp | Mounting structure of multilayer capacitor |
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| JP2009146947A (en) * | 2007-12-11 | 2009-07-02 | Tdk Corp | Multilayer capacitor array |
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| JP2007165801A (en) * | 2005-12-16 | 2007-06-28 | Rohm Co Ltd | Multilayer capacitor for filter and its manufacturing method |
| JP2009088031A (en) * | 2007-09-27 | 2009-04-23 | Mitsubishi Materials Corp | Chip-type thermistor and circuit board having the same |
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| JP2008199047A (en) * | 2008-03-24 | 2008-08-28 | Tdk Corp | Mounting structure of multilayer capacitor |
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