JP2003037280A - Integrated thin film photoelectric conversion module - Google Patents

Abstract

[PROBLEMS] To provide an integrated thin film photoelectric conversion module that has high reliability and can easily realize high output characteristics. An integrated thin film photoelectric conversion module (1) includes a multilayer film including a first electrode layer (3), a semiconductor layer (4), and a second electrode layer (5) stacked in order on one main surface of a substrate (2). The film includes a cell region including a plurality of photoelectric conversion cells 10 connected in series, a bypass diode region 18, and a connection region 19. It is characterized in that it is used to connect the bypass diode 18 in reverse parallel to at least one of the plurality of cells 10 connected in series after the reverse bias processing without being connected to the cell 10.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated thin film photoelectric conversion module, and more particularly to an integrated thin film photoelectric conversion module including a bypass diode.

[0002]

2. Description of the Related Art Generally, an integrated type thin film photoelectric conversion module in which a plurality of thin film photoelectric conversion cells are connected in series has a structure in which a plurality of elongated rectangular cells are integrated in the short axis direction (for example, (See FIG. 4A and the description related thereto, which will be shown later). In such a module, if a shadow is formed on the light-receiving surface of a cell due to the adhesion of leaves or bird droppings, the photovoltaic power of the cell is reduced, and the output of the entire module is significantly reduced. This is because the cell in which the photovoltaic power is reduced behaves as a diode connected in series in the direction opposite to the direction of the generated current and exhibits an extremely large resistance value.

In order to reduce such a problem, it is known, for example, to divide a plurality of cells connected in series in parallel to form a plurality of series arrays and to connect the plurality of series arrays in parallel. No. 57-53986. In this way, even if the photovoltaic power of any cell becomes zero, the current in the series array that is connected in parallel to that cell is not disturbed, so that the output of the entire module is greatly reduced. Can be prevented.

However, if a voltage higher than the reverse withstand voltage is applied to the cell that behaves as a diode, a local dielectric breakdown occurs in a portion with weak withstand voltage. Since current does not flow uniformly in the cell where the dielectric breakdown locally occurs, local heat generation called “hot spot phenomenon” occurs.

When the adhesion of the thin film to the substrate is weak, such heat generation deteriorates the appearance of the dielectric breakdown portion, but when the current flowing through the cell is small, it does not cause a serious problem in module reliability. However, since the output current is generally large in a large-area module, a large current locally flows in the cell where the dielectric breakdown occurs. As a result, the metal electrode layer may melt and eventually destroy the entire cell.

In order to avoid such a problem, it is known to connect a bypass diode in anti-parallel to at least one of a plurality of photoelectric conversion cells connected in series. That is, even when a certain photoelectric conversion cell is shaded, the output current generated in another cell connected in series with the cell can be flowed by the action of the bypass diode connected in antiparallel to the cell. That is, since the rising voltage of the diode formed of the thin film is about 1/10 of the reverse withstand voltage, the decrease in the output of the photoelectric conversion module can be suppressed to a very small level.

US Pat. No. 6,013,870 discloses forming a bypass diode with a layer structure substantially the same as a thin film photoelectric conversion cell formed on one main surface of a substrate. In this case, an uneven edge boundary is formed in the surface electrode layer between the adjacent photoelectric conversion cell and the bypass diode, and the convex edge part of the surface electrode layer of the cell is overlapped with the back electrode layer of the diode and A short circuit is made to overlap and short the convex edge of the front electrode layer of the diode with the back electrode layer of the cell. By doing so, the diode can be connected in anti-parallel to the cell.

However, in this method, since the photoelectric conversion cell and the diode are close to each other, there is a possibility that the cell may be damaged due to the formation of the diode. In addition, it is necessary to form a fine uneven edge boundary pattern on the electrode layer,
There is a problem that patterning takes time and is not suitable for actual production. Further, as described below, there is a serious problem that "reverse biasing" of the cell cannot be performed.

Generally, in a large-area integrated type thin film photoelectric conversion module, due to the deposition state of a thin film and laser patterning for integration, a semiconductor layer is sandwiched between a first electrode layer and a second electrode layer. It is known that local short-circuit defects may occur and the output characteristics of the module may not be sufficiently obtained. Therefore, for example, in Japanese Unexamined Patent Application Publication No. 10-4202, a voltage in the direction opposite to the electromotive force of the cells is applied to the second electrode layers of two adjacent cells connected in series to burn off the local short-circuit defect portion. It is disclosed to remove. This is commonly referred to as "reverse biasing" of the cell.

[0010]

Problems to be Solved by the Invention US Pat. No. 601,387
As in No. 0, if a structure in which bypass diodes are connected in antiparallel for each of a plurality of thin film photoelectric conversion cells connected in series is integrally formed on the substrate, a reverse voltage will be applied to the cells during reverse bias processing. Then, the forward voltage is applied to the bypass diode. That is, when the cell is reverse-biased, a forward current flows through the bypass diode, which causes a problem that a sufficient voltage is not applied to remove the short-circuit defective portion of the cell. In this case, if a large voltage is forcibly applied, an excessive forward current will flow in the bypass diode and the diode will be destroyed.

By the way, the integrated type thin film photoelectric conversion module generally has a structure in which a plurality of thin film photoelectric conversion cells are connected in series on a glass substrate. Each thin film photoelectric conversion cell is generally formed by sequentially forming a front transparent electrode layer, a thin film photoelectric conversion unit, and a second electrode layer on a glass substrate and then performing patterning for integration. Has been formed.

In such an integrated type thin film photoelectric conversion module, it is still required to improve the photoelectric conversion efficiency. The tandem structure is a structure in which a plurality of thin film photoelectric conversion units having different absorption wavelength regions are stacked between a front transparent electrode layer and a back electrode layer, and is known as a structure capable of photoelectrically converting incident light more efficiently. Has been.

In the hybrid type structure, which is one type of tandem type structure, the crystallinity of the photoelectric conversion layers included in the plurality of stacked photoelectric conversion units is different for each unit. For example, an amorphous silicon layer having a wide bandgap is used as the photoelectric conversion layer included in the thin film photoelectric conversion unit on the light incident side (or the front side), and the photoelectric conversion layer included in the thin film photoelectric conversion unit on the back side is used. A polysilicon layer with a narrow bandgap is used.

In materials such as silicon, crystalline layers deposited by plasma CVD (chemical vapor deposition), for example, contain much higher residual stress than amorphous layers. The residual stress of the film and the adhesive force with respect to the base have a competing relationship. That is, the apparent measurable adhesive force of the thin film to the underlayer is the true adhesive force at the interface minus the effect of the residual stress of the film. Therefore, in the integrated hybrid thin-film photoelectric conversion module, there is a problem that the effective adhesion of the semiconductor film to the base is weakened and the deterioration of the appearance of the dielectric breakdown portion caused by the hot spot phenomenon becomes remarkable.

In view of the situation in the prior art as described above, the present invention has an object to provide an integrated type thin film photoelectric conversion module capable of realizing high output and high reliability, and an integrated circuit having particularly high reliability. An object of the present invention is to provide a hybrid hybrid thin-film photoelectric conversion module simply and at low cost.

[0016]

An integrated thin-film photoelectric conversion module according to one aspect of the present invention includes a first electrode layer, a semiconductor layer, and a second electrode layer, which are sequentially stacked on a main surface of a substrate. The multilayer film includes a cell region including a plurality of photoelectric conversion cells connected in series, a bypass diode region, and a connection region, and the connection region includes the bypass diode in the cell during reverse bias processing of the cell. It is characterized in that it is used for connecting the bypass diode in anti-parallel to at least one of the plurality of cells connected in series after the reverse bias processing without connecting.

It is preferable that the first electrode layer and the second electrode layer in the connection region are short-circuited to enable reverse bias treatment of the bypass diode. Further, the first electrode layer and the second electrode layer in the connection region are short-circuited by the conductive material provided in the groove extending from the second electrode layer to the first electrode layer even before the reverse bias treatment of the cell. It is preferable.

On the other hand, at the time of reverse bias processing, it is preferable that the connection of the connection region to the cell is divided by the groove penetrating the multilayer film.

The second electrode layer of one cell selected from a plurality of cells connected in series is continuous with the second electrode layer of the connection region and is provided in the groove penetrating the multilayer film after the reverse bias treatment. Is also connected to the first electrode layer of the connection region via the electrically conductive material, the first electrode layer of the connection region is continuous with the first electrode layer of the bypass diode, and the second electrode layer of the bypass diode. Is preferably continuous with the second electrode layer of a cell different from the selected cell.

In the cell area, each cell has an elongated rectangular shape, and a plurality of cells are connected in series in the direction of the short axis thereof. Between the cell area, the bypass diode area and the connection area, Grooves for adjusting the electrical connection are provided, and any of these grooves can be formed as a straight line segment parallel to either the short axis direction or the long axis direction of the rectangular cell.

The bypass diode may be provided adjacent to one end or both ends of the cell in the long axis direction. Also,
The cell region may include a plurality of cell arrays in which a plurality of cells are connected in series, the plurality of cell arrays are connected in parallel, and a bypass diode disposed between two adjacent cell arrays is connected via the connection region. And can be connected in antiparallel to both of the same number of cells in the cell arrays on both sides.

The semiconductor layer in the integrated type thin film photoelectric conversion module may include a tandem type amorphous photoelectric conversion layer and a crystalline photoelectric conversion layer.

According to another aspect of the present invention, a method for fabricating an integrated type thin film photoelectric conversion module includes a bypass diode and a connection region which are between or adjacent to the second electrode layers of two adjacent cells. A reverse bias voltage is applied across at least one of the two electrode layers to remove short-circuit defects in the cell or in the bypass diode, after which conductive material is placed in the trenches through the multilayer film. It is characterized by including a step of giving.

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION The present inventors have examined the following matters in order to improve the situation in the above-mentioned prior art.

First, the photoelectric conversion cell and the bypass diode can be basically formed in the same layer structure. Therefore, if a multilayer film for a diode can be deposited at the same time as the deposition of a multilayer film for a photoelectric conversion cell, the diode region is formed integrally with the cell region, so that the integrated thin film can be easily and inexpensively and practically used. It is possible to manufacture a photoelectric conversion module.

Next, even when the diode region is formed integrally with the cell region, before the bypass diode is connected in antiparallel to at least one of the plurality of photoelectric conversion cells connected in series, the cell and Reverse bias processing of the bypass diode is possible.

As described above, in the integrated hybrid thin film photoelectric conversion module, since the thin film contains the crystalline layer, the effective adhesion of the thin film to the substrate is weak. In the case of the integrated amorphous thin film photoelectric conversion module, the withstand voltage when the hot spot phenomenon occurs is 8 to 9V.
On the other hand, in the case of the integrated hybrid thin film photoelectric conversion module, its withstand voltage is as high as 12 to 14 V and the open circuit voltage (Voc) of each cell is 1.3 to 1.4.
Since it is as high as V, the deterioration of the appearance of the dielectric breakdown portion caused by the hot spot phenomenon becomes remarkable. Therefore, by connecting the bypass diodes in anti-parallel rather than reducing the current inhibition by the shaded cells by connecting in parallel the multiple series arrays in which the multiple hybrid thin film photoelectric conversion cells connected in series are divided in parallel. The fundamental solution is to suppress the reverse voltage itself applied to the cell when the hot spot phenomenon occurs.

Further, even when a bypass diode is connected in anti-parallel for each predetermined number of a plurality of photoelectric conversion cells connected in series and light is incident also on the diode, the area of the diode is equal to the area of the predetermined number of cells. In comparison, if it is sufficiently small, the decrease in the short-circuit current of the integrated type thin film photoelectric conversion module is slight. Further, it is difficult to make the entire surface of the module a light-receiving region when assembling the module or installing the module, and a shadow region is inevitably formed. Therefore, the diode can be preferably formed in the shadow region.

Hereinafter, embodiments of the present invention will be described in more detail with reference to the drawings. In the drawings of the present application, the same reference numerals indicate the same or corresponding parts, and the overlapping description will not be repeated.

FIGS. 1, 2 and 3 are plan views schematically showing an integrated type thin film photoelectric conversion module according to an embodiment of the present invention. In these figures, the integrated thin-film photoelectric conversion module 1 has a cell region in which a plurality of thin-film photoelectric conversion cells 10 are integrated on a substrate 2. That is, a plurality of elongated rectangular photoelectric conversion cells 10 are connected in series in the minor axis direction thereof, and a pair of bus bar electrodes 12 made of copper foil or the like are formed in contact with the cells at both ends. Also, the substrate 2
Above, a bypass diode region (including a connection region for connecting the bypass diode to the cell in antiparallel) 15 is juxtaposed in parallel to the series connection direction of the thin film photoelectric conversion cells 10. The photoelectric conversion cell 10, the bus bar electrode 12, and the bypass diode region 15 are separated from the module peripheral region 13 by the peripheral separation groove 14.

In FIG. 1, there is a cell array containing cells 10 connected in series on each side of a bypass diode region 15, with one diode (including one connection region) being one adjacent one in each array. The cell 10 is connected in antiparallel. In FIG. 2, the bypass diode regions 15 are juxtaposed along one longitudinal edge of the cells 10 included in one cell array, and one diode is anti-parallel connected to the two cells 10. . In FIG. 3, two bypass diode regions 15 are juxtaposed along both longitudinal edges of the cells 10 included in one array, and one diode is connected in antiparallel to four cells 10. ing.

In FIG. 4A, the thin film photoelectric conversion cells 10 connected in series in FIG. 1 are shown in an enlarged sectional view along line AA. In FIGS. 4B and 4C, the bypass diode region 15 in FIG. 1 is shown in an enlarged sectional view along line BB. FIG. 4B shows a state before the reverse bias processing of the cell 10 and the diode 18, and FIG.
Indicates the state after the reverse bias processing. Figure 4 (D)
FIG. 2 is a plan view in which FIG. 1 is rotated 90 degrees in the plane and the vicinity of the bypass diode region 15 is enlarged. Note that FIG.
Only a part of the module 1 is drawn from (A) to (D).

Similarly, FIG. 5A is an enlarged sectional view taken along line AA in FIG. 2, and FIG. 5B is a line B- in FIG.
FIG. 5B is an enlarged cross-sectional view along B, and FIG.
It is the top view which expanded the bypass diode area | region 15 inside. 6A is an enlarged cross-sectional view taken along line AA in FIG. 3, FIG. 6B is an enlarged cross-sectional view taken along line BB in FIG. 3, and FIG. 6C is an enlarged plan view of the vicinity of the bypass diode region 15 in FIG.

FIG. 4A, FIG. 5A, and FIG.
As shown in (A), the thin film photoelectric conversion cell 10 of the module 1 has a structure in which a first electrode layer 3, a semiconductor layer 4, and a second electrode layer 5 are sequentially stacked on a substrate 2. ing. That is, in the module 1, the substrate 2
Light incident from the side or the second electrode layer 5 side is the semiconductor layer 4
Photoelectrically converted by the photoelectric conversion unit included in.

As the substrate 2, for example, a glass plate or a transparent resin film can be preferably used. However, the substrate 2 is not limited to these, and any substrate having a surface having an insulating property can be used.

When light is incident on the semiconductor layer 4 from the substrate 2 side, the first electrode layer 3 is made of ITO (Indium.
(Tin oxide) film, SnO ₂ film, or transparent conductive oxide layer such as ZnO film. (However, when light is allowed to enter the semiconductor layer 4 from the second electrode layer 5 side, the first electrode layer 3 can be formed of a metal film such as a silver film or an aluminum film.) The one electrode layer 3 may have either a single-layer structure or a multi-layer structure. The first electrode layer 3 can be formed by a vapor deposition method such as a vapor deposition method, a CVD method, or a sputtering method. It is preferable to form a surface texture structure including fine unevenness on the surface of the first electrode layer 3. By forming such a textured structure on the surface of the first electrode layer 3, the incidence efficiency of light on the semiconductor layer 4 forming the photoelectric conversion unit can be improved.

As the semiconductor layer 4, for example, an amorphous thin film photoelectric conversion unit including an amorphous photoelectric conversion layer or a crystalline thin film photoelectric conversion unit including a crystalline photoelectric conversion layer can be formed. Further, the semiconductor layer 4 may be a tandem type unit including an amorphous thin film photoelectric conversion unit and a crystalline thin film photoelectric conversion unit. In this case, the amorphous photoelectric conversion unit has a structure in which, for example, a p-type silicon-based semiconductor layer, a non-doped silicon-based amorphous photoelectric conversion layer, and an n-type silicon-based semiconductor layer are sequentially stacked from the first electrode layer 3 side. You can The crystalline photoelectric conversion unit may have a structure in which, for example, a p-type silicon-based semiconductor layer, a non-doped silicon-based crystalline photoelectric conversion layer, and an n-type silicon-based semiconductor layer are sequentially stacked from the amorphous photoelectric conversion unit side. . Any of these semiconductor layers can be formed by the plasma CVD method.

The second electrode layer 5 not only has a function as an electrode, but also reflects the light that has entered the semiconductor photoelectric conversion layer 4 from the substrate 2 side and has reached the second electrode layer 5, and the semiconductor layer 4 It also plays the role of a reflection layer that re-enters the inside.
The second electrode layer 5 can be formed by using a vapor deposition method, a sputtering method, or the like using silver, aluminum, or the like. (However, when light is made to enter the semiconductor layer 4 from the second electrode layer 5 side, the second electrode layer 5 is an ITO film,
It can be composed of a transparent conductive oxide layer such as a SnO ₂ film or a ZnO film. ) Incidentally, the second electrode layer 5
A transparent conductive thin film (not shown) made of a non-metal material such as ZnO may be inserted between the semiconductor layer 4 and the semiconductor layer 4 to improve the adhesion between the two. An organic protective layer (not shown) is bonded to the second electrode layer 5 side of the thin film photoelectric conversion module 1 via a sealing resin layer (not shown).

4 (A), 5 (A) and 6 (A)
As shown in FIG. 1, in the integrated thin-film photoelectric conversion module 1, the groove 21 for separating the first electrode layer 3 into a plurality of first electrodes and the second electrode layer 5 into a plurality of second electrodes. A groove 22 for separating and a groove 23 for connecting the adjacent cells 10 in series are provided. These grooves 21,
22 and 23 are parallel to each other and extend in a direction perpendicular to the plane of the drawing. The connection groove 23 is filled with the same metal material as the second electrode layer 5, and is used to connect the first electrode of one cell to the second electrode of an adjacent cell.

In FIGS. 4A to 4D, 1 is provided for each of the cells 10 connected in series in one cell array.
The bypass diodes 18 are connected in antiparallel via the connection region 19. In FIGS. 5A to 5C,
One bypass diode 18 is antiparallel-connected to the two cells 10 connected in series via the connection region 19. Then, in FIGS. 6A to 6C, one bypass diode 18 is connected in antiparallel to the four cells 10 connected in series via the connection region 19.

That is, one side of the first electrode of the diode 18 is formed by the separation groove 24 (however, the groove 24 is also used as the groove 21 in FIGS. 6B and 6C). The second electrode layer 5 is separated by the groove 25 between the diode 18 and the connection region 19. The first electrode 3 and the second electrode 5 in the connection region 19 are formed in the groove 2
It is short-circuited with the same conductive material as the second electrode 5 via 6. The connection region 19 is divided by a groove 27 penetrating from the first electrode layer 3 to the second electrode layer 5 in the region. These grooves 24-27 can be formed parallel to the long axis direction of the rectangular cell 10.

FIG. 4 (D), FIG. 5 (C) and FIG. 6 (C)
As shown in FIG. 2, the first electrode layer 3 is provided with the groove 29 between the region of the cell 10 and the bypass diode region 15.
Are separated by. In addition, the groove 30 along the groove 29
Penetrates at least the second electrode layer 5. These separation grooves 29 and 30 may be formed parallel to the minor axis direction of the rectangular cell 10.

In any of FIGS. 4 to 6, as can be seen by referring to these drawings in detail, after the reverse bias treatment, the cells 10 connected to the second electrode 5 in the connection region 19 are connected. The second electrode 5 is also connected to the first electrode 3 in the connection region 19 by the conductive material 28 embedded in the groove 27. The first electrode 3 of the connection region 19 is continuous with the first electrode 3 of the diode 18. Diode 18
Second electrode 5 is continuous with the second electrode 5 of the cell 10 adjacent to the diode.

At the time of reverse bias processing, the connection region 19
Is a groove 27 penetrating from the first electrode layer 3 to the second electrode layer 5.
It is divided by (see FIG. 4B). That is, when trench 27 is not filled with conductive material 28, connection region 19 does not connect bypass diode 18 to cell 10. Therefore, by applying a reverse voltage from the voltage application probe between the second electrodes 5 of the adjacent cells 10, it is possible to perform reverse bias processing of the cells. At this time, the bypass diode 18 and the connection region 1
Since the first electrode 3 which is continuous between the second electrode 5 of the bypass diode 18 and the second electrode of the connection region 19 is short-circuited to the second electrode 5 of the connection region 19 via the groove 26.
By applying a voltage application probe to the electrodes,
Reverse bias processing can be performed on the bypass diode 18 as well.

FIG. 4D, FIG. 5C, and FIG.
As shown in (C), the separation groove 21 is extended so as to reach at least the separation groove 29 so as to prevent a short circuit of the first electrode 3 between the adjacent cells 10. Similarly, the separation groove 22 is extended so as to reach at least the separation groove 30 so as to prevent a short circuit of the second electrode 5 between the adjacent cells 10. Diode 18
Alternatively, in a region where the separation groove 30 is not formed in order to maintain the continuity of the second electrode 5 of the connection region 19 and the second electrode 5 of the cell 10, the connection groove 23 is extended beyond the separation groove 29. Has been. However, in the region where the separation groove 30 is formed, the connection groove 23 should not exceed the separation groove 29 and preferably does not reach the separation groove 29. This is because, when the connection groove 23 extends to above the first electrode 3 of the diode 18 or the connection region 19, the first electrodes 3 of the cells 10 adjacent to each other are connected to the first electrode 3 of the diode 18 or the connection region 19. This is because it can be short-circuited.

Integrated thin-film photoelectric conversion module 1 described above
Can be produced, for example, by the following method.
First, the first electrode layer 3 is deposited on one main surface of the substrate 2.
Next, the separation grooves 21, 24, and 29 are formed by performing laser scribing on the first electrode layer 3.
Then, the semiconductor layer 4 is deposited on the first electrode layer 3 and the connection grooves 23 and 26 are formed by laser scribing.
Further, the second electrode layer 5 is deposited on the semiconductor layer 4. With the deposition of the second electrode layer 5, the connection grooves 23 and 26 are
The second electrode layer 5 and the first electrode layer 3 are filled with the same metal material as the electrode layer and electrically connected.

Next, the separation grooves 22, 25, and 30 are formed by laser scribing the semiconductor layer 4 and the second electrode layer 5. Moreover, the dividing groove 27 and the peripheral separation groove 14 (see FIGS. 1 to 3) in the connection region 19 are formed by laser scribing the first electrode layer 3, the semiconductor layer 4, and the second electrode layer 5. Then, by applying a reverse bias voltage between the second electrodes 5 of the cells 10 adjacent to each other, a reverse bias process for removing the short-circuit defective portion in the cell 10 is performed. Further, a reverse bias voltage is applied between the second electrode 5 of the diode 18 and the second electrode layer 5 in the vicinity of the short circuit groove 26 in the connection region 19 to remove the short circuit portion in the diode 18. I do.

After that, a conductive material 28 is arranged in the groove 27, a pair of bus bar electrodes 12 are provided, and a sealing resin layer and an organic protective layer are simultaneously attached to the second electrode layer 5 by a vacuum laminating method. . As the conductive material 28, a silver paste cured product, a carbon paste cured product, solder, or the like can be used. As described above, the integrated type thin film photoelectric conversion module as illustrated in FIGS. 1 to 6 is obtained.

In the integrated thin-film photoelectric conversion module of the present invention, when one bypass diode is reversely connected to n cells out of a plurality of cells connected in series, the n cells are When light is applied to the bypass diode, a reverse voltage of about n × Vc is applied to the bypass diode. Here, Vc is an open circuit voltage per cell. Therefore, if the reverse breakdown voltage of the diode is Vd, then at least the relationship of Vd> n × Vc must be satisfied, and it is preferable that the relationship of Vd> 2n × Vc be satisfied.

In order to minimize the output decrease of the entire module when a shadow is generated on a part of the module, n is 1
Is most preferable. On the other hand, when n is greater than 1, the number of bypass diodes to be manufactured can be reduced, and the module can be manufactured easily and easily. However, if n is too large, the reverse bias voltage applied to the bypass diode becomes large, and the decrease in FF (fill factor) of the entire module becomes large due to the leakage current of the diode, which is preferable. Absent.

As described above, in the integrated hybrid thin film photoelectric conversion module, since the semiconductor layer 4 includes the crystalline layer, the adhesion to the base is weak, and the withstand voltage when the hot spot phenomenon occurs is the integrated amorphous. Since the voltage is as high as 12 to 14 V as compared with 8 to 9 V in the case of the thin film photoelectric conversion module, the appearance deterioration of the dielectric breakdown portion caused by the hot spot phenomenon becomes remarkable. Therefore, the bypass diode according to the present invention can exhibit excellent effects particularly in the case of the integrated hybrid thin film photoelectric conversion module.

When the cell 10 is shaded when the module 1 of the present invention is irradiated with light and the output current flows by bypassing the bypass diode 18, the cell 10 and the bypass diode 1
The series resistance between 8 and 8 becomes a problem. The factors of the series resistance are the distance from the diode 18 to the far edge of the cell 10 connected thereto, and the narrowest part of the second electrode layer 5 continuous between the cell and the diode or the cell and the connection region 19. There is resistance with the diode itself.

As a method of shortening the distance from the diode 18 to the far edge of the cell 10 connected to it in a large area module, the module of the present invention is connected in series as shown in FIG. Instead of connecting one diode in anti-parallel to n of a plurality of cells, connect them in series in a cell array arranged in parallel on either side of one diode as illustrated in FIG. It is possible to connect in parallel to one or n of the stored cells. In the module of the present invention, the length of the rectangular cell in the major axis direction is 100 cm or less, more preferably 50 cm or less, and further preferably 25 cm or less.

The wider the separation groove 29, the more stable the fabrication of the module, but the effective area of the module decreases, so the output of the module itself decreases. According to the accuracy of the laser processing device, the width of the separation groove 29 in the present invention is
5 mm or less, preferably 2 mm or less, more preferably 1 m
It is preferably formed as an aggregate of two or more thin laser scribe grooves so as to be m or less, more preferably 0.5 mm or less.

In the module of the present invention, one diode is connected in anti-parallel to n cells connected in series. Therefore, if the diode is exposed to light, the short-circuit current of the module is reduced by the current generated there. descend. However, the output of the module can be sufficiently suppressed by making the area of the diode sufficiently smaller than the area of the cell. However, if the area of the diode is made too small, a shadow is generated on the module surface, and the series resistance to the current flowing around the bypass diode increases.
As a result, the voltage of the voltage drop due to the series resistance is applied to the cell to cause the hot spot phenomenon, and even if the bypass diode is connected in parallel, the output of the module exceeds the area of the shaded area. It may decrease. Therefore, in the module of the present invention, the area per diode is preferably 0.05 to 1 cm ² , and more preferably 0.1 to 0.3 cm ² .

Further, an external member such as a frame is attached or a coating film is applied so that the region where the plurality of bypass diodes are arranged becomes a region which is shaded by sunlight or is not directly irradiated with light. Preferably. Furthermore, as an installation method of the integrated thin film photoelectric conversion module of the present invention, it is installed so that a region where a plurality of diodes are arranged becomes a shadow when the sunlight is irradiated or a region where direct light is not irradiated. Is preferred.

[0057]

EXAMPLE An integrated type thin film photoelectric conversion module illustrated in FIGS. 1 to 6 was manufactured by the method described below. The process and structural characteristics of the fabricated module are summarized in Table 1.

[0058]

[Table 1]

First, 9 having the SnO ₂ film 3 on one main surface 9
A glass substrate 2 having a size of 10 mm × 455 mm was prepared. Then, by scanning the IR (infrared fundamental wave) pulse laser beam YAG (yttrium aluminum garnet) from above the SnO ₂ film 3, SnO ₂ film 3
Width of 40 μm for separating the plurality of elongated rectangular first electrodes 3
The groove 21 and the separation groove 24 serving as a boundary of one side of the first electrode 3 of the diode 18 were formed. Further, a groove 29 for separating the SnO ₂ film 3 was formed between the region of the cell 10 and the diode region 15 at a right angle to the isolation trenches 21 and 24. However, in the case of Example 5 corresponding to FIG. 6, the role of the separation groove 24 is also served by the separation groove 21 extending beyond the separation groove 29. Short-axis direction of substrate 2 (455m
The separation grooves 21 along m) were formed at 8.9 mm intervals.

In the first, second, seventh, and eighth embodiments, one separation groove 24 is provided for one separation groove 21, and in the third embodiment, the separation groove is formed as two separated line segments on the same straight line. No. 21 (see FIG. 4D), one in two separation grooves 21 in Examples 4 and 9 (see FIG. 5), and four in Example 5
One was formed for each separation groove 21 (see FIG. 6), and one was formed for each of the eight separation grooves 21 in Example 6, but not formed in the comparative example. The groove 29 for separating the first electrode 3 of the diode region 15 along the longitudinal direction (910 mm) of the substrate 2 is formed by two laser scribing grooves, and these two scribing grooves (one scribing groove) are formed. Width is about 40
˜60 μm) was 2 mm in Examples 1 to 6, 0.5 mm in Example 7, and 1 mm in Example 8.

Thereafter, ultrasonic cleaning and drying are performed, and an amorphous thin film photoelectric conversion unit 4a (not shown) having a thickness of 300 nm contained in the semiconductor layer 4 is further formed on the SnO ₂ film 3 by the plasma CVD method. Deposited. The amorphous photoelectric conversion unit 4a includes a non-doped amorphous silicon photoelectric conversion layer sandwiched between an extremely thin p layer and an n layer, and forms a pin junction. Similarly, a crystalline thin film photoelectric conversion unit 4b (not shown) having a thickness of 2000 nm was deposited on the amorphous thin film photoelectric conversion unit 4a. The crystalline photoelectric conversion unit 4b includes a non-doped polycrystalline silicon photoelectric conversion layer.

Then, a groove 23 having a width of 60 μm that divides the semiconductor layer 4 into a plurality of elongated rectangular regions is formed by laser scribing by scanning a YAG SHG (second harmonic) pulsed laser beam from the glass substrate 2 side. did. The center distance between the groove 23 and the separation groove 21 was 100 μm. When one bypass diode 18 is connected in anti-parallel to the n cells 10 connected in series, one of the n grooves 23 related to those cells is separated from the separation groove 29.
And the remaining n-1 lines were formed so as not to reach the separation groove 29. In Examples 1 and 3 to 9, the groove 26 for short-circuiting the first electrode 3 and the second electrode 5 in the connection region 19 was further formed by the same laser scribing on the semiconductor layer 4.

Thereafter, a ZnO film (not shown) and an Ag film were sequentially formed on the semiconductor film 4 by the sputtering method to form the back electrode layer 5. Then, the glass substrate 2
By scanning the YAG-SGH laser beam from the side, the separation groove 22 having a width of 60 μm that divides the semiconductor layer 4 and the back surface electrode layer 5 into a plurality of elongated rectangular shapes was formed. The distance between the centers of the separation groove 22 and the connection groove 23 is 100 μm.
m. Next, in Examples 1 to 9, one groove 2 for separating the second electrode layer 5 was formed by the same laser scribing.
Corresponding to No. 4, one groove 25 for separating the semiconductor layer 4 and the back electrode layer 5 was formed.

In Examples 1 to 8, the distance 31 between the separation groove 25 and the short-circuit groove 26 was 200 μm, and in Example 9, the distance 31 was 12 mm (FIGS. 5B and 5C). reference). Further, in Examples 1 to 9, the YAG-SGH laser beam was scanned from the surface side of the glass substrate 2 to scribe the semiconductor layer 4 and the back electrode layer 5 and separated along the longitudinal (910 mm) direction of the substrate. Groove 3
Formed 0. Also, Examples 1, 3, 4, and 6-9.
Then, similar scribing was performed on the SnO ₂ film 3, the semiconductor layer 4, and the back surface electrode layer 5 to form one dividing groove 27 corresponding to one separating groove 24. In the fifth embodiment, the dividing groove 27 is formed so as to overlap the separating groove 21 existing at a position substantially parallel to the width of the cell 10 from the connecting groove 23 extending beyond the separating groove 29 (FIG. 6 (C)).

Then, a YAG-IR laser and a YAG-S
Laser scanning is performed along the periphery of the substrate 2 using an HG laser to form a peripheral separation groove 14 penetrating the SnO ₂ film 3, the semiconductor layer 4, and the back electrode layer 5, and the region of the cell 10 and the bypass diode region. 15 was confirmed.

As described above, Examples 1, 2, 4 to
In 9 and the comparative example, each is 8.9 mm × 430 m
Hybrid type thin film photoelectric conversion cell 1 having a size of m
An integrated module was manufactured in which 100 units of 0s were connected in series in a direction parallel to the long side of the substrate 2. In the third embodiment, 8.
An integrated module in which two hybrid thin film photoelectric conversion cells 10 each having a size of 9 mm × 215 mm were connected in parallel in 100 stages in the long side direction of the substrate 2 was manufactured.

After that, the pair of bus bar electrodes 12 is formed on the substrate 2.
Attached. Further, in Examples 1 to 9 and Comparative Example, a reverse bias treatment was performed by applying a voltage between the second electrode layers 5 of the adjacent photoelectric conversion cells 10. In addition, Example 1
In and 3 to 9, a reverse bias treatment was performed by applying a voltage between the second electrode layer 5 of the diode 18 and the second electrode layer 5 near the short-circuit groove 26 in the connection region 19. Thereafter, solder was applied in spots using an ultrasonic soldering iron as a conductive material 28 for connecting the groove 27 that divides the connection region 19.

As described above, the integrated type thin film photoelectric conversion module illustrated in FIGS. 1 to 6 was obtained.

One module 1 for each of the above embodiments
Manufactured, and for each of them, the electrical characteristics were measured in the absence of shadows, the electrical characteristics were measured with the central 10 photoelectric conversion cells shielded, and the hot spot test was conducted with one cell shielded. did. The results are shown in Table 2.

[0070]

[Table 2]

The electric characteristics are as follows: Irradiance of 100 mW / cm using a xenon lamp and a halogen lamp as a light source.
^{In 2} , the output characteristics were examined using a solar simulator of AM1.5. The temperature at the time of measuring the electrical characteristics is 25
Was set to ° C.

As a hot spot test, a black vinyl tape was attached to one cell (two cells individually connected in anti-parallel to one diode in Example 3) to shield the light, and an outdoor pyranometer was used outdoors. Irradiance 80-100 in measurement
When mW / cm ² (0.8 to 1 SUN), the module 1 was installed such that the incident angle of sunlight on the glass substrate surface of the module 1 was 80 degrees or more and left for 1 minute.
Such a hot spot test was performed 10 times for one module while changing the shaded cell. After that, it was observed whether or not the appearance of the cell surface, which was substantially black when viewed from the glass surface, was discolored to gray or white. The temperature at the time of these hot spot tests is 15 to 30.
It was ℃.

As shown in Table 2, no discoloration due to the hot spot phenomenon occurs in any of the modules of Examples 1 to 9. As the output (Eff: photoelectric conversion efficiency) of the modules of Examples 1, 3, 4, 8 and 9, almost the same value as that of the comparative example is obtained in the state without light shielding. Further, as for the output of the module when the 10 cells in the center of the module are shielded from light, in each of Examples 1 to 9, a high Eff value is held as compared with the comparative example. This is because, in the modules of Examples 1 to 9, one or two diodes 18 are connected in antiparallel to n cells 10 connected in series.

Further, the dividing groove 27 is provided in the connection region 19, and the photoelectric conversion cell 10 and the diode 18 are reverse-biased before the conductive material 28 for connection is arranged in the groove 27, whereby a module is formed. You are getting a high output. In the second embodiment, since the short-circuiting groove 26 is not provided and the bypass diode 18 is not reverse-biased, the output remains low in the shadowless state.

In the fifth and sixth embodiments, one bypass diode is connected in anti-parallel to four cells and eight cells, respectively, and although the productivity for connecting the diodes in anti-parallel is improved, the diode is The reduction of the fill factor FF due to the increase of the leak current of 1 cannot be suppressed sufficiently, and the output remains low without shadow. The output of the module when the light is partially shielded is also lower than that in the first embodiment.

In Example 7, since the width of the separation groove 29 was set to a small value of 0.5 mm, the processing as designed could not be performed, and cells where insufficient output was generated occurred in some places, resulting in low output. .

In the third embodiment, two cell arrays connected in series are provided, and the diode region 15 is provided between the two arrays (see FIG. 1), and the distance from the diode to the far end in the longitudinal direction of the cell is set. Was set to a half value (215 mm) in the case of Examples 1, 2, and 4 to 9. That is, since the path, that is, the resistance when the output current bypasses the diode is made small, the FF becomes high when a part of the light is shielded as compared with the first embodiment, and a high output is obtained.

Examples 1, 4, 5, 6 and 9 were examined by the following method in order to examine them in more detail.
(Voltage / current) characteristics were measured. That is, a probe was brought into contact with each center of two adjacent photoelectric conversion cells in a dark state, and an alternating current of 60 Hz was applied by a curve tracer to measure a current-voltage curve.

FIG. 7 shows the VI characteristics of Examples 1, 4, 5, 6 and 9. From this figure, it can be seen that in Example 6, in order to flow the short-circuit current (Isc) in the photoelectric conversion cell, it is necessary to apply a voltage substantially equal to the reverse withstand voltage. This state corresponds to the state immediately before the light-shielded cell cannot block the photocurrent generated in the adjacent cell with the structure of n = 8. Therefore, when the light quantity becomes larger than 1 SUN, a hot spot may occur.

Furthermore, the radiant intensity of sunlight outdoors may be about 1.2 SUN in fine weather when light absorption in the air is small, and when there is a building or the like that reflects light around the module. It may be about 5 SUN. Therefore, the value of n is n <(1 / which shows sufficient VI characteristics for 1.5SUN as in the fifth embodiment.
It is desirable that it is up to 2) × (Vd / Vc).

In the ninth embodiment, the slope of the increase of the negative current when the reverse bias voltage is applied is shown in the first, fourth, and fifth embodiments.
And a tendency completely different from 6 and. This is because the distance 31 (see FIG. 5) is large in the case of Example 9, and is caused by the voltage drop due to the resistance of the transparent conductive film which is the first electrode layer 3, and in the case of high solar radiation intensity. It is disadvantageous because it cannot handle the bypass current.

Regarding the modules of Example 1 and Comparative Example,
A light-shielding output test was conducted by the following method. The result is shown in Figure 8.
Is shown in the graph. In the light-shielding output test, black vinyl tape was attached from the end of the substrate 2 to 1 to 10 photoelectric conversion cells to shield light. Irradiance is 90 ± 5mW / cm2 (0.85-0.95SU when measured outdoors by a pyranometer).
In the case of N), the incident angle of sunlight on the surface of the glass substrate 2 is 8
The module 1 was installed so as to be 0 degree or more, and the output of the module was measured while changing the light shielding area. The air temperature during these tests was 15 to 30 ° C. In Example 1, 1
Even if 10 steps out of 00 steps are shaded, 7
The maximum output (Pmax) of more than 50% was maintained. On the other hand,
In the module of the comparative example, the output decreased by 10% each time the light-shielding area was increased by one step, and almost no output was obtained when the light-shielding area was shielded by 10 steps.

Furthermore, regarding the module of the first embodiment,
IEC 1730 INTERNATIONAL proposed for the purpose of evaluating the thermal design and long-term reliability of bypass diodes used to mitigate the adverse effects of hot spot phenomena on solar cell modules.
STANDARD "PV MODULE SAFETY
QUALIFICATION (WG2 Workin
g Draft) ”11.3.1-11.13.4. This test requires that the expected diode temperature TJ75 when the module is actually exposed to sunlight does not exceed the diode manufacturer's maximum diode temperature standard. TJ75 largely depends on the value of the diode voltage drop temperature coefficient δ calculated in the course of this test. It is known that in a commercially available diode, this value is usually positive, and when a constant current is passed in the forward direction, the voltage drop in the diode increases as the temperature rises, and heat generation in the diode further increases.
Therefore, for example, Japanese Unexamined Patent Application Publication No. 2001-119058 proposes a terminal box in which the heat dissipation of the bypass diode is taken into consideration in order to secure the diode capacitance.
In the module of Example 1, the diode voltage drop temperature coefficient δ was a negative value of −0.39.

Further, in order to investigate the thermal property of the bypass diode of Example 1, a diode current saturation temperature test was conducted by the following method. The result is shown in FIG. In the diode current saturation temperature test, while measuring the temperature of the bypass diode with a contact thermometer, a probe is brought into contact with each center of any two adjacent cells in the module, and a stabilized DC power supply is used in the dark state. A constant current is applied so that a forward voltage is applied to the bypass diode (reverse bias is applied to the cell), and the temperature is ± 30 seconds.
The temperature of the bypass diode and the value of the current when the variation was within the range of 0.5 ° C. were measured. As shown in FIG. 9, in the module of Example 1, at 0.44 A, which is the short-circuit current at 1 SUN, the temperature of the diode is 100 ° C. or less at which the resin encapsulating the module begins to deteriorate, The maximum temperature was 80 ° C. or lower, and further was 50 ° C. or lower, which is 60 ° C. or lower of the average temperature in actual exposure of the module. Even at a short circuit current of 0.66 A at 1.5 SUN, the temperature of the diode is 100 ° C. or lower at which the resin encapsulating the module begins to deteriorate, and is set to the maximum temperature during actual exposure of the module. It is about 70 ° C, which is lower than or equal to 0 ° C.

[0085]

As described above, according to the present invention, it is possible to provide an integrated type thin film photoelectric conversion module which can realize high output and high reliability, and particularly has a hybrid type structure and high reliability. It is possible to easily and inexpensively provide an integrated thin-film photoelectric conversion module that can achieve high performance.

[Brief description of drawings]

FIG. 1 is a plan view schematically showing an integrated type thin film photoelectric conversion module according to an embodiment of the present invention.

FIG. 2 is a plan view schematically showing an integrated type thin film photoelectric conversion module according to another embodiment of the present invention.

FIG. 3 is a plan view schematically showing an integrated type thin film photoelectric conversion module according to another embodiment of the present invention.

4A is an enlarged sectional view taken along the line AA in FIG. 1, and FIG. 4B is an enlarged sectional view taken along the line BB in FIG. 1 before the reverse bias process. , (C) is an enlarged cross-sectional view taken along the line BB in FIG. 1 after the reverse bias process, and (D) is an enlarged plan view of the diode region in FIG. 1.

5A is an enlarged sectional view taken along line AA in FIG. 2, and FIG. 5B is an enlarged sectional view taken along line BB in FIG. 2 after reverse bias processing. , And (C) is an enlarged plan view of the diode region in FIG. 2.

6A is an enlarged cross-sectional view taken along the line AA in FIG. 3, and FIG. 6B is an enlarged cross-sectional view taken along the line BB in FIG. 3 after the reverse bias process. , And (C) is an enlarged plan view of the diode region in FIG. 3.

FIG. 7: V for Examples 1, 4, 5, 6, and 9
It is a graph which shows I characteristic.

FIG. 8 is a graph showing a result of an output test in Example 1 and a comparative example in a partially light-shielded state.

FIG. 9 is a graph showing the results of a diode current saturation temperature test of Example 1.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 integrated thin film photoelectric conversion module, 2 substrate, 3 1st electrode layer, 4 semiconductor layer, 5 2nd electrode layer, 10 thin film photoelectric conversion cell, 12 bus bar electrode, 13 module peripheral area, 14 peripheral separation groove, 15 bypass diode Area (including connection area), 18 Bypass diode, 19 Connection area, 21, 22, 24, 25, 27
Separation groove, 23 Connection groove, 26 Short circuit groove, 27 Connection region dividing groove, 28 Connection conductive material, 29, 30 Separation groove.

   ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 5F051 AA04 AA05 BA11 BA13 CA15                       DA04 DA16 EA06 EA09 EA10                       EA11 EA16 EA20 FA02 FA06                       FA13 FA15 FA23 GA03 JA07                       KA10

Claims (10)

[Claims] 1. A multi-layer film including a first electrode layer, a semiconductor layer, and a second electrode layer, which are sequentially stacked on one main surface of a substrate, the multi-layer film including a plurality of photoelectric conversion cells connected in series. Including a cell region, a bypass diode region, and a connection region, wherein the connection region does not connect the bypass diode to the cell during reverse bias treatment of the cell and after reverse bias treatment of the cell. An integrated type thin film photoelectric conversion module, which is used to connect the bypass diode in antiparallel to at least one of the plurality of cells connected in series. 2. The first electrode layer and the second electrode layer in the connection region are short-circuited to allow reverse biasing of the bypass diode. Integrated thin-film photoelectric conversion module. 3. The first electrode layer and the second electrode layer in the connection region are provided in a groove extending from the second electrode layer to the first electrode layer even before the reverse bias treatment of the cell. The integrated type thin film photoelectric conversion module according to claim 2, wherein the integrated thin film photoelectric conversion module is short-circuited by the conductive material. 4. The reverse bias process according to claim 1, wherein the connection of the connection region to the cell is divided by a groove penetrating the multilayer film. The integrated thin-film photoelectric conversion module described. 5. The second electrode layer of one cell selected from a plurality of cells connected in series is continuous with the second electrode layer of the connection region, and the multilayer structure after the reverse bias treatment. It is also connected to the first electrode layer of the connection region through a conductive material provided in a groove penetrating the film, and the first electrode layer of the connection region is the first electrode layer of the bypass diode. 5. The integrated thin film photoelectric device of claim 4, wherein the bypass diode is continuous and the second electrode layer of the bypass diode is continuous with the second electrode layer of a cell different from the selected cell. Conversion module. 6. Each of the cells in the cell region has an elongated rectangular shape, and the plurality of cells are connected in series in the minor axis direction thereof, and the cell region, the bypass diode region, and the Grooves for adjusting the electrical connection relation are provided between the respective regions of the connection region,
6. Each of the grooves is formed as a straight line segment parallel to either the short axis direction or the long axis direction of the rectangular cell. Integrated thin film photoelectric conversion module. 7. The integrated thin-film photoelectric conversion module according to claim 6, wherein the bypass diode is provided adjacent to one end or both ends of the cell in the long axis direction. 8. The cell region includes a plurality of cell arrays in which a plurality of cells are connected in series, the plurality of cell arrays are connected in parallel, and the bypass arranged between two adjacent cell arrays. The integrated thin-film photoelectric conversion module according to claim 6, wherein the diode is connected in antiparallel to both of the same number of cells in the cell arrays on both sides via the connection region. 9. The integrated device according to claim 1, wherein the semiconductor layer includes an amorphous photoelectric conversion layer and a crystalline photoelectric conversion layer arranged in a tandem type. Type thin film photoelectric conversion module. 10. The method for manufacturing the integrated thin film photoelectric conversion module according to claim 5, comprising: the bypass diode between or adjacent to the second electrode layers of two adjacent cells; A reverse bias voltage is applied to at least one of the second electrode layers in the connection region to remove a short-circuit defect in at least one of the cell and the bypass diode, and then the multilayer film is removed. A method of manufacturing an integrated thin-film photoelectric conversion module, comprising the step of applying a conductive material in a groove that penetrates.