JP2003018853A - Common mode current reduction method - Google Patents
Common mode current reduction methodInfo
- Publication number
- JP2003018853A JP2003018853A JP2001197133A JP2001197133A JP2003018853A JP 2003018853 A JP2003018853 A JP 2003018853A JP 2001197133 A JP2001197133 A JP 2001197133A JP 2001197133 A JP2001197133 A JP 2001197133A JP 2003018853 A JP2003018853 A JP 2003018853A
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- JP
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- Prior art keywords
- common mode
- pwm
- mode current
- rectifier circuit
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
(57)【要約】
【課題】 PWM整流回路とPWMインバータ回路とか
らなる電力変換装置に流れるコモンモード電流を、低コ
ストに低減させる。
【解決手段】 PWM整流回路の半導体素子Q1,Q
3,Q5とPWMインバータ回路の半導体素子Q7,Q
9,Q11のオン(またはオフ)タイミング、またはP
WM整流回路の半導体素子Q2,Q4,Q6とPWMイ
ンバータ回路の半導体素子Q8,Q10,Q12のオフ
(またはオン)タイミングを同時とすることで、コモン
モード電圧の変化を少なくし、コモンモード電流を低減
する。その結果、コモンモードフィルタの小型化や、コ
モンモード電流抑制装置の冷却装置の小型化が可能とな
り、低コストになる。
(57) Abstract: A common mode current flowing in a power conversion device including a PWM rectifier circuit and a PWM inverter circuit is reduced at low cost. SOLUTION: Semiconductor elements Q1 and Q of a PWM rectifier circuit
3, Q5 and semiconductor elements Q7, Q of the PWM inverter circuit
9, Q11 on (or off) timing, or P
By making the off (or on) timing of the semiconductor elements Q2, Q4, Q6 of the WM rectifier circuit and the semiconductor elements Q8, Q10, Q12 of the PWM inverter circuit simultaneous, the change of the common mode voltage is reduced, and the common mode current is reduced. Reduce. As a result, the size of the common mode filter and the size of the cooling device of the common mode current suppressing device can be reduced, and the cost can be reduced.
Description
【0001】[0001]
【発明の属する技術分野】この発明は、PWM整流回路
とPWMインバータ回路からなる電力変換装置で両回路
を同時運転する場合のコモンモード電流低減方法に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a common mode current reduction method in the case where a power conversion device including a PWM rectifier circuit and a PWM inverter circuit simultaneously operates both circuits.
【0002】[0002]
【従来の技術】図2にPWM整流回路とPWMインバー
タ回路からなる電力変換装置を介して電動機を駆動する
場合の、従来の回路構成図を示す。ここに、PWM整流
回路は、自己消型弧半導体スイッチとダイオードを逆並
列に接続した半導体スイッチ6個のフルブリッジ構成と
し、PWMインバータ回路も同様に、半導体スイッチ6
個のフルブリッジ構成とした例を示す。2. Description of the Related Art FIG. 2 shows a conventional circuit configuration diagram in the case of driving an electric motor through a power conversion device composed of a PWM rectifying circuit and a PWM inverter circuit. Here, the PWM rectifier circuit has a full bridge configuration of six semiconductor switches in which a self-extinguishing arc semiconductor switch and a diode are connected in antiparallel, and a PWM inverter circuit similarly has the semiconductor switch 6
An example of a full bridge configuration is shown.
【0003】図3に、図2の動作を説明するための波形
図を示す。図3,に示すように、PWM整流回路お
よびPWMインバータ回路とも、搬送波である三角波と
変調信号波との比較により(ダブルエッジ変調方式とも
言う)、各半導体スイッチのゲートを制御して、PWM
整流回路で入力電流を力率1の正弦波状とし、所望の直
流電圧を出力する。一方、PWMインバータ回路は、搬
送波である三角波と変調信号波との比較により、所望の
電圧および周波数の3相交流電圧を出力する。なお、図
3,のスイッチングモードにおける、「1」は両変
換回路の上アームのスイッチング素子がオン状態、
「0」は下アームのスイッチング素子がオン状態を示
す。FIG. 3 shows a waveform diagram for explaining the operation of FIG. As shown in FIG. 3, in both the PWM rectifier circuit and the PWM inverter circuit, the gate of each semiconductor switch is controlled by comparing the triangular wave that is a carrier wave with the modulation signal wave (also referred to as a double edge modulation method) to perform PWM.
The rectifier circuit makes the input current sinusoidal with a power factor of 1 and outputs a desired DC voltage. On the other hand, the PWM inverter circuit outputs a three-phase AC voltage having a desired voltage and frequency by comparing the triangular wave, which is a carrier wave, with the modulation signal wave. In the switching mode of FIG. 3, "1" means that the switching elements of the upper arms of both conversion circuits are in the ON state,
“0” indicates that the switching element of the lower arm is on.
【0004】ところで、各半導体スイッチがスイッチン
グすることにより、図3,のようにコモンモード電
圧およびコモンモード電流が発生する。ここで、コモン
モード電圧の発生原理について以下に説明する。図2
の、PWM整流回路の入力端子R,S,Tの直流中間コ
ンデンサ中点Nに対する電位をそれぞれvRN,vSN,v
TNとし、また、直流中間コンデンサ中点Nの大地に対す
る電位をvNGとすると、コモンモード電圧は次の(1)
式のように表わすことができる。
vNG=−(vRN+vSN+vTN)/3≠0 …(1)By the way, by switching each semiconductor switch, a common mode voltage and a common mode current are generated as shown in FIG. Here, the generation principle of the common mode voltage will be described below. Figure 2
Of the input terminals R, S, and T of the PWM rectifier circuit with respect to the midpoint N of the DC intermediate capacitors are v RN , v SN , and v, respectively.
Let TN be the potential of the midpoint N of the DC intermediate capacitor with respect to the ground as v NG , then the common mode voltage is
It can be expressed like an expression. v NG =-(v RN + v SN + v TN ) / 3 ≠ 0 (1)
【0005】上記(1)式よりも分かるように、直流中
間電圧をEdとすれば、PWM整流回路の半導体スイッ
チがオン,オフする度にPWM整流回路のコモンモード
電圧vNGがEd/3ずつ変化することになる。つまり、
三角波1周期中において、PWM整流回路の半導体スイ
ッチ3相分がオン,オフすることで、PWM整流回路が
発生するコモンモード電圧は、6回変化することにな
る。As can be seen from the above equation (1), if the DC intermediate voltage is Ed, the common mode voltage v NG of the PWM rectifier circuit is Ed / 3 each time the semiconductor switch of the PWM rectifier circuit is turned on and off. It will change. That is,
During one cycle of the triangular wave, three phases of the semiconductor switch of the PWM rectifier circuit are turned on and off, so that the common mode voltage generated by the PWM rectifier circuit changes six times.
【0006】一方、図2においてインバータ出力端子
U,V,Wの直流中間コンデンサ中点Nに対する電位を
それぞれvUN,vVN,vWNとし、また、電動機電機子巻
線の中性点Sのコンデンサ中点Nに対する電位をvSNと
すると、コモンモード電圧は次の(2)式のように表わ
せる。
vSN=(vUN+vVN+vWN)/3≠0 …(2)
このことから、三角波1周期中において、PWMインバ
ータ回路の半導体スイッチ3相分がオン,オフすること
で、PWMインバータが発生するコモンモード電圧も、
上記と同様6回変化することになる。On the other hand, in FIG. 2, the potentials of the inverter output terminals U, V, W with respect to the DC intermediate capacitor midpoint N are v UN , v VN , v WN , respectively, and the neutral point S of the motor armature winding is shown. Assuming that the potential with respect to the capacitor midpoint N is v SN , the common mode voltage can be expressed by the following equation (2). v SN = (v UN + v VN + v WN ) / 3 ≠ 0 (2) From this, the PWM inverter is generated by turning on and off three semiconductor switches of the PWM inverter circuit during one triangular wave period. Common mode voltage
It will change 6 times as above.
【0007】したがって、電動機電機子巻線の中性点S
の大地Gに対する電位vSG、すなわちコモンモード電圧
は次の(3)式のようになり、両変換回路の変調用の搬
送波を同じ三角波とした場合、三角波1周期中におい
て、12回変化することになる。
vSG=vSN+vNG
=(vUN+vVN+vWN)/3−(vRN+vSN+vTN)/3 …(3)Therefore, the neutral point S of the motor armature winding is
The potential v SG with respect to the ground G, that is, the common mode voltage, is as shown in the following formula (3), and when the modulation carrier of both conversion circuits is the same triangular wave, it changes 12 times in one cycle of the triangular wave. become. v SG = v SN + v NG = (v UN + v VN + v WN ) / 3- (v RN + v SN + v TN ) / 3 (3)
【0008】そして、上記(3)式で示されるコモンモ
ード電圧が変化する度に、電動機の巻線間とフレーム間
の浮遊容量を充放電するコモンモード電流が流れること
になる。そのコモンモード電流経路を図4に太い矢印で
示す。すなわち、3相PWM整流回路および3相PWM
インバータ回路のスイッチングに伴うコモンモード電圧
の発生により、電源→3相PWM整流回路→3相PWM
インバータ回路→電動機→アース線の径路でコモンモー
ド電流が流れるわけである。ところで、このコモンモー
ド電流が他の機器の誤動作等の障害を引き起こす原因と
なっているため、例えば図5のようにコモンモードフィ
ルタや、図6のようなコモンモード電流抑制装置を接続
して、コモンモード電流が電源側に流出しないようにし
ている。Then, every time the common mode voltage expressed by the equation (3) changes, the common mode current for charging and discharging the stray capacitance between the windings of the electric motor and between the frames flows. The common mode current path is shown by a thick arrow in FIG. That is, three-phase PWM rectifier circuit and three-phase PWM
Due to the generation of common mode voltage due to the switching of the inverter circuit, the power supply → 3-phase PWM rectifier circuit → 3-phase PWM
The common mode current flows through the path from the inverter circuit to the motor to the ground wire. By the way, since this common mode current causes troubles such as malfunction of other devices, for example, a common mode filter as shown in FIG. 5 or a common mode current suppressing device as shown in FIG. The common mode current is prevented from flowing out to the power supply side.
【0009】ここで、コモンモード電流抑制装置の動作
原理について説明する。コモンモード電流抑制装置はコ
モンモードトランスTrおよび電界効果トランジスタF
ET1,2等よりなり、3相PWM整流回路または3相
PWMインバータ回路のスイッチングに伴い、正(電源
からインバータを介して電動機に向かう方向を正とす
る)の方向に電流が流れると、Trでコモンモード電流
を検出してFET2をオンさせ、コモンモード電流を直
流中間回路にバイパスさせるようにしている。また、負
の方向にコモンモード電流が流れる場合も同様で、この
場合はFET1をオンさせることで、コモンモード電流
を直流中間回路にバイパスさせる。すなわち、コモンモ
ードトランスTrと2つのFET1,2でフィードバッ
ク系を構成し、PWM整流回路とPWMインバータがス
イッチングする場合においても、電源側(コモンモード
トランス)に流れるコモンモード電流が0となるよう
に、コモンモード電流抑制装置が動作する。The operating principle of the common mode current suppressing device will be described below. The common mode current suppressor includes a common mode transformer Tr and a field effect transistor F.
When a current flows in the positive direction (the direction from the power source to the electric motor via the inverter is positive) due to switching of the three-phase PWM rectifier circuit or the three-phase PWM inverter circuit, the current flows in Tr. The common mode current is detected, the FET 2 is turned on, and the common mode current is bypassed to the DC intermediate circuit. The same applies when the common mode current flows in the negative direction. In this case, the common mode current is bypassed to the DC intermediate circuit by turning on the FET1. That is, the common mode transformer Tr and the two FETs 1 and 2 constitute a feedback system so that the common mode current flowing to the power supply side (common mode transformer) becomes 0 even when the PWM rectifier circuit and the PWM inverter switch. , The common mode current suppressor operates.
【0010】[0010]
【発明が解決しようとする課題】しかし、上記のように
コモンモードフィルタを用いるものは大型化により高コ
スト化するという問題があり、コモンモード電流抑制装
置を用いるものは、特にその発生損失を低減するための
冷却装置の大型化により高コスト化するという問題があ
る。したがって、この発明の課題は、コモンモードフィ
ルタやコモンモード電流抑制装置用冷却装置を小型化
し、低コストにコモンモード電流を低減することにあ
る。However, the one using the common mode filter as described above has a problem that the cost is increased due to the increase in size, and the one using the common mode current suppressor particularly reduces the generated loss. However, there is a problem that the cost is increased due to the increase in size of the cooling device. Therefore, an object of the present invention is to reduce the size of a common-mode filter or a cooling device for a common-mode current suppressor and reduce the common-mode current at low cost.
【0011】[0011]
【課題を解決するための手段】このような課題を解決す
るため、請求項1の発明では、PWM整流回路とPWM
インバータ回路からなる電力変換装置を介して負荷を駆
動するに当たり、前記PWM整流回路を構成する上下い
ずれか一方のアームの半導体素子すべてと前記PWMイ
ンバータ回路を構成する上下いずれか一方のアームの半
導体素子すべてのオンまたはオフのタイミングのいずれ
かを同時とし、コモンモード電流を低減させることを特
徴とする。上記請求項1の発明においては、前記PWM
整流回路とPWMインバータ回路のPWM変調のための
搬送波信号を、同じ波形とすることができる(請求項2
の発明)。また、上記請求項1または2の発明において
は、前記波形を、のこぎり波とすることができる(請求
項3の発明)In order to solve such a problem, in the invention of claim 1, a PWM rectifier circuit and a PWM rectifier circuit are provided.
When driving a load through a power conversion device including an inverter circuit, all the semiconductor elements of one of the upper and lower arms forming the PWM rectifier circuit and the semiconductor elements of one of the upper and lower arms forming the PWM inverter circuit One of the features is that all of the on and off timings are set at the same time to reduce the common mode current. In the invention of claim 1 above, the PWM
The carrier wave signal for PWM modulation of the rectifier circuit and the PWM inverter circuit can have the same waveform (claim 2).
Invention). In the invention of claim 1 or 2, the waveform may be a sawtooth wave (invention of claim 3).
【0012】[0012]
【発明の実施の形態】図1はこの発明の実施の形態説明
図である。これは、図2の駆動方法を示す図3と対応す
るものである。図1のととを比較すれば明らかなよ
うに、PWM整流回路とPWMインバータの上アームの
各スイッチング素子のオンタイミング、または下アーム
のスイッチング素子の各オフタイミングを一致させた点
が特徴である。また、そのために,に示すように搬
送波信号を同じ波形とし、ここでは特にのこぎり波を用
いている。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is an explanatory view of an embodiment of the present invention. This corresponds to FIG. 3 showing the driving method of FIG. As is clear from comparison with FIG. 1 and FIG. 1, it is a feature that the ON timing of each switching element of the PWM rectifier circuit and the PWM inverter upper arm or each OFF timing of the switching element of the lower arm are matched. . For that purpose, the carrier wave signal has the same waveform as shown in, and a sawtooth wave is particularly used here.
【0013】こうすることにより、PWM整流回路とP
WMインバータの全ての半導体スイッチのオン(または
オフ)のタイミングが同時となることから、コモンモー
ド電圧の電圧変化がのこぎり波1周期において6回とな
り(図1参照)、コモンモード電圧の発生が従来の三
角波比較変調方式に比べて半分に低減される。三角波比
較変調方式ではダブルエッジ変調方式となっていたが、
のこぎり波比較変調方式ではシングルエッジ変調方式と
なる。By doing so, the PWM rectifier circuit and the P
Since all the semiconductor switches of the WM inverter are turned on (or turned off) at the same time, the voltage change of the common mode voltage is 6 times in one cycle of the sawtooth wave (see FIG. 1), and the generation of the common mode voltage is the conventional one. It is reduced to half compared with the triangular wave comparison modulation method. The triangular wave comparison modulation method was a double edge modulation method,
The sawtooth wave comparison modulation method is a single edge modulation method.
【0014】[0014]
【発明の効果】この発明によれば、コモンモード電流を
低減できるので、コモンモードフィルタの小型化や、コ
モンモード電流抑制装置の冷却装置を小型化でき、低コ
スト化が可能となる利点が得られる。According to the present invention, since the common mode current can be reduced, it is possible to reduce the size of the common mode filter and the cooling device of the common mode current suppressor, and to reduce the cost. To be
【図1】この発明の実施の形態説明図である。FIG. 1 is an explanatory diagram of an embodiment of the present invention.
【図2】従来例を示す回路構成図である。FIG. 2 is a circuit configuration diagram showing a conventional example.
【図3】図2の動作説明図である。FIG. 3 is an operation explanatory diagram of FIG. 2;
【図4】コモンモード電流の電流径路説明図である。FIG. 4 is a current path explanatory diagram of a common mode current.
【図5】コモンモードフィルタの接続例を示す回路図で
ある。FIG. 5 is a circuit diagram showing a connection example of a common mode filter.
【図6】コモンモード電流抑制装置の接続例を示す回路
図である。FIG. 6 is a circuit diagram showing a connection example of a common mode current suppressing device.
eR,eS,eT…3相交流電源、CY1〜CY3…接地コン
デンサ、Cs…浮遊容量、Q1〜Q12…半導体スイッ
チ、L1〜L3…交流リアクトル、Lm1〜Lm3…電動機電
機子巻線、Lc1〜Lc3…コモンモードリアクトル、Tr
…コモンモードトランス、eU,eV,eW…電動機誘起
電圧、Cd1,Cd2…電解コンデンサ、FET1,FET
2…電界効果トランジスタ。e R , e S , e T ... 3-phase AC power supply, C Y1 to C Y3 ... Grounding capacitor, Cs ... Stray capacitance, Q 1 to Q 12 ... Semiconductor switch, L 1 to L 3 ... AC reactor, L m1 to L m3 … Motor armature winding, L c1 to L c3 … Common mode reactor, Tr
... Common mode transformer, e U , e V , e W ... Motor induced voltage, C d1 , C d2 ... Electrolytic capacitor, FET1, FET
2 ... Field effect transistor.
───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5H006 AA01 BB05 CA01 CB01 CB08 CC01 CC08 DA02 5H007 AA01 AA08 BB06 CA01 CB05 CC09 CC12 DA05 EA14 ─────────────────────────────────────────────────── ─── Continued front page F-term (reference) 5H006 AA01 BB05 CA01 CB01 CB08 CC01 CC08 DA02 5H007 AA01 AA08 BB06 CA01 CB05 CC09 CC12 DA05 EA14
Claims (3)
からなる電力変換装置を介して負荷を駆動するに当た
り、 前記PWM整流回路を構成する上下いずれか一方のアー
ムの半導体素子すべてと前記PWMインバータ回路を構
成する上下いずれか一方のアームの半導体素子すべての
オンまたはオフのタイミングのいずれかを同時とし、コ
モンモード電流を低減させることを特徴とするコモンモ
ード電流低減方法。1. When driving a load through a power conversion device including a PWM rectifier circuit and a PWM inverter circuit, the PWM inverter circuit and all of the semiconductor elements of either one of the upper and lower arms configuring the PWM rectifier circuit are configured. A common-mode current reduction method characterized in that the common-mode current is reduced by simultaneously turning on or off all the semiconductor elements of one of the upper and lower arms.
回路のPWM変調のための搬送波信号を、同じ波形とす
ることを特徴とする請求項1に記載のコモンモード電流
低減方法。2. The common mode current reduction method according to claim 1, wherein the carrier wave signals for PWM modulation of the PWM rectifier circuit and the PWM inverter circuit have the same waveform.
徴とする請求項1または2のいずれかに記載のコモンモ
ード電流低減方法。3. The common mode current reduction method according to claim 1, wherein the waveform is a sawtooth wave.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001197133A JP2003018853A (en) | 2001-06-28 | 2001-06-28 | Common mode current reduction method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001197133A JP2003018853A (en) | 2001-06-28 | 2001-06-28 | Common mode current reduction method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2003018853A true JP2003018853A (en) | 2003-01-17 |
Family
ID=19034794
Family Applications (1)
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Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004266972A (en) * | 2003-03-04 | 2004-09-24 | Fuji Electric Holdings Co Ltd | AC-AC power converter |
| JP2007181341A (en) * | 2005-12-28 | 2007-07-12 | Yaskawa Electric Corp | Converter device |
| CN100342269C (en) * | 2003-06-19 | 2007-10-10 | 日本电信电话株式会社 | light modulation device |
| US7336414B2 (en) | 2003-06-19 | 2008-02-26 | Nippon Telegraph And Telephone Corporation | Optical modulating device |
| CN100440713C (en) * | 2006-12-22 | 2008-12-03 | 清华大学 | A two-phase PWM modulation method for reducing common-mode voltage |
| JP2010093881A (en) * | 2008-10-06 | 2010-04-22 | Shindengen Electric Mfg Co Ltd | Converter with improved three-phase power factor |
| JP2010246391A (en) * | 2010-08-06 | 2010-10-28 | Daikin Ind Ltd | Power converter |
| US8008886B2 (en) | 2004-10-04 | 2011-08-30 | Daikin Industries, Ltd. | Power converter |
| JP2012010596A (en) * | 2006-03-31 | 2012-01-12 | Fujitsu General Ltd | Power converter |
| FR2965684A1 (en) * | 2010-10-04 | 2012-04-06 | Schneider Toshiba Inverter | METHOD AND CONTROL SYSTEM FOR REDUCING COMMON MODE CURRENT IN A POWER CONVERTER |
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