JP2003099275A - Update data recording device, update data transmission and reception system, update data recoding method, and update data transmitting and receiving method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technique for program data update which lightens the burden of updating operation, is safe, and never increase the burden of costs when control data of equipment which is audio equipment or video equipment having no digital input terminal and operates based on a program recorded in a memory need to be updated. SOLUTION: This recording device is provided with an analog input terminal which receives an external analog signal, an A/D converter which converts the analog signal into a digital signal and outputs it, a CPU which extracts update data of the program from the digital signal and outputs them, and a memory in which the outputted data are recorded.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technical field of an update data recording device, an update data transmitting / receiving system, an update data recording method, and an update data transmitting / receiving method, and more particularly to a digital input terminal having an analog input terminal. Belongs to the technical field of an update data recording device, an update data transmission / reception system, an update data recording method, and an update data transmission / reception method for updating data recorded in an internal memory of a device that does not have the above.

[0002]

2. Description of the Related Art An analog input terminal is provided in at least one of audio equipment and video equipment (hereinafter referred to as "equipment") in order to prevent unauthorized copying of copyrighted material and protect copyright. There is a device (for example, a DVD-RW player) that has a digital input terminal but does not have a digital input terminal and operates based on a program recorded in a memory.

Such a device is equipped with a memory for recording data such as programs and parameters for controlling the device and a CPU for controlling the device. The CPU controls the device based on the program data recorded in the memory. Have control.

Here, when the data recorded in the memory needs to be updated, the device does not have a digital input terminal. Therefore, conventionally, by opening the housing of the device and exchanging the memory, the data can be replaced. I was trying to update.

[0005]

However, since updating the data by exchanging the memory involves opening the casing of the device, it is not possible to let the device user who does not have specialized knowledge perform the exchanging operation of the device. It is not realistic from the viewpoint of the safety of the work of the equipment user.

Frequent updating of programs and replacement of memories of a large amount of devices distributed in the market are not practical in terms of cost.

According to the present invention, in a device having an analog input terminal but not a digital input terminal, when data such as a program or a parameter for controlling the device needs to be updated, a memory is required. By eliminating the work of opening the housing of the device for replacement, the work load is reduced, and even a device user who does not have specialized knowledge can update the data. The safety of the equipment user can be secured, and further,
An object of the present invention is to provide a technology for updating data of a device, which has an advantage that the cost burden does not increase even if the data is updated frequently or the data of devices distributed in a large amount in the market is updated.

[0008]

In order to solve such a problem, in the invention according to claim 1, at least one of an audio device and a video device operating based on a program recorded in a recording means such as a memory. In one update data recording device, analog input means, A / D conversion means for converting an analog signal into a digital signal and outputting the same, and data extraction such as a CPU for extracting and outputting the update data of the program from the digital signal Means and recording means for recording the output data.

Thus, in a device having an analog input terminal but not a digital input terminal, if the program data for controlling the device needs to be updated, the analog input means of the device can The input analog signal is converted into a digital signal by the A / D conversion means, the update data of the program is extracted from the digital signal by the data extraction means and output, and the update data of the program is recorded by the recording means. Can be input from the analog input terminal.

Therefore, it is not necessary to replace the memory for updating the data, and it is possible to reduce the load of the data updating work, and it is possible to update the memory data even by a device user who does not have specialized knowledge. In addition, since there is no work to open the housing of the device, the safety of the device user in the data update work can be ensured, and moreover, frequent data updates or data updates of devices distributed in large quantities in the market are performed. However, the cost burden does not increase. Also,
In the case of a device of a system in which an analog signal such as audio or video input from an analog input terminal is converted into a digital signal by an A / D conversion means inside the device and processed, the existing A / D
Since the update data can be converted into a digital signal by using the D conversion means, it is possible to suppress an increase in cost burden due to the addition of a new A / D conversion means.

According to a second aspect of the present invention, in the data recording apparatus according to the first aspect, update data such as a CPU for determining whether or not the input analog signal is update data to be recorded in the recording means. It is decided to have a discrimination means.

As a result, the update data discriminating means judges whether or not the inputted analog signal is the update data to be recorded in the recording means, so that the setting work for updating the data can be omitted and the expert knowledge This makes it easier for the device user who does not have the data update task.

In the invention according to claim 3, the update data transmitting means for transmitting the update data of the program recorded in the recording means of the update data receiving means as an analog signal and the update data for the device for receiving the update data. In the update data transmission / reception system in which the reception means is connected via an analog communication line, the update data transmission means C generates a signal related to the update data of the program.
A signal generating means such as a PU, a second D / A converting means for converting the signal output from the signal generating means into an analog signal and outputting the analog signal, and an analog signal output by the second D / A converting means. Second signal receiving means for outputting to the data receiving means, second signal receiving means for receiving the analog signal output by the update data receiving means, and analog output by the second signal receiving means Second A / D conversion means for converting the signal into a digital signal and outputting the digital signal;
A second data processing unit such as a CPU for performing a predetermined process on the data output by the second A / D conversion unit,
The update data receiving means includes a first signal receiving means for receiving an analog signal output from the data transmitting means, a first A / D converting means for converting the analog signal into a digital signal and outputting the digital signal, First data extracting means for extracting data from a digital signal and outputting the data, and first data processing such as CPU for performing predetermined processing on the data to generate update data of a program recorded in a recording means described later. Means, recording means such as a memory for recording the update data, result output means such as a CPU for outputting the result of recording the update data, and a first for outputting the result of the data processing after converting it into an analog signal. The D / A conversion means and the first signal transmission means for outputting the analog signal to the update data transmission means are included.

As a result, the first signal receiving means of the update data receiving means receives the analog signal relating to the update data of the program output by the update data transmitting means, and the first signal receiving means converts the analog signal into a digital signal. And first
The data extraction means extracts the update data of the program,
The first data processing means performs a predetermined process, the recording means records the update data, the result output means outputs the result of the recording of the update data, and the first D / A conversion means converts the analog signal. , The first signal transmitting means outputs to the update data transmitting means, and in the update data transmitting means, the second signal receiving means receives the analog signal output from the update data receiving means, and the second A / D converting means. Converts to a digital signal,
The second data processing means performs a predetermined process. Therefore, bidirectional communication between the update data transmitting means and the update data receiving means becomes possible.

According to a fourth aspect of the invention, in the update data transmitting / receiving system according to the third aspect, the update data receiving means is a receiving means discriminating signal transmitting means such as a CPU for transmitting a discriminating signal of the update data receiving means. Have
The update data transmitting means has a receiving means determining means such as a CPU that receives the determination signal output from the receiving means determining signal transmitting means and determines the type of the update data receiving means.

As a result, the update data transmission means receives the discrimination signal output from the reception means discrimination signal transmission means,
Since the receiving means discriminating means of the updating data transmitting means discriminates the type of the updating data receiving means, the updating data transmitting means can output the updating data according to the type of the updating data receiving means. That is, even if the number of update data transmitting means corresponding to the type of update data receiving means is not prepared, one update data transmitting means can send update data according to the type to a plurality of types of update data receiving means. It becomes possible to send.

Further, in the invention according to claim 5, in the update data recording method of at least one of the audio equipment and the video equipment operating based on the program recorded in the recording means, an analog signal from the outside is taken in. Analog input step (STEP 3) and A / D conversion step (STEP 3) of converting an analog signal into a digital signal and outputting the digital signal.
4), and a data extraction step of extracting and outputting program update data from the digital signal (STEP 5)
And a recording step (STE) for recording the output data.
P6).

Thus, in a device which has an analog input terminal but does not have a digital input terminal, when the program data for controlling the device needs to be updated, in the analog input step of the device. The input analog signal is converted into a digital signal in the A / D conversion process, the update data of the program is extracted and output from the digital signal in the data extraction process, and the update data is recorded in the recording process. It is possible to input from the input terminal.

Therefore, it is not necessary to replace the memory for updating the data, the work load for updating the data can be reduced, and the data can be updated even by a device user who does not have specialized knowledge. Moreover, the safety of the device user in the data updating work can be ensured, and the cost burden does not increase even if the data is frequently updated or the data of devices widely distributed in the market is updated.

Further, in the invention according to claim 6, in the data recording method according to claim 5, a data discriminating step (STEP 13) for discriminating whether or not the input analog signal is update data to be recorded in the recording step. ).

With this, it is possible to omit the setting work for updating the data because it is judged in the data discriminating process whether or not the input analog signal is the update data to be recorded in the recording process. The data update work becomes even easier for a device user who does not have it.

Further, in the invention according to claim 7, an update having an update data transmitting step of transmitting the update data of the program recorded in the recording means of the device as an analog signal and an update data receiving step of receiving the update data. In the data transmission / reception method, the update data transmission step includes a signal generation step (STEP 21) for generating and outputting a signal related to the update data of the program, and a signal output by the signal generation step for conversion into an analog signal for output. Second D / A conversion step (STEP 22) and the second D / A conversion step
A second signal transmitting step (STEP 23) of outputting an analog signal output from the converting step to the update data receiving step, and a second signal receiving step of receiving an analog signal output from the update data receiving step ( STEP3
3), a second A / D conversion step (STEP 34) of converting the analog signal output by the second signal reception step into a digital signal and outputting the digital signal, and the second A / D conversion step of output A second data processing step (STEP 35) of performing predetermined processing on the data, and the update data receiving step includes a first signal receiving step (STEP 24) of receiving the analog signal output in the update data transmitting step. )
A first A / D conversion step (STEP 25) of converting the analog signal into a digital signal and outputting the digital signal; and a first data extraction step (STEP 26) of extracting and outputting the program update data from the digital signal. )When,
An output destination switching step (STEP 27) for switching the output destination of the digital signal based on the extracted data, and a first data processing step (STEP 28) for performing predetermined processing on the digital signal to generate update data of the program. ,
Recording step of recording the update data (STEP 29)
And a result output step (STEP 30) of outputting the result of recording the update data, and a first D / A conversion step (ST) of converting the result of the data processing into an analog signal and outputting the analog signal.
EP31) and a first signal transmitting step of outputting the analog signal to the update data transmitting step (STEP32)
And.

Thus, the analog signal relating to the update data of the program output in the update data transmitting step is received in the first signal receiving step of the update data receiving step,
In the A / D conversion step of step 1, the digital signal is converted into a digital signal, and the update data of the program is extracted in the first data extraction step,
Predetermined processing is performed in the data processing step, the update data is recorded in the recording step, the result of the update data recording is output in the result output step, and the result is converted into an analog signal in the first D / A conversion step. In the signal transmission step of No. 1, output in the update data transmission step, in the update data transmission step, the second signal reception step receives the analog signal output in the data reception step,
In the second A / D conversion process, the signal is converted into a digital signal,
Predetermined processing is performed in the data processing step. Therefore, bidirectional communication between the update data transmitting means and the update data receiving means becomes possible.

In the invention according to claim 8, the update data recording method according to claim 7 further comprises an authentication step (STEP 20) for performing authentication between the update data transmitting means and the update data receiving means. Authentication process (STEP2
0) is a receiving means discriminating signal transmitting step (STEP 41) for transmitting the discriminating signal of the update data receiving means, and the updating data receiving means by receiving the discriminating signal output in the receiving means discriminating signal transmitting step (STEP 41). It is decided to have a receiving means discriminating step (STEP 42) for discriminating the type.

As a result, the update data transmitting means performs the device authentication step (STEP 20) before transmitting the update data.
The receiving means discriminating signal transmitting step (STEP 41) receives the discriminating signal and the receiving means discriminating step (STEP 42) discriminates the type of the update data receiving means. Therefore, the updating data transmitting means is the updating data receiving means. It is possible to transmit update data according to the type. That is, the authentication process (STEP 20) without preparing as many update data transmitting means as the type of update data receiving means.
Since the model on the update data receiving means side can be recognized by, it becomes possible to select and send the update data suitable for the model from a plurality of types of update data prepared in advance. Thus, it becomes possible to transmit update data according to the type to a plurality of types of update data receiving means.

[0026]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of an update data recording device, an update data transmitting / receiving system, an update data recording method and an update data transmitting / receiving method according to the present invention will be described below with reference to the drawings.

[0027]

[First Embodiment] FIG. 1 is a block diagram showing the overall structure of a DVD-RW player according to a first embodiment of the present invention.

The analog input terminal 1 is an analog input means, A / D, which is an analog signal S _i to A / D conversion means of the program according to the analog signal S _i or the invention according to the audio or video input from an external Output to the converter 2. The A / D converter 2, which is A / D conversion means, converts the input analog signal S _i into a digital signal S _d ,
Output to the signal switch 3. The signal switch 3 is composed of, for example, a multiplexer, and outputs the signal S _d to the audio / video processing CP according to the switching instruction signal S _slc output from the CPU 12.
The signal S _avi is output to U4, or is output to the CPU 12 for updating the memory data, which is the data extracting means, as the signal S _m . The audio / video processing CPU 4 is an information processing device for audio / video processing, and is constituted by, for example, an information processing device CPU, processes the signal S _avi input from the signal switch 3 and outputs it to the encoder 5 as an output signal S _enci. The signal S _deco input from the decoder 8 is output while being output, and D
The signal S _avo is output to the / A converter 9. The encoder 5 outputs the processed signals S _ENCi input signal S _Enco the optical pickup 6. The optical pickup 6 has a signal S
_{The enco} is recorded on the optical disc 7, and the signal data is read from the optical disc 7 to obtain the signal S _deci and the decoder 8
Output to. The optical disk 7 records the input audio or video signal. The decoder 8 receives the input signal S _deci
CP for audio / video processing by decoding the signal as a signal S _deco
Output to U4. The D / A converter 9 receives the input signal S
_{Converts avo} to analog signal S _o and outputs analog output terminal 10
Output to. The analog output terminal 10 is connected to the D / A converter 9
The signal S _o input from is output to the outside. The operation panel 11 is used to set operation settings such as reproduction and recording of audio and video.
It is an input means for instructing the PU 12 as the signal S _c . The CPU 12 which is a data extracting means is an information processing device,
Upon receiving the signal S _c of the operation panel 11, the switching instruction signal S _slc is output to the signal switch 3, the write signal S _w is output to the memory 15, the update data is written to the memory 15, and the memory 15 is written. The operations of the audio / video processing CPU 4 and the spindle driver 13 are controlled in accordance with the recorded program.
The spindle driver 13, a control means for controlling the operation of the spindle motor 14 in accordance with an instruction S _cs of CPU 12. The spindle motor 14 is the spindle driver 1
3 is a drive mechanism for rotating the optical disc in accordance with the instruction S _{s of} 3. The memory 15, which is a recording unit, is composed of, for example, a flash memory, and records programs and parameters that control the operation of the device. The display lamp 16 is, for example, L
A display unit configured by an ED for displaying the operation result of the CPU 12.

The analog signal S _i input from the analog input terminal 1 which is the analog input means is converted into a digital signal S _d by the A / D converter 2 which is the A / D conversion means and output to the signal switch 3. To be done. The signal switch 3 outputs the signal S _d according to the switching instruction signal S _slc output from the CPU 12 which receives the input S _c of the operation panel 11 described later.
Whether to output to the image processing CPU 4 as a signal S _avi ,
CPU 12 for updating memory data, which is data extraction means
To the signal S _m .

The signal S _avi output to the audio / video processing CPU 4 is internally subjected to predetermined processing and output to the encoder 5 as an output signal S _enci , and is output to the optical disk 7 via the optical pickup 6 as a signal S _enco. Will be recorded.

Further, the optical pickup 6 which has read the signal data from the optical disk 7 outputs the signal S _{de ci} to the decoder 8, and the decoder 8 decodes the signal S _deci and outputs the signal S _{de ci.}
Output as _deco , and the signal S _deco is the CP for audio / video processing.
The signal S _avo is output by U4 and is _output by the D / A converter 9 as S _o, and is output to the analog output terminal 10.

On the other hand, by means of data extraction means from the signal switch 3
Signal S output to a certain CPU 12 _mIs in the CPU 12
The data S_cmIs the recording means
It is output to the memory 15.

The operation at the time of updating the memory of the DVD-RW player having the above configuration will be described with reference to FIG.

FIG. 2 is a flow chart showing the memory updating process.

As shown in FIG. 3, the signal input to the device for updating the memory has a header signal S _h and a footer signal S _{f in} addition to the data body S _pg which is the memory update data.
And an ECC code S that performs error correction on the data body
_ecc is included and is input to the analog input terminal 1 as an analog signal.

First, a mode switching step (STEP 1) for switching the setting of the DVD-RW player to the mode for inputting the update data of the memory is performed.

Usually, the analog signal S _i input from the analog input terminal 1 is a signal such as audio or video,
In the initial state, the output destination of the signal switch 3 is set to the audio / video processing CPU 4. In STEP 1, the device user operates the operation panel 11 to switch the mode so that the signal S _i input from the analog input terminal 1 is the update data of the memory 15 in the DVD-R.
Let the W player recognize. Specifically, the operation panel 11
The setting S _c designated and input by is transmitted to the CPU 12, and the CPU 12 outputs the output destination of the signal switch 3 to the CPU 12.
The switching instruction signal S _slc is output to switch to.

The mode switching step (STE) for switching to the mode for inputting the update data of the memory 15 as described above.
When P1) ends, the output destination of the signal switch 3 is changed to C
At the same time as switching to the PU 12, an output destination switching step (STEP 2) for making the memory 15 in the writable state is performed.

In STEP 2, the signal switch 3 receives the switching instruction signal S _slc output from the CPU 12 and switches the output destination to the CPU 12.

Since the memory 15 is in the read state in the initial state, the CPU 12 outputs the memory control signal S _cm to the memory 15 to make it writable.

The output destination of the signal switching unit 3 is C
While switching to the PU 12, the output destination switching step (STEP 2) for setting the memory 15 in the writable state is completed. By performing the above STEP1 and STEP2, the initial setting for writing the update data to the memory 15 is completed. Next, an analog input step (STEP 3) of taking in an analog signal from the outside is performed.

The analog signal S _i from the outside is taken into the DVD-RW player through the analog input terminal 1.

The analog signal from the outside as described above is
The analog input process (STEP3) for capturing is completed
Then, the analog input from the analog input terminal 1
Signal S _iThe digital signal S_mA / D converted to and output
The conversion step (STEP 4) is performed.

In STEP 2, the output of the signal switch 3
Since the destination has been switched to the CPU 12, STEP3
Analog signal input from analog input terminal 1 at
Issue S _iIs a digital signal S in the A / D converter 2._dTo
The converted signal S is transmitted through the signal switch 3._mAs CPU1
It is output to 2.

When the A / D conversion step (STEP 4) for converting the analog signal S _i input from the analog input terminal 1 into the digital signal S _m and outputting the digital signal S _m as described above is completed, next, a program is executed from the digital signal. update data is data extraction step of extracting and outputting, update data generation step of generating a memory update data S _W (STEP5) is made from converted digital signal S _m.

In STEP 5, the header signal S _h and the footer signal S _f are removed from the digital signal S _{m obtained} by converting the analog signal having the structure shown in FIG. 3 in STEP 4, and the remaining data is the data body S _pg and the ECC code. Divide into S _ecc .

Next, based on the ECC code S _ecc, performs determination as to the presence or absence of errors in the data body S _pg, if it is determined that there is an error, a judgment of whether the error correction based on ECC code S _ecc To do. If it is determined that there is no error, the data body S _pg can be used as it is for memory writing as memory update data, so the step of STEP 5 is terminated and the process proceeds to the next STEP 6.

When it is determined that the error correction is possible, the CPU 12 corrects the error of the data body S _pg based on the ECC code and generates the updated data of the memory. When it is determined that the error cannot be corrected, the series of write operations is completed and the process proceeds to STEP 7 described later.

When the update data generation step (STEP 5) of generating memory update data from the converted digital signal, which is the data extraction step of extracting and outputting the update data of the program from the digital signal, is completed, Next, a recording step (STEP 6) of recording the generated update data in the memory, which is a recording step of recording the output data.

Since the memory 15 is already in the writable state in STEP 2, the CPU 12 outputs the memory update data generated in STEP 5 to the memory 15 to write the update data in the memory 15.

When the recording step (STEP 6) of recording the generated update data in the memory, which is the recording step of recording the output data as described above, is completed, the operation of terminating the writing to the memory is next performed. End process to perform (STEP
7) is performed.

In STEP 6, when the writing of the update data to the memory 15 is completed, the CPU 12 outputs the write end signal S _stat to the display lamp 16. Upon receiving this signal S _stat , the display lamp 16 is turned on. By seeing the lit display of the display lamp 16, the device user can see the DVD.
The setting of the RW player can be switched to the normal mode, the CPU 12 switches the output destination of the signal switch 3 to the audio / video processing CPU 4, and sets the memory 15 to the initial state (reading state).

In STEP 5, if error correction cannot be performed and the process proceeds to STEP 7 without writing to the memory, the display color of the display lamp 16 is changed to turn on the light to notify the user of the abnormal termination.

In addition, depending on the configuration of the device, the memory 15
When the writing of the update data to the normal end is completed, the above series of end operations can be automatically performed.

The ending step (STEP 7) for ending the writing operation to the memory as described above is completed.

In the DVD-RW player described above, the operation panel 11 serves as the mode switching input means, but this can also be performed using a remote controller. At this time, in the normal remote controller, erroneous operation can be eliminated by allowing the remote controller user to record the update data only when the user performs a plurality of specific operations. Further, by permitting the recording of the update data only when the maintenance remote controller is used in addition to the normal remote controller, the erroneous operation can be further eliminated.

[0057]

[Second Embodiment] Next, a second embodiment of the present invention will be described with reference to FIGS.

FIG. 4 is a block diagram showing an outline of the update data recording apparatus according to the second embodiment, and is a block diagram of D in FIG.
The same reference numerals as those used in FIG. 1 are used for the same parts (blocks) or signals as those described in the VD-RW player. In this example,
The difference from the first embodiment shown in FIG. 1 is that a header detector 18, which is an update data determination means, is provided between the A / D converter 2 and the signal switch 3. .

Header detector 1 as update data determination means
_{Reference numeral} 8 denotes, for example, a CPU, and the input signal S _dd.
When the header portion is extracted from the CPU and it is determined that the header portion indicates the memory update data, the switching instruction signal S _slc is output to the signal switch 3 and the CPU 12
To output a signal S _c .

The operation of the update data recording apparatus having the above configuration will be described with reference to FIG.

FIG. 5 is a flow chart showing the memory updating process.

First, an analog input step (STEP 11) of taking in an analog signal from the outside is performed.

The analog signal S _i from the outside is taken into the DVD-RW player through the analog input terminal 1.

When the analog input step (STEP 11) for taking in an analog signal from the outside as described above is completed, next, the analog signal S _i input from the analog input terminal 1 is converted into digital signals S _d and S _dd . Then, the A / D conversion step (STEP 12) of outputting the output is performed.

The analog signal S _i input from the analog input terminal 1 which is the analog input means is digital signals S _d and S _dd in the A / D converter 2 which is the A / D conversion means.
Is converted into the signal S _{d and} is output to the signal switch 3 as the signal S _d , and at the same time, the header detector 18 which is the update data discriminating means.
_Is also output as a signal S _dd .

When the A / D conversion process (STEP 12) for converting the analog signal S _i input from the analog input terminal 1 into the digital signals S _d and S _dd and outputting the signals is completed, next, the input is performed. An update data determination step (STEP 1) for determining whether the signal is update data for the memory
3) is performed.

The header detector 18 receives the input signal S _dd.
When the header portion is extracted from the CPU and it is determined that the header portion indicates the memory update data, the switching instruction signal S _slc is output to the signal switch 3 and the CPU 12
To output a signal S _c .

The update data determination step (S) for determining whether or not the input signal is the update data of the memory as described above.
When TEP 13) ends, next, an output destination switching step (STEP 14) is performed in which the output destination of the signal switch 3 is switched to the CPU 12 and the memory 15 is set to the writable state.

When the instruction of the switching instruction signal S _slc is received,
The signal switch 3 switches the output destination of the signal S _d to the CPU 12 for updating the memory data, which is the data extracting means.

In parallel with this, since the memory 15 is in the read state in the initial state, the memory 1
In order to put 5 into the writable state, the CPU 12 sets the memory 1
The memory control signal S _cm is output to the memory cell 5.

The output destination of the signal switch 3 as described above is C
Upon completion of the output destination switching step (STEP 14) for switching to the PU 12 and setting the memory 15 in the writable state, the converted digital data, which is the data extraction step for extracting and outputting the program update data from the digital signal, is performed. An update data generation step (STEP 15) of generating memory update data from the signal is performed.

This STEP 15 is the same step as STEP 5 in the first embodiment. That is, STEP1
4, the output destination of the signal switch 3 is switched to the CPU 12, so the analog signal S _i is converted into a digital signal S _d in the A / D converter 2 and the signal switch 3
Is output to the CPU 12 as a signal S _m via.

The header signal S _h and the footer signal S _f are removed from the signal S _m , and it is judged whether or not there is an error in the data body S _pg based on the ECC code S _{e cc} , and it is judged that there is an error. In this case, whether or not error correction is possible is determined based on the ECC code S _ecc . If it is judged that there is no error, ST
The process of EP15 is completed and the process proceeds to the next STEP16.

When it is determined that the error correction is possible, the CPU 12 corrects the error of the data body S _pg based on the ECC code and generates the updated data of the memory. If it is determined that the error cannot be corrected, the series of write operations is completed and the process proceeds to STEP 17 described later.

When the update data generating step (STEP 15) of generating the memory update data from the converted digital signal, which is the data extracting step of extracting and outputting the update data of the program from the digital signal, is completed, Next, a recording step (STEP 16) of recording the generated update data in the memory is performed.

Since the memory 16 is already writable in STEP 14, the CPU 12 sends the memory update data generated in STEP 15 to the memory 1
By outputting to 5, the update data is written in the memory 15.

When the recording step (STEP 16) of recording the generated update data in the memory as described above is completed, then the ending step (STEP 17) of performing the operation of ending the writing in the memory is performed.

At STEP 16, when the writing of the update data to the memory 15 is completed, the CPU 12 outputs the write end signal S _stat to the display lamp 16.

Further, the CPU 12 outputs a signal S _slc2 for notifying the signal switch 3 that the memory writing is normally completed. _Upon receiving the signal S _slc2 , the signal switch 3 switches the output destination of the digital signal S _{d to} the audio / video processing CPU 4 in the initial state.

As described above, in the present embodiment, when the writing of the update data to the memory 15 is normally completed, the above series of end operations can be automatically performed.

In STEP 15, if the error correction cannot be performed and the process proceeds to STEP 17 without writing to the memory, the CPU 12 notifies the device user of abnormal termination by changing the display color of the display lamp 16 to light it.

The ending step (STEP 17) for ending the writing operation to the memory as described above is completed.

In the initial state, the output destination of the signal S _m of the signal switch 3 is set to the CPU 12, and the header of all the input signals S _m is detected in the CPU 12 to control the output destination of the signal switch 3. You can also do it.
In that case, in STEP 14 described above, when the CPU 12 determines from the header portion of the input signal S _m that it is not the data for memory update, the signal is sent to the signal switch 3 as a signal such as audio or video. Output S _slc (not shown). When the CPU 12 determines that the input signal S _m is the data for updating the memory, the CPU 12
Memory 1 to put the memory 15 in a writable state.
The write signal S _w is output to 5 (not shown).

[0084]

[Third Embodiment] FIG. 6 is a block diagram showing a third embodiment.

The update data receiver 20 and the update data transmitter 21 are connected via two analog communication lines 101 and 102. That is, the analog input terminal 26 which is the second signal receiving means and the A / D which is the second A / D converting means.
D converter 24, CPU 23 which is signal generation means and second data processing means, and D which is second D / A conversion means
A / A converter 22, an update data transmitter 21 which is an update data transmitting means having an analog output terminal 25 which is a second signal transmitting means, an analog input terminal 1 which is a first signal receiving means, and a first signal receiving means. A / D converter 2 which is A / D conversion means, header detector 18 which is first data extraction means, signal switcher 3, CPU 12 which is first data processing means and result output means, and recording means Memory 15, which is the first
The D / A converter 9 which is the D / A conversion means and the update data receiver 20 which is the update data receiving means having the analog output terminal 10 which is the first signal transmitting means are two analog communication lines. Two-way communication is possible via 101 and 102.

The D / A converter 22, which is the second D / A conversion means, converts the input digital signal S _ch1 into an analog signal S _ch2 and outputs it to the analog output terminal 25.

The CPU 23, which is the signal generating means and the second data processing means, is an information processing device, generates a signal inquiring whether the update data receiver 20 is a proper device, and outputs it to the update data receiver 20 side. At the same time, after confirming the authentication, program update data is generated and output to the update data receiver 20.

The A / D converter 24, which is the second A / D conversion means, digitally converts the analog signal _Sch3 into a CPU.
To 23.

The analog output terminal 25, which is the second signal transmitting means, sends the analog signal S _ch2 to the analog communication line 10
Output to 1.

The analog input terminal 26, which is the second signal receiving means, outputs the analog signal S _o input from the analog communication line 102 to the A / D converter 24 as the signal S _ch3 .

The analog communication line 101 transmits the analog signal S _ch2 from the update data transmitter 21 to the update data receiver 2
Send to 0.

The analog communication line 102 transmits the analog signal S _o from the update data receiver 20 to the update data transmitter 21.
Send to.

The update data transmitter 21 is a data transmitting means for outputting the update data in the memory 15 of the update data receiver 20 to the update data receiver 20 which is the above-mentioned update data receiving means.

The update data receiver 20 is an update data receiving means according to the present invention incorporated in an AV device such as a DVD-RW player, and has the same configuration as that of the second embodiment (audio / video processing). The CPU for use is not shown).

As a result, the analog signal output from the update data transmitter 21 is received by the analog input terminal 1 of the update data receiver 20 via the analog communication line 101, and A
The signal is converted into a digital signal by the / D converter 2, the header detector 18 analyzes the header portion, the signal switch 3 is switched, the CPU 12 performs a predetermined process, the data main body is taken out, and the data in the memory 15 is updated. The result is output to the D / A converter 9. The D / A converter 9 converts the signal into an analog signal, and the analog output terminal 10 outputs it to the update data transmitter 21 side.

In the update data transmitter 21, the analog input terminal 26 receives the analog signal output from the update data receiver 20 via the analog communication line 102, and A / A
The D converter 24 converts the signal into a digital signal, and the CPU 23 performs a predetermined process.

Therefore, the bidirectional communication between the update data transmitter 21 and the update data receiver 20 becomes possible.

In addition, when the communication failure occurs after the start of communication due to the bidirectional communication being enabled, the update data receiver 2
The 0 side notifies the update data transmitter 21 side of that fact, so that the update data transmitter 21 can perform retransmission, and when the update data transmitter 21 side sends a specific signal, the update data receiver 20 By the side responding and transmitting a signal corresponding thereto, it is possible to inform the update data transmitter 21 side that the update data receiver 20 is a legitimate device, and the update data transmitter 21 and the update data receiver 20 When the update data receiver 20 is not a legitimate data receiver, it is possible to prevent data from being illegally leaked from the update data transmitter 21.

The operation of the update data transmission / reception system having the above configuration will be described below with reference to FIG.

FIG. 7 is a flow chart showing the update data transmitting / receiving method.

First, in order for the update data transmitter 21 to recognize that the update data receiver 20 is a legitimate data receiver, the update data transmitter 21 and the update data receiver 20
An authentication step (STEP 20) for performing authentication is performed between and. Since this authentication step (STEP 20) is similar in content to the update data transmission / reception step (STEP 21 to STEP 35) described later, only a brief description will be given in the description of the authentication step (STEP 20).

In the signal generation step (STEP 21),
The CPU 23 on the update data transmitter 21 side generates a status signal S _ch1 for inquiring about the status of the update data receiver 20 and outputs it to the D / A converter 22.

In the second D / A conversion step (STEP 22), the status signal S _ch1 inquiring about the state of the update data receiver 20 is converted into the analog signal S _ch2 in the D / A converter 22 and output.

In the second signal transmitting step (STEP 23), the output analog signal S _{ch 2} is output to the update data receiving step (STEP 24 to STEP 32).

In the first signal receiving step (STEP 24), the analog signal S _i is received.

In the first A / D conversion step (STEP 25), the analog signal S _ch1 is converted into digital signals S _d and S _dd in the A / D converter 2 and output.

First data extraction step of extracting and outputting data from the digital signals S _d and S _dd (STEP 26)
In, the header detector 18 extracts the header portion from the input signal S _dd and determines that the header portion is a header portion indicating a status signal for inquiring the state of the update data receiver 20. Switching instruction signal S _{sl c}
And the signal S _c to the CPU 12.

In the output destination switching step (STEP 27), the output destination of the signal switch 3 is switched to the CPU 12.

Data generation step (STEP 28) which is the first data processing step of subjecting the digital signal to predetermined processing
At, a status signal S _slc2 for inquiring the status of the update data receiver 20 is generated from the converted digital signal.

In the result output step (STEP 30),
In response to the status signal S _slc2 that inquires about the state of the update data receiver 20, the CPU 12 _outputs to the D / A converter 9 a status signal S _avo that _returns the state of the update data receiver 20.

In the first D / A conversion step (STEP 31), the D / A converter 9 converts the status signal S _avo , which replies the status of the update data receiver 20, into an analog signal S _o and outputs it.

[0112] In the first signal transmission step (STEP 32), the analog signal S _o of the later-described data transmission process (STEP33~STEP35, STEP21~STE
Output to P23).

In the second signal receiving step (STEP 33), the analog signal S _o output in the first signal transmitting step (STEP 32) is received.

In the second A / D conversion step (STEP 34), the A / D converter 24 converts the analog signal S _ch3 output in the second signal receiving step into a digital signal S _ch4 and outputs it.

The state of the update data receiver 20 which is the digital signal output in the second data processing step (STEP 35) in which the new data output in the second A / D conversion step (STEP 34) is subjected to predetermined processing. The status signal S _ch4 that answers
23 recognizes the status of the update data receiver 20 and determines the next operation.

That is, by the series of operations described above,
The update data receiver 20 receives a status signal output from the CPU 23 on the update data transmitter 21 side and inquires about the state of the update data receiver 20, and the update data receiver 20 receives the status signal.
The CPU 12 on the side outputs a status signal indicating the status of the update data receiver 20. Next, the status signal for replying the status of the update data receiver 20 output from the CPU 12 on the update data receiver 20 side is sent to the update data transmitter 21.
Then, the CPU 23 on the update data transmitter 21 side can recognize the state of the update data receiver 20 and determine the next operation.

Thus, the update data transmitter 21 can recognize that the update data receiver 20 is a regular data receiver, and the update data transmitter 21 and the update data receiver 20 can be recognized.
The authentication process (STEP 20) between and is completed.

When the authentication process (STEP 20) is completed,
In a signal generation step (STEP 21) of generating and outputting a signal related to program update data, which is a signal generation step of generating and outputting a signal, the CPU 23 generates and outputs a signal related to program update data, and the signal generation A second D / A conversion step (STEP 22) of converting the signal output by the step to an analog signal and outputting the analog signal is performed.

In STEP 22, the data signal S _ch1 generated by the CPU 23 in STEP 21 and output to the D / A converter 22 is converted into the analog signal S _ch2 in the D / A converter 22 and output to the analog output terminal 25. It When the second D / A conversion step (STEP 22) of converting the signal output from the signal generation step into an analog signal and outputting the analog signal as described above is completed, then the second D / A conversion step is performed. A second signal transmitting step (STEP2) of outputting an analog signal to be output to the update data receiving step.
3) is performed.

The new data signal S _ch2 output to the analog terminal 25 in STEP ₂₂ is output to the update data receiver 20 side via the analog output terminal 25 and the analog communication line 101.

When the second signal transmitting step (STEP 23) for outputting the analog signal output from the second D / A converting step to the update data receiving step as described above is completed, the output is made in STEP 23. First signal receiving step (STEP 2) of receiving the analog signal S _ch1
4) is performed.

At STEP 24, the status signal S of the analog signal is sent via the analog communication line 101.
The analog input terminal 1 of the update data receiver 20 that receives _ch2 outputs a signal to the A / D converter 2.

When the first signal receiving step (STEP 24) of receiving the analog signal S _ch2 output in STEP 23 is completed, the first analog signal is converted into a digital signal and then output. A / D
The conversion step (STEP 25) is performed.

[0124] analog signal inputted from the analog input terminal 1 S _i is converted in the A / D converter 2 is A / D converting means a digital signal S _d, the S _dd, the signal switching device 3 as the signal S _d At the same time as being output, it is also output as a signal S _dd to the header detector 18 which is the update data discriminating means.

As described above, the first A / D conversion step (S) for converting the analog signal into a digital signal and outputting the digital signal.
When TEP25) is completed, a first data extraction step (STEP26) of extracting and outputting program update data from the digital signal is then performed.

The header detector 18 receives the input signal S _dd.
When the header portion is extracted from the CPU and it is determined that the header portion indicates the memory update data, the switching instruction signal S _slc is output to the signal switch 3 and the CPU 12
To output a signal S _c .

When the first data extraction step (STEP 26) for extracting and outputting the program update data from the digital signal as described above is completed, the output destination of the digital signal is next based on the extracted update data. Output destination of the signal switch 3 which is the output destination switching process for switching
An output destination switching step (STEP 27) is performed to switch to U12 and to put the memory 15 in a writable state.

When the instruction of the switching instruction signal S _slc is received,
The signal switch 3 switches the output destination of the signal S _d to the CPU 12 for updating the memory data, which is the data extracting means.

In the initial state, the memory 15 has the reading status.
Since it is in the state of writing, the memory 15 is set to the writable state.
Therefore, the CPU 12 sends a memory control signal to the memory 15.
Issue S _cmIs output.

The output destination switching step of switching the output destination of the digital signal based on the extracted update data as described above. The output destination of the signal switch 3 is switched to the CPU 12 and the memory 15 is set to the writable state. After the previous switching step (STEP 27) is completed, the next step is a first data processing step of performing a predetermined process on the digital signal.
An update data generation step (STEP 28) of generating memory update data from the converted digital signal is performed.

In STEP 27, since the output destination of the signal switch 3 is switched to the CPU 12, the analog signal S _i input from the analog input terminal 1 is converted into a digital signal S _d in the A / D converter 2 and is a signal. The signal S _m is output to the CPU 12 via the switch 3.

At STEP 28, the header signal S _h and the footer signal S _f are removed from the signal S _m input to the CPU 12, and the data body S is obtained based on the ECC code S _ecc.
It is determined whether or not there is an error in _pg , and if it is determined that there is an error, whether or not error correction is possible is determined based on the ECC code S _ecc . If it is determined that there is no error, STEP
The process of step 28 is completed and the process proceeds to the next STEP 29.

When it is judged that the error correction is possible, the CPU 12 corrects the error of the data body S _pg based on the ECC code and generates the updated data of the memory. When it is determined that the error cannot be corrected, the series of write operations is completed and the process proceeds to STEP 30 described later.

When the update data generating step (STEP 28) for generating the memory update data from the converted digital signal, which is the first data processing step for performing the predetermined processing on the digital signal as described above, is completed, A recording step (STEP 29) of recording the generated update data in the memory, which is a recording step of recording the update data, is performed.

[0135] Since the previously memory 15 in STEP27 is in a writable state, writes the updated data into the memory 15 by CPU12 and memory update data S _W generated in STEP28 is output to the memory 15.

When the recording step (STEP 29) of recording the generated update data in the memory, which is the recording step of recording the update data as described above, is completed, the result output step of outputting the result of recording the update data A certain result output process for performing a write end operation to the memory (STEP 30)
Is done.

In STEP 29, when the writing of the update data to the memory 15 is completed, the CPU 12 outputs the write end signal S _stat to the display lamp 16.

Further, the CPU 12 outputs a signal S _slc2 for notifying the signal switch 3 that the memory writing has been normally completed. _Upon receiving the signal S _slc2 , the signal switch 3 switches the output destination of the digital signal S _{d to} the audio / video processing CPU 4 in the initial state.

Further, the CPU 12 outputs to the D / A converter 9 a signal S _avo indicating that the write operation to the memory 15 has been normally completed.

In STEP 28, if the error correction cannot be performed and the process proceeds to STEP 30 without writing to the memory, the CPU 12 sends a signal S indicating that the abnormal end has occurred.
_{Output avo} to the D / A converter 9.

When the result output step (STEP 30) for ending the writing to the memory, which is the result output step for outputting the result of the recording of the update data as described above, is finished, the result of the data processing is next. The first D / A conversion step (STEP 31) of converting the analog signal into an analog signal and outputting the analog signal is performed.

The CPU 12 on the update data receiver 20 side generates the end signal S _avo of the write operation to the memory 15 and outputs D /
Since the signal is output to the A converter 9, the D / A converter 9 converts this signal S _avo into an analog signal S _o and outputs it to the analog output terminal 10.
Output to.

When the first D / A conversion step (STEP 31) for converting the result of the data processing into an analog signal and outputting the analog signal as described above is completed, the analog signal is then sent to the data transmitting step described later. A first signal transmitting step (STEP 32) of outputting is performed.

The analog output terminal 10 is connected to the D / A converter 9
And outputs an end signal to the update data transmitter 21 side.

As described above, the first signal transmitting step (STEP) for outputting the analog signal to the update data transmitting step described later.
32) is finished.

The update data receiving step (ST
EP24 to 32) are completed.

Next, the second signal receiving step (STEP) for receiving the analog signal output from the update data receiving step.
33) is performed.

At STEP 33, the analog input terminal 26 of the update data transmitter 21, which has received the end signal S _o of the analog signal via the analog communication line 102, outputs the end signal S _ch3 to the A / D converter 24.

When the second signal receiving step (STEP 33) for receiving the analog signal output by the update data receiving step is completed, the analog signal output by the second signal receiving step is next output. Second A / D conversion step of converting to a digital signal and outputting (STEP 34)
Is done.

The analog signal S _ch3 input from the analog input terminal 24 is the A / D converter 2 which is the A / D conversion means.
4 is converted into a digital signal S _ch4 , and the CPU2
3 is output.

When the second A / D conversion step (STEP 34) for converting the analog signal output from the second signal receiving step into a digital signal and outputting the digital signal as described above is completed, the second Second update data processing step (S) for performing predetermined processing on the update data output from the A / D conversion step of
TEP35) is performed.

[0152] In STEP 35, remove it if it is added and the signal S _ch4 in the header signal S _h and footers signal S _f which is inputted to the CPU 23, the ECC code S _ecc if it is added ECC code S _ecc Based on this, it is determined whether or not there is an error in the data body S _pg , and the data body S _pg is generated.

Predetermined processing is performed based on the data body S _pg generated here, and the CPU 23 determines the next operation.

As described above, the second update data processing step (STEP 35) of performing a predetermined process on the data output from the second A / D conversion step is completed. If you need
The process proceeds to STEP 21 again, and a new data signal is generated and output to the D / A converter 22.

As described above, the update data transmitting step (STEP3
3-35) is completed.

As a result, bidirectional communication between the update data transmitting means and the update data receiving means becomes possible.

The authentication process (ST
EP20) is characteristic in comparison with the update data transmission / reception process (STEP21 to STEP35) executed thereafter. Since the writing to the memory 15 is not performed in the authentication process (STEP20), the output destination switching process (STEP21) is performed. STE
In P27), the memory 15 is not made writable, the recording step (STEP 29) for recording data in the memory 15 is not executed, and in the result output step (STEP 30), instead of the writing result to the memory 15, The point is to output a status signal S _avo that replies the status of the update data receiver 20.

When the communication failure occurs after the start of communication due to the bidirectional communication being enabled, the update data receiver side notifies the update data transmitter side of that, and the recommunication can be performed. , When the update data transmitter side sends a specific signal, the update data receiver side sends a signal according to it, so that the update data receiver can inform the update data transmitter side that it is a legitimate device. Therefore, it is possible to perform authentication between the update data transmitter and the update data receiver. If the update data receiver 20 is not a legitimate data receiver, the data is illegally leaked from the update data transmitter 21. It is possible to prevent this.

That is, if a communication failure occurs after the start of communication, as in the case of abnormal termination in STEP 26,
At STEP 28, the CPU 12 issues an abnormal end signal, so that the update data transmitter side can recognize this.

For the device authentication of the update data receiver, the update data transmitter makes an inquiry as to whether the update data receiver is a legitimate device in STEP 21, and after the update data receiver side responds to the inquiry, By transmitting the update data by the above method, it is possible to prevent the data from being illegally leaked at the time of transmitting the update data. Further, by performing device authentication before transmitting update data, it is possible to select and transmit update data that matches the type of device on the receiving side.

In the third embodiment, STEP26
And STEP 27, the header detector 18 outputs the signal S _dd.
The header part is detected and the output destination is automatically switched. However, when the device user manually switches the output destination before transmitting the update data, the header detector 18 serving as the first header extraction means These steps can be omitted.

[0162]

[Fourth Embodiment] In the invention according to the fourth embodiment, in the update data transmitting / receiving system according to the third embodiment shown in FIG. 6, the CPU 12 of the update data receiver 20 receives the update data. The CPU 23 included in the update data transmitter 21 also functions as a reception unit determination signal transmission unit that transmits a model determination signal that is a determination signal of the device 20.
Also functions as a receiving unit determining unit that receives the model determining signal output from the CPU 12 and determines the type of the update data receiver 20. In addition, the update data transmitter 21
Has an H / D 27 that stores a plurality of types of update data according to the model of the update data receiver 20.

The operation of the update data transmission / reception system having the above configuration has many parts in common with the operation of the third embodiment, so the characteristic parts will be described below with reference to FIG.

The invention according to the fourth embodiment is an authentication step (STEP 20) for performing authentication between the update data transmitter 21 and the update data receiver 20 in the update data recording method according to the third embodiment. Has a characteristic part.

FIG. 8 shows the authentication step (STEP2) in the update data transmission / reception method according to the fourth embodiment of the present invention.
It is a flowchart which shows 0).

That is, in the signal generating step (STEP 21), the status signal S _ch1 for inquiring the state of the update data receiver 20 output from the CPU 23 on the update data transmitter 21 side is the update data recording according to the third embodiment. A status signal S _slc2 that is input to the CPU 12 on the update data receiver 20 side and inquires about the status of the update data receiver 20 in the same procedure as STEP 22 to STEP 28 described in the authentication step (STEP 20) in the _method.
Is generated.

Thereafter, in the receiver model discrimination signal output step (STEP 41) of transmitting the model discrimination signal of the update data receiver 20, which is the receiving section discrimination signal transmitting step of transmitting the discrimination signal of the update data receiving means, the CPU 12 is executed. Generates a model discrimination signal which is a discrimination signal indicating the model type of the update data receiver 20.

In the result output step (STEP 30),
The CPU 12 executes the receiver model discrimination signal output step (ST
A status signal S _{avo including} the model discrimination signal generated in EP41) and a signal indicating the state of the update data receiver 20 is output.

After that, the data is input to the CPU 23 on the update data transmission 21 side through the steps 31 to 34 described in the authentication step (STEP 20) in the update data recording method according to the third embodiment.

In the second data processing step (STEP 35), a predetermined process is performed on the model discrimination signal of the update data receiver 20 and the status signal for replying the status, and the CPU
23 is divided into a model discrimination signal of the update data receiver 20 and a signal indicating the state of the update data receiver 20.

Receiver discriminating step (STEP 42) which is a receiving means discriminating step for discriminating the type of update data receiving means.
In the step of outputting the receiver model discrimination signal (STEP
The model discrimination signal output in 41) is recognized to recognize the model of the update data receiver 20.

As a result, the update data receiver 20 can recognize that the update data receiver 20 is a legitimate data receiver and its model, and the authentication between the update data transmitter 21 and the update data receiver 20 can be performed. The process (STEP 20) is completed.

That is, by the series of operations described above,
The update data receiver 20 receives a status signal output from the CPU 23 on the update data transmitter 21 side and inquires about the state of the update data receiver 20, and the update data receiver 20 receives the status signal.
The CPU 12 on the side outputs a model discrimination signal of the update data receiver 20 and a signal indicating the state of the update data receiver 20.
Next, a model identification signal on the update data receiver 20 side and a signal indicating the state of the update data receiver 20 are sent to the update data transmitter 2
1, the CPU 23 on the update data transmitter 21 side recognizes the model and state of the update data receiver 20 and can determine the next operation.

When the above authentication process (STEP 20) is completed, the update data transmission / reception process (STEP 21 to STEP 35) described in the third embodiment is carried out.

That is, the CPU 23 of the update data transmitter 21
Selects and calls the update data corresponding to the model of the update data receiver 20 from the update data stored in the H / D 27 in advance, and generates and outputs a signal (STEP2
1) The update data transmission / reception process after STEP22 is executed.

As a result, in the authentication step (STEP 20) performed before transmitting / receiving the update data, the update data transmitter 21
Can recognize the model of the update data receiver 20, it is possible to select and transmit the update data suitable for the model. That is, even if the number of update data transmitters 21 corresponding to the model of the update data receiver 20 is not prepared, a plurality of types of update data are stored in one update data transmitter 21, and the authentication process (STEP 20 ), The update data transmitter 21 recognizes the model of the update data receiver 20, and it becomes possible to select and transmit the update data according to the model.

[0177]

[Effects of the Invention] Claims 1 and 5 described above.
According to the invention of claim 1, in an apparatus having an analog input terminal but not a digital input terminal,
When it is necessary to update the data for controlling the equipment, the analog signal input from the analog input means of the equipment is converted into a digital signal by the A / D conversion means, and the data extraction means converts the updated data from the digital signal. Since the update data is extracted and output, and the update data is recorded by the recording means, it is possible to input the update data from the analog input terminal, which eliminates the need for memory replacement for data update and reduces the work load. In addition, since no special work using a computer is required to update the memory data, even a device user who does not have specialized knowledge can update the data, and the device housing can be opened. Since there is no work, it is possible to secure the safety of the equipment user in the data update work, and also to update the data frequently or The burden of the cost even if the data update of the device that uses a large amount of distribution in place is no longer increasing. Further, in the case of a device of a system in which an analog signal such as audio or video input from an analog input terminal is converted into a digital signal by an A / D conversion means inside the device and processed,
Since the update data can be converted into a digital signal by using the existing A / D conversion means, it is possible to suppress an increase in cost burden due to the addition of new A / D conversion means.

According to the inventions of claims 2 and 6, the update data discriminating means judges whether or not the input analog signal is the update data to be recorded in the recording means. It is possible to omit the setting work of, and it becomes easier for the device user who has no specialized knowledge to update the data.

Further, according to the inventions according to claims 3 and 7, bidirectional communication between the update data transmitting means and the update data receiving means becomes possible.

Further, since the bidirectional communication becomes possible, when a communication failure occurs after the start of communication, the update data receiving means side notifies the update data transmitting means side of the communication failure so that the recommunication can be performed. Became.

Furthermore, when the update data transmitting means side sends a certain signal, the update data receiving means side transmits a signal corresponding thereto, thereby confirming that the update data receiving means is a legitimate device. Since it is possible to authenticate between the update data transmitting means and the update data receiving means, it is possible to prevent the data from being illegally leaked from the update data transmitting means. .

Further, according to the inventions of claims 4 and 8, the device authentication step (ST
In EP20), the receiving means discrimination signal transmitting step (ST
In EP41), the update data transmitting means receives the determination signal output from the receiving means determining signal transmitting means, and in the receiving means determining step (STEP42), the receiving means determining means of the update data transmitting means determines the type of the updating data receiving means. Therefore, the update data transmitting means can output the update data according to the type of the update data receiving means. That is, the model on the update data receiving means side can be recognized in the authentication step (STEP 20) without preparing the number of update data transmitting means corresponding to the type of update data receiving means. It becomes possible to select and send the update data that matches the model from the update data, and one update data transmission means outputs the update data according to the type to multiple types of update data receiving means. It becomes possible to do.

[Brief description of drawings]

FIG. 1 is a DVD-R according to a first embodiment of the invention.
It is a block diagram which shows the whole structure of a W player.

FIG. 2 is a flowchart showing a memory update process according to the first embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a signal input to the device for updating a memory in the first embodiment of the present invention.

FIG. 4 is a block diagram showing an outline of an update data recording device according to a second embodiment of the present invention.

FIG. 5 is a flowchart showing a memory update process according to the second embodiment of the present invention.

FIG. 6 is a block diagram showing a configuration of an update data transmission / reception system according to a third embodiment and a fourth embodiment of the present invention.

FIG. 7 is a flowchart showing an update data transmitting / receiving method according to the third embodiment of the present invention.

FIG. 8 is a flowchart showing an authentication step (STEP 20) in the update data transmission / reception method according to the fourth embodiment of the present invention.

[Explanation of symbols]

1: Analog input terminal 2: A / D converter 3: Signal switch 4: CPU for audio / video processing 5: Encoder 6: Optical pickup 7: Optical disc 8: Decoder 9: D / A converter 10: Analog output terminal 11: Operation panel 12: CPU 13: Spindle driver 14: Spindle motor 15: Memory 16: Indicator lamp 18: Header detector 20: Update data receiver 21: Update data transmitter 22: D / A converter 23: CPU 24: A / D converter 25: Analog output terminal 26: Analog input terminal 27: H / D 101: analog communication line 102: analog communication line

Claims (8)

[Claims] 1. An update input data recording device of at least one of an audio device and a video device which operates based on a program recorded in a recording device to be described later, and an analog input device for receiving an analog signal from the outside, A / D converting means for converting an analog signal into a digital signal and outputting the data, data extracting means for extracting and outputting the update data of the program from the digital signal, and recording means for recording the output data, An update data recording device comprising: 2. The update data recording device according to claim 1, further comprising update data determining means for determining whether or not the input analog signal is update data to be recorded in the recording means. Recording device. 3. At least one of update data transmitting means for transmitting update data of a program recorded in a recording means of update data receiving means described later as an analog signal, and audio equipment and video equipment for receiving the update data. In the update data transmission / reception system in which the update data receiving unit according to the above is connected via an analog communication line, the update data transmitting unit includes a signal generating unit that generates and outputs a signal related to the update data of the program, and the signal. Second D / A converting means for converting the signal output by the generating means into an analog signal and outputting the analog signal, and second analog / digital converting means for outputting the analog signal output by the second D / A converting means to the update data receiving means. And a second signal receiving means for receiving an analog signal output from the update data receiving means. The receiving means, the second A / D converting means for converting the analog signal output by the second signal receiving means into a digital signal and outputting the digital signal, and the data output by the second A / D converting means are predetermined. A second data processing means for performing the processing of 1), wherein the update data receiving means receives the analog signal output from the update data transmitting means, and the analog signal is a digital signal. First A / D conversion means for converting and outputting to a first digital signal, and a first A / D conversion means for extracting and outputting data from the digital signal
Data extracting means, first data processing means for performing predetermined processing on the data to generate update data of a program recorded in a recording means described later, recording means for recording the update data, and the updating Result outputting means for outputting a result of data recording, first D / A converting means for converting the result of the data processing into an analog signal and outputting the same, and outputting the analog signal for the update data transmitting means 1. An update data transmission / reception system, comprising: 4. The update data transmitting / receiving system according to claim 3, wherein the update data receiving means has a receiving means discrimination signal transmitting means for transmitting a discrimination signal of the update data receiving means, and the update data transmitting means comprises: An update data transmission / reception system comprising: a reception unit determination unit that receives the determination signal output from the reception unit determination signal transmission unit and determines the type of the update data reception unit. 5. An analog input step (STEP 3) for taking in an analog signal from the outside in an update data recording method for at least one of an audio device and a video device operating based on a program recorded in a recording means, A / that converts analog signals into digital signals and outputs
D conversion step (STEP 4), data extraction step (STEP 5) for extracting and outputting the update data of the program from the digital signal, and recording step (STEP) for recording the output data.
6) An update data recording method comprising: 6. The update data recording method according to claim 5, wherein the update data determining step (STEP1) determines whether or not the input analog signal is data to be recorded in the recording step.
3) An update data recording method characterized by having 3). 7. An update data transmitting step of transmitting, as an analog signal, the update data of the program recorded in the recording means of at least one of the audio equipment and the video equipment, and an update data receiving step of receiving the update data. In the update data transmission / reception method having, in the update data transmission step, a signal generation step (STEP 21) of generating and outputting a signal related to the update data of the program, and converting a signal output of the signal generation step into an analog signal. Second D / A conversion step to output (STEP 22)
And a second signal transmitting step (STEP 23) for outputting the analog signal output by the second D / A conversion step to the update data receiving step, and the analog signal output by the update data receiving step is A second signal receiving step (STEP 33) for receiving, a second A / D converting step (STEP 34) for converting the analog signal output by the second signal receiving step into a digital signal and outputting the digital signal, and the second A second data processing step (STEP 35) that performs a predetermined process on the data output from the A / D conversion step of, and the update data receiving step includes converting the analog signal output in the update data transmitting step. A first signal receiving step (STEP 24) of receiving and a first A / D converting step (STEP 2) of converting the analog signal into a digital signal and outputting the digital signal. A), the first data extracting step of extracting and outputting the update data of the program from the digital signal (STEP2
6), an output destination switching step (STEP 27) of switching an output destination of a digital signal based on the extracted data, and a first data processing step of performing predetermined processing on the digital signal to generate update data of a program. (STEP2
8) and a recording step of recording the update data (STEP 29)
A result output step (STEP 30) of outputting a result of recording the update data; a first D / A conversion step (STEP 31) of converting a result of the data processing into an analog signal and outputting the analog signal; And a first signal transmitting step (STEP 32) for outputting to the update data transmitting step. 8. The update data recording method according to claim 7, further comprising an authentication step (STEP20) for performing authentication between the update data transmitting means and the update data receiving means, wherein the authentication step (STEP20) is an update. Receiving means discrimination signal transmitting step for transmitting the discrimination signal of the data receiving means (ST
EP41) and a receiving means discriminating step (STEP42) for discriminating the type of update data receiving means by receiving the discriminating signal output in the receiving means discriminating signal transmitting step (STEP41). How to send and receive data.