JP2003069015A - Semiconductor device - Google Patents

Abstract

(57) [Problem] To reduce the resistance of an emitter electrode of an IGBT and to suppress the cost increase due to a gold wire. An opening of an emitter pad (3) on a chip (1) is set to 50% of an actual operating area of the chip (1).
The openings are formed so as to have an opening area. Further, a versatile semiconductor device can be provided by making the emitter pad (3) symmetric, or extending it to the vicinity of the long side of the chip (1), or by combining the three.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an emitter pad pattern of an insulation type bipolar transistor.

[0002]

2. Description of the Related Art Insulated bipolar transistors (hereinafter referred to as
The IGBT (Insulated Gate Bipolar Transistor) is an element that has both the high-speed switching characteristics of MOSFET and the high output characteristics of bipolar transistor. It has the characteristics of high input impedance and low saturation voltage, and UPS (Uninterruptible Power Supply). ) And a motor drive device.

FIG. 4 is a plan view showing a conventional IGBT, but for convenience of explanation, it shows a state in which the aluminum emitter electrode and the jacket coat attached to the surface are removed. However, the emitter pad and the gate pad are shown to clarify their positions.

In FIG. 4, (101) is an island,
(102) is a chip, (103) is an internal lead, (10)
4) is a gate pad, (105) is a gate routing part,
(106) is a cell region of the operating portion, (107) is a gate lead portion, (108) is an emitter pad, (109) is a wire, and (110) is a post.

A chip (10) is formed on the island (101).
2) is formed, and the inner lead (103) and the island (101) form a continuous coplanar surface. Inside the chip (102), a gate routing part (105) is formed so as to be continuous with the gate pad (104) and surround the outermost peripheral part of the chip (102). The operating cell region (106) is inside the chip (102) and forms a large number of cells (not shown). Gate drawer (10
7) extends from the gate routing portion (105) toward the operating portion cell region (106). The emitter pad (108) represents an opening in a jacket coat (not shown) for conducting current to the outside. In the figure,
Since the jacket coat is omitted, it is shown that the opening position of the emitter pad (108) is clear. The current flowing out from a large number of cells in the operating portion cell region (106) passes through the emitter electrode (not shown) and then the wire (1
09) through the post (1) outside the chip (102)
10). At this time, the emitter pad (108)
Form a rectangular shape that is biased toward the post (110) side as shown in FIG.

FIG. 5 is a diagram showing a cross-sectional structure of a general IGBT. (111) is a collector, (112) is a collector electrode, (113) is a semiconductor substrate, (114) is an epitaxial layer, (115) is a base layer, (116) is an emitter layer, (117) is a trench portion, and (118). ) Represents a gate electrode, (119) represents an emitter electrode, (120) represents an emitter, and (121) represents a gate.

A collector electrode (112) connected to the collector (111) has a P + type semiconductor substrate (1) formed thereon.
13) is formed, and an N− type epitaxial layer (114) is formed on the substrate (113) by epitaxial growth. The P type base layer (115) and the N type emitter layer (116) are formed in the epitaxial layer (114) by ion implantation or the like. Trench part (1
17 is a P type base layer (115) and an emitter layer (11
It penetrates 6) and reaches the epitaxial layer (114). The inside of the trench portion (117) is filled with polysilicon, and a gate oxide film is formed between the polysilicon and the trench portion (117). These trench parts (11
7) and the inside thereof form a gate electrode (118). An emitter electrode (119) made of aluminum is coated on the base layer (115), the emitter layer (116) and the trench part (117). The emitter (120) is connected to the emitter electrode (119) and the gate (121) is connected to a plurality of gate electrodes (118), and they are electrically connected.

In the IGBT, when a positive voltage is applied to the collector electrode (112), the emitter electrode (119) and the gate electrode (118), a channel region is formed in the epitaxial layer (114), and an electron current is emitted from the emitter (120). Through the emitter layer (116) to the epitaxial layer (114), passing through the channel region to reach the P + type semiconductor substrate (113), collector electrode (112) and collector (111).

[0009]

In recent years, the above-mentioned IGBT has a need for a large current (for example, used for a flash of a camera), and the ON resistance of the IGBT is made as small as possible and the peak current is increased. Is required. In order to meet these requirements, the IGBT has been dealt with by using a large number of thin gold wires (109) having low resistance (see FIG. 4). However, while gold wire has high utility value, it also has the disadvantage of high cost. Therefore,
Since there is a limit to reducing the number of fine wires (109), the emitter pad (108) is biased toward the post (110) side to shorten the wires (109) and suppress high cost. Came. However, as a result, the inner cell far from the emitter pad (108) has a drawback that the distance to the wire (109) becomes long and the resistive component on the surface of the chip (102) generally increases. In addition, since the above-described IGBT uses a large number of wires (109), it has a drawback that the time required for assembly increases and the assembly cost increases.

Therefore, in the present application, the emitter pad (108) is used.
The above-mentioned drawbacks are overcome by changing the shape pattern of.

[0011]

According to the present invention, there is provided an insulating bipolar transistor having a semiconductor chip, a jacket coat for covering the chip, and an emitter pad opened for conducting to the outside of the jacket coat. The emitter pad is 5 of the actual operating area of the chip.
Provided is a semiconductor device having an opening area of 0% or more and forming the emitter pad in a symmetrical shape.

[0012]

DETAILED DESCRIPTION OF THE INVENTION The IGBT of the present invention will be described in detail below with reference to FIGS.

FIG. 1 is a plan view of a chip (1) showing a first embodiment of the present invention. For convenience of explanation, a state in which an aluminum emitter electrode and a jacket coat attached to the surface are removed Represents (1) is a chip, (2) is a gate pad, (3) is an emitter pad, (4) is a gate routing part, (5) is a gate extraction part, (6) is an operating part cell region, and (7) is ground. Area, respectively.

Chips (1) on islands (not shown)
The gate routing part (4) is formed inside the chip (1) so as to surround the outermost peripheral part of the chip (1) continuously with the gate pad (2). The operating cell region (6) is inside the chip (1) and has a large number of cells (not shown). The gate lead-out portion (5) extends from the gate lead-out portion (4) toward the operating portion cell region (6). The emitter pad (3) is an opening made in a jacket coat (not shown) for conducting an electric current to the outside. Since the jacket coat is omitted in the figure, the position of the opening is shown so that the position of the emitter pad (3) is clear.

The feature of the first embodiment of the present invention is that the opening area of the emitter pad (3) is 50% or more of the actual operating area of the operating cell region (6) in the chip (1). Is to be formed.

The emitter pad (3) is formed separately from the gate lead-out portion (5). As a result, the shape as shown in FIG.
Secure an opening area of 0% or more.

The ground region (7) represents a part of the opening of the emitter pad (3) located in the center of the chip (1).
The ground area (7) will be described with reference to FIG.

Next, FIG. 2 is a view showing a cross section taken along line XX of FIG. (8) is a copper plate, (9) is a post, (10)
Is a jacket coat, (11) is an emitter electrode, (1
2) is an N-type emitter layer, (13) is a P-type base layer, (1
4) is a trench part, (15) is an epitaxial layer, (1)
6) represents a semiconductor substrate, respectively.

The copper plate (8) is in constant contact with the post (9) outside the chip (1). The copper plate (8) extends from the outside of the chip (1) toward the inside of the chip (1), bends obliquely upward in the middle, and then maintains and extends in parallel with the chip (1) again near the center of the chip (1). It is formed diagonally downward so as to be grounded to the grounding area (7), which is a rectangle formed in the center of the chip (1). At this time, the ground region (7) is in the emitter pad (3) and means a region where the copper plate (8) and the emitter electrode (11) are in contact with each other. The jacket coat (10) protects the entire semiconductor device and has an opening for forming the emitter pad (3). The semiconductor device below the jacket coat (10) and the emitter pad (3) is similar to a normal IGBT, and mainly includes an emitter electrode (11), an N-type emitter layer (12), and a P-type base layer (1).
3), the trench portion (14), the N− type epitaxial layer (15), and the P type semiconductor substrate (16).

As described above, according to the first embodiment of the present invention, since the emitter pad (3) is formed so that 50% or more of the actual operating area of the chip (1) is the opening area, the chip (1) is formed. The heat dissipation property of the device is improved, and the distance from a large number of cells in the chip (1) to the copper plate (8) is shortened on average, the electric conductivity is increased, and the resistive component of the emitter electrode is reduced. it can.

FIG. 3A is a plan view showing the second embodiment of the present invention. The line Y-Y in the drawing represents a straight line that passes through the center of the chip (1) and is parallel to the long side. The feature of the second embodiment of the present invention is that the emitter pad (3) is symmetrical about the line YY.

FIG. 3B is a plan view showing the third embodiment of the present invention. The feature at this time is that the emitter pad (3) is expanded to near the long side of the chip (1).

The second and third embodiments of the present invention can also be used in the method of connecting to a post by a wire that has been used in a conventional IGBT semiconductor device. In other words, the same thin gold wire as in the conventional example is used for the chip (1).
It is also possible to utilize the semiconductor device in which one long side is biased to the vicinity.

In addition, by combining the features of the first to third embodiments, it is possible to provide a semiconductor device which can cope with various IGBT outer shape patterns and is excellent in versatility.

[0025]

As described above, according to the first embodiment of the present invention, the emitter pad (3) opening is formed such that 50% or more of the actual operating area of the chip (1) is the opening area. Also, by arranging the copper plate (8) continuously connected from the external post (9) at the center of the emitter pad (3), a bond wireless structure (clip bond) is formed, which can be realized by easy assembly. Becomes As a result, the distance from each cell in the chip (1) to the copper plate (8) is shortened on average, the emitter resistance of the semiconductor device is reduced, and a large current can be supplied to the post (9).

According to the second and third embodiments of the present invention, since the emitter pad (3) has a symmetrical shape or is formed near the long side of the chip (1), the conventional wire IGB not only for bonding but also for various needs
It is compatible with T and is excellent in versatility. In addition, by combining the first to third embodiments, an IGBT with higher versatility can be provided.

The present invention mainly uses an IG that requires a large amount of current.
Although it is related to BT, it is not particularly limited to IGBT because it can be used for power MOSFETs and the like.

[Brief description of drawings]

FIG. 1 is a plan view showing a first embodiment of the present application.

FIG. 2 is a sectional view showing a first embodiment of the present application.

FIG. 3 is a plan view showing a second embodiment of the present application.

FIG. 4 is a plan view showing a third embodiment of the present application.

FIG. 5 is a plan view and a cross-sectional view of a conventional IGBT.

FIG. 6 is a cross-sectional view of a conventional IGBT.

FIG. 7 is a plan view of a conventional IGBT.

Claims (2)

[Claims] 1. An insulated bipolar transistor comprising: a semiconductor chip; a jacket coat for covering the chip; and an emitter pad formed in the jacket coat for electrical connection to the outside, wherein the emitter pad is the actual chip of the chip. A semiconductor device having an opening area which is 50% or more of an operating area and wherein the emitter pad is formed to have a symmetrical shape. 2. The semiconductor device according to claim 1, wherein the emitter pad is formed at least near one side of the chip.