JP2003068865A - Semiconductor device self-diagnosis method and apparatus - Google Patents

Abstract

(57) [Problem] To provide a method for easily diagnosing a malfunction of a semiconductor device after shipment by enabling a self-diagnosis of each functional block, for example, an automatic diagnosis at the time of power-on of a semiconductor device. And equipment. According to a diagnostic program stored in a memory in advance, a BIST controller that transmits a diagnostic condition to each functional block, a corresponding functional block is diagnosed based on the diagnostic condition, and a diagnosis result is obtained from the corresponding functional block. And the BIST circuit 201 for transmitting the diagnosis result to the BIST controller 20;
A main controller 40 for displaying a normal / abnormal display based on the diagnosis result; transmitting a diagnosis result obtained by the BIST circuit 201 to the main controller 40 via the BIST controller 20; Is displayed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention self-diagnoses each function block operation of a semiconductor device on a substrate on which a semiconductor integrated circuit (LSI) having a plurality of function blocks (hereinafter referred to as a semiconductor device) is mounted. A method and apparatus. More specifically, based on an instruction from an external human interface device,
A BIST provided corresponding to each of the functional blocks, apart from a process such as a numerical operation or an image process that is normally performed on each of the functional blocks (referred to as a normal process).
The present invention relates to a method and apparatus for self-diagnosing each functional block of a semiconductor device using a (Built In Self Test) circuit.

[0002]

2. Description of the Related Art A method for diagnosing the operation of each functional block of a semiconductor device is disclosed in Japanese Patent Laid-Open No. 2000-250946.
There is known an LSI circuit testability designing method disclosed in the above publication. FIG. 3 is a diagram showing an LSI circuit test device disclosed in Japanese Patent Laid-Open No. 2000-250946.

In FIG. 3, the LSI circuit test apparatus is
Test pattern generator 352, tested block 35
5, a test result analyzer 357, and a BIST control circuit 351 for controlling them and outputting a test analysis result 358. The BIST control circuit 351
Based on the external input signal 350 for setting the test mode,
The semiconductor integrated circuit including the block under test 355 is set to the test mode. Based on the external input signal 350, B
After the IST control circuit 351 is initialized, the self-test of the block under test 355 is executed.

Block under test 3 during execution of self-test
Input 353 to 55 is automatically generated by test pattern generator 352. The test result output 356 from the block under test is input to the test result analyzer 357 and compared with the expected value one by one. Finally, the test analysis result 358 of the block under test 355 is output, and the quality of the block under test 355 is determined.

However, in such a conventional LSI circuit test apparatus, the BIST control circuit 351 is provided for each tested block 355, and the operation diagnosis of the tested block 355 is performed at the time of shipment. ,
It was not possible to automatically diagnose the operation of the tested block 355 after it was shipped.

[0006]

Diagnosis of the functional blocks of a semiconductor device is performed in the case where the semiconductor device is deteriorated due to secular change after shipment of products in which a plurality of semiconductor devices are mounted on the same circuit board. It could not be carried out simply.

The present invention has been made in view of the above problems, and an object thereof is to provide a BIST circuit corresponding to each functional block of a semiconductor device, and
By providing the BIST controller and the memory, the semiconductor device can be automatically diagnosed during normal operation of the semiconductor device, for example, when the power of the semiconductor device is turned on, thereby constantly diagnosing malfunction of the semiconductor device due to aging. Methods and apparatus are provided.

[0008]

In order to achieve the above object, the present invention provides a self-diagnosis method for a semiconductor device having a plurality of functional blocks mounted on a substrate, according to a diagnosis program stored in advance in a memory. , B
An IST controller transmitting a diagnostic condition to each functional block, and the BIS based on the diagnostic condition.
Diagnosing the functional block corresponding to the T circuit,
Acquiring the diagnostic result from the functional block corresponding to the BIST circuit and transmitting the diagnostic result to the BIST controller; the BIST controller transmitting the diagnostic result to the main controller controlling the normal processing; Based on the above, the main controller is provided with a step of performing normal / abnormal display.

Further, in the present invention, in the semiconductor device self-diagnosis method, a diagnostic expected value is further stored in advance in the memory, and the BIST controller reads the diagnostic expected value read from the memory together with the diagnostic condition. Is transmitted to the BIST circuit.

Further, the present invention is a semiconductor device self-diagnosis method, wherein the BIST circuit compares the diagnostic result with the diagnostic expected value, and when the diagnostic result does not match the diagnostic expected value, the BIST circuit is A step of transmitting an abnormal signal to the BIST controller; a step of the BIST controller transmitting the abnormal signal to the main controller when the abnormal signal is received; and a step of displaying the abnormal state of the main controller when the abnormal signal is received. Or warning of an abnormality.

Further, according to the present invention, in the method of self-diagnosing a semiconductor device, the BIST controller performs a diagnostic process on each of the functional blocks when the semiconductor device is powered on.

Further, according to the present invention, in a semiconductor device self-diagnosis apparatus having a plurality of functional blocks mounted on a substrate, a diagnostic condition is transmitted to each functional block according to a diagnostic program stored in advance in a memory B.
An IST controller, a BIST circuit that diagnoses a corresponding functional block based on the diagnostic condition, obtains a diagnostic result from the corresponding functional block, and sends the diagnostic result to the BIST controller; and a BIST circuit based on the diagnostic result. A normal controller for displaying normality / abnormality, the diagnostic result obtained by the BIST circuit is transmitted to the main controller via the BIST controller, and the normality / abnormality is displayed by the main controller. .

Further, according to the present invention, in a self-diagnosis apparatus for a semiconductor device, a diagnostic expected value is further stored in advance in the memory, and the BIST controller, together with the diagnostic condition, the diagnostic expected value read from the memory. It is characterized in that means for transmitting to the BIST circuit is provided.

The present invention also provides a self-diagnosis apparatus for a semiconductor device, wherein the BIST circuit compares the diagnostic result with the expected diagnostic value, and the diagnostic result does not match the expected diagnostic value. And a means for transmitting an abnormal signal to the BIST controller.
The T controller includes means for transmitting the abnormal signal to the main controller when the abnormal signal is received from the BIST circuit, and the main controller is configured to transmit the abnormal signal to the BIS.
When the abnormality signal is received from the T controller, it is provided with means for displaying the abnormality or warning the abnormality.

Further, according to the present invention, in a self-diagnosis apparatus for a semiconductor device, the BIST controller performs a diagnosis process for each of the functional blocks when the power of the semiconductor device is turned on.

[0016]

1 is a diagram showing an apparatus configuration of an apparatus for self-diagnosing a semiconductor device according to an embodiment of the present invention. 1, a semiconductor device self-diagnosis apparatus according to the present invention includes a plurality of functional blocks and a plurality of BISs.
Semiconductor device 10 having a T circuit, semiconductor device 1 having a plurality of functional blocks and a plurality of BIST circuits
1, a main controller 40 for controlling the semiconductor device 10 and the semiconductor device 11, a BIST controller 20 for controlling the BIST circuit, a memory storing a program for controlling the BIST controller 20 and a memory 30 having a primary memory Composed.

Here, each of the semiconductor device 10 and the semiconductor device 11 is a semiconductor device to be diagnosed. The semiconductor device 10 includes a functional block (# 1) 1
01 and the functional block (# 2) 102, and self-diagnoses the functional block (# 1) 101. The BIST circuit (# 1) 201 and the functional block (# 2) 102 perform self-diagnosis. It has a BIST circuit (# 2) 202. The BIST circuit 2
01 and 202 are built in the semiconductor device 10 and provided near the functional blocks 101 and 102, respectively.

Similarly, the semiconductor device 11 includes a functional block (#i) 111 and a functional block (#N).
112 and a functional block (#i) 111
BIST circuit (#i) 211 that performs self-diagnosis of BIST circuit and BIST circuit (#N) 212 that performs self-diagnosis of functional block (#N) 112. Similarly, the BIST circuits 211 and 212 are provided near the functional blocks 111 and 112, respectively.

The BIST controller 20 includes a signal line 30.
1, 302, 311 and 312 respectively, B
It is connected to the IST circuits 201, 202, 211 and 212, and transmits diagnostic conditions corresponding to each functional block to the BIST circuit. Each BIST circuit transmits the diagnostic condition received from the BIST controller 20 to the functional block to be diagnosed. Furthermore, the BIST controller 20
When the diagnostic result is received from the functional block, the diagnostic result is transmitted to the BIST controller 20. The BIST controller 20 collates the diagnostic result received from each BIST circuit with the diagnostic expected value received from the memory 30. The memory 30 uses the signal line 21 for the BIST controller 20.
The BIST circuit stores the diagnostic conditions for diagnosing each functional block, the diagnostic expected value for each functional block, and the diagnostic result of each functional block for each functional block.

The main controller 40 is connected via a signal line 50 to an external device (not shown), for example, a human interface device such as a test tester or a keyboard, while the main controller 40 is connected to the BIST controller 20 via a signal line 22. Connected, input / output signal lines 41, 42, 43
And 44 are connected to the input / output terminals of the corresponding functional block. The main controller 40 uses the functional blocks to perform normal numerical operation or image processing based on an instruction from an external human interface device. On the other hand, the main controller 40 can also diagnose each functional block based on the diagnostic pattern received from the external tester. Further, the main controller 40 is
The self-diagnosis result of the functional block of each semiconductor device obtained by the IST controller 20 can be transmitted to an external tester or the like.

FIG. 2 is a diagram showing an example of a flow chart showing a diagnostic process of a functional block according to an embodiment of the present invention. Here, an example of automatically diagnosing a fault of the semiconductor device after shipment when the power of the semiconductor device is turned on will be described. In FIG. 2, step S1 is a process that is a trigger for detecting power-on and starting diagnosis by the BIST circuit. When the power-on is detected in step S1 (Yes in step S1), the BIST controller 20 is activated (step S2). The BIST controller 20 sequentially sets the functional block number i to 1 in order to start the diagnostic process from the first functional block of the N functional blocks to be diagnosed (step S).
3).

In step S4, the BIST controller 2
0 reads out the diagnostic condition for the functional block (#i) to be diagnosed set in step S3 from the memory 30 and sends it to the BIST circuit (#i).

When the BIST circuit (#i) receives the diagnostic condition of the functional block, the BIST circuit (#i) diagnoses the functional block (#i) based on the diagnostic condition (step S5). BI
When the diagnosis of the functional block (#i) is completed, the ST circuit (#i) compares the diagnostic expected value of the functional block received from the BIST controller 20 with the diagnostic result obtained from the functional block (step S6). ).

In step S7, the BIST circuit (#i) determines from the analysis result whether the diagnostic expected value and the diagnostic result obtained from the functional block match. As a result, if the two data match (Yes in step S7), the BIST circuit (#i) determines that the functional block is normal and moves to step S8. In step S8, the BIST circuit (#
i) transmits the diagnosis result of the functional block (#i) to the BIST controller 20. When the result is received, B
In step S11, the IST controller 20 transmits the result write request signal to the memory 30, and the memory 3
0 stores the diagnosis result corresponding to the functional block.

On the other hand, if the two data do not match (No in step S7), the functional block determines that the diagnosis result is abnormal, and in step S9, the BIST circuit (#i) causes the BIST controller to operate. 20 to send the abnormality information. Upon receiving the information, the BIST controller 20 transmits an abnormality display request signal for the functional block to the main controller 40 (step S10).

In step S12, the BIST controller 20 determines the total number of functional blocks (N
It is determined whether or not the diagnosis of each) has been completed. If the diagnosis is not completed, the process proceeds to step S13, and the next functional block number (i
+1) is set, and the process proceeds to step S4. When the diagnosis of all functional blocks to be diagnosed is completed in step S12 (Yes in step S12), the BIST controller 20 transmits the diagnosis result to the main controller 40 (step S14). In step S14, the main controller 40 displays normality / abnormality on an external display or the like via the signal line 50, or issues an alarm or the like in the case of abnormality (step S15).

The embodiment described above is an example for explaining the present invention, and the present invention is not limited to the above-mentioned embodiment, and various modifications can be made within the scope of the invention. is there. In the above-described embodiment, the case where the diagnosis is performed when the power is turned on has been described. However, the present invention is not limited to this, and the diagnosis process may be performed at an arbitrary interval during the operation of the semiconductor device or when the power is turned off.

[0028]

As described above, according to the present invention,
A BIST controller, a memory for storing a diagnostic program for diagnosis, a diagnostic result, and the like are provided in a semiconductor device provided with a BIST circuit corresponding to a functional block.
Since the T controller diagnoses the function block before or during the operation of the main controller, the semiconductor device can be easily diagnosed after the shipment of the semiconductor device. In particular, if the diagnostic processing of each functional block is performed when the power of the semiconductor device is turned on,
Since the failure of the semiconductor device can be detected before the operation of the semiconductor device, there is an effect that data loss or the like that occurs during the operation of the semiconductor device can be prevented.

Further, the BIST circuit transmits an abnormal signal to the main controller via the BIST controller when the diagnosis result of the functional block and the diagnosis expected value do not match, and the main controller receiving the signal transmits the abnormal signal to the human interface. Since the abnormality of the functional block can be displayed on the external display device or the like via the, it is possible to know the abnormality of the functional block during the operation of the semiconductor device in advance.

[Brief description of drawings]

FIG. 1 is a diagram showing an apparatus configuration of a semiconductor device self-diagnosis apparatus according to an embodiment of the present invention.

FIG. 2 is a flowchart showing a diagnostic process of a functional block according to an embodiment of the present invention.

FIG. 3 is a diagram showing a conventional LSI circuit test apparatus.

[Explanation of symbols]

10, 11 ... Semiconductor device 101, 102, 111, 112 ... Functional blocks 201, 202, 211, 212 ... BIST circuit 20 ... BIST controller 30 ... Memory 40 ... Main controller

Claims (8)

[Claims] 1. A self-diagnosis method for a semiconductor device having a plurality of functional blocks mounted on a substrate, wherein a BIST controller controlling a BIST circuit sets a diagnostic condition for each functional block according to a diagnostic program stored in advance in a memory. A step of transmitting, a step of diagnosing the functional block corresponding to the BIST circuit based on the diagnostic condition, a step of acquiring a diagnostic result from the functional block corresponding to the BIST circuit, and transmitting the diagnostic result to the BIST controller A step in which the BIST controller sends a diagnosis result to a main controller that controls a normal process;
A semiconductor device self-diagnosis method comprising a step of displaying an abnormality. 2. The memory further stores a diagnostic expected value in advance, and the BIST controller includes a step of transmitting the diagnostic expected value read from the memory to the BIST circuit together with the diagnostic condition. The self-diagnosis method for a semiconductor device according to claim 1, which is characterized in that. 3. The BIST circuit compares the diagnostic result with the diagnostic expected value, and when the diagnostic result does not match the diagnostic expected value, the BIST circuit transmits an abnormal signal to the BIST controller. When the BIST controller receives the abnormal signal, the BIST controller transmits the abnormal signal to the main controller, and when the abnormal signal is received, the main controller displays the abnormal condition or warns the abnormal condition. The self-diagnosis method for a semiconductor device according to claim 2, wherein. 4. The method for self-diagnosing a semiconductor device according to claim 1, wherein the BIST controller performs a diagnostic process on each of the functional blocks when the power of the apparatus is turned on. 5. A self-diagnosis apparatus for a semiconductor device having a plurality of functional blocks mounted on a board, a BIST controller transmitting diagnostic conditions to each functional block according to a diagnostic program stored in advance in a memory, and the diagnostic A BIS that diagnoses a corresponding functional block based on a condition, obtains a diagnostic result from the corresponding functional block, and transmits the diagnostic result to the BIST controller.
A T controller and a main controller for displaying normal / abnormal display based on the diagnosis result. The diagnosis result obtained by the BIST circuit is transmitted to the main controller via the BIST controller, and the main controller performs normal operation. A semiconductor device self-diagnosis device characterized by displaying an abnormality. 6. The memory further stores an expected diagnostic value in advance, and the BIST controller includes means for transmitting the expected diagnostic value read from the memory together with the diagnostic condition to the BIST circuit. 6. The self-diagnosis device for a semiconductor device according to claim 5. 7. The BIST circuit further comprises a comparing means for comparing the diagnostic result with the diagnostic expected value, and means for transmitting an abnormal signal to the BIST controller when the diagnostic result does not match the diagnostic expected value. And, the BIST controller comprises means for transmitting the abnormal signal to the main controller when the abnormal signal is received from the BIST circuit, the main controller receiving the abnormal signal from the BIST controller, 7. A self-diagnosis apparatus for a semiconductor device according to claim 6, further comprising means for displaying an abnormality or warning an abnormality. 8. The self-diagnosis apparatus for a semiconductor device according to claim 5, wherein the BIST controller performs a diagnostic process of each of the functional blocks when the power of the apparatus is turned on.