JP2003059758A - Method of manufacturing multilayer ceramic capacitor - Google Patents
Method of manufacturing multilayer ceramic capacitorInfo
- Publication number
- JP2003059758A JP2003059758A JP2001243722A JP2001243722A JP2003059758A JP 2003059758 A JP2003059758 A JP 2003059758A JP 2001243722 A JP2001243722 A JP 2001243722A JP 2001243722 A JP2001243722 A JP 2001243722A JP 2003059758 A JP2003059758 A JP 2003059758A
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- JP
- Japan
- Prior art keywords
- weight
- ceramic capacitor
- baking
- temperature
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003985 ceramic capacitor Substances 0.000 title claims abstract description 50
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 238000007747 plating Methods 0.000 claims abstract description 36
- 239000012298 atmosphere Substances 0.000 claims abstract description 31
- 229910052751 metal Inorganic materials 0.000 claims abstract description 26
- 239000002184 metal Substances 0.000 claims abstract description 26
- 238000000034 method Methods 0.000 claims abstract description 22
- 239000000919 ceramic Substances 0.000 claims abstract description 21
- 230000007935 neutral effect Effects 0.000 claims abstract description 10
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 16
- 239000011230 binding agent Substances 0.000 claims description 16
- 229910052760 oxygen Inorganic materials 0.000 claims description 16
- 239000001301 oxygen Substances 0.000 claims description 16
- 239000010953 base metal Substances 0.000 claims description 9
- 230000001590 oxidative effect Effects 0.000 claims description 9
- 238000002844 melting Methods 0.000 claims description 6
- 230000008018 melting Effects 0.000 claims description 6
- 238000001816 cooling Methods 0.000 claims description 3
- 239000011261 inert gas Substances 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 abstract description 5
- 238000007254 oxidation reaction Methods 0.000 abstract description 5
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 abstract description 4
- 229910002113 barium titanate Inorganic materials 0.000 abstract description 4
- 239000002075 main ingredient Substances 0.000 abstract 1
- 239000010949 copper Substances 0.000 description 24
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 20
- 239000000843 powder Substances 0.000 description 15
- 239000002003 electrode paste Substances 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 230000006866 deterioration Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000007606 doctor blade method Methods 0.000 description 2
- 239000003960 organic solvent Substances 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 230000002378 acidificating effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000002270 dispersing agent Substances 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000004898 kneading Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 229910000510 noble metal Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 239000004014 plasticizer Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
- ZFZQOKHLXAVJIF-UHFFFAOYSA-N zinc;boric acid;dihydroxy(dioxido)silane Chemical compound [Zn+2].OB(O)O.O[Si](O)([O-])[O-] ZFZQOKHLXAVJIF-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、内部電極に卑金属
を用いた積層セラミックコンデンサの製造方法に関し、
特に、外部電極の形成方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a monolithic ceramic capacitor using a base metal for internal electrodes,
In particular, it relates to a method of forming an external electrode.
【0002】[0002]
【従来の技術】従来の積層セラミックコンデンサの製造
は、チタン酸バリウムを主成分とする誘電体セラミック
粉末と有機樹脂等のバインダーを、有機溶剤中に分散混
合させたスラリーを、ドクターブレード法等で一定の厚
みに成膜し、グリーンシートを作製する。次に、スクリ
ーン印刷法により、銅(Cu)、ニッケル(Ni)等の
低抵抗金属と有機ビヒクルからなる内部電極ペーストを
前記グリーンシート上へ印刷して内部電極を形成する。2. Description of the Related Art A conventional monolithic ceramic capacitor is manufactured by a doctor blade method or the like in which a slurry is prepared by dispersing and mixing a dielectric ceramic powder containing barium titanate as a main component and a binder such as an organic resin in an organic solvent. A green sheet is produced by forming a film with a constant thickness. Next, an internal electrode paste made of a low resistance metal such as copper (Cu) or nickel (Ni) and an organic vehicle is printed on the green sheet by a screen printing method to form an internal electrode.
【0003】前記の内部電極が交互に対向する電極とし
たこのグリーンシートを打ち抜き、金型内へ積層し、熱
プレス等で圧着して積層体を得る。この積層体を一個一
個のコンデンサ素子に切断し、脱バインダー、焼成を行
い、積層セラミックコンデンサ素子を得る。こうして得
られた積層セラミックコンデンサ素子の対向する内部電
極の各々の電極引き出し部が露出する両端面に、外部電
極端子を形成し、積層セラミックコンデンサが完成す
る。The green sheets, which are the electrodes in which the internal electrodes are alternately opposed to each other, are punched out, laminated in a mold and pressure-bonded by a hot press or the like to obtain a laminated body. This laminated body is cut into individual capacitor elements, debindered and fired to obtain laminated ceramic capacitor elements. External electrode terminals are formed on both end faces of the thus obtained multilayer ceramic capacitor element, where the electrode lead-out portions of the opposing internal electrodes are exposed, and the multilayer ceramic capacitor is completed.
【0004】ここで、内部電極層に使用されているC
u、Niは、貴金属とは異なり、酸化されやすく、外部
電極形成工程での内部電極層の酸化を防止し、良好な電
気的接続性と強固な密着性を得ることが重要である。Here, C used for the internal electrode layer
Unlike noble metals, u and Ni are easily oxidized, and it is important to prevent oxidation of the internal electrode layers in the external electrode formation step and obtain good electrical connectivity and strong adhesion.
【0005】卑金属材料を用いた内部電極層を有する積
層セラミックコンデンサの外部電極組成物として、特公
昭63−14856号や特公平8−4055号公報に
は、Cu粉末が50重量%以上から80重量%以下の範
囲、ガラスフリット5重量%以上から20重量%以下の
範囲及び有機ビヒクル10重量%から30重量%以下の
範囲からなる銅ペーストを塗布し、非酸化性雰囲気中で
焼き付け形成することが開示されている。図3は、従来
の電極端子焼付け温度プロファイルを示す図である。こ
の非酸化性雰囲気での焼き付けは、600℃以上から9
00℃以下の範囲の温度でN2雰囲気中で、チップ部品
を炉に挿入してから炉出しまでの時間は60分前後であ
る。ここで、ペースト中の有機ビヒクル成分を効率良く
分解するために、特開平5−243083や特開平11
−195553等で開示されているように、300℃以
上から600℃以下の範囲の温度ゾーンにおいて、N2
雰囲気中に100ppm以下の微量な酸素をドープして
焼き付けを行っていた。As an external electrode composition of a monolithic ceramic capacitor having an internal electrode layer using a base metal material, Japanese Patent Publication No. 63-14856 and Japanese Patent Publication No. 8-4055 disclose that Cu powder is from 50% by weight to 80% by weight. %, A glass frit in the range of 5 wt% to 20 wt% inclusive, and an organic vehicle in the range of 10 wt% to 30 wt% inclusive may be applied and baked and formed in a non-oxidizing atmosphere. It is disclosed. FIG. 3 is a diagram showing a conventional electrode terminal baking temperature profile. This baking in a non-oxidizing atmosphere is performed at 600 ° C or higher to 9
The time from insertion of the chip component into the furnace to removal from the furnace in a N 2 atmosphere at a temperature in the range of 00 ° C. or lower is about 60 minutes. Here, in order to efficiently decompose the organic vehicle component in the paste, JP-A-5-243083 and JP-A-11-11830 are used.
Such as disclosed in -195553, in the temperature zone ranging from 300 ° C. over 600 ° C. or less, N 2
The atmosphere was doped with a trace amount of oxygen of 100 ppm or less and baked.
【0006】[0006]
【発明が解決しようとする課題】従来、Cuによる外部
電極焼き付けは、Cuの酸化による内部電極層との電気
的接続性の劣化防止と誘電体セラミックとの密着性を得
るために低酸素濃度での外部電極の焼き付けを行ってい
る。しかしながら、外部電極を焼き付けるための処理量
が増加した場合、有機ビヒクルを分解する(脱バイン
ダ)ためのゾーンで、数10ppmの酸素を含む雰囲気
では脱バインダは十分でなく、分解されなかった有機ビ
ヒクル成分がCu外部電極内に残ってしまうと、ガラス
フリットの溶融温度においてもビヒクルの分解における
酸素分圧の変化により、誘電体のセラミックとの密着性
が低下したり、Cuペーストの収縮率が大きくなり残留
応力が残るため、めっき工程や半田耐熱性などが劣化す
る等の課題があった。Conventionally, the external electrode baking with Cu is performed at a low oxygen concentration in order to prevent deterioration of the electrical connection property with the internal electrode layer due to the oxidation of Cu and to obtain the adhesiveness with the dielectric ceramic. The external electrodes of are baked. However, when the amount of processing for baking the external electrode is increased, it is a zone for decomposing (debinding) the organic vehicle, the debinding is not sufficient in an atmosphere containing several tens of ppm of oxygen, and the undecomposed organic vehicle. If the components remain in the Cu external electrode, the adhesiveness of the dielectric material to the ceramic is reduced and the shrinkage rate of the Cu paste is large due to the change in oxygen partial pressure in the decomposition of the vehicle even at the melting temperature of the glass frit. Since residual stress remains, there is a problem that the plating process, solder heat resistance, etc. deteriorate.
【0007】また、ガラスフリット系にホウ珪酸亜鉛系
などの亜鉛を含んだものを使用した場合、焼き付け後の
めっき工程においてSnめっきを施す場合、ウィスカを
防止するためにNiめっきを施す必要がある。しかし、
ワット浴等の酸性のNiめっきは、脱バインダの十分で
ないCu外部電極に施すと、分解されなかった有機ビヒ
クルが残留カーボンとして外部電極をポーラスな状態に
なるため、Niめっき液が外部電極内に浸透しやすくな
り、耐電圧、絶縁性の劣化及び層間剥離(デラミネーシ
ョン)を引き起こすなどの問題点があった。Further, when a glass frit system containing zinc such as zinc borosilicate system is used and Sn plating is applied in the plating step after baking, Ni plating must be applied in order to prevent whiskers. . But,
When acidic Ni plating such as Watt bath is applied to a Cu external electrode with insufficient binder removal, the undecomposed organic vehicle leaves the external electrode in a porous state as residual carbon. There is a problem that it easily penetrates and causes deterioration of withstand voltage, insulation, and delamination.
【0008】本発明は、内部電極がNiで誘電体セラミ
ックがチタン酸バリウムであるような積層セラミックコ
ンデンサにCu外部電極を塗布し、焼き付ける際の電極
層の酸化を防止するとともに、めっき工程においても不
具合を生じない積層セラミックコンデンサの製造方法を
提供するものである。According to the present invention, a Cu external electrode is applied to a monolithic ceramic capacitor in which the internal electrode is Ni and the dielectric ceramic is barium titanate to prevent oxidation of the electrode layer during baking, and also in the plating process. The present invention provides a method for manufacturing a monolithic ceramic capacitor that does not cause a problem.
【0009】[0009]
【課題を解決するための手段】本発明によれば、誘電体
セラミック層とNi等の卑金属を主成分とした内部電極
層とを交互に複数層積み重ねて形成する積層体に外部電
極を設けてなる積層セラミックコンデンサにおいて、外
部電極は卑金属を含有する導電ペーストを非酸化性雰囲
気および真空雰囲気で焼き付けた後、中性のNiめっき
およびSnめっきを施すことにより積層セラミックコン
デンサを製造する。According to the present invention, an external electrode is provided in a laminate formed by alternately stacking a plurality of dielectric ceramic layers and an internal electrode layer containing a base metal such as Ni as a main component. In the laminated ceramic capacitor, the external electrode is manufactured by baking a conductive paste containing a base metal in a non-oxidizing atmosphere and a vacuum atmosphere, and then performing neutral Ni plating and Sn plating.
【0010】本発明によれば、導電ペーストにおいて、
金属含有率が80重量%以上から95重量%以下の範囲
と、有機ビヒクルが5重量%以上から20重量%以下に
範囲で、金属成分としてCu金属含有率が80重量%以
上から98重量%以下の範囲と、Ti金属が2重量%か
ら10重量%以下の範囲である積層セラミックコンデン
サの電極端子形成方法が得られる。According to the present invention, in the conductive paste,
The metal content is in the range of 80% by weight to 95% by weight, the organic vehicle is in the range of 5% by weight to 20% by weight, and the Cu metal content as a metal component is 80% by weight to 98% by weight. And the range of Ti metal in the range of 2 wt% to 10 wt% or less can be obtained.
【0011】本発明によれば、非酸化性雰囲気及び真空
雰囲気での焼き付けにおいて、炉温が導電ペースト内の
有機ビヒクル成分を分解する脱バインダ温度まで、昇温
させる第1の昇温区間と脱バインダを目的とする300
℃以上から400℃以下の範囲における温度保持の第1
の保持区間を有し、外部電極を溶融させセラミックとの
密着を得るための温度による第2の保持区間を持ち、一
定時間後、冷却ができる外部電極焼き付け炉を用いて焼
き付けを行い、第1の保持区間においてAr、N2等に
よる不活性ガス雰囲気による焼き付けの場合、保持時の
酸素濃度が10ppm以上から50ppm以下の範囲の
雰囲気下で行われ、真空雰囲気による焼き付けの場合、
炉内の背圧が1×10-4Pa以下である積層セラミック
コンデンサの製造方法が得られる。According to the present invention, in baking in a non-oxidizing atmosphere and a vacuum atmosphere, the furnace temperature is raised to the de-binder temperature for decomposing the organic vehicle component in the conductive paste, and the first heating section and the heating step. 300 for the purpose of binder
The first of the temperature maintenance in the range above ℃ to 400 ℃
And a second holding section at a temperature for melting the external electrode to obtain close contact with the ceramic, and after a certain period of time, baking is performed using an external electrode baking furnace that can cool the first electrode. In the case of baking in an inert gas atmosphere of Ar, N 2 or the like in the holding section of, the oxygen concentration at the time of holding is carried out in an atmosphere of 10 ppm or more to 50 ppm or less, and in the case of baking in a vacuum atmosphere,
A method for producing a monolithic ceramic capacitor having a back pressure in the furnace of 1 × 10 −4 Pa or less can be obtained.
【0012】本発明によれば、導電ペースト組成として
Cu金属粉末とTi金属粉末と有機ビヒクルから構成さ
れていることより、チップの鉛フリー化ができるととも
に、Snめっき時のウィスカを防止するための熱処理が
不要にすることが可能となる。また、非酸化性雰囲気及
び真空雰囲気での焼き付けにおいて炉温が導電ペースト
内の有機ビヒクル成分を分解する脱バインダ温度まで、
昇温させる第1の昇温区間と脱バインダを目的とする3
00℃以上から400℃以下の範囲における一定温度保
持の第1の保持区間を有することによって外部電極内の
バインダが十分に除去できることから、酸化による電気
的な接続および密着性が良好で信頼性の高い積層セラミ
ックコンデンサの製造方法を提供できる。According to the present invention, since the conductive paste composition is composed of Cu metal powder, Ti metal powder and organic vehicle, the chip can be made lead-free and whiskers at the time of Sn plating can be prevented. It becomes possible to eliminate heat treatment. Further, in baking in a non-oxidizing atmosphere and a vacuum atmosphere, the furnace temperature is up to the binder removal temperature that decomposes the organic vehicle component in the conductive paste,
A first temperature raising section for raising the temperature and the purpose of removing the binder 3
Since the binder in the external electrode can be sufficiently removed by having the first holding section for holding the constant temperature in the range of 00 ° C. or more and 400 ° C. or less, electrical connection and adhesion by oxidation are good and reliability is high. A method for manufacturing a high monolithic ceramic capacitor can be provided.
【0013】即ち、本発明は、誘電体セラミック層とN
iを主成分とした内部電極層とを交互に複数層積み重ね
て形成する積層体に外部電極を設けてなる積層セラミッ
クコンデンサにおいて、外部電極は卑金属を含有する導
電ペーストを非酸化性雰囲気で焼き付けた後、中性のN
iめっき及びSnめっきを施す積層セラミックコンデン
サの製造方法である。That is, according to the present invention, the dielectric ceramic layer and the N
In a multilayer ceramic capacitor in which external electrodes are provided in a laminate formed by alternately stacking a plurality of internal electrode layers containing i as a main component, the external electrodes are formed by baking a conductive paste containing a base metal in a non-oxidizing atmosphere. After that, neutral N
It is a method for manufacturing a monolithic ceramic capacitor which is subjected to i plating and Sn plating.
【0014】また、本発明は、前記導電ペーストにおい
て、金属含有率が80重量%以上から95重量%以下の
範囲であり、有機ビヒクルが5重量%以上から20重量
%以下の範囲であり、金属成分としてCu金属含有率が
90重量%以上から98重量%以下の範囲であり、Ti
金属が2重量%以上から10重量%以下の範囲とする積
層セラミックコンデンサの製造方法である。Further, in the present invention, in the conductive paste, the metal content is in the range of 80% by weight to 95% by weight and the organic vehicle is in the range of 5% by weight to 20% by weight. As a component, the Cu metal content is in the range of 90% by weight to 98% by weight,
A method for manufacturing a monolithic ceramic capacitor, wherein the metal content is in the range of 2% by weight to 10% by weight.
【0015】また、本発明は、前記積層セラミックコン
デンサの製造方法において、非酸化性雰囲気での焼き付
けは、炉温が導電ペースト内の有機ビヒクル成分を分解
する脱バインダ温度まで、昇温させる第1の昇温区間
と、脱バインダを目的とする300℃以上から400℃
以下の範囲における温度保持の第1の保持区間を有し、
外部電極を溶融させセラミックとの密着を得るための温
度による第2の保持区間を持ち、一定時間後、冷却がで
きる外部電極焼き付け炉を用いて焼き付けを行い、第1
の保持区間において、Ar、N2等による不活性ガス雰
囲気にて、保持時の酸素濃度が10ppm以上から50
ppm以下の範囲の雰囲気下で行われる積層セラミック
コンデンサの製造方法である。Further, according to the present invention, in the method for producing a monolithic ceramic capacitor, baking in a non-oxidizing atmosphere raises a furnace temperature to a binder removal temperature at which the organic vehicle component in the conductive paste is decomposed. Temperature rising section and from 300 ℃ to 400 ℃ for binder removal
Has a first holding section for temperature holding in the following range,
It has a second holding section at a temperature for melting the external electrode to obtain close contact with the ceramic, and after a certain period of time, baking is performed using an external electrode baking furnace capable of cooling,
In the holding section of, the oxygen concentration during holding is from 10 ppm or more to 50 in an inert gas atmosphere of Ar, N 2 or the like.
This is a method for manufacturing a monolithic ceramic capacitor performed in an atmosphere in the range of ppm or less.
【0016】また、本発明は、誘電体セラミック層とN
iを主成分とした内部電極層とを交互に複数層積み重ね
て形成する積層体に外部電極を設けてなる積層セラミッ
クコンデンサにおいて、外部電極は卑金属を含有する導
電ペーストを真空雰囲気で焼き付けた後、中性のNiめ
っき及びSnめっきを施す積層セラミックコンデンサの
製造方法である。The present invention also relates to a dielectric ceramic layer and N
In a monolithic ceramic capacitor in which external electrodes are provided in a laminated body formed by alternately stacking a plurality of internal electrode layers containing i as a main component, the external electrodes are formed by baking a conductive paste containing a base metal in a vacuum atmosphere. This is a method for manufacturing a monolithic ceramic capacitor that is subjected to neutral Ni plating and Sn plating.
【0017】また、本発明は、前記導電ペーストにおい
て、金属含有率が80重量%以上から95重量%以下の
範囲であり、有機ビヒクルが5重量%以上から10重量
%以下の範囲であり、金属成分としてCu金属含有率が
90重量%以上から98重量%以下の範囲であり、Ti
金属が2重量%以上から10重量%以下の範囲とする積
層セラミックコンデンサの製造方法である。Further, in the present invention, in the conductive paste, the metal content is in the range of 80% by weight to 95% by weight and the organic vehicle is in the range of 5% by weight to 10% by weight. As a component, the Cu metal content is in the range of 90% by weight to 98% by weight,
A method for manufacturing a monolithic ceramic capacitor, wherein the metal content is in the range of 2% by weight to 10% by weight.
【0018】また、本発明は、前記積層セラミックコン
デンサの製造方法において、真空雰囲気での焼き付け
は、炉温が導電ペースト内の有機ビヒクル成分を分解す
る脱バインダ温度まで、昇温させる第1の昇温区間と、
脱バインダを目的とする300℃以上から400℃以下
の範囲における温度保持の第1の保持区間を有し、外部
電極を溶融させセラミックとの密着を得るための温度に
よる第2の保持区間を持ち、一定時間後、冷却ができる
外部電極焼き付け炉を用いて焼き付けを行い、第1の保
持区間において、炉内の背圧を1×10-4Pa以下とす
る積層セラミックコンデンサの製造方法である。Further, in the present invention, in the method for producing a monolithic ceramic capacitor, the baking in a vacuum atmosphere is carried out in a first heating step in which the furnace temperature is raised to a binder removal temperature at which the organic vehicle component in the conductive paste is decomposed. Temperature zone,
It has a first holding section for holding the temperature in the range of 300 ° C to 400 ° C for the purpose of binder removal, and a second holding section depending on the temperature for melting the external electrode to obtain adhesion with the ceramic. A method for producing a monolithic ceramic capacitor, wherein after baking for a certain period of time, baking is performed using an external electrode baking furnace that can be cooled, and the back pressure in the furnace is set to 1 × 10 −4 Pa or less in the first holding section.
【0019】[0019]
【発明の実施の形態】以下に、本発明の積層セラミック
コンデンサの製造方法の実施の形態について説明する。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a method for manufacturing a monolithic ceramic capacitor according to the present invention will be described below.
【0020】図1は、本発明における積層セラミックコ
ンデンサの製造方法により製造した積層セラミックコン
デンサの断面図である。チタン酸バリウムを主成分とす
る誘電体セラミック1にニッケル(Ni)からなる内部
電極2が交互に積層され、チップ両端に銅(Cu)の外
部電極3が形成され、Cuの外部電極上3にめっき層4
を施した形態の積層セラミックコンデンサを例として説
明をする。めっき層4は、Cuの外部電極3と実装時の
はんだ濡れ性を確保するための錫(Sn)めっきとの拡
散による特性劣化を防ぐため、中性の無電解Niめっき
を2μm以上から3μm以下の範囲の厚みで、Cu外部
電極上に被覆した後、中性の電解Snめっきを6μm以
上から12μm以下の範囲の厚みで施した。FIG. 1 is a sectional view of a monolithic ceramic capacitor manufactured by the method for manufacturing a monolithic ceramic capacitor according to the present invention. Internal electrodes 2 made of nickel (Ni) are alternately laminated on a dielectric ceramic 1 containing barium titanate as a main component, copper (Cu) external electrodes 3 are formed at both ends of the chip, and Cu external electrodes 3 are formed on the external electrodes 3. Plating layer 4
An explanation will be given by taking as an example a laminated ceramic capacitor having a form. The plating layer 4 is a neutral electroless Ni plating layer of 2 μm or more to 3 μm or less in order to prevent deterioration of characteristics due to diffusion of the Cu external electrode 3 and tin (Sn) plating for securing solder wettability during mounting. After coating the Cu external electrode with a thickness in the range of, a neutral electrolytic Sn plating was performed with a thickness in the range of 6 μm to 12 μm.
【0021】ここで、前記Niめっきが2μm未満であ
ると、剥離強度が低下し、また3μmを超えると、めっ
き時間が大となるので、Niめっきを2μm以上から3
μm以下の範囲の厚みとした。また、前記Snめっきが
6μm未満であると、剥離強度が低下し、また、12μ
mを超えると、めっき時間が大となるので、Snめっき
を6μm以上から12μm以下の範囲とする。Here, if the Ni plating is less than 2 μm, the peel strength decreases, and if it exceeds 3 μm, the plating time becomes long. Therefore, the Ni plating should be from 2 μm to 3 μm.
The thickness was set in the range of μm or less. Further, when the Sn plating is less than 6 μm, the peel strength is lowered, and the thickness is 12 μm.
When it exceeds m, the plating time becomes long, so the Sn plating is made in the range of 6 μm to 12 μm.
【0022】ここで、上記の積層セラミックコンデンサ
は、誘電体セラミックとしてBaTiO3粉末を主成分
とし、有機バインダ、分散剤、可塑剤及び有機溶剤を秤
量、混錬しスラリー化して、ドクターブレード法などを
用いてグリーンシート化を行った後、Ni粉末と有機ビ
ヒクルを混錬した内部電極ペーストをスクリーン印刷法
により、グリーンシート上に形成したものを積層、熱プ
レスによって得られた積層体を所定のチップサイズにな
るように切断してセラミックコンデンサチップ素子が得
られる。このセラミックコンデンサチップ素子を所定の
雰囲気中で焼成した後に、電気的な接続を得るためにC
u粉末及び有機ビヒクルから成る外部電極端子用ペース
トを塗布した。Here, the above-mentioned monolithic ceramic capacitor comprises BaTiO 3 powder as a dielectric ceramic as a main component, an organic binder, a dispersant, a plasticizer and an organic solvent, which are weighed, kneaded and slurried to obtain a doctor blade method or the like. After forming a green sheet by using, the internal electrode paste obtained by kneading the Ni powder and the organic vehicle was screen-printed to laminate the green sheet formed on the green sheet. A ceramic capacitor chip element is obtained by cutting into a chip size. After firing this ceramic capacitor chip element in a predetermined atmosphere, in order to obtain an electrical connection, C
An external electrode terminal paste composed of u powder and an organic vehicle was applied.
【0023】図2は、本発明の電極端子焼付け温度プロ
ファイルを示す図である。図2より、外部電極ペースト
の焼付けは、炉内焼き付け時間を70分とし、第1の温
度保持区間として温度400℃で、10分間保持し、そ
の後、第2の温度保持区間として温度900℃で、10
分間保持を行った。焼き付け雰囲気としてN2中で行
い、第1の保持区間の酸素濃度は(a)5ppm、
(b)20ppm、(c)150ppmの3水準とし、
他の区間の酸素濃度は5ppmになるように設定を行い
外部電極を焼き付けた。焼付け後、中性のNiめっき
(電解あるいは無電解どちらでも良い)をバレルで行っ
た後、中性のSnめっきを施して積層セラミックチップ
コンデンサが得られる。FIG. 2 is a diagram showing the baking temperature profile of the electrode terminals of the present invention. As shown in FIG. 2, the external electrode paste was baked at a temperature of 400 ° C. for 10 minutes as a first temperature holding section and a temperature of 900 ° C. as a second temperature holding section after the baking time in the furnace was 70 minutes. 10,
Hold for minutes. Performed in N 2 as a baking atmosphere, the oxygen concentration in the first holding section is (a) 5 ppm,
(B) 20ppm, (c) 150ppm three levels,
The oxygen concentration in the other sections was set to be 5 ppm, and the external electrodes were baked. After baking, neutral Ni plating (either electrolytic or electroless) is performed in the barrel, and then neutral Sn plating is performed to obtain a monolithic ceramic chip capacitor.
【0024】ここで、表1は、本発明の積層セラミック
コンデンサの製造方法における温度プロファイル、焼付
け雰囲気に対する電気特性と機械的特性(密着強度)に
ついての比較である。Here, Table 1 is a comparison of the temperature profile, the electrical characteristics with respect to the baking atmosphere, and the mechanical characteristics (adhesion strength) in the manufacturing method of the laminated ceramic capacitor of the present invention.
【0025】ここで、発明2は、先の図2に示す本発明
の温度プロファイルにおいて、全ての温度領域で真空雰
囲気で、炉内の背圧は1×10-4Pa以下とした場合で
ある。ここで、表1は、電極端子焼付けにおける温度プ
ロファイル、焼付け雰囲気に対する電気的特性と機械的
特性(密着強度)について比較したものである。Here, the invention 2 is a case where the temperature profile of the present invention shown in FIG. 2 is a vacuum atmosphere in all temperature regions and the back pressure in the furnace is 1 × 10 −4 Pa or less. . Here, Table 1 is a comparison of the temperature profile in the baking of the electrode terminals, the electrical characteristics with respect to the baking atmosphere, and the mechanical characteristics (adhesion strength).
【0026】なお、積層セラミックコンデンサチップ
は、長さ3.2×幅1.6×厚み1.0mmで静電容量が
1μFとなるように設定した。得られた積層セラミック
コンデンサについて、電気特性として、LCRメータお
よび絶縁抵抗計を用いて、静電容量(C)、誘電損失
(tanδ)および絶縁抵抗(IR)を測定した。接合
強度については、引っ張り圧縮試験機を用い、外部電極
端子上にφ1mmのピンを垂直にはんだで接合したもの
を固定し、引っ張って測定をした。判定の基準として、
静電容量は、容量ばらつきが±10%以内とし、密着強
度は、はんだによる基板実装時に外部電極が剥がれない
1.5kgf/mm2以上を良品とした。The laminated ceramic capacitor chip was set to have a length of 3.2 × width of 1.6 × thickness of 1.0 mm and an electrostatic capacity of 1 μF. With respect to the obtained multilayer ceramic capacitor, as an electric characteristic, the capacitance (C), the dielectric loss (tan δ) and the insulation resistance (IR) were measured using an LCR meter and an insulation resistance meter. Regarding the bonding strength, a tensile compression tester was used to fix a pin of φ1 mm vertically soldered on the external electrode terminal, and the tensile strength was measured by pulling. As a criterion of judgment,
The capacitance variation was within ± 10%, and the adhesion strength was 1.5 kgf / mm 2 or more so that the external electrodes were not peeled off when the solder was mounted on the substrate.
【0027】[0027]
【表1】 [Table 1]
【0028】表1の結果より、静電容量に関しては、第
1の保持区間にて、酸素を5から20ppmドープした
範囲のものが良好であり、また、密着強度に関しては、
第1の保持区間にて、酸素を20から150ppmドー
プした範囲のものが良好である。From the results shown in Table 1, it is found that the capacitance is good in the range of 5 to 20 ppm of oxygen in the first holding section, and the adhesion strength is
In the first holding section, it is preferable that the oxygen is doped with 20 to 150 ppm of oxygen.
【0029】そこで、さらに検討を加えた結果、第1の
保持区間に酸素を10から100ppmドープしたもの
が、静電容量及び密着強度を満足することが分った。即
ち、上記酸素濃度が10ppm未満の場合、密着強度が
低く、めっき工程で外部電極の剥離が生じた。また、酸
素濃度が101ppm以上では、内部電極であるNiが
酸化し静電容量のばらつきが大きくなり、安定した電気
特性が得られなくなった。また、従来、温度プロファイ
ルにおける昇温部の温度が400℃以上での酸素ドープ
が20ppm以上ある場合、内部電極であるNiが酸化
し静電容量のばらつきが大きくなり、安定した電気特性
が得られなくなった。As a result of further study, it was found that the first holding section doped with 10 to 100 ppm of oxygen satisfies the electrostatic capacity and the adhesion strength. That is, when the oxygen concentration was less than 10 ppm, the adhesion strength was low and the external electrodes were peeled off in the plating process. Further, when the oxygen concentration is 101 ppm or more, Ni that is the internal electrode is oxidized and the variation of the capacitance is increased, so that stable electrical characteristics cannot be obtained. Further, conventionally, when the oxygen doping is 20 ppm or more when the temperature of the temperature rising portion in the temperature profile is 400 ° C. or more, Ni that is the internal electrode is oxidized and the variation in capacitance increases, and stable electrical characteristics can be obtained. lost.
【0030】次に、本発明の導電ペーストの組成につい
て説明する。金属成分として平均粒径1μmの球状Cu
粉末およびフレークCu粉末とTi粉末とを表2に示す
ように配合し、この金属成分を80〜95重量%とし、
残部に有機ビヒクルを加え100重量%にしたものを3
本ロールミルにより混練し、外部電極用ペーストを作製
した。Next, the composition of the conductive paste of the present invention will be described. Spherical Cu with an average particle size of 1 μm as a metal component
Powder and flakes Cu powder and Ti powder were blended as shown in Table 2, and this metal component was adjusted to 80 to 95% by weight,
Add organic vehicle to the rest to make 100% by weight
This roll mill was kneaded to prepare an external electrode paste.
【0031】このペーストを積層セラミックコンデンサ
チップに塗布し、先に示した本発明の実施例による外部
電極端子焼付け条件にて焼付けを行った。This paste was applied to a monolithic ceramic capacitor chip and baked under the above-mentioned external electrode terminal baking conditions according to the embodiment of the present invention.
【0032】[0032]
【表2】 [Table 2]
【0033】表2の結果から、金属成分のCu粉末が8
0%未満の場合、外部電極の空乏部が増加し、電気特性
のばらつきが大きくなるとともに、めっき液の浸透が多
くなり信頼性が悪くなった。また、金属成分のCu粉末
が96%以上の場合、セラミックとの接合に寄与するT
i粉末が少ないため、接合強度が低く、基板にはんだ実
装した後に、剥がれてしまう場合もあった。From the results shown in Table 2, the Cu powder of the metal component was 8
If it is less than 0%, the depletion part of the external electrode increases, the variation in the electrical characteristics increases, and the penetration of the plating solution increases, resulting in poor reliability. Further, when the Cu powder of the metal component is 96% or more, T which contributes to the bonding with the ceramic is
Since the amount of i powder was small, the bonding strength was low, and in some cases, it peeled off after solder mounting on the substrate.
【0034】本実施例のCu粉末80〜95重量%に対
して、残部にTi粉末を混合し、有機ビヒクルを加えた
ものは、めっきによる浸透ダメージもなく、C,tan
δ、IRのすべての電気特性が良好であり、設計値通り
の値が得られた。In the present embodiment, 80% to 95% by weight of Cu powder was mixed with Ti powder in the balance, and an organic vehicle was added.
All the electrical characteristics of δ and IR were good, and the values as designed were obtained.
【0035】[0035]
【発明の効果】本発明により、卑金属内部電極を有する
積層セラミックコンデンサの外部電極端子としてのCu
ペーストの提供および接合強度の高い、電気的接続性の
良好な積層セラミックコンデンサの製造方法を提供する
ことができる。According to the present invention, Cu as an external electrode terminal of a monolithic ceramic capacitor having a base metal internal electrode is used.
It is possible to provide a paste and a method for manufacturing a monolithic ceramic capacitor having high bonding strength and good electrical connectivity.
【図1】本発明における積層セラミックコンデンサの製
造方法により製造した積層セラミックコンデンサの断面
図。FIG. 1 is a sectional view of a monolithic ceramic capacitor manufactured by a method for manufacturing a monolithic ceramic capacitor according to the present invention.
【図2】本発明の電極端子焼付け温度プロファイルを示
す図。FIG. 2 is a view showing an electrode terminal baking temperature profile of the present invention.
【図3】従来の電極端子焼付け温度プロファイルを示す
図。FIG. 3 is a view showing a conventional electrode terminal baking temperature profile.
【図4】Ti添加量に対する接合強度の変化を示す図。FIG. 4 is a diagram showing a change in bonding strength with respect to the amount of Ti added.
1 誘電体セラミック 2 内部電極 3 外部電極 4 めっき層 1 Dielectric ceramic 2 internal electrodes 3 external electrodes 4 plating layer
───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5E001 AB03 AC04 AC09 AF00 AF06 AH01 AH07 AH08 AH09 AJ03 5E082 AB03 BC32 EE04 EE23 EE35 FG26 FG54 GG10 GG11 GG26 GG28 JJ03 JJ12 JJ23 LL01 LL02 MM22 MM23 PP03 PP06 PP07 PP10 ─────────────────────────────────────────────────── ─── Continued front page F-term (reference) 5E001 AB03 AC04 AC09 AF00 AF06 AH01 AH07 AH08 AH09 AJ03 5E082 AB03 BC32 EE04 EE23 EE35 FG26 FG54 GG10 GG11 GG26 GG28 JJ03 JJ12 JJ23 LL01 LL02 MM22 MM23 PP03 PP06 PP07 PP10
Claims (6)
た内部電極層とを交互に複数層積み重ねて形成する積層
体に外部電極を設けてなる積層セラミックコンデンサに
おいて、外部電極は卑金属を含有する導電ペーストを非
酸化性雰囲気で焼き付けた後、中性のNiめっき及びS
nめっきを施すことを特徴とする積層セラミックコンデ
ンサの製造方法。1. A monolithic ceramic capacitor in which external electrodes are provided in a laminated body formed by alternately stacking a plurality of dielectric ceramic layers and internal electrode layers containing Ni as a main component, wherein the external electrodes contain a base metal. After baking the conductive paste in a non-oxidizing atmosphere, neutral Ni plating and S
A method of manufacturing a monolithic ceramic capacitor, which comprises performing n plating.
が80重量%以上から95重量%以下の範囲であり、有
機ビヒクルが5重量%以上から20重量%以下の範囲で
あり、金属成分としてCu金属含有率が90重量%以上
から98重量%以下の範囲であり、Ti金属が2重量%
以上から10重量%以下の範囲であることを特徴とする
請求項1記載の積層セラミックコンデンサの製造方法。2. The conductive paste has a metal content of 80% by weight to 95% by weight, an organic vehicle of 5% by weight to 20% by weight, and Cu metal as a metal component. The content is in the range of 90% by weight to 98% by weight and the content of Ti metal is 2% by weight.
From the above, the range is 10% by weight or less.
法において、非酸化性雰囲気での焼き付けは、炉温が導
電ペースト内の有機ビヒクル成分を分解する脱バインダ
温度まで、昇温させる第1の昇温区間と、脱バインダを
目的とする300℃以上から400℃以下の範囲におけ
る温度保持の第1の保持区間を有し、外部電極を溶融さ
せセラミックとの密着を得るための温度による第2の保
持区間を持ち、一定時間後、冷却ができる外部電極焼き
付け炉を用いて焼き付けを行い、第1の保持区間におい
て、Ar、N2等による不活性ガス雰囲気にて、保持時
の酸素濃度が10ppm以上から50ppm以下の範囲
の雰囲気下で行われることを特徴とする請求項1または
2に記載の積層セラミックコンデンサの製造方法。3. In the method for producing a monolithic ceramic capacitor, the baking in a non-oxidizing atmosphere is performed in a first temperature raising section in which a furnace temperature is raised to a binder removal temperature at which an organic vehicle component in a conductive paste is decomposed. And a first holding section for holding the temperature in the range of 300 ° C. to 400 ° C. for the purpose of binder removal, and a second holding section at a temperature for melting the external electrode to obtain close contact with the ceramic. After a certain period of time, baking is performed using an external electrode baking furnace capable of cooling, and in the first holding section, in an inert gas atmosphere of Ar, N 2, etc., when the oxygen concentration during holding is 10 ppm or more, The method for producing a monolithic ceramic capacitor according to claim 1 or 2, wherein the method is performed in an atmosphere of 50 ppm or less.
た内部電極層とを交互に複数層積み重ねて形成する積層
体に外部電極を設けてなる積層セラミックコンデンサに
おいて、外部電極は卑金属を含有する導電ペーストを真
空雰囲気で焼き付けた後、中性のNiめっき及びSnめ
っきを施すことを特徴とする積層セラミックコンデンサ
の製造方法。4. A monolithic ceramic capacitor in which external electrodes are provided in a laminated body formed by alternately stacking a plurality of dielectric ceramic layers and internal electrode layers containing Ni as a main component, wherein the external electrodes contain a base metal. A method for manufacturing a monolithic ceramic capacitor, which comprises baking a conductive paste in a vacuum atmosphere and then performing neutral Ni plating and Sn plating.
が80重量%以上から95重量%以下の範囲であり、有
機ビヒクルが5重量%以上から10重量%以下の範囲で
あり、金属成分としてCu金属含有率が90重量%以上
から98重量%以下の範囲であり、Ti金属が2重量%
以上から10重量%以下の範囲であることを特徴とする
請求項4記載の積層セラミックコンデンサの製造方法。5. The conductive paste has a metal content of 80% by weight to 95% by weight, an organic vehicle of 5% by weight to 10% by weight, and Cu metal as a metal component. The content is in the range of 90% by weight to 98% by weight and the content of Ti metal is 2% by weight.
From the above, the range is 10% by weight or less, and the method for manufacturing a monolithic ceramic capacitor according to claim 4.
法において、真空雰囲気での焼き付けは、炉温が導電ペ
ースト内の有機ビヒクル成分を分解する脱バインダ温度
まで、昇温させる第1の昇温区間と、脱バインダを目的
とする300℃以上から400℃以下の範囲における温
度保持の第1の保持区間を有し、外部電極を溶融させセ
ラミックとの密着を得るための温度による第2の保持区
間を持ち、一定時間後、冷却ができる外部電極焼き付け
炉を用いて焼き付けを行い、第1の保持区間において、
炉内の背圧を1×10-4Pa以下とすることを特徴とす
る請求項4または5に記載の積層セラミックコンデンサ
の製造方法。6. In the method for manufacturing a monolithic ceramic capacitor, baking in a vacuum atmosphere comprises a first temperature raising section in which a furnace temperature is raised to a binder removal temperature at which an organic vehicle component in a conductive paste is decomposed. It has a first holding section for holding the temperature in the range of 300 ° C to 400 ° C for the purpose of binder removal, and a second holding section depending on the temperature for melting the external electrode to obtain adhesion with the ceramic. After a certain period of time, baking is performed using an external electrode baking furnace capable of cooling, and in the first holding section,
The method for producing a monolithic ceramic capacitor according to claim 4 , wherein the back pressure in the furnace is set to 1 × 10 −4 Pa or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001243722A JP2003059758A (en) | 2001-08-10 | 2001-08-10 | Method of manufacturing multilayer ceramic capacitor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001243722A JP2003059758A (en) | 2001-08-10 | 2001-08-10 | Method of manufacturing multilayer ceramic capacitor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2003059758A true JP2003059758A (en) | 2003-02-28 |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7525241B2 (en) * | 2003-09-30 | 2009-04-28 | Epcos Ag | Ceramic multi-layer component and method for the production thereof |
| US20130219711A1 (en) * | 2011-09-01 | 2013-08-29 | Murata Manufacturing Co., Ltd. | Electronic component and selection method |
| JP2020061537A (en) * | 2018-10-10 | 2020-04-16 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Multilayer ceramic electronic components |
| US11955289B2 (en) | 2021-12-08 | 2024-04-09 | Samsung Electro-Mechanics Co., Ltd. | Multilayer capacitor |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01184813A (en) * | 1988-01-13 | 1989-07-24 | Fujitsu Ltd | Manufacture of thick-film capacitor |
| JPH04116910A (en) * | 1990-09-07 | 1992-04-17 | Dai Ichi Kogyo Seiyaku Co Ltd | Base metal composition for chip-type laminated capacitor external electrode |
| JPH05243083A (en) * | 1992-02-28 | 1993-09-21 | Taiyo Yuden Co Ltd | Formation of copper terminal electrode for ceramic electronic component |
| JPH07335477A (en) * | 1994-06-15 | 1995-12-22 | Murata Mfg Co Ltd | Manufacture of ceramic electronic component |
| JPH097877A (en) * | 1995-04-18 | 1997-01-10 | Rohm Co Ltd | Multilayered ceramic chip capacitor and manufacture thereof |
| JPH0917612A (en) * | 1995-06-28 | 1997-01-17 | Matsushita Electric Ind Co Ltd | Varistor manufacturing method |
| JPH10279353A (en) * | 1997-03-31 | 1998-10-20 | Kyocera Corp | Dielectric porcelain |
| JP2001118754A (en) * | 1999-08-10 | 2001-04-27 | Kikusui Chemical Industries Co Ltd | Jig for baking electrode material and method of manufacturing the same |
-
2001
- 2001-08-10 JP JP2001243722A patent/JP2003059758A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01184813A (en) * | 1988-01-13 | 1989-07-24 | Fujitsu Ltd | Manufacture of thick-film capacitor |
| JPH04116910A (en) * | 1990-09-07 | 1992-04-17 | Dai Ichi Kogyo Seiyaku Co Ltd | Base metal composition for chip-type laminated capacitor external electrode |
| JPH05243083A (en) * | 1992-02-28 | 1993-09-21 | Taiyo Yuden Co Ltd | Formation of copper terminal electrode for ceramic electronic component |
| JPH07335477A (en) * | 1994-06-15 | 1995-12-22 | Murata Mfg Co Ltd | Manufacture of ceramic electronic component |
| JPH097877A (en) * | 1995-04-18 | 1997-01-10 | Rohm Co Ltd | Multilayered ceramic chip capacitor and manufacture thereof |
| JPH0917612A (en) * | 1995-06-28 | 1997-01-17 | Matsushita Electric Ind Co Ltd | Varistor manufacturing method |
| JPH10279353A (en) * | 1997-03-31 | 1998-10-20 | Kyocera Corp | Dielectric porcelain |
| JP2001118754A (en) * | 1999-08-10 | 2001-04-27 | Kikusui Chemical Industries Co Ltd | Jig for baking electrode material and method of manufacturing the same |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7525241B2 (en) * | 2003-09-30 | 2009-04-28 | Epcos Ag | Ceramic multi-layer component and method for the production thereof |
| US8776364B2 (en) | 2003-09-30 | 2014-07-15 | Epcos Ag | Method for producing a multilayer ceramic component |
| US9186870B2 (en) | 2003-09-30 | 2015-11-17 | Epcos Ag | Ceramic multi-layer component and method for the production thereof |
| US20130219711A1 (en) * | 2011-09-01 | 2013-08-29 | Murata Manufacturing Co., Ltd. | Electronic component and selection method |
| US9374908B2 (en) * | 2011-09-01 | 2016-06-21 | Murata Manufacturing Co., Ltd. | Electronic component and selection method |
| JP2020061537A (en) * | 2018-10-10 | 2020-04-16 | サムソン エレクトロ−メカニックス カンパニーリミテッド. | Multilayer ceramic electronic components |
| JP7235388B2 (en) | 2018-10-10 | 2023-03-08 | サムソン エレクトロ-メカニックス カンパニーリミテッド. | multilayer ceramic electronic components |
| US11955289B2 (en) | 2021-12-08 | 2024-04-09 | Samsung Electro-Mechanics Co., Ltd. | Multilayer capacitor |
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