JP2002323874A - Liquid crystal display method, liquid crystal display device, image display application device, and program - Google Patents

Abstract

(57) [Summary] [Problem] When the number of display lines of an effective image is smaller than that of a display image, a display abnormality may occur. A plurality of TFTs provided corresponding to intersections of a plurality of source wirings and a plurality of gate wirings arranged in a matrix, a plurality of pixel electrodes connected to the TFTs, and a plurality of pixel electrodes are provided. A liquid crystal display method for a liquid crystal display device provided with a storage capacitor 1 provided between a gate line and an adjacent gate line, wherein when scanning is sequentially performed on a plurality of gate lines, the scanning is temporarily stopped at a predetermined gate line. And a liquid crystal display method which is restarted after a predetermined time has elapsed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-quality TFT (Thin film Transistor) used for a display such as a computer or a television.
The present invention relates to a liquid crystal display method using a thin film transistor, a liquid crystal display device, an image display application device, and a program.

[0002]

2. Description of the Related Art Liquid crystal modules are attracting attention not only as monitors for personal computers but also as various video display devices such as televisions.

Therefore, a display method using a conventional liquid crystal module will be described.

[0004] For example, when an attempt is made to display a television image on a so-called XGA (1024 pixels x 768 pixels) liquid crystal module, image data for one screen is temporarily stored in a frame memory to adjust the number of scanning lines, and the pixel converter is used. For example, there is a display method of appropriately converting and outputting this data.

However, since mounting a frame memory or a pixel converter circuit increases the cost, such a circuit has recently been shunned. (However, when only the horizontal display time is operated, only the line memory is required.) This is not the case).

Therefore, a liquid crystal module for television display having an aspect ratio (ratio of width to height) of 4 to 3 has a 16
In the case of displaying 9 pairs, as a display method that can be realized only by contrivance on the liquid crystal module side without mounting such an expensive circuit, there is a display method in which the upper and lower areas of the screen are left and black display is performed. In other words, if the area where the image is to be displayed (effective image area) is less than the display area (maximum display area) of the liquid crystal module, the effective image area is centered in the vertical direction, and the remaining upper and lower areas are displayed in black. (Of course, if a frame memory or a pixel converter is mounted, it is possible to prevent black display, which is left and right, from being left behind).

However, in order to realize such a display method with a black display, the vertical period must be considered.

For example, consider a case where 640 lines are displayed on a liquid crystal module having 768 vertical lines. When the time for displaying one line is 1H (horizontal period), the signal specification for displaying 640 lines includes 6 hours in addition to 640H time.
A vertical blanking time of about 0H is included. But,
Total vertical cycle is 700H (Blanking time is 6
0H), there is not enough time for displaying 768 vertical lines of the liquid crystal module. Therefore, a signal for displaying the next frame is input by the time the liquid crystal module finishes writing all the 768 lines, and a normal display cannot be performed. Time depends on the time required to accumulate charge on the pixel electrode,
It is difficult to shorten).

Therefore, a display method considered to solve such a problem will be described with reference to FIG. 2 which is an explanatory diagram of operation timing of a conventional liquid crystal display device.

FIG. 2 shows signal timings applied to the gate lines when 640 lines of effective display are performed in a TFT liquid crystal module having 768 gate lines.

In the case of a TFT liquid crystal module, scanning is normally performed on the first line (ie, a signal for turning on the TFT connected to the gate line on the first line is applied to sequentially perform operations from the first line). Do) and 768
It is necessary to complete scanning up to the line.

However, the upper 64 lines (upper black line 2)
04) and the lower 64 lines (lower black line 206), the image is not required to be input because black display is performed, and simultaneous vertical scanning is performed. That is, in the simultaneous upper and lower scanning period 203, when the 704th line is displayed in black, the scanning of the first line is started at the same time to display black data. In this way, the scanning time for 64 lines can be saved.

Furthermore, since these 64 lines can be scanned irrespective of the input data, the necessary time can be further reduced by shortening the on-time of the gate of one line, that is, the scanning time.

Thus, effective display of 640 lines can be performed in a TFT liquid crystal module having 768 gate lines.

[0015]

However, according to the actual signal specifications, the effective image area 20 cannot be detected until the synchronization signal is detected.
Since the first line of No. 5 is determined, it is necessary to start displaying the data of the first line of the effective image area 205 after the detection of the synchronization signal. That is, in the period 207, a standby is performed on the 63rd line before the 64th line which is the first line of the effective image area 205, and the synchronization is performed between the scanning of the 63rd line and the scanning of the 64th line. You have to wait for the signal to be detected.

However, the ON time of the gate of the 63rd line and the application time of the correction potential depend on the effective image area 205.
Different from those of the line at. For this reason, in the case of the capacitive coupling driving method in which the potential of the gate bus line capacitively coupled to the pixel electrode is changed to modulate the potential of the pixel electrode, a storage capacitor for storing electric charge in the pixel is provided by the pixel electrode. Is formed between a part of the gate line and a preceding (or subsequent) gate line.
A display abnormality (so-called white floating) occurs in the 64th line at the upper end of the fifth line.

The present invention has been made in consideration of the above-described conventional problems, and has a liquid crystal display method and a liquid crystal display which can suppress display abnormalities that occur when the number of display lines of an effective image is smaller than that of a display image. It is an object to provide an apparatus, an image display application device, and a program.

[0018]

Means for Solving the Problems The first invention (claim 1)
A plurality of switching elements provided corresponding to intersections of a plurality of source wirings and a plurality of gate wirings arranged in a matrix, a plurality of pixel electrodes connected to the switching elements, A liquid crystal display method for a liquid crystal display device including a plurality of pixel electrodes and a capacitor provided between the adjacent gate lines, wherein the scanning is performed when the plurality of gate lines are sequentially scanned. This is a liquid crystal display method that temporarily stops at a predetermined gate wiring and starts again after a predetermined time has elapsed.

The second invention (corresponding to claim 2) is the liquid crystal display method according to the first invention, wherein the gate wiring for restarting the scanning is a predetermined gate wiring for which the scanning is temporarily interrupted. .

According to a third aspect of the present invention (corresponding to claim 3), scanning of the plurality of gate lines is performed using two types of correction potentials having different polarities, and is applied when the scanning is started again. The polarity of the correction potential is determined in consideration of the polarity of the correction potential to be applied to the gate wiring adjacent to the pixel electrode connected to the switching element corresponding to the predetermined gate wiring. 4 is a liquid crystal display method of the invention.

According to a fourth aspect of the present invention (corresponding to claim 4), the timing at which the scanning is restarted is performed at a timing corresponding to the gate line adjacent to a pixel electrode connected to a switching element corresponding to the predetermined gate line. This is the third liquid crystal display method of the present invention, which is determined in consideration of the timing of applying the correction potential.

According to a fifth aspect of the present invention (corresponding to claim 5), the predetermined gate wiring is such that the type of image data written using a pixel electrode connected to a corresponding switching element is the same as that of the adjacent gate wiring. The liquid crystal display method according to the first aspect of the present invention is a gate wiring different from a type of image data written using a pixel electrode connected to a switching element corresponding to the gate wiring.

According to a sixth aspect of the present invention (corresponding to claim 6), a plurality of switching elements provided corresponding to intersections of a plurality of source wirings and a plurality of gate wirings arranged in a matrix, What is claimed is: 1. A liquid crystal display device comprising: a plurality of pixel electrodes connected to a switching element; and a capacitor provided between the plurality of pixel electrodes and the gate wiring adjacent to the plurality of pixel electrodes. Is sequentially performed in a predetermined gate wiring, and is restarted after a predetermined time has elapsed.

A seventh invention (corresponding to claim 7) is an image display application device using the liquid crystal display device of the sixth invention.

According to an eighth aspect of the present invention (corresponding to claim 8), in the liquid crystal display method according to the first aspect of the present invention, when scanning is sequentially performed on the plurality of gate lines, the scanning is temporarily interrupted at a predetermined gate line. A program for causing a computer to execute a step of restarting after a predetermined time has elapsed.

[0026]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) First, with respect to the configuration of the liquid crystal display device in the present embodiment, FIG. 3 which is a configuration diagram of the liquid crystal display device in the present embodiment, and the gate of the liquid crystal display device in the present embodiment This will be described with reference to FIG. 4 which is an equivalent circuit diagram of the bus line.

In the liquid crystal display device of the present embodiment, the source bus lines 4 driven by the source bus line driving circuit 50 and the gate bus lines 6 driven by the gate bus line driving circuit 51 are arranged in a matrix. And a storage capacitor (capacitance element) 1 provided between the pixel electrode and a gate bus line 2 adjacent to the pixel electrode. In the liquid crystal display device provided, when scanning is sequentially performed on the gate bus line, the scanning is
As will be described later, the operation is temporarily interrupted at a predetermined gate wiring and restarted after a predetermined time has elapsed.

In FIG. 4, 2 is the (n-1) th gate bus line _Gn-1 , 6 is the nth gate bus line _Gn , 4 is the mth source bus line _Sm , and 5 is (m +
1) The source bus line _{Sm + 1} . 3 is located at the intersection of the gate bus line G _n and the source bus line S _m TFT, 1 is the storage capacitance, 7 liquid crystal capacitor, 8 gates - parasitic capacitance (parasitic capacitance between the drain is provided as a circuit element The reference numeral 9 denotes a common electrode connected to one end of the pixel electrode. Note that the storage capacitor 1 is formed between the gate bus line in the subsequent stage to execute the above-described capacitive coupling driving method.

Next, the operation of the liquid crystal display device according to the present embodiment will be described with reference to FIG. 1, which is an explanatory diagram of the operation timing of the liquid crystal display device according to the present embodiment. Note that while describing the operation of the liquid crystal display device in the present embodiment, an embodiment of the liquid crystal display method of the present invention will also be described.

When normal display is performed, that is, when an image of 768 lines is displayed, a pulse is applied to the gate signal line in order from the 0th line to the 767th line (the potential of this pulse is determined by the TFT of the pixel). Because the gate of the gate is turned on, it is called a gate on voltage.)

On the other hand, in the present embodiment, the vertical 76
A case will be described in which an image of 640 lines is displayed in the effective image area 105 located at the center of the screen on an 8-line liquid crystal screen.

FIG. 1 shows signals applied to the gate signal lines constituting the horizontal line (the 0th line indicates the first line of the vertical 768 lines).

In this embodiment, 6 out of 768 lines
Since only 40 lines of data are input, the remaining 128 lines, the upper black line 104 and the lower black line 106, need to be scanned regardless of the input data. In the following, one line (the display is 64th
In the input data inputted from the (th) line to the 640th line (the display is performed on the 703th line), the first line of the input data is the first line data, the 640th line. 64 data
It is referred to as the 0th line data.

The first line data is generally input after a certain period of time after the detection of the vertical synchronizing signal, but it is uncertain when the vertical synchronizing signal is detected. Therefore, in the liquid crystal module having no memory, even if the scanning of the 0th line is started after the detection of the vertical synchronization signal, the 6th
The data of the first line cannot be displayed on the fourth line (because the time for applying the ON voltage to the gate requires a sufficient time to charge the TFT).

Therefore, when it is determined that the image to be displayed is image data of 640 vertical lines, the upper black line 104 and the lower black line 10 are displayed.
6 in the upper and lower simultaneous scanning periods 101 and 103 (substantially equivalent to the vertical blanking time in the previous vertical period) by self-running and simultaneous upper and lower scanning, and wait until a vertical synchronizing signal is detected. Scanning is performed in the display period 102.

In this embodiment, the upper black line 104 and the lower black line 1 other than the effective image area 105
No. 06 indicates that black display is to be performed (that is, in the gate wiring where scanning is temporarily interrupted, the type of image data written using the pixel electrode connected to the corresponding switching element is changed to the adjacent gate This is different from the type of image data written using the pixel electrode connected to the switching element corresponding to the wiring). For this reason,
As described above, a phenomenon such as so-called white floating often occurs at the upper end of the effective image area 105.

That is, the problem here is the application of the ON voltage to the 63rd line.

In order to eliminate such a phenomenon, the present inventor applied an on-voltage to the 63rd line to temporarily suspend scanning, and then applied an on-voltage again after detecting a vertical synchronizing signal in a period 107. If the algorithm for restarting the scanning is adopted, the ON voltage is applied again to the 63rd line for a predetermined time, so that the TFT of the 63rd line is subjected to the same conditions as the other lines in the effective image area 105.
I thought that I could turn on.

In the case of the capacitive coupling driving method, it is necessary to alternately apply a positive or negative correction potential for each line immediately after the application of the ON voltage, so that the correction potential of the 63rd line is applied to the next 64th line. The polarity of the correction potential is applied so that the correction potential is different from the positive / negative (that is, the polarity of the correction potential to be applied when scanning is restarted is changed to the gate adjacent to the pixel electrode connected to the switching element corresponding to the gate wiring for which the scanning was once interrupted) Determined in consideration of the polarity of the correction potential for the wiring).

The timing at which scanning is started again is
The determination is made in consideration of the timing of applying the correction potential to the gate wiring adjacent to the pixel electrode connected to the switching element corresponding to the gate wiring for which the scanning has been temporarily interrupted.

In this way, it is possible to prevent a mismatch in voltage application on the 63rd line from occurring.

In the above, the first embodiment has been described in detail.

In the present embodiment described above, the gate wiring for restarting the scanning according to the present invention is the predetermined gate wiring for which the scanning has been temporarily interrupted. However, the present invention is not limited to this, and the gate wiring for restarting the scan according to the present invention may be, for example, a gate wiring immediately before a predetermined gate wiring.

In short, when scanning is sequentially performed on a plurality of gate wirings, the scanning may be temporarily interrupted at a predetermined gate wiring and restarted after a predetermined time has elapsed.

The present invention is a program for causing a computer to execute all or some of the steps (or steps, operations, actions, etc.) of the above-described liquid crystal display method of the present invention. It is a program that works in cooperation. Of course, the computer of the present invention is not limited to pure hardware such as a CPU,
It may include firmware, OS, and peripheral devices.

It should be noted that some of the steps of the present invention (or
A process, an operation, an operation, and the like) mean some steps of the plurality of steps, or some operations of one step.

The present invention also includes a computer-readable recording medium on which the program of the present invention is recorded. Further, one usage form of the program of the present invention may be a form in which the program is recorded on a computer-readable recording medium and operates in cooperation with the computer. One usage of the program of the present invention may be a mode in which the program is transmitted through a transmission medium, read by a computer, and operates in cooperation with the computer. The recording medium includes a ROM and the like, and the transmission medium includes a transmission medium such as the Internet, light, radio waves, and sound waves.

The configuration of the present invention may be realized by software or hardware.

As described above, according to the present invention, for example, a plurality of source wirings and gate wirings formed in a matrix on one of the substrates opposed to each other with a liquid crystal interposed therebetween are electrically connected to the respective intersections. A pixel electrode connected to the switching element is formed, a storage capacitor is formed between the pixel electrode and a gate wiring adjacent thereto, and when sequentially scanning the first to last gate wirings, n
This is a liquid crystal display device having a function of interrupting the sequential scanning of the gate signal line to be scanned first and restarting the scanning again from the n-th after a certain period.

Further, according to the present invention, for example, when sequentially scanning a gate signal line, a method of turning on a switching element by using two types of signal waveforms of positive and negative having different polarities is adopted. It has a function to select between a signal waveform when interrupting the sequential scanning of the nth operated gate signal line and a signal waveform when restarting after a certain period of time, a signal waveform of the same polarity or a signal waveform of a different polarity. The liquid crystal display device described above.

The present invention is also applicable to the case where, for example, the sequential operation of the n-th gate signal line once suspended is restarted,
The liquid crystal display device described above has a function of applying a correction potential to the first, that is, the previous gate signal line.

As described above, when the effective display area is centered, the gate ON pulse is applied again when scanning is restarted from the state where scanning is stopped at the gate line immediately before the effective display area. It is possible to eliminate the luminance mismatch near the boundary between the display area and the black display area above and below the display area.

That is, when the number of display lines of the effective image is smaller than that of the display image, a display abnormality due to a voltage mismatch occurring in a specific line can be eliminated, and a uniform image can be displayed.

[0055]

As is apparent from the above description, the present invention has an advantage that display abnormalities that occur when the number of display lines of the effective image is smaller than that of the display image can be suppressed.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of operation timing of a liquid crystal display device in Embodiment 1 of the present invention.

FIG. 2 is an explanatory diagram of operation timing of a conventional liquid crystal display device.

FIG. 3 is a configuration diagram of a liquid crystal display device according to Embodiment 1 of the present invention.

FIG. 4 is an equivalent circuit diagram of a gate bus line of the liquid crystal display device according to Embodiment 1 of the present invention.

[Explanation of symbols]

 101 Upper and lower simultaneous scanning period 102 Effective display period 103 Upper and lower simultaneous scanning period 104 Upper black line 105 Effective image area 106 Lower black line 201 Upper and lower simultaneous scanning period 202 Effective display period 203 Upper and lower simultaneous scanning period 204 Upper black line 205 Effective image area 206 Lower Black line

 ──────────────────────────────────────────────────続 き Continuing on the front page F term (reference) 2H093 NA16 NA31 NA41 NB11 NC09 NC34 NC35 NC36 NC52 ND02 ND60 5C006 AC22 AC26 AF23 AF42 AF46 AF68 AF71 BB16 BC03 BC06 BC13 EC05 FA08 FA37 5C058 AA06 BA04 5C080 AA10 BB05 DD30 EJ29 FF05 JJ04 KK02 KK43

Claims (8)

[Claims] A plurality of switching elements provided corresponding to intersections of a plurality of source wirings and a plurality of gate wirings arranged in a matrix; a plurality of pixel electrodes connected to the switching elements; A liquid crystal display method for a liquid crystal display device comprising: a plurality of pixel electrodes; and a capacitor provided between the adjacent gate lines. The method according to claim 1, further comprising: A liquid crystal display method that temporarily stops at a predetermined gate wiring and starts again after a predetermined time has elapsed. 2. The gate wiring for starting scanning again,
2. The liquid crystal display method according to claim 1, wherein said scanning is a predetermined gate wiring which is temporarily interrupted. 3. The scanning of the plurality of gate wirings includes:
The correction is performed using two types of correction potentials having different polarities, and the polarity of the correction potential applied when restarting the scan is adjacent to a pixel electrode connected to a switching element corresponding to the predetermined gate wiring. 3. The liquid crystal display method according to claim 2, wherein the determination is made in consideration of the polarity of the correction potential to be applied to the gate wiring. 4. The timing for restarting the scanning is as follows.
4. The liquid crystal display method according to claim 3, wherein the determination is made in consideration of a timing of applying the correction potential to the gate wiring adjacent to a pixel electrode connected to a switching element corresponding to the predetermined gate wiring. 5. A method according to claim 1, wherein the predetermined gate line is a pixel in which the type of image data written using a pixel electrode connected to a corresponding switching element is a pixel connected to a switching element corresponding to the adjacent gate line. 2. The liquid crystal display method according to claim 1, wherein the gate wiring is different from the type of image data written using the electrodes. 6. A plurality of switching elements provided corresponding to intersections of a plurality of source wirings and a plurality of gate wirings arranged in a matrix, a plurality of pixel electrodes connected to the switching elements, A liquid crystal display device comprising: a plurality of pixel electrodes; and a capacitive element provided between the adjacent gate lines. When scanning is sequentially performed on the plurality of gate lines,
The scanning is temporarily stopped at a predetermined gate wiring,
A liquid crystal display device that is restarted after a predetermined time has elapsed. 7. An image display application device using the liquid crystal display device according to claim 6. 8. The computer-readable recording medium according to claim 1, wherein, when scanning is sequentially performed on the plurality of gate wirings, the step of temporarily stopping the scanning at a predetermined gate wiring and restarting the scanning after a predetermined time has elapsed. Program to be executed.