JP2002314942A - Digital vtr - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a digital VTR capable of performing fast-forward reproduction and also smoothing a reproduced image at the time of fast-forward reproduction without using a special circuit as a formatter. SOLUTION: The VTR is provided with a recording control means in which, when actual data in a unit of one recording block consisting of a plurality of data blocks are stored in a memory at the time of recording, the data blocks are read at intervals of several fields, the data formed by assigning time-series numbers to the respective read data blocks is recorded in a magnetic tape as searching data blocks, and then, the remaining data blocks are read from the memory and time-series numbers are assigned to the respective data blocks read from the remaining data blocks to record them in the magnetic tape.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital VTR such as a digital VTR for intermittently recording an input image.

[0002]

2. Description of the Related Art At the time of recording, actual data (input video
Audio data or its compressed data) in the memory,
Each time data in recording block units is accumulated, data in one recording block unit is recorded on the magnetic tape, and during reproduction, data recorded on the magnetic tape is read out intermittently in recording block units and read out from the magnetic tape. 2. Description of the Related Art A digital VTR which stores data stored in a memory, reads out the data stored in the memory, and reproduces and outputs the data is known.

In such a digital VTR, it has been difficult to perform reproduction by feeding a magnetic tape at a speed higher than the normal reproduction speed, that is, to perform fast forward reproduction (including fast reverse reproduction). In order to perform fast-forward playback, it is necessary to previously create fast-forward playback data separately from the normal playback data on the recording data,
It was necessary to use a special formatter having such a function.

Accordingly, the present applicant has developed a digital VTR capable of performing fast-forward reproduction without using a special formatter as a formatter.
A patent application was filed on that date (see Japanese Patent Application No. 2000-51302).

That is, a digital VT developed by the present applicant.
R is a means for recording a cue mark on a control track of a magnetic tape at a position corresponding to a predetermined intermediate position of each recording block at the time of recording. Means are provided for stopping the acquisition of data in the memory at the time when the fixed amount is accumulated, and for accelerating the capstan motor, and for decelerating the capstan motor when a cue mark is detected.

In this method, at the time of fast-forward playback, only the leading portion (for example, 0.5 seconds) of actual data in each recording block is played back sequentially. For this reason, at the time of fast-forward playback, there is a time difference between the playback images of the adjacent recording blocks, and thus there is a problem that the playback image is not smooth.

[0007]

SUMMARY OF THE INVENTION The present invention provides a digital VTR capable of performing fast-forward playback without using a special formatter and smoothing playback images during fast-forward. The purpose is to:

[0008]

In a digital VTR according to the present invention, at the time of recording, actual data is stored in a memory in a time-series order for each data block in units of one field, and a predetermined data including a plurality of data blocks is stored. Each time the actual data in the recording block unit is stored in the memory, the actual data in the recording block unit is recorded on the magnetic tape, and during the normal reproduction, the actual data recorded on the magnetic tape is intermittently recorded in the recording block unit. A digital VTR that reads and stores actual data read from a magnetic tape in a memory, reads the real data stored in the memory, and reproduces and outputs the data.
When the actual data for each recording block is accumulated in the memory,
A data block is read out from the memory at intervals of a predetermined number of fields, and a readout data block with a time-series number added thereto is recorded on a magnetic tape as a search data block, and then the remaining data blocks are read out from the memory. A recording control means for adding a time series number to each read data block and recording the data block on a magnetic tape; during normal reproduction, when actual data of one recording block read from the magnetic tape is accumulated in the memory, Normal reproduction control means for reading out and reproducing each data block constituting the real data stored in the chronological sequence in the order of the time series number. In the fast-forward reproduction mode, it is used for searching for the head of the real data in one recording block. Only data blocks are read from the magnetic tape and stored in the memory, and also stored in the memory. Characterized in that it comprises a fast-forward reproduction control means for reproducing the search data block is read in a predetermined order.

The memory has a main bank and a sub-bank, and the recording control means accumulates actual data in recording block units in the main bank for each data block, and stores each data block in the main bank. Means for accumulating address information at the address positions of the sub-banks corresponding to the time-series order of the data blocks; reading address information at intervals of a predetermined number of addresses from the sub-bank to thereby obtain a predetermined number of fields from the main bank Means for reading out data blocks at intervals of each time, and recording each read-out data block with a time-series number on a magnetic tape as a search data block, and thereafter, transmitting the remaining address information from the sub-bank in a time-series manner. By reading in the order of
There is provided a means for reading the remaining data blocks from the memory and recording the read data blocks with a time-series number added to the magnetic tape.

The memory has a main bank and a sub-bank. The normal reproduction control means reads out each data block in one recording block from the magnetic tape and accumulates the data block in the main bank. Means for accumulating the storage address information in the sub-banks corresponding to the time-series order of the data blocks, and reading the address information from the sub-banks in the order of the sub-bank addresses, thereby obtaining data from the main bank. Means are provided for reading out and playing back the blocks in the order of the time series numbers.

The memory has a main bank and a sub-bank. The fast-forward playback control means reads out only the search data block at the head of the actual data in one recording block from the magnetic tape and stores it in the main bank. Means for accumulating the storage address information of each search data block in the main bank at the address positions of the sub-banks corresponding to the time-series order of the data blocks, and an interval of a predetermined number of addresses from the sub-bank. Means for reading out and retrieving each search data block from the main bank by reading out address information.

Means for recording a cue mark on a control track of a magnetic tape at a position corresponding to an intermediate predetermined position of each recording block during recording, and storing actual data in one recording block in a memory during fast forward reproduction. It is preferable to include a means for stopping the taking of data into the memory and accelerating the capstan motor when a predetermined amount is accumulated, and a means for decelerating the capstan motor when a cue mark is detected. .

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to a digital VTR used in a monitoring system will be described below with reference to the drawings.

[1] Description of the configuration of the digital VTR

FIG. 1 shows the configuration of a digital VTR. The digital VTR includes a video processing unit 1, an audio processing unit 2, a memory 3, a formatter 4, a sub control unit 5, an electromagnetic conversion unit 6, a main control unit 7, and a cue mark detection circuit 9.
Etc. are provided.

The main control unit 7 is constituted by a microcomputer and has a function of a system controller and a function of a servo block. The main control unit 7 outputs the output of the capstan frequency generator (CFG) 101, the CTL
The capstan motor 100 is controlled based on signals and the like, and the drum motor 200 is controlled based on the output of the drum phase generator (DPG) 201, the output of the drum frequency generator (DFG) 202, and the like.

The CTL recording / reproducing circuit 7a in the main controller 7
Records the CTL signal on the control track of the magnetic tape 300 using the CTL head 301 at the time of recording, and reads the CTL signal from the control track of the magnetic tape 300 using the CTL head 301 at the time of reproduction. The cue mark detection circuit 9 uses the CTL recording / reproducing circuit 7a during fast forward playback or fast reverse playback to read the magnetic tape 3
This is for detecting a cue mark described later based on the CTL signal read from 00.

The video processing unit 1 comprises a decoder 11, an encoder 12, a JPEG standard compression / decompression unit 13, and a memory 14 for compression / decompression processing. Memory 14
Are divided into areas I and II each having a capacity of one field and in which input data is alternately written, and an area III for storing data after JPEG compression.

The audio processing unit 2 has a filter 21, A /
D converter 22, D / A converter 23, PCM encoder /
It comprises a decoder 24 and a FIFO memory 25. The sub control unit 5 includes a CPU 51 and an FPGA 52. The video processing unit 1, the audio processing unit 2, the memory 3, the formatter 4, and the sub-control unit 5 are connected to each other via a data bus line 8. The sub control unit 5 is connected to the main control unit 7.

[2] Description of the configuration of one recording block recorded on a magnetic tape and the configuration of CTL marking

In this digital VTR, data is intermittently recorded on a magnetic tape in predetermined recording block units. FIG. 2 shows a configuration of one recording block recorded on a magnetic tape and a configuration of CTL marking.

In this embodiment, the recording format on the magnetic tape is D-VHS, one recording block is 336 tracks, and the capacity of the memory 3 is 64 Mbits (8 Mbytes).
And

As shown in FIG. 2A, one recording block is composed of data for 336 tracks (168 CTLs) and includes data for a plurality of fields. One recording block consists of a front dummy data portion for 32 tracks (16 CTLs), followed by 288 tracks (144 chs.).
CTL) and 16 tracks (8CT)
L) for the rear dummy data section.

As shown in FIG. 2B, the CTL marking corresponding to one recording block is the first 8 CTL indicating "0", and the next 8 CTL indicating a start mark.
L, followed by 68 CTL indicating “0”, followed by 16 CTL indicating a cue (CUE) mark, followed by “0”
And 8CTLs representing an end mark.

The start mark is VIS according to the VHS standard.
It is composed of “10101010” using “0” and “1” of the short S of the S / VASS signal. The end mark is composed of “10101010” using long “0” and “1” of the VISS / VASS signal according to the VHS standard.

According to the VHS standard, the ratio of the N pole write time of S “0” to the S pole write time is 57.5: 4.
It is defined as 2.5, and the ratio between the N-pole write time of “1” of the short S and the S-pole write time is defined as 25.0: 75.0. The ratio between the N-pole write time of the long L “0” and the S-pole write time is 62.5: 37.5.
And the N pole write time of "1" of long L and S
The ratio to the pole writing time is defined as 30.0: 70.0.

As the cue mark, "0" and "1" of short S and long L defined by the VHS standard are used.
Means "0000000000000000" which uses "0" having a different ratio between the N pole writing time and the S pole writing time.
In this example, as the "0" constituting the cue mark, "0" having a ratio of the N-pole writing time to the S-pole writing time of 80:20 is used.

The reason for this is that the determination unit for determining the normal VISS / VASS is determined by the CT unit that forms the cue mark.
This is to prevent L from being erroneously recognized as “0” or “1” constituting the VISS / VASS signal. For this reason, a cue mark detection circuit 9 is provided separately from the normal VISS / VASS determination section.

As "0" other than the start mark, end mark and cue mark, "0" of short S or long L defined by the VHS standard is used.

The start mark of the CTL signal is set to 1
Instead of recording at the position corresponding to the beginning of the recording block,
The recording is performed after eight CTLs of 0 ”are output for the following reason: That is, this VT
In R, the running of the magnetic tape 300 is stopped every time one magnetic recording block is reproduced during reproduction. For this reason, since the envelope of the first part of one recording block is not stable during reproduction, if a start mark is recorded at the unstable position, a start mark detection error may occur. Therefore,
The start mark is recorded at a position after the position corresponding to the head of one recording block.

[3] Description of VTR Recording Operation

At the time of recording, the main control section 7 controls the capstan motor 100 and the drum motor 200 to rotate at a constant speed. Also, the CTL recording / reproducing circuit 7a adds a CT
Record the L signal.

An NTSC composite video signal or a Y / C component signal separated into a luminance / color signal from a surveillance camera (video camera) not shown
Input to the decoder 11. The decoder 11 converts the input video signal into a YUV signal and converts the obtained YUV signal into an AUV signal.
/ D conversion.

The YUV digital data obtained by the decoder 11 is sent to a compression / expansion unit 13 for compressing and expanding input / output data according to the JPEG standard. The compression / expansion unit 13 uses the recording interval information sent from the CPU 51 via the data bus line 8 to specify the Y for each of the specified fields.
UV digital data is alternately taken into areas I and II of the memory 14. The YUV digital data taken into the memory 14 is compressed by the compression / decompression device 13. The compressed video data after compression is written to the area III of the memory 14.

1 written in the area III of the memory 14
The compressed video data for the field is supplied to the area II of the memory 14 by the compression / decompression device 13 based on a control command sent from the CPU 51 via the data bus line 8.
I, and is written to the memory 3 via the data bus line 8. At this time, an area identification code for identifying the Q table data and the video data area is added to the compressed video data by the FPGA 52, and
Is written to.

On the other hand, an audio signal from a video camera (not shown) is continuously input to a filter 21 in the audio processing unit 2. The filter 21 removes a high-frequency noise component of the audio signal and outputs the band-limited audio signal to the A / D converter 22. A / D converter 22
Performs A / D conversion of an audio signal whose band is limited.
The digital audio signal obtained by the A / D converter 22 is continuously sent to a PCM encoder / decoder 24.

The PCM encoder / decoder 24 compresses the sent digital audio signal by the PCM method. The compressed audio data after compression is FIFO
The data is written to the memory 25. The FIFO memory 25 reads out the compressed audio data written at each recording interval, and writes the compressed audio data into the memory 3 via the data bus line 8. At this time, an area identification code for identifying the audio data area is added to the compressed audio data by the FPGA 52 and written into the memory 3. Also, C
Additional information such as recording date and time and recording interval is also stored in the memory 3 from the PU 51.

The compressed video data, compressed audio data and additional information are formatted on a field basis as shown in FIG. 3 and stored in the memory 3 as one data block.

That is, a data block for one field includes a header section 81, an audio data section 82, and a video data section 83.

The header section 81 contains additional information, Q table data, and the like. At the beginning of the header section 81, a frame header A indicating that it is the beginning of the header section 81 is inserted. At the beginning of the audio data section 82, an area identification code B for identifying an audio data area is inserted. An area identification code C for identifying a video data area is inserted at the beginning of the video data section 83. At the end of the video data section 83, an end code D indicating the end of the video data section is inserted.

As shown in FIG. 4, the memory 3 has a main bank (MAIN BANK) and a sub-bank (SUBBANK). The FPGA 52 of the sub-control unit 5 accumulates actual data in the main bank in a time-series order for each data block in units of one field. In FIG. 4, the number after the data block indicates the chronological order of the data block in one recording block.

Further, the FPGA 52 accumulates the storage address information of each data block in the main bank at the address position of the sub-bank corresponding to the time series order of those data blocks. The storage address information includes a start storage address (start address) and an end storage address (end address). In FIG. 4, it is assumed that the numbers 1 to 144 written below the sub-bank represent the addresses of the sub-bank.

Every time an amount of data (actual data) corresponding to a predetermined recording block unit is accumulated in the main bank of the memory 3, the actual data (compressed video data, compressed audio data, additional information) is read out. The data is sent to the formatter 4 via the data bus line 8. In this example, as described above, one recording block is composed of data of 336 tracks, of which 288 tracks are real data, so that 288 tracks of data (data blocks) are stored in the main bank of the memory 3. Each time the data is stored, the data is read and sent to the formatter 4.

Reading of a data block is performed as follows. That is, first, the CPU 51
For A52, the address of the subbank is specified. F
The PGA 52 acquires a start address and an end address stored in the address of the sub-bank designated by the CPU 51, and reads a data block from the main bank based on the acquired start address and end address.

The FPGA 52 adds a sequential number to the additional information portion of each data block read from the main bank, and sends it to the formatter 4. The sequential number is a number indicating a time-series order of data blocks included in one recording block.

The data that has been format-converted by the formatter 4 is sent to the electromagnetic conversion unit 6, and is passed through a recording amplifier and a video head in the electromagnetic conversion unit 6 to the magnetic tape 30.
Recorded as 0. The magnetic tape is stopped every time recording of data in recording block units is completed.

In this embodiment, as will be described later, at the time of picture search (fast forward playback, fast reverse playback), for example, the actual data portion (28
Only the first 0.5 seconds (15 tracks = 30 tracks) of the 8 tracks) are reproduced.

In the DVHS format, 28 KBYTE data can be recorded on one track.
When recording is performed in the image quality mode of 56 KBYTE per field, about 144 data blocks are recorded in the actual data portion.

Since the data reproduced at the time of the picture search is 30 tracks (15 data blocks) per recording block, 10 data blocks (144 data blocks) are recorded.
/15=9.6) If skipped and read, the video reproduced at the time of the picture search becomes a smooth video.

Therefore, in this embodiment, when data is recorded on the magnetic tape, as shown in FIG. 5, the leading portion (about 30 tracks) of the actual data portion on the magnetic tape is used.
Then, a data block is recorded by skipping 16 data blocks. Then, of the data blocks in one recording block, the remaining data blocks are recorded in chronological order thereafter.

That is, when sending actual data from the memory 3 to the formatter 4, first, the CPU 51 specifies the address of the sub-bank at intervals of a predetermined number of addresses (16 in this example). That is, the CPU 52
1, 17, 33,..., 1 + 16N (N = 0,
1, 2,..., Where N is a value satisfying 1 + 16N <144).

The FPGA 52 acquires address information (start address and end address) stored at the address of the sub-bank specified by the CPU 52, and reads a data block from the main bank based on the acquired address information. Then, after adding a sequential number (time series number) corresponding to the data block to the additional information portion of the read data block, the data block is sent to the formatter 4.

Therefore, at the time of recording, as shown in FIG. 5, first, data blocks are read from the main bank at intervals of 16 and each read data block is added with a sequential number. It is recorded on a magnetic tape as a search data block.

After designating the maximum (1 + 16N) that satisfies 1 + 16N <144, the CPU 51 sequentially proceeds with the remaining addresses of the subbank in ascending order. As a result, the remaining data blocks are sequentially read in chronological order, and the read data blocks with sequential numbers added are sequentially recorded on the magnetic tape.

FIG. 6 shows signals of respective parts when data corresponding to the total amount of actual data in one recording block is written in the memory 3 after the start of the recording operation.

In FIG. 6, a signal MEMORY FULL is set to the H level when data corresponding to the total amount of actual data in one recording block is written to the memory 3, and when a predetermined amount of data is read out. The signal which is set to the L level is shown. This signal MEMORYFULL is generated by the sub control unit 5 and sent to the main control unit 7. This signal MEMORY FULL becomes a recording start trigger signal of one recording block during recording, and becomes a reproduction start trigger signal of one recording block during reproduction.

The signal SW TR indicates a reference signal for phase servo generated by the formatter 4. This signal SW T
R is sent from the formatter 4 to the main control unit 7.

The signal MC ON is output from the capstan motor 100
, And is generated by the main control unit 7.

At the time of recording, the signal CTL is
4 shows a CTL signal recorded on the magnetic tape 300 during reproduction.

The signal FORMATTER indicates a control signal sent from the main control unit 7 to the formatter 4 and a signal indicating the state of the formatter 4.

The signal VD REC indicates a recording instruction signal sent from the formatter 4 to the video head in the electromagnetic conversion section 6.

The signal FORMATTER USE indicates a transmission command signal for transmitting actual data in the memory 3 to the formatter 4 during recording, and indicates a transmission command signal for transmitting actual data from the formatter 4 to the memory 3 during reproduction. . This signal FORMATTER USE is generated by the main control unit 7 and sent to the sub control unit 5.

The signal RD DATA indicates the recording data sent from the formatter 4 to the electromagnetic conversion unit 6.

When data corresponding to the total amount of actual data in one recording block is written into the memory 3 after the start of the recording operation, the MEMO sent from the sub-control unit 5 to the main control unit 7
RY FULL becomes H level.

When MEMORY FULL becomes H level (time t)
1) At the subsequent fall timing of SW TR (time point t2), the main control unit 7 drives the capstan motor 100 by setting the signal MCON to the H level. Also,
The main control unit 7 transmits a recording start command (REC command) to the formatter 4 via the sub control unit 5.

When the formatter 4 receives the recording start command, the formatter 4 enters a recording operation mode, outputs dummy data as indicated by RD DATA and sets VD REC to H level. The recording of the dummy data on the magnetic tape 300 is started. Further, the recording of the CTL signal on the magnetic tape 300 by the CTL recording / reproducing circuit 7a starts.

Thereafter, the main control unit 7 sends the FORMATTE sent to the sub control unit 5 at a predetermined timing (t3).
R USE is set to H level. When the FORMATTER USE becomes H level, transmission of actual data from the memory 3 to the formatter 4 is started. The formatter 4 of the D-VHS standard has a memory inside the formatter 4 because it is necessary to observe a 6-track sequence in the format of the D-VHS, and the data sent to the formatter 4 is temporarily stored in the memory. Delayed and output as shown by RD DATA. Therefore, the actual data starts to be recorded on the magnetic tape 300 at time t4, which is later than the time t3 by a predetermined time.

As described above, the start mark of the CTL signal is output at the position where the envelope is stabilized during reproduction, that is, after the eight CTLs of "0" are output.
It is recorded on the magnetic tape 300.

FIG. 7 shows signals of the respective units when all data corresponding to the total amount of actual data in one recording block has been read from the memory 3.

When all the data corresponding to the total amount of actual data in one recording block is read from the memory 3, the MEMORY FULL sent from the sub-control unit 5 to the main control unit 7 goes low.

When MEMORY FULL goes low (time t
5), the main control unit 7 is sent to the sub control unit 5
Set FORMATTER USE to L level. FORMATTER USE is L
When the level is reached, the transmission of actual data from the memory 3 to the formatter 4 is stopped. However, as described above, since the data sent to the formatter 4 is output after being delayed, the MEMORY FULL is set to L as shown in RD DATA.
Even after time t5 when the level is reached, formatter 4
Sends the actual data to the electromagnetic converter 6.

When the recording of the actual data on the magnetic tape 300 is completed (time t6), the formatter 4 sends a predetermined amount of dummy data to the electromagnetic converter 6. The recording of the actual data on the magnetic tape 300 is completed (time t6), and the recording of the end mark of the CTL signal is started from the time when the recording of the dummy data is started.

After the time t5 when the MEMORY FULL goes to the L level, the main control unit 7 issues a predetermined timing (at the time t5).
7) Send a recording stop command (STOP command) to the formatter 4 via the sub control unit 5. When the formatter 4 receives the recording stop command, the formatter 4 enters a stop state and performs VD REC.
Is set to the L level, so that the recording on the magnetic tape 300 by the video head in the electromagnetic conversion unit 6 is stopped.

Further, the main controller 7 controls the formatter 4
At the time when the recording operation stops (time t8),
N is set to L level, and the capstan motor 100 is stopped. Further, the main control unit 7 includes a CTL recording / reproducing circuit 7a.
Of the CTL signal on the magnetic tape 300 is stopped.

[4] Description of Reproduction Operation

At the time of reproduction, data is read from the magnetic tape by the video head in the electromagnetic conversion unit 6 for each recording block unit. The read data is sent to the formatter 4 via a reproduction amplifier in the electromagnetic conversion unit 6.
The formatter 4 performs a reverse conversion on the transmitted data as compared with the recording. Actual data (additional information, compressed video data and compressed audio data) obtained by the formatter 4 is written to the memory 3 via the bus line 8.

At this time, the FPGA 52 of the sub control unit 5
The following control is performed. In response to a reproduction data write command from the CPU 51, data "
"0" is written to clear the data in the sub-bank. This is a drop-out due to scratches on the magnetic tape, etc., which causes data blocks to be lost and data blocks that could not be written to the memory 3 and data not to be written to the memory 3 during picture search. Performed to detect a block.

The FPGA 52 uses the formatter 4 to
When the data block is sent, as shown in FIG.
The sent data blocks are sequentially written to the main bank of the memory 3. Further, the FPGA 52 detects the sequential number of the additional information portion of the data block, and writes the storage address information (start address and end address) of the data block to the main bank at the address of the subbank corresponding to the sequential number. .

When reproduction of one recording block is completed (C
When the reproduction data write command from the PU 51 is released), the FPGA 52 of the sub-control unit 5
, The maximum value of the addresses of the sub-banks in which the address information has been written (hereinafter referred to as the maximum write address)
Notify.

When all of the actual data in one recording block has been written to the main bank of the memory 3 in this way, a read command from the CPU 51
2 reads data from the memory 3.

The CPU 51 sets the address of the subbank to FP
When instructing the GA 52, the FPGA 52 acquires a start address and an end address stored at the designated address, and reads a data block from the main bank based on the acquired address.

At the time of normal reproduction, the CPU 51 sequentially designates the sub-bank address from the minimum value “1” to the maximum write address. Therefore, the data blocks in the recording block are sequentially read from the main bank in the order of the sequential numbers (time series numbers).

When a data block is lost due to dropout due to scratches on the magnetic tape or the like, the data in the sub-bank corresponding to the data block is set to "0".
, The FPGA 52 informs the CPU 5 that no data block to be read exists in the main bank.
Notify 1. Upon receiving the notification, the CPU 51 updates the designated address to the next address.

The Q table data read from the memory 3 is sent to the compression / decompression device 13, and the compressed video data is sent to the area III of the memory 14 via the compression / decompression device 13. The compressed audio data read from the memory 3 is sent to the FIFO memory 25.

The compressed video data sent to the area III of the memory 14 is decompressed by the compressor / decompressor 13 based on the Q table data. The YUV digital data in units of one field obtained after the decompression processing by the compression / decompression unit 13 is alternately written to the areas I and II of the memory 14.

The YUV digital data written in the areas I and II of the memory 14 is read out by the compression / decompression unit 13 and sent to the encoder 12. Encoder 1
2 encodes the YUV digital data after D / A conversion, and outputs a composite video signal and a Y / C component signal obtained by the encoding.

On the other hand, the compressed audio data written in the FIFO memory 25 is decoded by the PCM encoder / decoder 24 and sent to the D / A converter 23. The D / A converter 23 D / A converts the digital audio data, and outputs the obtained analog audio signal to the filter 21. The filter 21 converts the received analog audio signal into a D / A
The high-frequency noise component generated during the / A conversion is removed, and the obtained analog audio signal is output.

Immediately after the start of reproduction, the main control unit 7
Sets the signal MCON to the H level and drives the capstan motor 100. Thereby, the data read from the magnetic tape 300 is written to the memory 3.
When the end mark is detected from the magnetic tape 300, the main control unit 7 sets the signal MC ON to the L level,
The capstan motor 100 is stopped.

After the capstan motor 100 is driven, if a certain amount of data is stored in the memory 3, the data is sequentially read from the memory 3. The Q table data and the compressed video data read from the memory 3 are sent to the video processing unit 1, where the above-described processing is performed and output. The compressed audio data read from the memory 3 is transmitted to the audio processing unit 2.
And the above processing is performed and output.

FIG. 9 shows signals of the respective units when all data corresponding to the total amount of actual data in one recording block written in the memory 3 is read from the memory 3 during reproduction.

In FIG. 9, a signal ENV indicates data read from the magnetic tape 300 during reproduction. Also, the signal PB H is stored in the memory 3 by the internal video circuit.
Is a signal indicating that it is ready to be taken into the device.

When all data corresponding to the total amount of actual data in one recording block written in the memory 3 is read out from the memory 3, the signal MEMORY FULL goes to L level. When the signal MEMORY FULL becomes L level (time t1
1) At the subsequent falling timing of SW TR (time t12), the main control unit 7 sets the signal MCON to the H level to drive the capstan motor 100. Thereafter, the reproduction of the CTL signal by the CTL recording / reproducing circuit 7a is started.

Thereafter, the main control section 7 sets the start mark "10101010" composed of the CTL signal to "1".
When "0" is detected twice (time 13), a playback start command (PB command) is sent to the formatter 4 via the sub-controller 5, and the signal PB H is set to the H level. The FORMATTER USE sent to the sub control unit 5 is set to H level.

When the formatter 4 receives the reproduction start command, it enters the reproduction operation mode. When the FORMATTER USE becomes H level, transmission of actual data from the formatter 4 to the memory 3 is started. When a certain amount of data is written to the memory 3, the data is sequentially read from the memory 3.

FIG. 10 shows that at the time of reproduction,
It shows the signals of the respective units when the end mark composed of the CTL signal is detected while the actual data in the recording block is being written.

While the actual data in one recording block is being written into the memory 3, the main control unit 7
When “10” in the end mark “10101010” composed of the L signal is detected twice (time t14), the main control unit 7 sets the signal MCON to the L level and stops the capstan motor 100. Therefore, the magnetic tape 300 is stopped in the middle of the rear dummy data portion of the recording block.

Further, the main control section 7 outputs an end mark “
At a predetermined timing after time t14 when "10" in 10101010 "is detected twice (time t15),
The reproduction stop command (S
TOP command) and set the signal PB H to L level. Further, the main control unit 7 sets the FORMATTER USE sent to the sub control unit 5 to L level.

Upon receiving the reproduction stop command, the formatter 4 enters the stop mode. When the FORMATTER USE becomes L level, the transmission of the actual data from the formatter 4 to the memory 3 is stopped.

According to the above embodiment, in a digital VTR for recording data in recording block units, at the time of recording, the start point of the recording block and the end point of the recording block in which the servo and mechanical systems are stable are determined by the control track. Since a start mark and an end mark are recorded on a recording block, stable recording and reproduction of a recording block can be performed. Further, since the formatter is operated after the envelope is stabilized, it is possible to prevent the malfunction of the formatter.

[5] Description of fast forward playback (fast reverse playback) operation

[5-1] Description of Fast Forward Playback Operation

FIG. 11 and FIG. 12 show signals of respective parts during fast forward reproduction.

At the time of fast forward reproduction, similarly to the normal reproduction described in the above [4], the capstan motor 1
00 is driven. Then, the reproduction of the CTL signal by the CTL recording / reproducing circuit 7a is started.

Thereafter, the main control section 7 sets the start mark “10101010” composed of the CTL signal to “1”.
When "0" is detected twice (time point t21), a playback start command (PB command) is sent to the formatter 4 via the sub-controller 5, and the signal PB H is set to the H level. FORMATTER USE sent to sub-control unit 5
To the H level.

Upon receiving the reproduction start command, the formatter 4 enters the reproduction operation mode. When the FORMATTER USE becomes H level, transmission of actual data from the formatter 4 to the memory 3 is started. When a certain amount of data is written to the memory 3, the data is sequentially read from the memory 3.

When a predetermined amount of actual data is stored in the memory 3 (t22), in this example, 0.5
When the actual data for second (15 CTL = 30 tracks) is accumulated, the main control unit 7 sends the capstan motor 10
An acceleration command for accelerating 0 is generated. This allows
The speed mode of the capstan motor 100 is changed from the play mode (normal reproduction speed mode) to the search speed mode faster than that.

Further, the main control unit 7 controls the formatter 4
At a time t22, a stop command is sent to the formatter 4. Therefore, at the time of fast-forward playback, of the actual data in one recording block, the first 30
Only the tracks are reproduced and output.

Thereafter, "0" constituting the cue mark is detected by the cue mark detection circuit 9, and 16CTL
At the time (t23) when the main control unit 7 confirms 8CTLs in the cue mark composed of the following, the main control unit 7 issues a deceleration command for decelerating the capstan motor 100. Thereby, the speed mode of the capstan motor 100 is returned from the search speed mode to the play mode.
Note that “0” constituting the cue mark is detected by the cue mark detection circuit 9, and the detection result is sent to the main control unit 7.

After that, the main control unit 7 sets “1” in the end mark “10101010” composed of the CTL signal.
When "0" is detected twice (time t24), the main control unit 7
Sets the signal MCON to the L level and stops the capstan motor 100. Therefore, the magnetic tape 300 is stopped in the middle of the rear dummy data portion of the recording block.

Further, the main control section 7 outputs the end mark “
At a predetermined timing after time t24 when “10” in 10101010 ″ is detected twice (time t25),
The signal PB H is set to L level. In addition, the main control unit 7
The FORMATTER USE sent to the sub control unit 5 is set to L level.

After that, the main control section 7 sets MCON to the H level again, and drives the capstan motor 100. Then, the same operation is repeatedly performed.

FIG. 13 shows the relationship between the lapse of time during fast-forward playback and the tape position. The broken line in FIG. 13 shows the relationship between the elapsed time and the tape position when the elapsed time T is plotted on the vertical axis and the tape position is plotted on the horizontal axis.

In FIG. 13, t1, t3, and t5 indicate acceleration times of the capstan motor 100, and t2, t4, and
t6 indicates the deceleration position of the capstan motor 100 (at the time when the cue mark is detected). Capstan motor 10
Actual data is fetched before zero acceleration points t1, t3, and t5.

As described above, at the time of fast forward reproduction, 1
When the actual data in the recording block is accumulated in the memory 3 by a predetermined amount, the fetching of the data into the memory 3 is stopped and the capstan motor 100 is accelerated. When the cue mark is detected, the capstan motor 100 is decelerated. Such an operation is repeatedly performed. Therefore, only the head portion of the actual data of each recording block is sequentially reproduced.

The operation of writing data to the memory 3 and the operation of reading data from the memory 3 during fast forward reproduction will be described.

The operation of writing the head portion of the actual data to the memory 3 is the same as that during the normal reproduction, and data as shown in FIG.

That is, in response to a reproduction data write command from the CPU 51, data “0” is stored in the subbank of the memory 3.
To clear the data in the sub-bank.

The FPGA 52 is controlled by the formatter 4
When the data blocks are sent, the sent data blocks are sequentially written into the main bank of the memory 3 as shown in FIG. Further, the FPGA 52 detects the sequential number of the additional information portion of the data block, and writes the storage address information (start address and end address) of the data block to the main block at the address of the subbank corresponding to the sequential number. .

At the time when the reproduction of the head portion of the actual data of one recording block is completed (when the reproduction data write command from the CPU 51 is released), the FPGA 5 of the sub control unit 5
2 notifies the CPU 51 of the maximum value of the addresses of the sub-banks in which the address information has been written (hereinafter, referred to as the write address maximum value).

As described above, when the head portion of the actual data in one recording block is written in the memory 3, the CPU 5
The data is read from the memory 3 by the FPGA 52 in response to the read command from # 1.

At the time of fast forward reproduction, the CPU 51 sets 1 + 16N (N = 0, 1,...) As the address of the subbank.
Are specified in ascending order from 1 to the maximum write address. Therefore, the search data blocks recorded at the head of the real data portion are read out from the main bank in chronological order.

[5-2] Description of Fast-Reverse Playback Operation FIG. 15 shows the relationship between the passage of time during fast-reverse playback and the tape position. The broken line in FIG. 15 shows the relationship between the elapsed time and the tape position when the elapsed time T is plotted on the vertical axis and the tape position is plotted on the horizontal axis.

As shown in FIG. 15, during fast reverse playback,
When the cue mark is detected by sending the tape in the search speed mode in the reverse direction for two or more recording blocks (at time t)
1) The tape is fed in the normal playback speed mode (play mode) in the forward direction. When the end mark is detected (time t
2) After stopping the tape once, the tape is again fed in the play mode in the forward direction. After the start mark is detected, when the actual data is taken in for a predetermined time (time t3), the tape is stopped. As a result, the head of the recording block (n-1) is reproduced.

Thereafter, the tape is sent in the search speed mode in the reverse direction for two or more recording blocks, and when the cue mark is detected (time t4), the tape is sent in the normal direction in the normal playback speed mode (play mode). . When the end mark is detected (time t5), the tape is stopped once, and then the tape is fed again in the forward direction in the play mode. Then, after the start mark is detected, when the actual data is taken in for a predetermined time (time t6), the tape is stopped. As a result, the head portion of the recording block (n-2) is reproduced. By repeating the above operation, fast reverse reproduction is performed.

At the time of the fast reverse reproduction, the operation of writing the head of the actual data into the memory 3 is the same as that of the normal fast forward reproduction, and the data shown in FIG. Is done.

At the time of the fast reverse reproduction, the CPU 51
1 + 16N (N = 0,
1,...) Are sequentially specified in descending order from the maximum value of the write address to the minimum value (= 1). Therefore, the search data block recorded at the head of the real data portion is read from the main bank in the order opposite to the time-series order.

[0127]

According to the present invention, fast forward reproduction can be performed without using a special formatter, and a reproduced image at the time of fast forward can be smoothed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a digital VTR.

FIG. 2 is a schematic diagram showing a configuration of one recording block recorded on a magnetic tape and a configuration of CTL marking recorded on a control track of the magnetic tape.

FIG. 3 is a schematic diagram showing a configuration of a data block for one field.

FIG. 4 shows a main bank (MAIN BAN) of a memory 3 during recording.
FIG. 7 is a schematic diagram showing information stored in (K) and a sub-bank (SUB BANK).

FIG. 5 is a schematic diagram showing the contents (data blocks) of actual data recorded on a magnetic tape during recording.

FIG. 6 is a timing chart showing signals of respective units when data corresponding to the total amount of actual data in one recording block is written into the memory 3 after the start of the recording operation.

FIG. 7 is a timing chart showing signals of respective units when all data corresponding to the total amount of actual data in one recording block is read from the memory 3 during recording.

[Fig. 8] During playback, the main bank (MAIN BAN
FIG. 7 is a schematic diagram showing information stored in (K) and a sub-bank (SUB BANK).

FIG. 9 is a timing chart showing signals of respective units when all data corresponding to the total amount of actual data in one recording block written in the memory 3 is read from the memory 3 during reproduction.

FIG. 10 is a diagram showing an example of a CTL during reproduction while actual data in one recording block is being written into the memory 3;
6 is a timing chart showing signals of the respective units when an end mark composed of signals is detected.

FIG. 11 is a timing chart showing signals of respective units during fast forward reproduction.

FIG. 12 is a timing chart showing signals of respective units during fast forward reproduction.

FIG. 13 is a timing chart showing the relationship between the lapse of time during fast-forward playback and the tape position.

FIG. 14 shows a main bank (M
FIG. 5 is a schematic diagram showing information stored in an AIN BANK and a sub bank.

FIG. 15 is a timing chart showing a relationship between a lapse of time during fast reverse playback and a tape position.

[Explanation of symbols]

 Reference Signs List 1 video processing unit 2 audio processing unit 3 memory 4 formatter 5 sub-control unit 6 electromagnetic conversion unit 7 main control unit 9 cue mark detection circuit

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G11B 20/12 103 G11B 27/00 A 27/00 E 27/10 E 27/032 27/34 N 27 / 10 H04N 5/92 H 27/34 5/782 B H04N 5/7826 J G11B 27/02 CF term (reference) 5C018 AB05 AB09 AC03 AC09 EA01 EA02 5C053 FA21 GB07 GB36 HA24 HA25 JA03 JA07 JA21 KA04 KA24 KA25 5D044 AB07 CC01 DE02 DE03 DE12 DE23 DE28 EF07 FG23 GK03 5D077 AA08 BA04 BA11 DC02 DD12 HA07 HD04 5D110 AA04 BB16 CA02 CA05 DB02 DC15 DC22 DE06 FA02

Claims (5)

[Claims] 1. At the time of recording, real data is stored in a memory in a time-series order for each data block in units of one field, and real data in a predetermined recording block unit including a plurality of data blocks is stored in the memory. Each time, the actual data of the recording block unit is recorded on the magnetic tape,
At the time of normal reproduction, the real data recorded on the magnetic tape is read intermittently for each recording block unit, the real data read from the magnetic tape is stored in a memory, and the real data stored in the memory is read and reproduced and output. Digital VTR
During recording, when the actual data of one recording block unit composed of a plurality of data blocks is accumulated in the memory, the data blocks are read from the memory at intervals of a predetermined number of fields, and the read data blocks are stored in each read data block. Recording control means for recording on a magnetic tape a data block to which a time series number is added as a search data block, reading the remaining data blocks from a memory, adding a time series number to each read data block, and recording the data block on a magnetic tape. At the time of normal reproduction, when the actual data of one recording block read from the magnetic tape is accumulated in the memory, each data block constituting the actual data accumulated in the memory is read out in the order of the time series number. Normal playback control means for playing back data during fast forward playback Fast-forward playback control means for reading out only the first search data block from the magnetic tape and storing it in the memory, and reading out and playing back the search data block stored in the memory in a predetermined order. Digital VTR. 2. The memory includes a main bank and a sub-bank, and the recording control means accumulates actual data in units of one recording block in the main bank for each data block, and stores the data in the main bank of each data block. Means for accumulating the stored address information in the address positions of the sub-banks corresponding to the time-series order of the data blocks. Means for reading data blocks at intervals of the number of fields, recording the read data blocks with a time-series number added to the magnetic tape as a search data block, and thereafter, the remaining address information from the sub-bank, The remaining data blocks are read out in chronological order. 2. The digital VTR according to claim 1, further comprising: means for reading a lock from a memory, and recording the read data block added with a time-series number on a magnetic tape. 3. The memory includes a main bank and a sub-bank. The normal reproduction control means reads out each data block in one recording block from the magnetic tape, accumulates the data block in the main bank, and stores each data block in the main bank. The storage address information to the main bank is
Means for accumulating the data blocks at the address positions of the sub-banks corresponding to the time-series order of the data blocks; and reading out the address information from the sub-banks in the order of the addresses of the sub-banks, thereby ordering the data blocks from the main bank in the time-series number order. 3. A digital VTR according to claim 1, further comprising: means for reading out and reproducing the data. 4. The memory includes a main bank and a sub-bank. The fast-forward playback control means reads out only a search data block at the head of actual data in one recording block from a magnetic tape and stores the read data block in the main bank. Means for accumulating, at the same time, storing the storage address information of each search data block in the main bank at the address position of the subbank corresponding to the time series order of the data blocks, and a predetermined number of addresses from the subbank. 4. A digital device according to claim 1, further comprising: means for reading out and reproducing each search data block from the main bank by reading out address information at intervals. VTR. 5. A means for recording a cue mark on a control track of a magnetic tape at a position corresponding to a predetermined intermediate position of each recording block during recording, and real data in one recording block during fast forward reproduction. At the time when a predetermined amount is accumulated in the memory, means for stopping the taking of data into the memory and accelerating the capstan motor, and when a cue mark is detected,
5. The digital VTR according to claim 1, further comprising: means for decelerating a capstan motor.