[go: up one dir, main page]

JP2002218661A - Sole operation detecting method of distributed power supply - Google Patents

Sole operation detecting method of distributed power supply

Info

Publication number
JP2002218661A
JP2002218661A JP2001009692A JP2001009692A JP2002218661A JP 2002218661 A JP2002218661 A JP 2002218661A JP 2001009692 A JP2001009692 A JP 2001009692A JP 2001009692 A JP2001009692 A JP 2001009692A JP 2002218661 A JP2002218661 A JP 2002218661A
Authority
JP
Japan
Prior art keywords
phase
voltage
cycle
component
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001009692A
Other languages
Japanese (ja)
Other versions
JP3518511B2 (en
Inventor
Tokuo Emura
徳男 江村
Giko Haneda
儀宏 羽田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nissin Electric Co Ltd
Original Assignee
Nissin Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nissin Electric Co Ltd filed Critical Nissin Electric Co Ltd
Priority to JP2001009692A priority Critical patent/JP3518511B2/en
Publication of JP2002218661A publication Critical patent/JP2002218661A/en
Application granted granted Critical
Publication of JP3518511B2 publication Critical patent/JP3518511B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Inverter Devices (AREA)
  • Supply And Distribution Of Alternating Current (AREA)

Abstract

PROBLEM TO BE SOLVED: To accurately detect shift to a sole operation from system operation of a distributed power supply caused by a system interruption by a voltage phase skip detection system, preventing an erroneous detection due to such as noise and load fluctuation of a system. SOLUTION: A detected voltage of a power system (distribution line) is sampled to perform an A/D conversion, sampled voltage data obtained by the A/D conversion is processed through a digital filter, of a system fundamental wave voltage component from the sampled voltage data is repeated and comparison of the phase of the system fundamental wave voltage component of a current cycle with a phase of the fundamental wave voltage component of a reference cycle is repeated using one cycle prior to a predetermined cycle from the current cycle as a reference cycle of an linked phase. If it is detected two times or more as set times from the comparison that when the phase of the fundamental wave voltage component of the current cycle is deviated from the phase of the system fundamental wave voltage component of the reference cycle by a set value or more, a rapid change of the voltage phase is detected and shift to the sole operation of the distributed power supply 1 is detected.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、電力系統に連系運
転される分散電源の単独運転検出方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for detecting an isolated operation of a distributed power supply that is connected to an electric power system.

【0002】[0002]

【従来の技術】従来、配電系統等の電力系統に連系運転
される分散電源(分散型電源)としては、太陽光発電設
備等のインバータ形のものと、ガスタービン発電機等を
用いた回転機形のものとがあるが、いずれの分散電源に
おいても、連系保護を目的として単独運転防止対策がと
られる。
2. Description of the Related Art Conventionally, a distributed power source (distributed power source) that is connected to an electric power system such as a power distribution system or the like is an inverter type such as a photovoltaic power generation facility or a rotary type using a gas turbine generator or the like. Although there is a machine type, any of the distributed power sources is provided with measures to prevent islanding for the purpose of protecting the interconnection.

【0003】この単独運転防止対策は、系統停止による
分散電源の連系運転から単独運転への移行が発生したと
きに、この移行を検出して分散電源を系統から解列し、
系統側での感電防止等を図るものである。
In order to prevent the islanding operation, when the transition from the interconnection operation of the distributed power supply to the islanding operation due to the system stop occurs, the transition is detected and the distributed power supply is disconnected from the system.
The purpose is to prevent electric shock on the system side.

【0004】そして、前記の連系運転から単独運転への
移行の検出方法としては、系統の電圧位相や周波数の急
変から受動的に検出する受動的方式と、系統に外乱とな
る電流,電圧を注入して系統の電圧や周波数を常時変動
し、この変動の程度から能動的に検出する能動的方式と
があるが、受動的方式は、一般に高速性に優れ、単独運
転への移行を迅速に検出し得る利点がある。
[0004] As a method of detecting the transition from the interconnected operation to the isolated operation, a passive method of passively detecting a sudden change in the voltage phase or frequency of the system, and a current or voltage that causes disturbance to the system are used. There is an active method in which the voltage and frequency of the system are constantly fluctuated by injection, and active detection is performed based on the degree of this fluctuation.However, the passive method is generally excellent in high-speed operation and makes it possible to quickly shift to islanding operation. There are advantages that can be detected.

【0005】この受動的方式の単独運転検出方法の1つ
として、例えば特開平8−88979号公報等にも記載
されている電圧位相跳躍検出方式の検出方法があり、こ
の検出方法は、系統停止による分散電源の連系運転から
単独運転への移行時、分散電源の発電出力と負荷との不
平衡による系統の電圧位相の急変から、その移行を検出
する方法である。
As one of the passive type islanding detection methods, there is a voltage phase jump detection type detection method described in, for example, JP-A-8-88979. Is a method of detecting the transition from a sudden change in the voltage phase of the system due to imbalance between the power generation output of the distributed power supply and the load when the distributed power supply shifts from the interconnected operation to the isolated operation.

【0006】すなわち、系統停止により分散電源が連系
運転から単独運転に移行すると、系統の負荷力率が連系
運転時の力率から変化し、この力率変化が系統の電圧位
相の変化として現れる。
That is, when the distributed power supply shifts from the interconnected operation to the isolated operation due to the system stoppage, the load power factor of the system changes from the power factor at the time of the interconnected operation, and this change in the power factor is regarded as a change in the voltage phase of the system. appear.

【0007】そして、例えば図6の時刻txに、系統停
止によって分散電源が連系運転から単独運転に移行する
と、図中の実線に示す系統電圧の位相(電圧位相)が瞬
時的に跳躍して急変する。
When, for example, at time tx in FIG. 6, the distributed power supply shifts from interconnected operation to isolated operation due to system stoppage, the phase (voltage phase) of the system voltage indicated by a solid line in the figure jumps instantaneously. Change suddenly.

【0008】この図6の場合、電圧波形のゼロクロス点
間の長さをクロックパルス数で計数すると、連系運転中
及び単独運転中の正規の各1サイクルは、それぞれ正,
負の半サイクルが共にN/2カウントの長さになって、
Nカウントの長さになり、時刻txの直後の1サイクル
のみが、N’カウント(N≠N’)に急変し、その正,
負の半サイクルはN”カウント,N'''カウント
(N”,N'''≠N/2)である。
In the case of FIG. 6, when the length between the zero-cross points of the voltage waveform is counted by the number of clock pulses, the normal one cycle during the interconnection operation and the single operation during the independent operation are positive and negative, respectively.
Both negative half cycles are N / 2 counts long,
The length becomes N counts, and only one cycle immediately after time tx suddenly changes to N ′ count (N ≠ N ′).
The negative half cycle is N ″ count, N ″ ″ count (N ″, N ′ ″ ≠ N / 2).

【0009】したがって、従来は、系統電圧のゼロクロ
ス点間のクロックパルス数を計測して各1サイクルのク
ロックパルス数を監視し、そのカウント数のN→N’→
Nの急変から系統電圧位相の跳躍を検出して系統停止に
よる分散電源の連系運転から単独運転への移行を検出す
ることが行われている。
Therefore, conventionally, the number of clock pulses between the zero cross points of the system voltage is measured to monitor the number of clock pulses in each cycle, and the count number N → N ′ →
A jump of the system voltage phase is detected from a sudden change in N to detect a transition from the interconnected operation of the distributed power supply to the isolated operation due to the system stoppage.

【0010】[0010]

【発明が解決しようとする課題】前記従来の電圧位相跳
躍検出方式の分散電源の単独運転検出方法の場合、系統
停止による分散電源の連系運転から単独運転への移行が
発生すると、その瞬時の系統電圧の位相急変に伴う系統
電圧の周期長変動の1回の検出に基づいて分散電源の単
独運転への移行を検出するため、例えば系統のノイズや
負荷変動等により、系統電圧のゼロクロス点が変動する
と、極めて容易に誤検出し、信頼性の高い検出が行えな
い問題点がある。
In the conventional method for detecting the isolated operation of the distributed power supply of the voltage phase jump detection method, when the transition from the interconnection operation of the distributed power supply to the isolated operation due to the system stop occurs, the instantaneous operation is performed. In order to detect the transition to the isolated operation of the distributed power supply based on one detection of the change in the cycle length of the system voltage due to the sudden change of the system voltage phase, for example, the zero cross point of the system voltage may be changed due to system noise or load fluctuation. If it fluctuates, there is a problem that erroneous detection is very easily performed, and highly reliable detection cannot be performed.

【0011】本発明は、系統停止による分散電源の連系
運転から単独運転への移行を、系統のノイズや負荷変動
等による誤検出を防止して精度よく電圧位相跳躍検出方
式で検出することを課題とし、その検出の具体的な手法
を提供することも課題とする。
According to the present invention, it is possible to accurately detect the transition from the interconnection operation of the distributed power supply to the isolated operation due to the system stoppage by the voltage phase jump detection method while preventing erroneous detection due to system noise or load fluctuation. It is also an issue to provide a specific method of the detection.

【0012】[0012]

【課題を解決するための手段】前記の課題を解決するた
めに、本発明の分散電源の単独運転検出方法において
は、電力系統の検出電圧をサンプリングしてA/D変換
し、このA/D変換により得られた電圧サンプリングデ
ータをデジタルフィルタ処理して系統基本波電圧成分を
抽出し、現サイクルより所定サイクル前の1サイクルを
連系運転位相の基準サイクルとして現サイクルの系統基
本波電圧成分の位相と基準サイクルの系統基本波電圧成
分の位相とをくり返し比較し、この比較に基づき、現サ
イクルの系統基本波電圧成分の位相の基準サイクルの系
統基本波電圧成分の位相からの設定値以上のずれを、2
回以上の設定回数検出したときに、電圧位相の急変を検
出して分散電源の単独運転への移行を検出する。
In order to solve the above-mentioned problems, in the method for detecting the isolated operation of a distributed power supply according to the present invention, a detected voltage of a power system is sampled and A / D-converted. The voltage sampling data obtained by the conversion is digitally filtered to extract a system fundamental voltage component, and one cycle before a predetermined cycle before the current cycle is set as a reference cycle of a connection operation phase, and the system fundamental wave voltage component of the current cycle is used as a reference cycle. The phase is repeatedly compared with the phase of the system fundamental voltage component of the reference cycle.Based on this comparison, the phase of the system fundamental voltage component of the current cycle is equal to or greater than the set value from the phase of the system fundamental voltage component of the reference cycle. Shift 2
When the set number of times or more is detected, a sudden change in the voltage phase is detected to detect the shift of the distributed power supply to the isolated operation.

【0013】したがって、現サイクルより所定サイクル
前の基準サイクルのときに、系統正常で分散電源が連系
運転されるものとして、系統電圧のA/D変換によるサ
ンプリングデータ(電圧サンプリングデータ)から系統
基本波電圧成分がデジタル的にくり返し抽出され、現サ
イクルの抽出成分の各時点の位相と基準サイクルの各時
点の位相とが比較される。
Therefore, in the reference cycle before the current cycle by a predetermined cycle, it is assumed that the distributed power supply is operated in the normal state and the interconnection of the distributed power supply is performed, based on the sampling data (voltage sampling data) obtained by A / D conversion of the system voltage. The wave voltage component is repeatedly extracted digitally, and the phase of each time point of the extracted component of the current cycle is compared with the phase of each time point of the reference cycle.

【0014】そして、現サイクルに系統停止が発生して
分散電源が連系運転から単独運転に移行すると、系統に
電圧位相の急変が発生し、現サイクルの抽出成分の電圧
位相が基準サイクルの抽出成分の電圧位相から所定値以
上ずれる。
Then, when a system stoppage occurs in the current cycle and the distributed power supply shifts from the interconnection operation to the isolated operation, a sudden change in the voltage phase occurs in the system, and the voltage phase of the component extracted in the current cycle is extracted from the reference cycle. It deviates from the voltage phase of the component by a predetermined value or more.

【0015】そして、両サイクルの系統基本波電圧成分
の比較に基づき、その電圧位相の前記の所定値以上のず
れが複数回(設定回数)検出され、この複数回の検出を
条件に、系統の電圧位相の急変が検出されて分散電源の
系統停止による連系運転から単独運転への移行が検出さ
れる。
[0015] Based on a comparison of the system fundamental voltage components of both cycles, a deviation of the voltage phase of the predetermined value or more is detected a plurality of times (set number of times). A sudden change in the voltage phase is detected, and a transition from the interconnected operation to the isolated operation due to the system stoppage of the distributed power supply is detected.

【0016】この場合、系統電圧の位相の大きなずれの
複数サイクルの検出を条件に、系統のノイズや負荷変動
等による誤検出を防止して単独運転への移行が検出され
るため、従来の系統電圧の位相急変に伴う周期長の1回
の変化から検出する場合に起りうる誤検出がなく、信頼
性の高い電圧位相跳躍検出方式の分散電源の単独運転検
出方法を提供することができる。
In this case, under the condition that a plurality of cycles with a large shift in the phase of the system voltage are detected, erroneous detection due to system noise, load fluctuation, and the like is prevented, and the transition to islanding operation is detected. There is no erroneous detection that can occur when detecting from a single change in the cycle length due to a sudden change in voltage phase, and it is possible to provide a highly reliable method for detecting the isolated operation of a distributed power supply using the voltage phase jump detection method.

【0017】そして、系統の検出電圧のサンプリング
を、サンプリング周波数を一定にして固定サンプリング
方式で行うと、検出のタイミング制御等がPLL同期回
路等を用いることなく簡単に行える。
If the sampling of the detection voltage of the system is performed by a fixed sampling method with the sampling frequency kept constant, detection timing control and the like can be easily performed without using a PLL synchronization circuit or the like.

【0018】また、前記の固定サンプリング方式で行う
場合、電圧サンプリングデータから抽出した現サイクル
の系統基本波電圧成分と基準サイクルの系統基本波電圧
成分との系統基本波の周波数変動に基づく位相のずれを
補正して前記両電圧成分の位相を比較すると、検出精度
が著しく向上する。
In the case of performing the above-mentioned fixed sampling method, a phase shift based on the frequency fluctuation of the system fundamental wave between the system fundamental voltage component of the current cycle and the system fundamental voltage component of the reference cycle extracted from the voltage sampling data. Is corrected and the phases of the two voltage components are compared, the detection accuracy is significantly improved.

【0019】一方、系統の検出電圧のサンプリングは、
系統基本波の周波数に同期したサンプリング周波数で行
ってもよく、この場合は、前記の周波数変動に基づく誤
差の補正演算を行うことなく、電圧位相跳躍方式の精度
の高い単独運転検出が行える。
On the other hand, sampling of the detection voltage of the system is as follows.
This may be performed at a sampling frequency synchronized with the frequency of the system fundamental wave. In this case, highly accurate islanding detection of the voltage phase jump method can be performed without performing the error correction calculation based on the frequency fluctuation.

【0020】[0020]

【発明の実施の形態】本発明の実施の1形態につき、図
1ないし図5を参照して説明する。図1は分散電源1及
びその単独運転検出装置2を示した単線結線のブロック
図であり、電力系統としての配電線3に連系・解列用の
開閉器4を介して前記のインバータ形又は回転機形の分
散電源1が接続され、系統正常時、分散電源1は系統電
源に連系運転される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a block diagram of a single line connection showing a distributed power supply 1 and an isolated operation detection device 2 thereof. The inverter type or the power supply system shown in FIG. The rotating power source 1 is connected, and when the system is normal, the distributed power source 1 is connected to the system power source.

【0021】また、配電線3の電圧(系統電圧)が計器
用変圧器5により計測され、そのアナログの計測電圧v
(t)の信号が検出装置2の補助変圧器6,デジタル処
理の折返し誤差(ノイズ)除去用のローパスフィルタ
(L.P.F)7を介してサンプル・ホールド回路(S
/H回路)8に供給される。
The voltage (system voltage) of the distribution line 3 is measured by the instrument transformer 5 and the analog measured voltage v
The signal of (t) passes through the auxiliary transformer 6 of the detection device 2 and the low-pass filter (LPF) 7 for removing aliasing error (noise) in digital processing, and the sample-and-hold circuit (S)
/ H circuit) 8.

【0022】この回路8は演算処理部(CPU)9から
与えられたサンプル・ホールド指令パルスに基づき、こ
のパルスの周期で計測電圧v(t)の信号をサンプリン
グしてホールドすることをくり返し、時々刻々のサンプ
リング値のホールド出力をA/D変換器10に供給す
る。
The circuit 8 repeats sampling and holding the signal of the measurement voltage v (t) at the cycle of the pulse based on the sample / hold command pulse given from the arithmetic processing unit (CPU) 9, and sometimes. The hold output of the instantaneous sampling value is supplied to the A / D converter 10.

【0023】この変換器10は演算処理部9から与えら
れたA/D変換指令パルスに基づき、サンプル・ホール
ド回路8の時々刻々のホールド出力をA/D変換し、計
測電圧v(t)の信号を、例えば電気角30度の間隔で
電圧サンプリングデータに変換する。
The converter 10 A / D converts the momentary hold output of the sample-and-hold circuit 8 based on the A / D conversion command pulse given from the arithmetic processing unit 9 and converts the measured voltage v (t). The signal is converted into voltage sampling data at intervals of, for example, 30 electrical degrees.

【0024】そして、これらの電圧サンプリングデータ
が演算処理部9に接続されたメモリ回路11のRAMに
書込まれ、このRAMに最新の一定量(nサイクル分)
の電圧サンプリングデータが保持される。
Then, these voltage sampling data are written in the RAM of the memory circuit 11 connected to the arithmetic processing unit 9, and the latest fixed amount (for n cycles) is stored in this RAM.
Is held.

【0025】一方、ローパスフィルタ7を通った計測電
圧v(t)の信号が周波数計測回路12にも供給され、
この回路12は、例えば、計測電圧v(t)の系統基本
波周波数の成分をフィルタ分離して計測し、計測結果を
演算処理部9に供給する。
On the other hand, the signal of the measurement voltage v (t) passed through the low-pass filter 7 is also supplied to the frequency measurement circuit 12,
The circuit 12 measures the component of the system fundamental frequency of the measurement voltage v (t) by filtering, for example, and supplies the measurement result to the arithmetic processing unit 9.

【0026】つぎに、演算処理部9はメモリ回路11の
ROMに保持されたデジタルフィルタ処理,電圧位相検
出処理等の各種の処理プログラムを実行し、デジタルフ
ィルタ処理により、いわゆるフーリエ演算に基づき、例
えば前記のサンプル・ホールドの間隔で系統基本波電圧
成分(ベクトル量)を抽出することをくり返し、電圧位
相検出処理により、現サイクル(最新のサイクル)より
所定サイクル前の1サイクルを連系運転位相の基準サイ
クルとし、現サイクルの系統基本波電圧成分の位相(以
下現サイクル電圧位相という)と基準サイクルの系統基
本波電圧成分の位相(以下基準サイクル電圧位相とい
う)とを比較し、現サイクル電圧位相が基準サイクル電
圧位相から設定値(整定値)以上ずれているか否か,す
なわち位相の跳躍変化の有無を検出し、検出結果をメモ
リ回路11のRAMに蓄積保持する。
Next, the arithmetic processing unit 9 executes various processing programs such as digital filter processing and voltage phase detection processing held in the ROM of the memory circuit 11, and executes digital filter processing based on a so-called Fourier operation, for example. The extraction of the system fundamental wave voltage component (vector quantity) is repeated at the sample and hold intervals, and one cycle before the current cycle (the latest cycle) by a predetermined cycle is determined by the voltage phase detection processing. A reference cycle, a phase of a system fundamental voltage component of the current cycle (hereinafter referred to as a current cycle voltage phase) is compared with a phase of a system fundamental voltage component of the reference cycle (hereinafter referred to as a reference cycle voltage phase), and a current cycle voltage phase is obtained. Whether the phase shifts from the reference cycle voltage phase by more than the set value (set value), that is, the jump of the phase Detecting the presence or absence of, accumulates hold the detection result to the RAM of the memory circuit 11.

【0027】そして、基準サイクルが現サイクルの例え
ば4サイクル前の1サイクルの場合、図2に示すように
注目サイクル(第0サイクル)を「0」,このサイクル
より前の各1サイクルを順にサイクル「−1」,「−
2」,…,「−6」,…のサイクルとし、「0」のサイ
クルより後の各1サイクルを順に「+1」,「+2」,
…,「+5」,…のサイクルとし、「−1」のサイクル
の時刻txに系統停止が発生し、系統基本波電圧成分の
位相が、tx以前の連系運転時の位相から単独運転時の
位相に急変したとすると、現サイクルが「−2」以前,
「−1」〜「+3」,「+4」以後になることで、現サ
イクルとその4サイクル前の基準サイクルとの電圧位相
の比較結果は、つぎのようになる。
When the reference cycle is one cycle, for example, four cycles before the current cycle, as shown in FIG. 2, the cycle of interest (0th cycle) is set to "0", and each cycle before this cycle is cycled in order. "-1", "-
2 ”,...,“ −6 ”,..., And one cycle after the cycle of“ 0 ”is“ +1 ”,“ +2 ”,
, “+5”,..., And a system stop occurs at time tx of the “−1” cycle, and the phase of the system fundamental wave voltage component is changed from the phase of the interconnected operation before tx during the isolated operation. If the phase suddenly changes, the current cycle is before "-2",
Since the current cycle is "-1" to "+3" or "+4" or later, the comparison result of the voltage phase between the current cycle and the reference cycle four cycles before is as follows.

【0028】(イ)現サイクルが「−2」以前 現サイクルが「−2」以前,基準サイクルは「−6」以
前のサイクルになり(現サイクルが「−3」ならば基準
サイクルは図中にはないが「−7」のサイクルとな
る)、両サイクルが連系運転の同一位相になることか
ら、比較結果は位相変化無しになる。 (ロ)現サイクルが「−1」〜「+3」 (i)現サイクルが「−1」,基準サイクルが「−5」
のときは、現サイクルで系統停止が発生し、現サイクル
の電圧位相が過渡現象を含むため、位相比較結果(位相
変化の有無)は不確定になる。 (ii)現サイクルと基準サイクルが、「0」と「−
4」,「+1」と「−3」,「+2」と「−2」になる
間は、現サイクルが単独運転位相,基準サイクルが連系
運転位相であり、この間は、両サイクルの電圧位相が確
実に設定値以上ずれ、位相比較結果が2回以上位相変化
有になる。 (iii) 現サイクルが「+3」,基準サイクルが「−
1」になるときは、基準サイクルで系統停止が発生し、
基準サイクルの位相が過渡現象を含むため、位相比較結
果は(i)と同様に不確定になる。 (ハ)現サイクルが「+4」以後 現サイクルが「+4」以後、基準サイクルが「0」以後
のサイクルになり、両サイクルが単独運転の同一位相に
なることから、位相比較結果は(イ)と同様に位相変化
無しになる。
(A) Current cycle is before "-2" Current cycle is before "-2" and reference cycle is before "-6" (if current cycle is "-3", the reference cycle is , But the cycle is "-7"), but since both cycles have the same phase of the interconnection operation, the comparison result shows no phase change. (B) Current cycle is "-1" to "+3" (i) Current cycle is "-1" and reference cycle is "-5"
In this case, the system stops in the current cycle, and the voltage phase of the current cycle includes a transient phenomenon, so that the phase comparison result (whether or not there is a phase change) is uncertain. (Ii) When the current cycle and the reference cycle are “0” and “−”
4 "," +1 "and" -3 ", and" +2 "and" -2 ", the current cycle is the isolated operation phase and the reference cycle is the interconnected operation phase. Deviates more than the set value, and the phase comparison result has a phase change twice or more. (Iii) The current cycle is “+3” and the reference cycle is “−
When it becomes "1", a system stop occurs in the reference cycle,
Since the phase of the reference cycle includes a transient phenomenon, the phase comparison result becomes uncertain as in (i). (C) After the current cycle is "+4" After the current cycle is "+4", the reference cycle is a cycle after "0", and both cycles have the same phase of the isolated operation. There is no phase change as in the case of.

【0029】すなわち、この現サイクルと基準サイクル
との系統基本波電圧成分の位相比較により、現サイクル
が系統停止時刻txのサイクルの直後の複数サイクルに
なる間に、現サイクルの電圧位相が基準サイクルの電圧
位相より設定値以上,例えば2°〜20°以上ずれて位
相変化有りを検出するサイクルが2サイクル以上発生す
る。なお、上記の例では、現サイクルと基準サイクルと
のサイクル差を4としたが、この値を増やすことで、位
相変化有りの検出のサイクルを3以上に増やすことがで
き、より確実な検出ができる。
That is, by comparing the phase of the system fundamental wave voltage component between the current cycle and the reference cycle, while the current cycle is a plurality of cycles immediately after the cycle at the system stop time tx, the voltage phase of the current cycle is changed to the reference cycle. , Two or more cycles are detected to detect the presence of a phase change with a deviation of at least the set value, for example, 2 ° to 20 ° or more. In the above example, the cycle difference between the current cycle and the reference cycle is set to 4. However, by increasing this value, the number of cycles for detecting the presence of a phase change can be increased to 3 or more. it can.

【0030】そして、この位相変化有りを基準サイクル
から現サイクルまでのサイクル数の間(ここでは4サイ
クルの間)に、2回(2サイクル)以上の設定回数検出
したときに、メモリ回路11のRAMの記憶に基づき、
系統停止による系統基本波電圧成分の電圧位相の急変
(跳躍)を検出し、単独運転への移行を検出する。
When this phase change is detected twice (two cycles) or more during the number of cycles from the reference cycle to the current cycle (here, during four cycles), the memory circuit 11 Based on the memory in RAM,
A sudden change (jump) of the voltage phase of the system fundamental wave voltage component due to system stoppage is detected, and a transition to islanding operation is detected.

【0031】さらに、この単独運転への移行を検出する
と、入出力インタフェース回路13から外部に単独運転
の接点,表示の信号を出力し、この接点信号により、開
閉器4を直ちに開放して分散電源1を配電線3から解列
し、分散電源1の運転を停止する。
Further, upon detecting the shift to the islanding operation, the input / output interface circuit 13 outputs a contact and display signal for the islanding operation to the outside, and the switch 4 is immediately opened by the contact signal to immediately open the distributed power source. 1 is disconnected from the distribution line 3 and the operation of the distributed power supply 1 is stopped.

【0032】この場合、配電線3の系統基本波電圧成分
の系統停止による電圧跳躍を、2回以上の設定回数検出
することを条件に、分散電源1の連系運転から単独運転
への移行を検出するため、系統のノイズが負荷変動によ
る誤検出を防止して単独運転への移行の検出の信頼性を
従来より著しく向上することができ、信頼性の高い電圧
位相跳躍検出方式の分散電源の単独運転防止を実現でき
る。
In this case, the transition from the interconnection operation of the distributed power source 1 to the isolated operation is performed on condition that the voltage jump caused by the system stop of the system fundamental wave voltage component of the distribution line 3 is detected two or more times. Because of this, system noise can prevent erroneous detection due to load fluctuations, significantly improve the reliability of detection of transition to islanding operation, and provide a highly reliable voltage phase jump detection type distributed power supply. The prevention of islanding can be realized.

【0033】つぎに、演算処理部9の具体的な演算処理
等について説明する。まず、配電線3の系統基本波の定
格の角周波数をω0=2π・f0,(f0 は60Hz又は5
0Hzの系統基本波周波数)とすると、入力信号v(t)
に含まれる系統基本波電圧成分の余弦成分(cos成
分)Vc,正弦成分(sin成分)Vsは、つぎの数
1,数2のフーリエ変換で求めることができる。
Next, a specific calculation process of the calculation processing section 9 will be described. First, the rated angular frequency of the system fundamental wave of the distribution line 3 is expressed as ω 0 = 2π · f 0 , where f 0 is 60 Hz or 5 Hz.
0 Hz system fundamental frequency), the input signal v (t)
The cosine component (cos component) Vc and the sine component (sin component) Vs of the system fundamental wave voltage component included in the equation (1) can be obtained by the following Fourier transform of Expressions 1 and 2.

【0034】[0034]

【数1】 (Equation 1)

【0035】[0035]

【数2】 (Equation 2)

【0036】そして、デジタル処理の離散値系の場合、
サンプリング周波数を2k・f0,(2kは系統基本波
1サイクルのサンプリング数)とすると、1サイクルの
cos成分Vc,sin成分Vsは、つぎの数3,数4
で示すようになる。
Then, in the case of a discrete value system of digital processing,
Assuming that the sampling frequency is 2k · f 0 (2k is the number of samplings in one cycle of the system fundamental wave), the cos component Vc and sin component Vs in one cycle are expressed by the following equations ( 3) and (4).
It becomes as shown by.

【0037】[0037]

【数3】 (Equation 3)

【0038】[0038]

【数4】 (Equation 4)

【0039】そして、基準サイクルを現サイクルのnサ
イクル前の1サイクルとすると、数3,数4の式中の電
圧Viは図3の系統電圧の各・印の各1サイクルのサン
プリング点のサンプリング電圧V0〜V2k-1,…,V2kn
〜V2k(n+1)-1であり、時刻t0のときに、i=0の現サ
イクルの最新のサンプリング電圧V0になり、時刻−
(2π/ω0)・nのときに、i=2knの基準サイク
ルの最初のサンプリング電圧V2knになる。
Assuming that the reference cycle is one cycle which is n cycles before the current cycle, the voltage Vi in the equations (3) and (4) is the sampling of the system voltage at each sampling point in each cycle marked by the symbol in FIG. voltage V 0 ~V 2k-1, ... , V 2kn
VV 2k (n + 1) −1 , and at time t 0 , the latest sampling voltage V 0 of the current cycle at i = 0 is obtained, and
When (2π / ω 0 ) · n, the sampling voltage V 2kn becomes the first sampling voltage in the reference cycle of i = 2kn.

【0040】さらに、現サイクルのcos成分Vc,s
in成分VsをVc0,Vs0とすると、Vc0,Vs0
図3の現サイクルのサンプリング電圧V0〜V2K-1から
求められる電圧基本波のcos成分,sin成分であ
り、nサイクル前の基準サイクルのcos成分Vc,s
in成分VsをVcn,Vsnとすると、Vcn,Vs
nは図3の基準サイクルのサンプリング電圧V2kn〜V
2k(n+1)-1から求められる電圧基本波のcos成分,s
in成分である。
Further, the cos component Vc, s of the current cycle
Assuming that the in components Vs are Vc 0 and Vs 0 , Vc 0 and Vs 0 are the cos component and the sin component of the voltage fundamental wave obtained from the sampling voltages V 0 to V 2K -1 of the current cycle in FIG. Cos component Vc, s of previous reference cycle
Assuming that the in component Vs is Vcn, Vsn, Vcn, Vs
n is the sampling voltage V 2kn to V in the reference cycle of FIG.
Cos component of voltage fundamental wave obtained from 2k (n + 1) -1 , s
In component.

【0041】そして、演算処理部9は、現サイクルの2
k個のサンプリング電圧V0〜V2k- 1のcos成分V
0,sin成分Vs0及び基準サイクルの2k個のサン
プリング電圧V2kn〜V2k(n+1)-1のcos成分Vcn,
sin成分Vsnを抽出することをくり返す。
Then, the arithmetic processing section 9 executes the second cycle of the current cycle.
k number of sampling voltage V 0 ~V 2k- 1 of cos component V
c 0 , sin component Vs 0, and cos components Vcn of 2k sampling voltages V 2kn to V 2k (n + 1) −1 in the reference cycle,
The extraction of the sin component Vsn is repeated.

【0042】さらに、抽出された基準サイクルのcos
成分Vcn,sin成分Vsnのベクトルを基準にし
て、現サイクルのcos成分Vc0,sin成分Vs0
ベクトルの位相が、進み方向又は遅れ方向に整定値以上
ずれ、図4の斜線部の領域のベクトルになるか否かを検
出する。
Further, the cos of the extracted reference cycle is
With reference to the vector of the component Vcn and the vector of the sin component Vsn, the phase of the vector of the cos component Vc 0 and the vector of the sin component Vs 0 in the current cycle is shifted more than the set value in the leading direction or the lagging direction. Detect if it is a vector.

【0043】なお、図4においては、nサイクル前の基
準サイクルのcos成分Vcn,sin成分Vsnが位
相0°のベクトルαであり、このベクトルαに対して現
サイクルのcos成分Vc0,sin成分Vs0のベクト
ルβは、位相が遅れ方向に位相整定値θ(例えば2°≦
θ≦20°)以上ずれ、斜線部の領域に位置している。
In FIG. 4, the cos component Vcn and the sin component Vsn of the reference cycle n cycles before are the vector α of the phase 0 °, and the cos component Vc 0 and the sin component of the current cycle are The vector β of Vs 0 has a phase set value θ (for example, 2 ° ≦
θ ≦ 20 °) or more, and is located in the shaded region.

【0044】そして、現サイクルのcos成分Vc0
sin成分Vs0のベクトルが図4の斜線部のベクトル
か否かはつぎの数5又は数6が成立するか否かで検出す
ることができ、成立すれば、両成分Vc0,Vs0のベク
トルが図4の斜線部分に位置している。なお、両式中の
< ,>は内積を示す。
Then, the cos components Vc 0 ,
Whether or not the vector of the sine component Vs 0 is the vector of the hatched portion in FIG. 4 can be detected based on whether the following Expression 5 or Expression 6 is satisfied, and if it is satisfied, the vector of both components Vc 0 and Vs 0 Are located in the hatched portions in FIG. Note that <and> in both equations indicate inner products.

【0045】[0045]

【数5】<(Vcn+jVsn)・ej(90°+ θ),(Vc0
+jVs0)> ≧0
## EQU5 ## <(Vcn + jVsn)) ej (90 ° + θ) , (Vc 0
+ JVs 0 )> ≧ 0

【0046】[0046]

【数6】<(Vc0+jVs0)・e-j(90 °+ θ),(Vc0
+jVs0)> ≧0
<(Vc 0 + jVs 0 ) · e −j (90 ° + θ) , (Vc 0
+ JVs 0 )> ≧ 0

【0047】上記の演算は、内積演算部を展開して、P
=Vcn・Vc0+Vsn・Vs0,Q=Vcn・Vs0
−Vsn・Vc0として、つぎの数7又は数8が成立す
るか否かで判定することと同じであり、演算処理部9は
この演算判定により、現サイクルのcos成分Vc0
sin成分Vs0が図4の斜線部の領域のベクトルであ
ることを検出して位相変化有りを検出する。
The above operation is performed by expanding the inner product operation unit and calculating P
= Vcn · Vc 0 + Vsn · Vs 0 , Q = Vcn · Vs 0
-Vsn · Vc 0 is the same as determining whether or not the following Expression 7 or 8 holds. The arithmetic processing unit 9 determines the cos components Vc 0 ,
It is detected that the sin component Vs 0 is a vector in the shaded area in FIG. 4 and the presence of a phase change is detected.

【0048】[0048]

【数7】P・sinθ−Q・cosθ≦0[Mathematical formula 7] P · sin θ−Q · cos θ ≦ 0

【0049】[0049]

【数8】P・sinθ+Q・cosθ≦0[Equation 8] P · sin θ + Q · cos θ ≦ 0

【0050】そして、この位相変化有りを前記の設定回
数検出したときに、単独運転への移行を検出する。
When the phase change is detected for the set number of times, the shift to the islanding operation is detected.

【0051】ところで、A/D変換器10のA/D変換
は、一定周波数のクロックパルス等に基づき、サンプリ
ング周波数を一定にした固定サンプリング方式で行うこ
とが簡単であるが、この場合は、配電線3の系統周波数
が変動したときに、前記のcos成分Vc0,Vcn,
sin成分Vs0,Vsnにこの変動に基づくゲイン
(振幅)変動及び位相変動が含まれる。
The A / D conversion of the A / D converter 10 can be easily performed by a fixed sampling method in which the sampling frequency is fixed on the basis of a clock pulse or the like having a constant frequency. When the system frequency of the electric wire 3 fluctuates, the aforementioned cos components Vc 0 , Vcn,
The sin components Vs 0 and Vsn include gain (amplitude) fluctuation and phase fluctuation based on this fluctuation.

【0052】すなわち、前記の入力信号v(t)の周波
数変動を含む角周波数をωとすると、ω=ω0 (1+
Δ),(Δは周波数変動量)であり、このとき、入力信
号v(t)はその絶対値(振幅)を1とすると、v
(t)=sin(ω・t+θ),(θは初期値)で表わ
すことができる。
That is, assuming that the angular frequency of the input signal v (t) including the frequency fluctuation is ω, ω = ω 0 (1+
Δ) and (Δ is the amount of frequency variation). At this time, if the absolute value (amplitude) of the input signal v (t) is 1, v
(T) = sin (ω · t + θ), where (θ is an initial value).

【0053】そして、この入力信号v(t)を一定の角
周波数ω0 でフーリエ変換すると、そのフーリエ変換で
抽出されたcos成分C,sin成分Sは、つぎの数
9,数10の式に示すようになる。
Then, when this input signal v (t) is subjected to Fourier transform at a constant angular frequency ω 0 , the cos component C and sin component S extracted by the Fourier transform are expressed by the following equations (9) and (10). As shown.

【0054】[0054]

【数9】 (Equation 9)

【0055】[0055]

【数10】 (Equation 10)

【0056】さらに、固定サンプリング方式であれば、
入力信号v(t)の周波数変動の有無によらず、現サイ
クルよりnサイクル前の基準サイクルは、−(n+1)
・(2π/ω0)〜−n・(2π/ω0)であり、そのc
os成分Cn,sin成分Snは、つぎの数11,数1
2の式から求まる。
Further, if the fixed sampling method is used,
Regardless of whether or not the frequency of the input signal v (t) fluctuates, the reference cycle n cycles before the current cycle is − (n + 1)
(2π / ω 0 ) to −n · (2π / ω 0 ), and c
The os component Cn and the sin component Sn are represented by the following equations (11) and (1).
It is obtained from the equation (2).

【0057】[0057]

【数11】 [Equation 11]

【0058】[0058]

【数12】 (Equation 12)

【0059】そして、数11,数12の式のフーリエ変
換(積分)を行うと、成分Cn,Snは系統の周波数変
動に基づくゲイン変動と位相変動とを含み、つぎの数1
3,数14の式で表わされる。
When the Fourier transform (integration) of the equations (11) and (12) is performed, the components Cn and Sn include gain fluctuation and phase fluctuation based on the frequency fluctuation of the system.
3, expressed by Equation 14.

【0060】なお、式中のΔはΔ=(ω−ω0)/ω0
(f−f0)/f0の周波数変動量であり、{2/(2+
Δ)}・{sin(Δπ)/Δπ},{2(1+Δ)/
(2+Δ)}・{sin(Δπ)/Δπ}がゲイン変
動,(2n+1)Δπが位相変動である。
Note that Δ in the equation is Δ = (ω−ω 0 ) / ω 0 =
(F−f 0 ) / f 0 is a frequency variation amount, and Δ2 / (2+
Δ)} · {sin (Δπ) / Δπ}, {2 (1 + Δ) /
(2 + Δ)} · {sin (Δπ) / Δπ} is a gain variation, and (2n + 1) Δπ is a phase variation.

【0061】[0061]

【数13】 (Equation 13)

【0062】[0062]

【数14】 [Equation 14]

【0063】この数13,数14の2式において、系統
電圧の周波数変動量Δが0であれば、Δ→0,{sin
(Δπ)/Δπ}→1になることから、Cn=cos
θ,Sn=sinθになり、誤差なく両成分Cn,Sn
が抽出される。
In the equations (13) and (14), if the frequency variation Δ of the system voltage is 0, Δ → 0, {sin
Since (Δπ) / Δπ} → 1, Cn = cos
θ, Sn = sin θ, and both components Cn, Sn
Is extracted.

【0064】しかし、固定周波数サンプリング方式の場
合、周波数変動量Δが0でないときには、数13,数1
4の2式からも明らかなように、成分Cn,Snの振
幅,位相がずれ、とくに位相の変動はサイクル数nに大
きく影響される。
However, in the case of the fixed frequency sampling method, when the frequency variation Δ is not 0, Equations 13 and 1
As is clear from the two equations (4), the amplitudes and phases of the components Cn and Sn are shifted, and the fluctuation of the phase is greatly affected by the cycle number n.

【0065】そして、n=0の現サイクルのcos成
分,sin成分をC0,S0とすると、数13,数14の
式からも明らかなように、これらの成分C0,S0にも周
波数変動量Δの影響が含まれる。
Assuming that the cos component and the sin component of the current cycle of n = 0 are C 0 and S 0 , these components C 0 and S 0 are also apparent from the equations (13) and (14). The influence of the frequency variation Δ is included.

【0066】そこで、固定周波数サンプリング方式の場
合、演算処理部9は周波数変動量Δに基づく成分Cn,
Sn,C0,S0の誤差を、つぎに説明する演算で補正す
る。
Therefore, in the case of the fixed frequency sampling method, the arithmetic processing unit 9 determines the components Cn,
The errors of Sn, C 0 , and S 0 are corrected by the calculation described below.

【0067】まず、数13,数14の2式において、周
波数変動量Δを実用的な|Δ|≦5%とすると、|Δ|
=5%であっても、|sin(Δπ)/Δπ|=0.9
96であり、|sin(Δπ)/Δπ|≒1とみなせ
る。
First, in Equations (13) and (14), assuming that the frequency variation Δ is a practical | Δ | ≦ 5%, | Δ |
= 5%, | sin (Δπ) /Δπ|=0.9
96, which can be regarded as | sin (Δπ) / Δπ | ≒ 1.

【0068】したがって、nサイクル前の基準サイクル
の成分Cn,Snは、つぎの数15,数16の2式で示
される。
Therefore, the components Cn and Sn of the reference cycle n cycles before are represented by the following two equations (15) and (16).

【0069】[0069]

【数15】 (Equation 15)

【0070】[0070]

【数16】 (Equation 16)

【0071】また、n=0の現サイクルの成分C0,S0
はつぎの数17,数18の2式で示される。
The components C 0 and S 0 of the current cycle when n = 0
Is expressed by the following two equations (17) and (18).

【0072】[0072]

【数17】 [Equation 17]

【0073】[0073]

【数18】 (Equation 18)

【0074】これらの数15〜数18の式から明らかな
ように、現サイクル及び基準サイクルとも、cos成分
0,Cnはsin成分S0,Snに比してゲインが1/
(1+Δ)小さく、基準サイクルの成分Cn,Snは現
サイクルの成分C0,S0に比して、みかけ上2nΔπの
位相遅れが生じる。
As is clear from the equations (15) to (18), in both the current cycle and the reference cycle, the gain of the cos components C 0 and Cn is 1 / compared to the gain of the sin components S 0 and Sn.
(1 + Δ) is small, and the components Cn and Sn of the reference cycle have an apparent phase delay of 2nΔπ as compared with the components C 0 and S 0 of the current cycle.

【0075】そして、現サイクルと基準サイクルとの位
相変化から単独運転への移行を検出するため、基本的に
は系統の周波数変動に基づく両サイクルの電圧成分の位
相のずれのみを補正すればよいが、この形態にあって
は、検出精度を一層向上するため、ゲインについても補
正する。
Then, in order to detect the shift to the isolated operation from the phase change between the current cycle and the reference cycle, basically, only the phase shift of the voltage components of both cycles based on the frequency fluctuation of the system needs to be corrected. However, in this embodiment, the gain is also corrected in order to further improve the detection accuracy.

【0076】このゲインの補正は、数13,数14の式
のsin(Δπ)/Δπの項まで含めて正確に補正する
必要はなく、cos成分C0,Cnを(1+Δ)倍して
sin成分S0,Snに等しくすれば十分である。
It is not necessary to correct the gain accurately including the term of sin (Δπ) / Δπ in the equations (13) and (14), and multiplies the cos components C 0 and Cn by (1 + Δ) to obtain a sin. It is sufficient to make them equal to the components S 0 , Sn.

【0077】そこで、演算処理部9は基準サイクルの成
分Cnと現サイクルの成分C0を(1+Δ)倍するとと
もに、基準サイクルの成分Cn,Snの位相を2nΔπ
だけ進めて、現サイクルと基準サイクルの成分C0
0,Cn,Snの位相のずれを補正し、固定サンプリ
ング方式の場合の系統の周波数変動に対する補正を施
す。
Then, the arithmetic processing unit 9 multiplies the component Cn of the reference cycle and the component C 0 of the current cycle by (1 + Δ) and sets the phase of the components Cn and Sn of the reference cycle to 2nΔπ.
Only the current cycle and the components of the reference cycle C 0 ,
The phase shift of S 0 , Cn, and Sn is corrected, and a correction is made for the frequency fluctuation of the system in the case of the fixed sampling method.

【0078】まずゲイン補正を施すと、現サイクルの成
分Vc0,Vs0,基準サイクルの成分Vcn,Vsn
は、補正後つぎの数19,数20,数21,数22の示
す成分Vc0’,Vs0’,Vcn’,Vsn’になる。
First, when the gain is corrected, the components Vc 0 and Vs 0 of the current cycle and the components Vcn and Vsn of the reference cycle are obtained.
Are the components Vc 0 ′, Vs 0 ′, Vcn ′, and Vsn ′ shown by the following equations 19, 20, 21, and 22 after the correction.

【0079】[0079]

【数19】Vc0’=(1+Δ)・Vc0 Vc 0 ′ = (1 + Δ) · Vc 0

【0080】[0080]

【数20】Vs0’=Vs0 Vs 0 ′ = Vs 0

【0081】[0081]

【数21】Vcn’=(1+Δ)・VcnVcn ′ = (1 + Δ) · Vcn

【0082】[0082]

【数22】Vsn’=VsnVsn '= Vsn

【0083】つぎに位相補正を施すと、数5,数6の内
積演算判定は、つぎの数23,数24に示すようにな
る。
Next, when phase correction is performed, the inner product operation determination of Equations 5 and 6 is as shown in the following Equations 23 and 24.

【0084】[0084]

【数23】<{(Vcn'+jVsn')・ej2n Δπ・e
j(90°+ θ)},(Vc0'+jVs0')>≧0
<23 (Vcn ′ + jVsn ′) · e j2n Δπ · e
j (90 ° + θ) }, (Vc 0 '+ jVs 0 ')> ≧ 0

【0085】[0085]

【数24】<{(Vcn'+jVsn')・ej2n Δπ・e
−j(90 °+ θ)},(Vc0'+jVs0')> ≧0
<24 (Vcn ′ + jVsn ′) · e j2n Δπ · e
−j (90 ° + θ) }, (Vc 0 '+ jVs 0 ')> ≧ 0

【0086】さらに、数23,数24の内積演算部を展
開して、P=Vcn’・Vc0’+Vsn’・Vs0’,
Q=Vcn’・Vs0’−Vsn’・Vc0’として、位
相変化検出の演算判定式は、つぎの数25,数26に示
すようになる。
Further, by expanding the inner product calculation units of Expressions 23 and 24, P = Vcn ′ · Vc 0 ′ + Vsn ′ · Vs 0 ′,
Assuming that Q = Vcn ′ · Vs 0 ′ −Vsn ′ · Vc 0 ′, the equation for calculating the phase change detection is as shown in the following equations 25 and 26.

【0087】[0087]

【数25】P・sin(θ+2nΔπ)−Q・cos
(θ+2nΔπ)≦0
(25) P · sin (θ + 2nΔπ) −Q · cos
(Θ + 2nΔπ) ≦ 0

【0088】[0088]

【数26】P・sin(θ−2nΔπ)+Q・cos
θ−2nΔπ)≦0
(26) P · sin (θ−2nΔπ) + Q · cos
θ−2nΔπ) ≦ 0

【0089】そして、固定サンプリング方式の場合、演
算処理部9は具体的には、図5のフローチャートに示す
ように動作する。
In the case of the fixed sampling method, the arithmetic processing section 9 operates specifically as shown in the flowchart of FIG.

【0090】まず、ステップZ1 により現在(最新)の
サンプリング値のホールド出力をA/D変換器10が固
定サンプリング方式で電圧サンプリングデータにA/D
変換し、そのデータを演算処理部9がメモリ回路11に
書込んで蓄積保持する。
First, in step Z 1 , the A / D converter 10 converts the hold output of the current (latest) sampling value into the voltage sampling data by the fixed sampling method.
The data is converted, and the data is written into the memory circuit 11 by the arithmetic processing unit 9 and accumulated and held.

【0091】つぎに、ステップZ2 により、演算処理部
9は周波数計測回路12の現在の計測結果を読込み、メ
モリ回路11に書込んで蓄積保持するとともに、メモリ
回路11に保持されている最新の所定数の計測結果を平
均し、周波数の急変等を除去して現在の系統基本波周波
数fを把握する。
Next, in step Z 2 , the arithmetic processing section 9 reads the current measurement result of the frequency measurement circuit 12, writes it in the memory circuit 11 and stores it, and also stores the latest measurement result stored in the memory circuit 11. A predetermined number of measurement results are averaged, abrupt changes in frequency are removed, and the current system fundamental frequency f is grasped.

【0092】さらに、ステップZ3 によりメモリ回路1
1から現サイクル,基準サイクルそれぞれの2k個の電
圧サンプリングデータを読出し、数3,数4の式の演算
から現サイクルの系統基本波電圧のcos成分Vc=V
0,sin成分Vs=Vs0及び基準サイクルの系統基
本波電圧のcos成分Vc=Vcn,sin成分Vs=
Vsnを演算する。
[0092] Further, the memory circuit 1 in step Z 3
From 2, 2k voltage sampling data of each of the current cycle and the reference cycle are read out, and the cos component Vc = Vc of the system fundamental wave voltage of the current cycle is obtained from the calculation of the equations (3) and (4).
c 0 , sin component Vs = Vs 0, and cos component Vc = Vcn, sin component Vs =
Calculate Vsn.

【0093】また、ステップZ4 により、周波数変動量
Δを、Δ=(f−f0 /f0 ),(f:現在の系統基
本波周波数、f0:基準の系統基本波周波数)から演算
する。
[0093] Further, the step Z 4, a frequency variation Δ, Δ = (f-f 0 / f 0), (f: current line fundamental frequency, f 0: line fundamental frequency of the reference) calculated from I do.

【0094】そして、ステップZ5 により、数19〜数
22の補正演算を行って成分Vc0,Vs0,Vcn,V
snを成分Vc0’,Vs0’,Vcn’,Vsn’
補正し、ステップZ6 により、P=Vcn’・Vc0
+Vsn’・Vs0’,Q=Vcn’・Vs0’−Vs
n’・Vc0’を計算する。
[0094] Then, in Step Z 5, component Vc 0 performs correction calculation of number 19 to number 22, Vs 0, Vcn, V
sn is represented by components Vc 0 ′, Vs 0 ′, Vcn ′, Vsn ′ It is corrected to, the step Z 6, P = Vcn '· Vc 0'
+ Vsn '· Vs 0', Q = Vcn '· Vs 0' -Vs
Calculate n ′ · Vc 0 ′.

【0095】さらに、ステップZ7 により、数25,数
26の式の位相変化検出の演算を行い、両式の演算結果
がいずれも正(>0)のときは、ステップZ8 により演
算処理部9の検出タイマをリセットし、ステップZ9
介してステップZ1に戻り、このステップZ1から処理を
くり返す。
[0095] Further, the step Z 7, number 25, performs calculation of number 26 wherein the phase change detection, when the both operation result of both equations is positive (> 0), the arithmetic processing unit by Step Z 8 reset the 9 detection timer, the process returns to step Z 1 via the step Z 9, repeat the process from step Z 1.

【0096】一方、ステップZ7 により、数25の式又
は数26の式の演算結果が≦0になり、位相変動を検出
したときは、ステップZ7 からステップZ10に移行し、
前記の検出タイマーを起動し、ステップZ9を通ってス
テップZ1に戻り、このステップZ1から処理をくり返
す。
On the other hand, in step Z 7 , the calculation result of the equation (25) or the equation (26) becomes ≦ 0, and when a phase change is detected, the process proceeds from step Z 7 to step Z 10 .
Start the detection timer, the process returns to step Z 1 through Step Z 9, repeat the process from step Z 1.

【0097】そして、系統停止による電圧位相の跳躍が
生じたときは、ステップZ7 からステップZ10,Z9
通ってステップZ1 に戻ることがくり返され、このくり
返しが設定回数に達すると、検出タイマがタイムアップ
し、ステップZ9 からステップZ11に移行して単独運転
への移行を検出し接点表示の信号を出力する。
[0097] When the jump of the voltage phase by the system stop occurs is repeated to return to Step Z 1 Step Z 7 through Step Z 10, Z 9, this repeated reaches the set number of times , the detection timer times up, the process proceeds from step Z 9 to step Z 11 detects the shift to the islanding contact, outputs a display signal.

【0098】したがって、固定サンプリング方式によ
り、系統のノイズや負荷変動等の影響を受けることな
く、しかも、系統周波数の変動の影響を受けることもな
く、分散電源1の単独運転への移行を、信頼性の高い電
圧位相跳躍方式で検出して分散電源1を配電線3の系統
から迅速に解列することができる。
Therefore, by the fixed sampling method, the shift of the distributed power supply 1 to the isolated operation can be reliably performed without being affected by system noise, load fluctuation, and the like, and without being affected by system frequency fluctuation. The distributed power supply 1 can be quickly disconnected from the system of the distribution line 3 by detecting the voltage phase jump system having high reliability.

【0099】ところで、固定サンプリング方式の代わり
にいわゆる同期サンプリング方式を採用する場合は、例
えば周波数計測回路12の計測結果に基づいて系統基本
波の周波数に同期して動作するPLL同期回路を検出装
置2に設け、このPLL同期回路の系統基本波の周波数
に同期したクロックパルスに基づき、系統基本波の周波
数に同期したサンプリング周波数でA/D変換器10の
A/D変換等を行えばよい。
In the case where a so-called synchronous sampling method is employed instead of the fixed sampling method, for example, a PLL synchronizing circuit operating in synchronization with the frequency of the system fundamental wave based on the measurement result of the frequency measuring circuit 12 is provided by the detecting device 2. The A / D conversion of the A / D converter 10 may be performed at a sampling frequency synchronized with the frequency of the system fundamental wave based on a clock pulse synchronized with the frequency of the system fundamental wave of the PLL synchronization circuit.

【0100】この同期サンプリング方式の場合は、前記
の系統基本波周波数の変動の補正を省くことができ、演
算処理部9の演算負担等が軽減される利点がある。
In the case of this synchronous sampling method, the correction of the fluctuation of the system fundamental wave frequency can be omitted, and there is an advantage that the calculation load of the calculation processing unit 9 is reduced.

【0101】そして、現サイクルと基準サイクルとの間
隔(サイクル数)等は、前記形態のものに限られるもの
ではなく、系統の状態等に応じて適当に設定してよいの
は勿論である。
The interval (the number of cycles) between the current cycle and the reference cycle is not limited to the above-described embodiment, but may be appropriately set according to the state of the system.

【0102】[0102]

【発明の効果】本発明は、以下に記載する効果を奏す
る。現サイクルより所定サイクル前の基準サイクルのと
きは、系統正常で分散型電源1が連系運転されるものと
して、系統電圧のA/D変換によるサンプリングデータ
(電圧サンプリングデータ)から系統基本波電圧成分を
デジタル的にくり返し抽出し、現サイクルの抽出成分の
各時点の位相と基準サイクルの各時点の位相とを比較
し、系統停止が発生して分散電源1が連系運転から単独
運転に移行したときに、両サイクルの系統基本波電圧成
分の位相の所定値以上のずれを複数回(設定回数)検出
し、この複数回数の検出を条件に、系統の電圧位相の急
変を検出して分散電源1の系統停止による連系運転から
単独運転への移行を検出することができる。
The present invention has the following effects. At the time of the reference cycle that is a predetermined cycle before the current cycle, it is assumed that the distributed power supply 1 is operated in a grid-connected state and the grid-based fundamental wave voltage component is determined based on sampling data (voltage sampling data) obtained by A / D conversion of the grid voltage. Is repeatedly extracted digitally, the phase at each time point of the extracted component of the current cycle is compared with the phase at each time point of the reference cycle, and a system stoppage occurs, and the distributed power supply 1 shifts from interconnected operation to isolated operation. In some cases, a deviation of the phase of the system fundamental wave voltage component of both cycles by a predetermined value or more is detected a plurality of times (set number of times), and on the condition of the detection of the plurality of times, a sudden change in the voltage phase of the system is detected. It is possible to detect a shift from the interconnection operation to the islanding operation due to the one system stop.

【0103】したがって、系統電圧の位相の大きなずれ
の複数回(複数サイクル)の検出を条件とし、系統のノ
イズや負荷変動による誤検出を防止して電圧位相跳躍検
出方式で系統停止による分散電源1の単独運転への移行
を検出することができ、従来の系統電圧の位相急変に伴
う周期長の1回の変化から検出する場合に起りうる誤検
出がなく、信頼性の高い電圧位相跳躍検出方式の単独運
転検出方法を提供することができる。
Therefore, on condition that a large shift of the phase of the system voltage is detected a plurality of times (a plurality of cycles), erroneous detection due to system noise or load fluctuation is prevented, and the distributed power source 1 is stopped by the system stoppage in the voltage phase jump detection system. Is a reliable voltage phase jump detection method, which can detect the transition to islanding operation and eliminates the erroneous detection that can occur when detecting from a single change in the cycle length due to the conventional sudden change in system voltage phase. Can be provided.

【0104】そして、系統の検出電圧のサンプリング
は、サンプリング周波数を一定にして固定サンプリング
方式で行うことができ、この場合、検出のタイミング制
御等がPLL同期回路等を用いることなく簡単に行える
利点がある。
The sampling of the detection voltage of the system can be performed by a fixed sampling method with a constant sampling frequency. In this case, there is an advantage that detection timing control and the like can be easily performed without using a PLL synchronization circuit or the like. is there.

【0105】また、前記の固定サンプリング方式で行う
場合、電圧サンプリングデータから抽出した現サイクル
の系統基本波電圧成分と基準サイクルの系統基本波電圧
成分との系統基本波の周波数変動に基づく位相のずれを
補正して前記両電圧成分の位相を比較すると、検出精度
が著しく向上し、固定サンプリング方式により、極めて
信頼性の高い電圧位相跳躍検出方式の単独運転検出を行
うことができる。
When the above-mentioned fixed sampling method is used, the phase shift based on the frequency fluctuation of the system fundamental wave between the system fundamental wave voltage component of the current cycle and the system fundamental wave voltage component of the reference cycle extracted from the voltage sampling data. When the phase of the two voltage components is compared with each other, the detection accuracy is remarkably improved, and the isolated operation of the voltage phase jump detection method with extremely high reliability can be performed by the fixed sampling method.

【0106】さらに、系統の検出電圧のサンプリング
は、系統基本波の周波数に同期したサンプリング周波数
で行ってもよく、この場合は、前記の周波数変動に基づ
く誤差の補正演算を行うことなく、信頼性の高い電圧位
相跳躍検出方式の単独運転検出を行うことができる。
Further, the sampling of the detection voltage of the system may be performed at a sampling frequency synchronized with the frequency of the system fundamental wave. In this case, without performing the error correction calculation based on the frequency fluctuation, the reliability can be improved. Of the voltage phase jump detection method with high voltage can be performed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の1形態のブロック図である。FIG. 1 is a block diagram of one embodiment of the present invention.

【図2】図1の単独運転検出の説明用の波形図である。FIG. 2 is a waveform diagram for explaining the islanding operation detection of FIG. 1;

【図3】図1の演算処理部の電圧位相比較の説明図であ
る。
FIG. 3 is an explanatory diagram of a voltage phase comparison of an arithmetic processing unit in FIG. 1;

【図4】図1の演算処理部の位相ずれの判定の説明図で
ある。
FIG. 4 is an explanatory diagram of a determination of a phase shift by an arithmetic processing unit in FIG. 1;

【図5】図1の演算処理部の動作説明用のフローチャー
トである。
FIG. 5 is a flowchart for explaining the operation of the arithmetic processing unit in FIG. 1;

【図6】従来例の単独運転検出の説明用の波形図であ
る。
FIG. 6 is a waveform diagram for explaining detection of an isolated operation in a conventional example.

【符号の説明】[Explanation of symbols]

1 分散電源 2 単独運転検出装置 3 配電線 8 サンプル・ホールド回路 9 演算処理部 10 A/D変換器 REFERENCE SIGNS LIST 1 distributed power supply 2 islanding operation detection device 3 distribution line 8 sample and hold circuit 9 arithmetic processing unit 10 A / D converter

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 電力系統に連系運転される分散電源の系
統停止による前記連系運転から単独運転への移行を、前
記系統の電圧位相の急変から検出する電圧位相跳躍検出
方式の分散電源の単独運転検出方法において、 前記系統の検出電圧をサンプリングしてA/D変換し、 該A/D変換により得られた電圧サンプリングデータを
デジタルフィルタ処理して系統基本波電圧成分を抽出
し、 現サイクルより所定サイクル前の1サイクルを連系運転
位相の基準サイクルとして前記現サイクルの前記系統基
本波電圧成分の位相と前記基準サイクルの前記系統基本
波電圧成分の位相とをくり返し比較し、 該比較に基づき、前記現サイクルの前記系統基本波電圧
成分の位相の前記基準サイクルの前記系統基本波電圧成
分の位相からの設定値以上のずれを、2回以上の設定回
数検出したときに、前記電圧位相の急変を検出して前記
単独運転への移行を検出することを特徴とする分散電源
の単独運転検出方法。
1. A distributed power supply of a voltage phase jump detection system, which detects a transition from the interconnected operation to an isolated operation due to a system stop of a distributed power supply connected to an electric power system from a sudden change in a voltage phase of the system. In the islanding operation detection method, the detected voltage of the system is sampled and A / D converted, and voltage sampling data obtained by the A / D conversion is digitally filtered to extract a system fundamental wave voltage component. One cycle earlier than the predetermined cycle is set as a reference cycle of the interconnection operation phase, and the phase of the system fundamental voltage component of the current cycle and the phase of the system fundamental voltage component of the reference cycle are repeatedly compared. Based on the deviation of the phase of the system fundamental voltage component of the current cycle from the phase of the system fundamental voltage component of the reference cycle by a set value or more, Isolated operation detecting method of distributed power supply, characterized in that when more than the set number of times the detection times, detects the shift to the isolated operation by detecting an abrupt change of the voltage phase.
【請求項2】 電力系統の検出電圧のサンプリングを、
サンプリング周波数を一定にして固定サンプリング方式
で行うことを特徴とする請求項1記載の分散電源の単独
運転検出方法。
2. Sampling of a detection voltage of a power system,
2. A method according to claim 1, wherein the sampling frequency is fixed and the fixed sampling method is used.
【請求項3】 電圧サンプリングデータから抽出した現
サイクルの系統基本波電圧成分と基準サイクルの系統基
本波電圧成分との系統基本波の周波数変動に基づく位相
のずれを補正して前記両電圧成分の位相を比較すること
を特徴とする請求項2記載の分散電源の単独運転検出方
法。
3. A phase shift between the system fundamental voltage component of the current cycle extracted from the voltage sampling data and the system fundamental voltage component of the reference cycle based on the frequency fluctuation of the system fundamental wave is corrected. 3. The method according to claim 2, wherein the phases are compared.
【請求項4】 電力系統の検出電圧のサンプリングを、
系統基本波の周波数に同期したサンプリング周波数で行
うことを特徴とする請求項1記載の分散電源の単独運転
検出方法。
4. Sampling of a detection voltage of a power system,
2. The method for detecting the isolated operation of a distributed power supply according to claim 1, wherein the method is performed at a sampling frequency synchronized with a frequency of a system fundamental wave.
JP2001009692A 2001-01-18 2001-01-18 Method for detecting isolated operation of distributed power supply Expired - Lifetime JP3518511B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001009692A JP3518511B2 (en) 2001-01-18 2001-01-18 Method for detecting isolated operation of distributed power supply

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001009692A JP3518511B2 (en) 2001-01-18 2001-01-18 Method for detecting isolated operation of distributed power supply

Publications (2)

Publication Number Publication Date
JP2002218661A true JP2002218661A (en) 2002-08-02
JP3518511B2 JP3518511B2 (en) 2004-04-12

Family

ID=18877130

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001009692A Expired - Lifetime JP3518511B2 (en) 2001-01-18 2001-01-18 Method for detecting isolated operation of distributed power supply

Country Status (1)

Country Link
JP (1) JP3518511B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008054366A (en) * 2006-08-22 2008-03-06 Omron Corp Isolated operation detection device
JP2012026836A (en) * 2010-07-22 2012-02-09 Shindengen Electric Mfg Co Ltd Frequency detection method for distributed power source and system interconnection protection apparatus
JP2012029434A (en) * 2010-07-22 2012-02-09 Shindengen Electric Mfg Co Ltd Method for detecting phase jump in distribution type power source and system interconnection protecting apparatus
JP2015025726A (en) * 2013-07-26 2015-02-05 東芝三菱電機産業システム株式会社 Frequency detecting device, frequency detecting method, and electric power converter
JP2017028867A (en) * 2015-07-22 2017-02-02 日新電機株式会社 Isolated operation detection device and isolated operation detection method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101683967B1 (en) * 2014-06-13 2016-12-08 현대자동차주식회사 Controlling method of power converting device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008054366A (en) * 2006-08-22 2008-03-06 Omron Corp Isolated operation detection device
JP2012026836A (en) * 2010-07-22 2012-02-09 Shindengen Electric Mfg Co Ltd Frequency detection method for distributed power source and system interconnection protection apparatus
JP2012029434A (en) * 2010-07-22 2012-02-09 Shindengen Electric Mfg Co Ltd Method for detecting phase jump in distribution type power source and system interconnection protecting apparatus
JP2015025726A (en) * 2013-07-26 2015-02-05 東芝三菱電機産業システム株式会社 Frequency detecting device, frequency detecting method, and electric power converter
JP2017028867A (en) * 2015-07-22 2017-02-02 日新電機株式会社 Isolated operation detection device and isolated operation detection method

Also Published As

Publication number Publication date
JP3518511B2 (en) 2004-04-12

Similar Documents

Publication Publication Date Title
CN109067393B (en) Phase locking method, device and equipment of power system
JP4445114B2 (en) Jitter measuring apparatus and method
Cataliotti et al. A phase-locked loop for the synchronization of power quality instruments in the presence of stationary and transient disturbances
US8140283B2 (en) Independent frequency measurement and tracking
CN106872808B (en) A phase-sequence self-adaptive three-phase voltage phase-locked loop algorithm
EP2089725A2 (en) Advanced real-time grid monitoring system and method
JP2009300128A (en) Sampling synchronization device and sampling synchronization method
US7328114B2 (en) Methods and systems for measuring a rate of change of frequency
JP2017067543A (en) Synchronous phasor measuring device and pulse generating device
US7742884B2 (en) Sampling frequency control method and protective relay
JP3788212B2 (en) Harmonic detection method between orders
JP3518511B2 (en) Method for detecting isolated operation of distributed power supply
CN110768270B (en) Grid stability detection method and grid control system based on fast frequency identification
CN102832931A (en) Phase demodulation method, phase demodulation device and phase-locked loop based on incomplete period grid voltage signal
US11169211B2 (en) Systems, methods and apparatuses for frequency tracking
CN110763915B (en) Method for calculating voltage included angle and zero line current and three-phase electric energy meter
JP2002186167A (en) Sampling data processing method and relay using the processing method
Bergeest et al. Evaluation of the response of time-division multipliers to AC and DC input signals
JP2004156986A (en) Power failure detection device
Damdoum et al. Detection of faulty incremental encoder in a DFIM-based variable speed pump-turbine unit
Ruba et al. Simple and robust current sensor fault detection and compensation method for 3-phase inverters
US20050001661A1 (en) Digital phase locked loop
JP7330394B2 (en) Power meter
JP3507838B2 (en) Power fundamental wave phase detector
Zhang et al. An innovative timestamp-based convolution integral method in synchrophasor estimation within digital relays

Legal Events

Date Code Title Description
TRDD Decision of grant or rejection written
A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20040119

R150 Certificate of patent or registration of utility model

Ref document number: 3518511

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080206

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090206

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100206

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100206

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110206

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110206

Year of fee payment: 7

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120206

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130206

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140206

Year of fee payment: 10

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term