JP2002289988A - Wiring board and method of cutting wiring board - Google Patents

Abstract

(57) Abstract: The present invention relates to a wiring board that is cut into pieces by being cut at a predetermined cutting position and a method for manufacturing a semiconductor device using the wiring board, and reduces the equipment cost. It is another object to surely cut a wiring formed at a cutting position while cutting. SOLUTION: A plating board 12A is formed at a position where a cutting line 11 is formed, and the plating line 12A is cut and removed when cut and singulated by the cutting line 11. Oh, plating line 1
The pattern shape of 2A is a zigzag shape or a pattern similar to the zigzag shape.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a wiring substrate and a semiconductor device, and more particularly to a wiring substrate which is cut into pieces by cutting at a predetermined cutting position, and a semiconductor device using the wiring substrate. And a method for producing the same.

For example, a semiconductor chip is mounted on a circuit board such as a rigid board or a flexible board, and the semiconductor chip is sealed with a sealing resin. Then, the sealing resin is cut together with the circuit board by a blade. 2. Description of the Related Art A manufacturing method for manufacturing a semiconductor device is known.

[0003] Since the cutting process by the blade is a mechanical process, an error is necessarily generated in the cutting position. Therefore,
Even if an error occurs in the cutting position, there is a demand for a method capable of cutting the wiring board without functionally impairing.

[0004]

2. Description of the Related Art Generally, in a semiconductor device having a structure in which a semiconductor chip is mounted on a circuit board, so-called multi-cavity processing is performed in order to improve productivity and the like. FIG. 1 shows a circuit board 1 used in this type of semiconductor device manufacturing method. A plurality of semiconductor chips (not shown in the figure) are disposed on the circuit board 1, and these semiconductor chips are collectively resin-sealed with a sealing resin 2 (in FIG. The defined rectangular portion is the semiconductor device 4). The circuit board 1 is cut into individual pieces by cutting the cutting line 3 with a blade of a cutting processing device (dicer), whereby the semiconductor device 4 shown in FIG. 2 is manufactured.

FIG. 3 shows the circuit board 1 before a semiconductor chip is mounted. As shown in FIG. 1, device wirings 7 are formed in a predetermined pattern on a circuit board 1 in a formation region of each semiconductor device. This device wiring 7 is
It has a function of electrically connecting the semiconductor chip and the solder balls 5 and the like. This device wiring 7 is usually plated from the viewpoint of corrosion prevention and the like. The plating process for the wiring is performed using an electrolytic plating method.

At this time, if the power is supplied to each of the regions of the semiconductor device formed on the circuit board to perform the electrolytic plating, the plating process becomes complicated, so that all the device wirings 7 formed on the circuit board 1 are formed. Are connected by a lead-out wiring (hereinafter, referred to as a plating line 6), and the plating wiring 6 is used to collectively perform electrolytic plating on the device wiring 7.

However, this plating line 6 is necessary in the electrolytic plating process for the device wiring 7, but becomes unnecessary wiring when it is divided into individual semiconductor devices 4. For this reason, as shown in FIGS. 4 and 5, the plating line 6 is provided on the cutting line 3 for cutting the circuit board 1 when the semiconductor device 4 is singulated, and simultaneously when the cutting line 3 is cut. The plating line 6 is cut so that the device wiring 7 of each semiconductor device 4 is electrically independent. Conventionally, this plating line 6
Was formed linearly so as to be located in the linear cutting line 3.

[0008]

When the sealing resin 2 is provided, for example, the circuit board 1 to be cut shrinks, and the resin shrinks after the sealing resin 2 is formed. In addition, due to problems such as the accuracy of the cutting processing device (cutting accuracy, positioning accuracy, etc.), cutting cannot always be performed stably, and cutting deviation may occur. Conventionally, since the plating line 6 is linear as described above, the plating line 6 is left uncut when a cutting deviation occurs, and there is a risk that the device wiring 7 will be sheeted even after the cutting.

A specific example will be described with reference to FIGS.
FIG. 6 shows a cutting state in which a cutting shift does not occur, and FIG. 7 shows a cutting state in which a cutting shift occurs.
As shown in FIG. 6, when no cutting displacement has occurred, a cutting process is performed at the position where the plating line 6 is formed,
Therefore, the plating line 6 is completely removed. For this reason, the plating line 6 does not remain on the manufactured individualized substrate 8, and each device wiring 7 is in an electrically separated state.

On the other hand, if a cutting shift occurs, the position of the cutting line 3 shifts with respect to the position where the plating line 6 is formed. Now, it is assumed that the cutting line 3 is displaced from the normal position shown by the execution line in FIG. 5 in the direction of the arrow X1 and shifted to the position shown by the broken line in the drawing. When the cutting process is performed in this state, as shown in FIG.
In this case, the device wiring 7 is separated, but the plating line 6 remains on the substrate 8A after singulation, and the device wiring 7 remains short-circuited by the plating line 6.

In order to prevent the plating line 6 from remaining as shown in FIG. 7, it is necessary to increase the accuracy of the cutting line 3A, that is, the accuracy τ1 of the cutting position by the cutting processing device (hereinafter, this accuracy is referred to as required accuracy). There is. The required accuracy τ1 is
When the cutting width of the circuit board 1 (this cutting width is the blade width of the blade when a blade is used for cutting) is A, and when the width of the plating line 6 is B, τ1 = AB Can be represented. If the tolerance allowed for the cutting apparatus is α1, the cutting line 3 may be shifted in the direction of arrow X1 or shifted in the direction of arrow X2 in FIG. (AB) / 2.

When a double-sided board is used as the circuit board 1, it is necessary to consider the misalignment of the wiring formed on the front and back surfaces. Further, when a flexible board (FPC) is used as the circuit board 1, it is necessary to consider a positional shift between a wiring pattern formed on the board and a hole serving as a positioning reference. If these wiring errors (hereinafter referred to as wiring position errors C) are also to be reflected in the above required accuracy, the required accuracy τ1 is τ1 = A−B−C
And the tolerance α1 is α1 = τ1 / 2 = (ABC) /
It becomes 2.

Here, numerical values usually used for cutting the circuit board 1 are substituted into the above-mentioned equations. Usually, the blade width of the blade is 200 μm, the width of the plating line 6 is 70 m, and the position error C is about 40 μm, so that the required accuracy τ1 is 90 μm. Therefore, the tolerance α1 allowed for the cutting apparatus is a very small value of α1 = 45 μm.

In order to satisfy the tolerance α1, it is necessary to use a very expensive high-precision cutting apparatus, which increases equipment costs. If the tolerance α1 is not satisfied, as shown in FIG.
Remains, and there is a problem that the device wiring 7 is short-circuited.

The present invention has been made in view of the above points, and provides a wiring board and a method of cutting a wiring board which can surely cut a wiring formed at a cutting position while reducing equipment costs. The purpose is to:

[0016]

Means for Solving the Problems In order to solve the above problems, the present invention is characterized by taking the following means.

According to a first aspect of the present invention, there is provided a wiring board in which wiring is formed at a cutting position, and the wiring is cut and singulated by being cut at the cutting position. The wiring is formed in a zigzag shape or a wiring pattern similar to the zigzag shape.

According to the above invention, since the wiring pattern of the wiring formed at the cutting position is formed in a zigzag shape or a shape similar to the zigzag shape, when the circuit board is cut into individual pieces at the cutting position, The wiring formed at the cutting position can be reliably cut. Therefore, in each of the individualized wiring boards, it is possible to prevent other wirings connected to the wiring formed at the cutting position from short-circuiting.

According to a second aspect of the present invention, in the wiring board according to the first aspect, the wiring formed at the cutting position is a wiring for electrolytic plating.

Although the wiring for electrolytic plating is necessary in the process of manufacturing the circuit board, it is unnecessary when the wiring is divided into individual pieces, so that the application of the present invention is effective.

According to a third aspect of the present invention, there is provided a method for cutting a circuit board according to the first aspect of the present invention, wherein the circuit board is cut at the cutting position by using a cutting device, wherein the zigzag shape or the zigzag shape is formed. Assuming that the amplitude E of a similar wiring pattern is E and the cutting width provided in the cutting device is A,
The cutting process is performed so as to satisfy the tolerance α obtained by α = {(EA) / 2} + A.

According to the above invention, the cutting process is performed so as to satisfy the tolerance α calculated based on the amplitude E and the cutting width A of the wiring pattern, so that the wiring formed at the cutting position can be cut accurately. Can be.

According to a fourth aspect of the present invention, there is provided a method of cutting a circuit board according to the first aspect of the present invention, wherein the circuit board is cut at the cutting position by using a cutting device, wherein the zigzag shape or the zigzag shape is formed. Assuming that the amplitude E of the similar wiring pattern is E, the cutting width provided in the cutting device is A, the shape error of the wiring is F, and the position error of the wiring is C, α = [{(E−2F ) -A} / 2] + AC, the cutting process is performed so as to satisfy the tolerance α.

According to the above invention, in addition to the wiring pattern amplitude E and the cutting width A, the wiring shape error F and the position error C
In addition, since the cutting process is performed so as to satisfy the tolerance α calculated in consideration of the above, the wiring formed at the cutting position can be cut with higher accuracy.

[0025]

Next, embodiments of the present invention will be described with reference to the drawings. 8 to 12 are diagrams for explaining a circuit board 10A according to one embodiment of the present invention. FIG. 8 is an enlarged plan view showing the vicinity of the cutting line 11 of the circuit board 10A. FIG. 9 is a plan view showing substantially the entire circuit board 10A. FIGS. 10 and 11 are views showing a state where the circuit board 10A is divided into individual pieces. FIG. 12 is a view showing both the device wiring 13 formed on the front and back surfaces of the circuit board 10A.

The circuit board 10A is made of, for example, a rigid board (for example, FR-Fiber which combines glass fiber and epoxy resin).
R etc.), which is used as an interposer of a semiconductor device. As shown in FIG. 8, the circuit board 10A
The device wiring 13 is formed in a predetermined pattern. Further, as shown in FIG. 8, the circuit board 10A of this embodiment has device wirings 13 formed on the front surface and the back surface, respectively. In the figure, what is indicated by a dashed line is the device wiring 13 formed on the back surface.

The circuit board 10A of the present embodiment is also configured to perform so-called multi-cavity in order to improve productivity and the like. Therefore, a plurality of semiconductor device formation regions 23 are formed on the circuit board 10A (see FIG. 9), and each of the semiconductor device formation regions 23 is defined by a cutting line 11 to be cut later.

In this embodiment, a dicer having a blade is used as a cutting apparatus for cutting the circuit board 10A, but the width of the cutting line 11 is set to be equal to the width of the blade. Hereinafter, the width of the cutting line 11 (that is, the width of the blade) is referred to as a cutting width A. Usually, the cutting width A is about 200 μm.

On the other hand, the above-mentioned device wiring 13 is usually plated from the viewpoint of corrosion prevention and the like. The plating process for the wiring is performed using an electrolytic plating method. At this time, if power is supplied to each of the plurality of semiconductor device forming regions 23 formed on the circuit board 10A to perform electrolytic plating, the plating process becomes complicated.

For this reason, all the device wirings 13 formed on the circuit board 10A are connected by plating lines 12A, and a plurality of device wirings 13 are collectively subjected to electrolytic plating using the plating lines 12A. Is being done.

The present embodiment is characterized in that the wiring pattern of the plating line 12A has a zigzag shape. As shown in FIG. 8, in the present embodiment, the plating line 12A has a sawtooth wiring pattern.

Hereinafter, the zigzag plating line 12A is referred to as a zigzag plating line 12A. In addition, the zigzag shape of the sawtooth shape allows the zigzag plating line 12A to have a V-shaped corner portion 2.
4, the distance between the pair of adjacent corners 24 in the directions of arrows X1 and X2 in the drawing is referred to as amplitude E.

On the other hand, as described above, the zigzag plating line 12A is necessary in the electrolytic plating process on the device wiring 13, but becomes unnecessary after the circuit board 10A is divided into individual pieces. For this reason, in the present embodiment, the cutting line 11 is changed to the amplitude E of the zigzag plating line 12A.
Is arranged within the range. Specifically, the cutting line 11 has a center line 11A (indicated by a dashed line in FIG. 8) having a half of the amplitude E of the zigzag plating line 12A.
, That is, the zigzag plating line 12A
And the center of the cutting line 11 are set to coincide.

With this configuration, the cutting line 1
When cutting the circuit board 10A into individual pieces by cutting 1 with a blade,
At the same time, the zigzag-shaped plating line 12A is also cut, and as shown in FIG. 10, the device wiring 13 of the singulated substrate 15 can be electrically independent.

By the way, as described above, when the circuit board 10A is provided with, for example, a sealing resin for sealing the semiconductor chip 0, the sealing resin 2 contracts and the cutting device (dicer) cuts off. Due to problems such as accuracy and positioning accuracy,
There is a possibility that the cutting line 11 may be displaced from the amplitude center position of the zigzag plating line 12A. Conventionally, since the plating line 6 has a linear shape, the tolerance α1 required for the cutting processing device (dicer) is small, which causes a rise in equipment cost or an uncut portion of the plating line 6. It is on the street.

On the other hand, in the present embodiment, the zigzag plating line 12A has a zigzag wiring pattern. Therefore, when the circuit board 10A is cut along the cutting line 11, the zigzag plating line 12A is reliably cut. Therefore, it is possible to prevent the device wirings 13 from being short-circuited in the singulated substrate 15. Further, the tolerance required for the cutting processing device for cutting the circuit board 10A can be increased, and the equipment cost can be reduced. Hereinafter, the reason will be described.

After the cutting process, the accuracy of the cutting line 11 required to prevent the zigzag plating line 12A from remaining as shown in FIG. 8, that is, the accuracy τ2 (required accuracy) of the cutting position by the cutting processing device is as follows. Τ2 = EA from the cutting width A and the amplitude E. If the tolerance to be maintained during the cutting process is α2, the cutting line 11 may be shifted in the direction of the arrow X1 in FIG. 8 or may be shifted in the direction of the arrow X2, so that the tolerance α2 is α2 = (τ2 / 2) +
A = {(EA) / 2} + A.

Now, when the amplitude E of the zigzag plating line 12A is 300 μm and the cutting width A is 200 μm, α2
= 250 μm. Therefore, the tolerance α1 required for the conventional linear plating line 6 (45 μm in the above example).
m), the tolerance α2 (= 250 μm) can be greatly increased. As a result, the zigzag plating line 12 </ b> A can be reliably cut and the device wiring 13 can be made independent even in a cutting processing device with low processing accuracy, so that a short circuit occurs in the device wiring 13 while reducing equipment costs. Can be prevented.

On the other hand, as described above, in the circuit board 10A according to the present embodiment, as shown in FIG. 12, the device wiring 13 is formed on each of the front surface and the back surface. Therefore, when there is a displacement between the device wiring 13 formed on the front surface and the device wiring 13 formed on the back surface, the tolerance α1
, It is necessary to consider this displacement. Further, in the present embodiment, a rigid board is used as the circuit board 10A. However, when a flexible board (FPC) is used as the circuit board 10A, the wiring pattern formed on the board and the hole serving as a positioning reference are used. It is necessary to consider the displacement. Hereinafter, these wiring errors are referred to as wiring position errors C.

When the zigzag plating line 12A is formed, the line shape is a complicated zigzag shape.
The V-shaped corner portion 24 may not be an acute angle but may be curved to form a corner portion 14B (left side 2 in FIG. 8).
Corner portions 14B are formed at the two V-shaped corner portions). If the corner portion 14B is formed, an error occurs in the amplitude E of the zigzag plating line 12A (hereinafter, this error is referred to as a wiring shape error F).

In consideration of the wiring position error C and the wiring shape error F, the tolerance α3 allowed for the cutting apparatus is α3 = [{(E−2F) −A} / 2] + A−. C. Therefore, by using a cutting processing device that satisfies the tolerance α3, the device wiring 13 can be reliably made independent.

Specifically, the zigzag plating line 12
The amplitude E of A is 300 μm, the cutting width A is 200 μm, the wiring position error C is 40 μm, and the wiring shape error F is 30 μm.
Then, the tolerance α3 allowed for the cutting apparatus is α3 = 1.
80 μm. Therefore, when the wiring position error C and the wiring shape error F are also taken into consideration, the tolerance α3 (= 180 μm) is greatly increased compared to the tolerance α1 (45 μm) required for the conventional linear plating line 6. Can be raised.

As described above, by setting the tolerance α3 and the amplitude E in consideration of the wiring shape error F and the wiring position error C, the zigzag plating line 12A can be more accurately formed during the cutting process of the circuit board 10A. Can be cut well. Therefore, after the cutting process, the device wiring 1
3 can be reliably prevented from being short-circuited.

In the above-described embodiment, the plating line is formed in a sawtooth zigzag shape. However, the shape of the zigzag plating line 12A does not necessarily have to be a saw-tooth shape, and may be, for example, a rectangular zigzag plating line 12B as shown in FIG. Other shapes (this shape is called a wiring pattern similar to a zigzag shape) may be used.

FIG. 14 shows an example in which the present invention is applied to a method for manufacturing a semiconductor device 22. FIG. 14A shows a case where the circuit board 10 </ b> C on which the sealing resin 19 is provided is fixed to the fixing table 1.
8 shows the state fixed. A recognition mark 20 is formed on the circuit board 10C, and by detecting the recognition mark 20 with the camera 21, the cutting position is determined by the cutting processing device.

When the positioning process between the circuit board 10C and the cutting processing device is performed, the cutting processing device rotates the blade 25 and, as shown in FIG. 10C and the sealing resin 19 are cut at once. Thus, the semiconductor device 22 shown in FIG. 14C is manufactured.

In the case where wiring is formed on both the front and back surfaces of the circuit board, in the above example, the tolerance α3 was determined in consideration of the wiring position error C. However, the position error C of the wiring on the front and back surfaces poses a problem on the surface (the surface 27 shown in FIG. 14) opposite to the surface (the surface 26 shown in FIG. 14) on which recognition is performed by the cutting apparatus. Therefore, it is also possible to apply the present invention only to this surface 27. In this case, since there is no need to consider the positional deviation between the wiring formed on the surface 26 and the wiring formed on the surface 27, the tolerance α4 to be maintained by the cutting processing apparatus is the cutting width A and the width B of the zigzag plating line. Only required by. Specifically, the tolerance α4 to be maintained by the cutting apparatus is α4 = (A−B) / 2
Can be obtained by

[0048]

As described above, according to the present invention, when the circuit board is cut and cut into pieces at the cutting position, the wiring formed at the cutting position can be cut without fail. In each wiring board, it is possible to prevent other wirings connected to the wiring formed at the cutting position from short-circuiting.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining a circuit board which is an example of a related art.

FIG. 2 is a diagram showing a semiconductor device manufactured from the circuit board shown in FIG.

FIG. 3 is a diagram for explaining a detailed structure of a circuit board as an example of the related art.

FIG. 4 shows blade width A, plating line width B and tolerance α.
FIG.

FIG. 5 is an enlarged view showing the vicinity of a cutting line of a circuit board as an example of the related art.

FIG. 6 is a view showing a state in which a conventional circuit board is appropriately cut.

FIG. 7 is a diagram illustrating a problem that occurs in a conventional circuit board.

FIG. 8 is an enlarged view showing the vicinity of a cutting line of a circuit board according to an embodiment of the present invention.

FIG. 9 is a plan view showing a circuit board according to one embodiment of the present invention.

FIG. 10 is a view showing a state in which a circuit board according to an embodiment of the present invention is cut (part 1).

FIG. 11 is a view showing a state where a circuit board according to an embodiment of the present invention is cut (part 2).

FIG. 12 is a diagram for explaining a position error that occurs when wiring is formed on the front and back of the circuit board.

FIG. 13 is an enlarged view showing the vicinity of a cutting line of a circuit board according to a modification of the present invention.

FIG. 14 is a diagram illustrating a method for manufacturing a semiconductor device to which the present invention is applied.

[Explanation of symbols]

 Reference Signs List 10A to 10C Circuit board 11 Cutting line 12A, 12B Zigzag plating line 13 Device wiring 14A, 14B Corner portion 15, 15A, 15B Substrate after singulation 18 Fixed table 19 Sealing resin 20 Recognition mark 21 Camera 22 Semiconductor device

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Katsunori Wakuo No. 1 Nishigaoka, Murata-cho, Shibata-gun, Miyagi-gun, Miyagi Prefecture 1 Fujitsu-Miyagi Electronics Co., Ltd. (72) Inventor Masanori Takahashi Shibata-gun, Miyagi Fujitsu Miyagi Electronics Co., Ltd. (72) Inventor Michio Hayakawa 4-1-1, Kamidadanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture F-term (reference) 5E338 AA16 BB31 CC01 CC04 CC06 CD03 CD12 CD17 EE11 EE32

Claims (4)

[Claims] 1. A wiring board in which wiring is formed at a cutting position, and the wiring is cut and singulated by being cut at the cutting position, wherein the wiring has a zigzag shape. Alternatively, a wiring board formed of a wiring pattern similar to a zigzag shape. 2. The wiring board according to claim 1, wherein the wiring formed at the cutting position is a wiring for electrolytic plating. 3. A method for cutting a circuit board according to claim 1, wherein said circuit board is cut at said cutting position by using a cutting device, wherein said zigzag shape or an amplitude E of a wiring pattern similar to said zigzag shape is used. Wherein a cutting width provided in the cutting device is A, a cutting process is performed so as to satisfy a tolerance α obtained by α = {(E−A) / 2} + A. Method. 4. The method for cutting a circuit board according to claim 1, wherein the circuit board is cut at the cutting position using a cutting device, wherein the zigzag shape or the wiring pattern similar to the zigzag shape has an amplitude E. When the cutting width provided in the cutting device is A, the shape error of the wiring is F, and the positional error of the wiring is C, α = [{(E−2F) −A} / 2] + A A method for cutting a circuit board, comprising: performing a cutting process so as to satisfy a tolerance α obtained by -C.