JP2002270712A - Multilayer wiring board with built-in semiconductor element, device with built-in semiconductor element, and method of manufacturing them - Google Patents

Abstract

(57) Abstract: To provide a low-cost multi-layer wiring board with a built-in semiconductor element or a device with a built-in semiconductor, which does not cause trouble due to stress caused around the built-in semiconductor element. SOLUTION: A prepreg 13 having substantially the same composition as the lower wiring board 11 is bonded as an adhesive between a lower wiring board 11 made of an epoxy resin and glass fiber and a semiconductor element 16, and then the prepregs 13 are respectively placed thereon. Then, the intermediate wiring board 21 and the upper wiring board 31, which are cut out from the portion corresponding to the semiconductor element 16, are overlapped. The stacked products are loaded into a vacuum processing container 41, heated and pressurized, and the atmosphere is reduced in pressure. The lower wiring board 11, the intermediate wiring board 21, and the upper wiring board 31 are stacked, and the periphery of the semiconductor element 16 is removed. Is filled with the prepreg 13 and cured.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board with a built-in semiconductor element, a device with a built-in semiconductor element, and a method of manufacturing the same. More specifically, the present invention is less susceptible to thermal stress and mechanical stress and has a low cost. And a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, miniaturization of electronic devices has been progressing.
With the spread of mobile information terminals and mobile communication devices, further miniaturization of a wiring board including a semiconductor element is required, as well as improvement in reliability and cost reduction.
8 and 9 show a conventional multilayer wiring board 10 with a built-in semiconductor element.
0 is a view showing steps of a manufacturing method No. 0; FIG. As shown in FIG. 8A, an anisotropic or isotropic semiconductor element adhesive 1 in which conductive particles are blended in an adhesive region on a lower wiring substrate 11.
9 is applied, and as shown in FIG.
The bare semiconductor element 1 is connected to the connection portion 12 on the wiring pattern p.
6 are connected, and the semiconductor element 16 is mounted by heating and pressing. Then, as shown in FIG. 8C, the intermediate wiring board 2 in which a portion corresponding to the semiconductor element 16 is hollowed out.
The prepreg 13 is applied to the lower wiring substrate 11 on the lower surface of the first wiring substrate 11, and the prepreg 13 is applied to the lower surface of the upper wiring substrate 31 on the upper surface of the intermediate wiring substrate 21.

[0003] Next, as shown in FIG. 9A, the prepreg is collectively cured by heating and pressing a laminate of the lower wiring board 11, the intermediate wiring board 21, and the upper wiring board 31 so as to cure the prepreg. As shown in FIG. 9B, a multilayer wiring board 100 incorporating the semiconductor element 16 is formed. In the above description, the lower wiring board 11, the intermediate wiring board 21, and the upper wiring board 31 are generally made of epoxy resin. In this case, the semiconductor element adhesive (or adhesive film) 13 is also made of epoxy resin. A resin type is used.

In addition, Japanese Unexamined Patent Application Publication No. 11-45555 discloses, as shown in FIG.
08, the wiring circuit layer 204, the via hole conductor 20
A multi-layer wiring board 200 with a built-in element in which a void 203 is formed inside an insulating substrate 213 provided with a semiconductor device 9 and an electric element 205 such as a semiconductor element is mounted and housed is disclosed. Japanese Patent Application Laid-Open No. 9-199756 discloses a printed wiring board 302 having a wiring board 301 serving as a base, an adhesive sheet 304, a space 303 for mounting a semiconductor element, and two printed wiring boards as shown in FIG. Thermoplastic resin film 305,
Cushion material 3 with prepreg 306 arranged between 305
07 and heating and pressurizing, the void 303
Also disclosed is a printed wiring board 300 with a cavity for mounting a semiconductor element, in which the pressing force is transmitted evenly and the resin is prevented from flowing into the space 303.

[0005]

Originally, a semiconductor element is made of an inorganic substance such as silicon as a raw material, and a wiring board is generally made of a polymer material having a large thermal expansion coefficient. In order to make the coefficients close to each other, a large amount of an inorganic substance, for example, a glass material is mixed in the wiring board. On the other hand, an adhesive for a semiconductor element for connecting an electrode terminal of a semiconductor element to a wiring pattern of a wiring board is prepared by blending anisotropic conductive particles or isotropic conductive particles in consideration of conductivity. Therefore, even if the main material of the wiring board and the main material of the semiconductor element adhesive are the same (for example, epoxy resin), the conventional multi-layer wiring board with built-in semiconductor element 100 shown in FIGS. Adhesive 1 for connecting wiring substrate 11 and semiconductor element 16 to lower wiring substrate 11
9, the thermal expansion coefficient, the elastic modulus, the water absorption, and the like are different.
When a warp occurs on the wiring board due to thermal stress or mechanical stress during use by the user, the connection portion may open even if the warp is, for example, about 5 μm.
In addition, outgas from the wiring board and the adhesive material easily accumulates on the outer peripheral portion of the semiconductor element 16, and cracks are easily generated by repeated stress, and dew condensation is easily generated in the space. May occur. The above-mentioned adhesive for semiconductor elements is also expensive due to its conductivity.

The multilayer wiring board 200 with a built-in element disclosed in Japanese Patent Application Laid-Open No. 11-45555 and the printed wiring board 300 with a cavity for mounting a semiconductor element disclosed in Japanese Patent Application Laid-Open No. 9-199856 each have a void 203 or an empty space around a semiconductor element. Since the space 203 or the space 303 is different from the surrounding insulating substrate 213 or the printed circuit board 302, the space around the semiconductor element is sealed. Causes the stress as described above.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems. When a semiconductor element is incorporated, stress generated due to the use of a material having different physical properties for bonding between a wiring board and the semiconductor element may cause stress on the periphery of the semiconductor element. It is an object of the present invention to provide a low-cost multilayer wiring board with a built-in semiconductor element and a device with a built-in semiconductor element, in which stress generated due to the presence of a void is suppressed as much as possible, and a method for manufacturing the same.

[0008]

Means for Solving the Problems The above-mentioned problems can be solved by the constitutions of Claims 1 and 5, or Claims 4 and 8, and the means for solving them are as follows. .

According to a first aspect of the present invention, there is provided a multilayer wiring board with a built-in semiconductor element, wherein a plurality of stacked wiring boards made of a thermosetting resin, wiring patterns formed on the surface and inside of the wiring board, and via hole connections between the wiring patterns. In a multilayer wiring board with a built-in semiconductor element, in which a semiconductor element is mounted inside, a prepreg having substantially the same composition as the wiring board used for laminating the wiring board is formed by depressurizing the atmosphere under heat and pressure. The wiring board is filled and cured in the space formed around the wiring board. Since such a multi-layer wiring board with a built-in semiconductor element has no space around the built-in semiconductor element, it is free from the stress caused by the existence of the space, and does not cause trouble even if it is used for a long time. Provided is a stable multilayer wiring board with a built-in semiconductor element.

According to a second aspect of the present invention, there is provided a multi-layer wiring board with a built-in semiconductor element, wherein electrode terminals of the semiconductor element penetrate through a prepreg having substantially the same composition as a wiring board applied to the wiring board, and are connected on a wiring pattern. After connecting to the
This is a wiring board on which a semiconductor element is mounted by pressurizing and curing a prepreg. In such a wiring board, since the wiring board and the semiconductor element are applied with a prepreg having substantially the same composition as that of the wiring board as an adhesive, troubles due to a difference in physical properties between the lower wiring board and the adhesive are avoided. Does not occur. In addition, since an expensive conductive semiconductor element adhesive is not used, the cost is low.

According to a third aspect of the present invention, there is provided the multilayer wiring board with a built-in semiconductor element, wherein the electrode terminals of the semiconductor element are made of anisotropic or isotropic conductive particles applied to a connection portion on a wiring pattern of the wiring board. A wiring substrate on which a semiconductor element is mounted by penetrating a semiconductor element adhesive contained therein and being connected to a connection portion on a wiring pattern, and then heated and pressed to cure the semiconductor element adhesive. In such a wiring board, the use of the adhesive for the semiconductor element is limited only to the periphery of the electrode terminal of the semiconductor element. Therefore, even if there is a difference in the property values between the adhesive for the semiconductor element and the lower wiring board, a large trouble is caused. Does not lead to

According to a fourth aspect of the present invention, there is provided a semiconductor device built-in device, comprising: a plurality of laminated wiring boards made of a thermosetting resin; wiring patterns formed on the surface and inside of the wiring board; In a device with a built-in semiconductor element in which electronic components are mounted on a multilayer wiring board with a built-in semiconductor element in which a semiconductor element is mounted, a prepreg having substantially the same composition as the wiring board used for laminating the wiring boards is heated and heated. An electronic component is mounted on an outer surface of a multi-layer wiring board with a built-in semiconductor element formed by filling and hardening a space formed around a semiconductor element by decompression of an atmosphere under pressure. In such a device with a built-in semiconductor element, since there is no space around the semiconductor element, there is no stress caused by the existence of the space, and no trouble occurs even after long-term use.

According to a fifth aspect of the present invention, there is provided a method for manufacturing a multilayer wiring board with a built-in semiconductor element, comprising: a plurality of stacked wiring boards made of a thermosetting resin; a wiring pattern formed on the surface and inside of the wiring board; In the method of manufacturing a semiconductor element built-in multilayer wiring board having a via hole connecting portion and a semiconductor element mounted therein, a step of mounting the semiconductor element on the upper surface of the lower wiring board and an intermediate step in which a portion corresponding to the semiconductor element is hollowed out A step of applying a prepreg having substantially the same composition as the wiring board to at least the lower surface of the wiring board and superimposing the same on the lower wiring board, and a step of applying a prepreg to the lower surface of the upper wiring board and overlapping the intermediate wiring board,
Depressurizing the atmosphere under heat and pressure to laminate the lower wiring board, the intermediate wiring board, and the upper wiring, and filling a space formed around the semiconductor element with a prepreg and curing the prepreg. is there. Such a method of manufacturing a multilayer wiring board with a built-in semiconductor element has no space around the semiconductor element of the obtained wiring board with a built-in semiconductor element, and is thus free from the stress caused by the presence of the space. Provided is a stable multilayer wiring board with a built-in semiconductor element which does not cause trouble even when used.

According to a fifth aspect of the present invention, in the method of manufacturing a multi-layer wiring board with a built-in semiconductor element, the step of mounting the semiconductor element on the lower wiring board includes applying a prepreg to an upper surface of the lower wiring board and penetrating the prepreg. Then, after connecting the electrode terminals of the semiconductor element to the connection portion on the wiring pattern, the semiconductor device is heated and pressed to cure the prepreg. In such a manufacturing method, a prepreg having substantially the same composition as that of the wiring board is applied as an adhesive and cured, so that troubles due to a difference in physical properties between the lower wiring board and the adhesive do not occur. In addition, since an expensive conductive semiconductor element adhesive is not used, the cost can be reduced.

According to a fifth aspect of the present invention, in the method of manufacturing a multi-layer wiring board with a built-in semiconductor element, the step of mounting the semiconductor element on the lower wiring board includes anisotropic or isotropic connecting portions on the wiring pattern. After applying the adhesive for semiconductor element containing conductive particles, the electrode terminal of the semiconductor element penetrates the adhesive for semiconductor element and connects to the connection part on the wiring pattern, and then heat and pressure is applied to the adhesive for semiconductor element. This is a manufacturing method in which the material is cured. In such a manufacturing method, since the use of the adhesive for the semiconductor element is limited only to the periphery of the electrode terminal of the semiconductor element, even if there is a difference in the property values between the adhesive for the semiconductor element and the lower wiring board, a large trouble occurs. Does not tie.

According to a eighth aspect of the present invention, there is provided a method of manufacturing a device with a built-in semiconductor element, wherein a plurality of laminated wiring boards made of a thermosetting resin, wiring patterns formed on and inside the wiring board, and via holes between the wiring patterns. In the method for manufacturing a semiconductor element built-in device in which electronic components are mounted on a semiconductor element built-in multilayer wiring board having a connection part and a semiconductor element mounted therein, a step of mounting the semiconductor element on the upper surface of the lower wiring board, A step of applying a prepreg having substantially the same composition as the lower wiring substrate to at least the lower surface of the intermediate wiring substrate in which a portion corresponding to the semiconductor element is hollowed out and superimposing the prepreg on the lower wiring substrate, and applying the prepreg to the lower surface of the upper wiring substrate in the same manner. And lowering the atmosphere under heat and pressure to bond the lower wiring board, the intermediate wiring board and the upper wiring board And laminating, and a step of filling and curing a prepreg in a space formed around the semiconductor element, and a step of mounting electronic components on the outer surface of the formed multi-layer wiring board with a built-in semiconductor element. Manufacturing method. Such a method of manufacturing a device with a built-in semiconductor element is free from the stress caused by the existence of the space because there is no space around the semiconductor element, and is stable without causing any trouble even after long-term use. The present invention provides a device with a built-in semiconductor element.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION As described above, a multi-layer wiring board with a built-in semiconductor element of the present invention has a structure in which a prepreg having substantially the same composition as that of a wiring board is laminated with a reduced pressure of an atmosphere under heating and pressurization. It is manufactured by filling and curing the space formed around the semiconductor element, and the device with a built-in semiconductor element of the present invention is obtained by mounting electronic components on the outer surface of the multilayer wiring board with a built-in semiconductor element as described above. Manufactured.

In consideration of the lamination of the wiring boards to be used and the filling of the space around the semiconductor element at the time of lamination, the wiring board is mainly made of a thermosetting synthetic resin and has a thermal expansion coefficient as small as possible. Inorganic substances are used in order to make the thermal expansion coefficient close to the above. As the thermosetting synthetic resin, a polyimide resin, a phenol resin, an unsaturated polyester resin and the like are used in addition to an epoxy resin which is widely used. Further, glass fibers are used as chops, mats, or cloths as the inorganic material to be blended, but inorganic fibers other than glass may be used. Also,
When a mixture of glass fiber and thermosetting synthetic resin is used, the compounding ratio is represented by a volume ratio of 30 to 50% of thermosetting synthetic resin and 70 to 50% of glass fiber. Of course, it does not prevent adoption of other composition ratios.

A bare semiconductor element is used as a semiconductor element to be incorporated. One method of bonding the bare semiconductor element to a wiring board is to use a prepreg having substantially the same composition as the wiring board in the present invention. . That is, when the wiring board is an epoxy resin, a prepreg, which is a mixture of an uncured epoxy resin and glass fiber having substantially the same composition as the wiring board, is used as the adhesive. To apply the prepreg to the wiring board, the prepreg may be applied or supplied by a dispenser, and the application method is not particularly limited. Then, an electrode terminal (for example, a bump) of the semiconductor element is applied and penetrated to connect to a connection portion (for example, a pad) of a wiring pattern of the wiring board.

The heating temperature at which the uncured epoxy resin in the prepreg is heated, cured and bonded is between 150 and 250 ° C., usually between 180 and 210 ° C. The heating time at that time is between 10 seconds and 5 minutes, and usually 30-60 seconds is employed. The pressure varies depending on the number of electrode terminals provided on the semiconductor element. For example, a force of 0.3 to 0.6 Newton (N) is applied per bump. Therefore, for example, 200 mm
Approximately 60-120N when the number of bumps is provided
Force is applied. The magnitude of this force is determined by confirming whether or not the gap between the semiconductor element and the wiring board is at least 10 μm, preferably about 20 μm, after the bonding operation is completed. It is set by confirming whether there is electrical conduction between the element and the wiring board. The prepreg used for the adhesive is heated and pressed, cured and integrated with the wiring board, so that there is naturally no trouble as in the case where materials having different physical properties coexist.

Another method of bonding a semiconductor element to a wiring board according to the present invention is to use an adhesive for a semiconductor element in which conductivity is taken into consideration only around electrode terminals of the semiconductor element. For example, the adhesive for semiconductor element is applied only to the connection part on the wiring pattern of the wiring board, and the electrode terminal of the semiconductor element is applied to the connection part, and the connection is made to the connection part of the wiring pattern, and then heated and pressed. The semiconductor device adhesive is cured. In this way, the amount of the semiconductor element adhesive used is reduced to a small amount. The periphery of the semiconductor element is thereafter filled with a prepreg having substantially the same composition as that of the wiring board and cured, so that the influence of the difference in the physical properties between the used semiconductor element adhesive and the wiring board hardly appears.

On the lower wiring substrate to which the semiconductor element is adhered, an intermediate wiring substrate having a portion corresponding to the semiconductor element is superimposed, and an upper wiring substrate is further superimposed thereon and laminated.
Although a semiconductor element is built in, a prepreg having substantially the same composition as the wiring board is used as an adhesive for lamination. The prepreg is applied to the lower surface side of each of the intermediate wiring substrate and the upper wiring substrate. However, the intermediate wiring substrate may be applied to both upper and lower surfaces, and the surface to which the prepreg is applied can be arbitrarily selected.

The heating and pressurization of the lower wiring board, the intermediate wiring board, and the upper wiring board, which incorporate the semiconductor element and are overlapped via the prepreg, can be reduced by a vacuum pump.
It is performed in a vacuum processing vessel that can be heated and pressurized. That is, the lower wiring board, the intermediate wiring board, and the upper wiring board are laminated by heating and pressing, and at the same time, the prepreg for lamination is filled and cured so as not to leave a space around the semiconductor element. The degree of vacuum during decompression is 0.1 to
1 Pascal (Pa). The wiring board with a built-in semiconductor element obtained in this manner has a form in which a bare semiconductor element is packaged with the wiring board.

A capacitor element, a resistor element, a filter element, an oscillation element and other various electronic parts are surface-mounted on a wiring pattern formed on the outer surface of the semiconductor element built-in multilayer wiring board formed as described above. This makes it possible to manufacture a semiconductor device with a built-in semiconductor element having various functions and having a small volume and operating without trouble for a long period of time.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a multilayer wiring board with a built-in semiconductor device, a device with a built-in semiconductor device, and a method of manufacturing the same according to the present invention will be described in detail with reference to the drawings.

(Embodiment 1) FIGS. 1 and 2 are views showing a method of manufacturing a multi-layer wiring board 10 incorporating a semiconductor device according to Embodiment 1. FIG. Lower wiring board 11 and intermediate wiring board 2 shown in FIG.
1. The upper wiring board 31 is a wiring board of 160 mm × 160 m size composed of a plurality of laminated layers, a wiring pattern p formed by etching a copper foil on the surface and inside, and a via hole connecting between the wiring patterns p. The connection portion v is formed in advance. 1 and 2
(The same applies hereinafter), the thickness is enlarged to explain the inside, and the actual thickness is about 1 mm when laminated. Further, a through hole h is formed in the intermediate wiring board 21 by cutting out a portion corresponding to the bare semiconductor element 16 to be incorporated. The lower wiring board 11, the intermediate wiring board 21, and the upper wiring board 31,
The middle and bottom are relative positional relationships at the time of lamination, and have no special meaning.

As shown in FIG. 1A, a prepreg 1 having the same composition as that of the lower wiring board 11 is attached to the bonding area of the lower wiring board 11 made of epoxy resin mixed with glass fiber and cured.
3 is applied, and connected to the connection part (for example, pad) 12 of the wiring pattern p of the lower wiring substrate 11 by penetrating the electrode terminal (for example, bump) 17 of the semiconductor element 16. continue,
As shown in FIG. 1B, the prepreg 13 is heated and pressed.
Is cured, and the semiconductor element 16 is bonded. The heating temperature is 180-200 ° C. and the heating time is 30-60 seconds.
The pressure is applied to the semiconductor device 16 having 200 electrode terminals 17 with a force of 60 to 120 Newtons (N).

Next, as shown in FIG. 1C, a similar prepreg 13 is applied to the lower surface of the intermediate wiring board 21 in which a portion corresponding to the semiconductor element 16 is hollowed out to form the lower wiring board 11.
Then, the same prepreg 13 is applied to the lower surface of the upper wiring substrate 31 to overlap the intermediate wiring substrate 21. At this time, a space 18 is inevitably formed around the semiconductor element 16. In FIG. 1, the prepreg 13 before curing is indicated by a hatch (oblique line) from upper left to lower right, and the prepreg 13 heated and cured is indicated by a hatch from upper right to lower left.

Then, as shown in FIG. 2A, the atmosphere in which the lower wiring board 11, the intermediate wiring board 21, and the upper wiring board 31 are stacked is heated and pressurized in the vacuum processing vessel 41 to reduce the atmosphere. As a result, the prepreg 13 is cured, and the lower wiring board 11, the intermediate wiring board 21, and the upper wiring board 31 are integrally laminated, and the prepreg 1
3 is filled in the space 18 around the semiconductor element 16 and thermally cured. The heating and pressurizing at this time are under the same conditions as the heating and pressurizing of FIG. 1B, and the atmosphere is 0.1 to 1 Pascal (P
a) It is performed under reduced pressure. In addition, the heating and pressurization of the epoxy resin system described below or the heating and pressurization under reduced pressure are also the same. As a result, as shown in FIG. 2B, a multilayer wiring board 10 having a size of 160 mm × 160 m and a thickness of about 1 mm in which the semiconductor element 16 is embedded without leaving a space around it is obtained.

(Embodiment 2) FIGS. 3 and 4 are views showing a method of manufacturing a multi-layer wiring board 10 'incorporating a semiconductor element according to Embodiment 2. FIG. In the second embodiment, as shown in FIG. 3A, application of a prepreg 13 having the same composition as that of the lower wiring board 11 to the bonding region including the wiring pattern p of the lower wiring board 11 is the same as in the first embodiment. , As shown in FIG.
The electrode terminal 17 of the bare semiconductor element 16 is connected to the wiring pattern p.
The second embodiment is different from the first embodiment in that the prepreg 13 is semi-cured by heating and pressurizing after being connected to the pad 12, and the semiconductor element 16 is temporarily bonded. Then, as shown in FIG.
The intermediate wiring board 21 is overlaid on the lower wiring board 11 via the prepreg 13, and the upper wiring board 31 is overlaid thereon via the prepreg 13.

Then, the vacuum processing container 41 shown in FIG.
The semiconductor element 1 is heated and pressurized and depressurized in the
6 and the prepreg 13 for lamination are cured and the lower wiring board 1 is cured.
1. The intermediate wiring board 21 and the upper wiring board 31 are laminated, and the prepreg 13 for lamination is filled into the space 18 around the semiconductor element 16 and cured. Thereafter, the substrate is taken out of the vacuum processing container 41, and as shown in FIG. 4B, a multilayer wiring board 10 ′ with a built-in semiconductor element is obtained.

In the method in which the semiconductor element 16 is only temporarily bonded in the initial stage as in the second embodiment, it takes time to cure the semiconductor element 16 as in the first embodiment (in the first embodiment, the curing reaction is performed twice. ) To reduce the manufacturing time. However, depending on the type of the prepreg to be used, the electrical connection between the semiconductor element 16 and the lower wiring board 11 may be lost by the subsequent processing in the temporary bonding, so that careful consideration is required in implementation.

(Embodiment 3) FIGS. 5 and 6 are views showing a method of manufacturing a multi-layer wiring board with a built-in semiconductor element, which is different from the manufacturing methods of the first and second embodiments. In the first and second embodiments, the bare semiconductor element 16 is adhered to the lower wiring substrate 11 by the prepreg 13 over the entire surface. In the third embodiment, the conductive property is limited to only the electrode terminals 17 of the semiconductor element 16. This is a method in which the lower wiring substrate 11 and the semiconductor element 16 are adhered to each other using an adhesive 19 for a semiconductor element.

As shown in FIG. 5A, the semiconductor element adhesive 13 is applied only to the connection portion 12 on the wiring pattern p of the lower wiring board 11 to which the semiconductor element 16 is to be joined. As described above, the electrode terminals 17 of the semiconductor element 16 are buried in the adhesive 19 for the semiconductor element, penetrated and brought into contact with the connection portions 12 on the wiring pattern p, and the adhesive 19 for the semiconductor element is cured by heating and pressing. Semiconductor element 1
6 is adhered. Next, as shown in FIG. 5C, the intermediate wiring board 21 in which a portion corresponding to the semiconductor element 16 is hollowed out.
A prepreg 13 having substantially the same composition as that of the wiring board is applied to the lower surface of the lower wiring substrate 11, and the same prepreg 13 is applied to the lower surface of the upper wiring substrate 31 to overlap the intermediate wiring substrate 21. At this time, the semiconductor element 1
A space 18 is inevitably formed around 6.

Then, as shown in FIG. 6A, a stack of the lower wiring board 11, the intermediate wiring board 21, and the upper wiring board 31 is loaded into a vacuum processing container 41, and heated and heated.
Each wiring board 11, 21, 31 is pressurized and the atmosphere is reduced in pressure.
6B, and the prepreg 13 is filled in the space 18 and cured, thereby obtaining a semiconductor element built-in multilayer wiring board 10 ″ in which the semiconductor element 16 is embedded without leaving a space, as shown in FIG. 6B. However, this process is exactly the same as in the first embodiment.

(Embodiment 4) FIG. 7 shows a capacitor element 5, a resistance element 6, and a filter element 7 on a wiring pattern p on the outer surface of a multilayer wiring board 10 with a built-in semiconductor element obtained in Example 2.
FIG. 3 is a view showing a device 20 with a built-in semiconductor element obtained by mounting the semiconductor device by a normal surface mounting technique.

Although the present invention has been described with reference to the embodiments, it is needless to say that the present invention is not limited to these, and various modifications can be made based on the technical concept of the present invention.

For example, in this embodiment, for example, 160
Although the manufacturing steps of the flat multi-layer wiring board 10 with a built-in semiconductor element having a size of 160 mm × 160 mm have been described with reference to the drawings, in the actual process, the lower wiring board, the intermediate wiring board, and the upper wiring board are, for example, 160 mm × 160 mm.
The multi-layer wiring board 10 with a built-in semiconductor element 10 of a size may be manufactured by a sheet having a size capable of taking a plurality of sheets (for example, 6 to 24 sheets). In addition, processing may be performed with a plurality of sheets, and isolation may be performed in a step of incorporating a semiconductor element.

In this embodiment, the case where only one semiconductor element is incorporated in the laminated multilayer wiring board is shown, but two or more semiconductor elements may be incorporated. Further, the semiconductor element and other electronic components may be independently incorporated. In this embodiment, the case where the semiconductor element is bonded to the lower wiring board when the lower wiring board, the intermediate wiring board, and the upper wiring board are stacked and stacked is described. In this case, the wiring board to which the semiconductor element is bonded may be a wiring board other than the lower wiring board.

In this embodiment, the lower wiring board,
The copper foil wiring patterns of the intermediate wiring board and the upper wiring board are not shown to have a roughened surface for improving the adhesion to the opposing wiring board, but they are to be performed as necessary. In the fourth embodiment, the electronic components are mounted on both sides of the multilayer wiring board with built-in semiconductor elements. However, it goes without saying that the mounting may be performed on only one side.

[0041]

The multilayer wiring board with a built-in semiconductor element, the device with a built-in semiconductor element, and the method of manufacturing the same according to the present invention are implemented in the form described above, and have the following effects.

According to the first aspect of the present invention, no space exists around the built-in semiconductor element, and the semiconductor element is surrounded by a material having substantially the same composition as the wiring board. Is free from the stress caused by the existence of space around the semiconductor element and the coexistence of materials having different physical properties, for example, mechanical stress caused by bending, etc., and thermal stress caused by rising and falling temperatures. In addition, during the manufacture of the multi-layer wiring board with a built-in semiconductor element and during the practical use by the end user, the above-mentioned trouble caused by the stress does not occur.

According to the multi-layer wiring board with a built-in semiconductor element of the second aspect, since the wiring board and the semiconductor element are bonded using the prepreg having substantially the same composition as the wiring board as the adhesive.
There is no difference in physical properties between the adhesive and the wiring board, and no trouble based on the difference in physical properties occurs. In addition, since an expensive conductive semiconductor element adhesive is not used, the cost is low. According to the multi-layer wiring board with built-in semiconductor element of the third aspect, since the adhesive for the semiconductor element in consideration of conductivity is used only around the electrode terminal of the semiconductor element, the time when the semiconductor element is completely built-in is completed. Therefore, most of the periphery of the semiconductor element is covered with a thermosetting resin composition having substantially the same composition as the wiring board, and even if there is a difference in physical property values between the adhesive for the semiconductor element and the wiring board, Almost no trouble occurs.

According to the semiconductor device built-in device of the fourth aspect,
Since there is no space around the built-in semiconductor element, there is no relation to the stress generated by the presence of the space, for example, mechanical stress due to bending or the like and thermal stress due to rising and falling temperatures.

According to the method of manufacturing a multi-layer wiring board with a built-in semiconductor element according to the fifth aspect, the semiconductor element can be built in without leaving a space around the semiconductor element, and the semiconductor element has substantially the same composition as the wiring board. Since it can be surrounded by a material, the multi-layer wiring board with a built-in semiconductor element to be manufactured is generated by stress such as bending due to the existence of a space around the semiconductor element and the coexistence of materials having different physical property values. It is free from mechanical stress and thermal stress generated by rising and falling temperatures. During the manufacture of multi-layered wiring boards with built-in semiconductor elements and during practical use by end users, troubles caused by the above-mentioned stresses are avoided. Do not generate.

According to the method of manufacturing a multi-layer wiring board with a built-in semiconductor element according to the sixth aspect, the prepreg having substantially the same composition as the wiring board is used as an adhesive when the lower wiring board and the semiconductor element are bonded. In the multilayer wiring board with a built-in semiconductor element, the physical property values of the wiring board and the adhesive are the same, and no trouble occurs due to the difference in the physical property values. In addition, since an expensive conductive semiconductor element adhesive is not used, the cost can be reduced. According to the method for manufacturing a multilayer wiring board with a built-in semiconductor element according to the seventh aspect, when bonding the lower wiring board and the semiconductor element, the adhesive for the semiconductor element in consideration of conductivity is limited only to the periphery of the electrode terminal of the semiconductor element. Since the multi-layer wiring board with a built-in semiconductor element is used, the periphery of the semiconductor element is almost completely covered with the same composition as the wiring board, and the difference in physical property value between the adhesive for the semiconductor element and the wiring board is obtained. Even if there is some trouble, there is almost no trouble.

According to the method of manufacturing a device with a built-in semiconductor element according to the eighth aspect of the present invention, since no space is left around the built-in semiconductor element, the manufactured device with a built-in semiconductor element is free from stress caused by the existence of the space. For example, it is free from mechanical stress generated by bending or the like and thermal stress generated by rising and falling temperatures, and during the manufacture of a device with a built-in semiconductor element and during practical use in an end user.
Does not cause trouble caused by stress.

[Brief description of the drawings]

1 is a sectional view showing steps of a method for manufacturing a multilayer wiring board with a built-in semiconductor element according to the method of Example 1 together with FIG. 2; FIG. 1A shows a state in which a prepreg is applied to a lower wiring board for bonding a semiconductor element; B is a state in which the semiconductor element is connected to a predetermined position and is heated and pressed to cure the prepreg, C
Indicates a state in which the intermediate wiring board to which the prepreg is applied and the upper wiring board are overlapped.

FIG. 2 shows a step subsequent to FIG. 1, wherein A shows a state in which the atmosphere is depressurized by heating and pressurizing the superimposed lower wiring board, intermediate wiring board, and upper wiring board in a vacuum processing container;
B shows the obtained multilayer wiring board with a built-in semiconductor element.

3 is a cross-sectional view showing steps of a method for manufacturing a multilayer wiring board with a built-in semiconductor element according to the method of Embodiment 2 together with FIG. 4; FIG. 3A shows a state in which a prepreg is applied to a lower wiring board for bonding a semiconductor element; B indicates a state in which the semiconductor element is connected to a predetermined position and is semi-cured, and C indicates a state in which the intermediate wiring board to which the prepreg is applied and the upper wiring board are overlapped.

FIG. 4 shows a step subsequent to FIG. 3, in which, as in FIG. 2, A is a state in which the pressure is reduced by heating and pressurizing in a vacuum processing vessel;
B shows the obtained multilayer wiring board with a built-in semiconductor element.

5 is a sectional view showing a step of a method for manufacturing a multilayer wiring board with a built-in semiconductor element according to the method of Embodiment 3 together with FIG. 6; FIG. 5A shows a state in which a conductive adhesive for bonding a semiconductor element is applied to a lower wiring board; B is a state in which the semiconductor element is connected to a predetermined position, and the conductive adhesive is cured by heating and pressing, and C is an intermediate wiring board and an upper wiring board to which a prepreg is applied, respectively. This shows a state of superimposition.

FIG. 6 shows a step following FIG. 5, in which A is a state where the pressure is reduced by heating and pressurizing in a vacuum processing vessel, as in FIG. 2,
B shows the obtained multilayer wiring board with a built-in semiconductor element.

FIG. 7 is a cross-sectional view showing a semiconductor element built-in device in which electronic components are mounted on the outer surface of a semiconductor element built-in multilayer wiring board.

8 is a cross-sectional view showing a step of a method for manufacturing a multilayer wiring board with a built-in semiconductor element according to a conventional method together with FIG. 9; FIG. 8A shows a conductive adhesive applied to a lower wiring board for bonding a semiconductor element; A state B is a state where the semiconductor element is connected to a predetermined position and heated and pressed to cure the conductive adhesive, and a state C is a state where the intermediate wiring board to which the prepreg is applied and the upper wiring board are overlapped.

FIG. 9 shows a step following FIG. 8, in which, as in FIG. 2, A is a state in which the pressure is reduced by heating and pressurizing in a vacuum processing vessel;
B shows the obtained multilayer wiring board with a built-in semiconductor element.

FIG. 10 is a cross-sectional view of an element-containing multilayer wiring board according to another conventional example.

FIG. 11 is a cross-sectional view of a printed circuit board with a cavity for mounting a semiconductor element according to another conventional example.

[Explanation of symbols]

11 ... lower wiring board, 13 ... prepreg, 16 ...
Semiconductor element, 17 ... electrode terminal, 18 ... space, 19 ...
... Conductive semiconductor element adhesive, 21... Intermediate wiring board, 31... Upper wiring board, 41.

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H05K 3/46 H01L 23/12 N (72) Inventor Nobuhiro Hanai 9-15-22 Hongo-cho, Minokamo-shi, Gifu Sony Minokamo Co., Ltd. (72) Inventor Toshihiro Murayama 6-35 Kita Shinagawa, Shinagawa-ku, Tokyo Sony Corporation F-term (reference) 5E346 AA02 AA04 AA12 AA22 AA43 BB16 CC04 CC08 CC09 CC10 CC12 CC13 CC32 CC42 DD32 EE02 EE06 EE07 EE09 EE18 FF01 GG28 HH11 HH32 5F044 KK07 LL09 RR17 RR18 RR19

Claims (8)

[Claims] 1. A semiconductor device comprising: a plurality of laminated wiring boards made of a thermosetting resin; wiring patterns formed on the surface and inside of the wiring board; and via-hole connecting portions between the wiring patterns. In the multi-layer wiring board with a built-in semiconductor element, a prepreg having substantially the same composition as that of the wiring board used for laminating the wiring board is formed around the semiconductor element by reducing the atmosphere under heating and pressure. A multilayer wiring board with a built-in semiconductor element, wherein the multilayered wiring board is filled and cured in a space. 2. After the electrode terminals of the semiconductor element penetrate the prepreg applied to the wiring board and are connected to the connection portions on the wiring pattern, the prepreg is heated and pressurized to cure the prepreg. The multilayer wiring board with a built-in semiconductor element according to claim 1, wherein the semiconductor element is mounted. 3. The connection on the wiring pattern, wherein an electrode terminal of the semiconductor element penetrates a semiconductor element adhesive containing anisotropic or isotropic conductive particles applied to a connection portion on the wiring pattern. 2. The multi-layer wiring board with a built-in semiconductor element according to claim 1, wherein the semiconductor element is mounted after being connected to the part, and then the adhesive for the semiconductor element is cured by heating and pressing. 4. A semiconductor device comprising: a plurality of laminated wiring boards made of a thermosetting resin; wiring patterns formed on the surface and inside of the wiring board; and via-hole connecting portions between the wiring patterns. In a semiconductor device built-in device in which electronic components are mounted on a semiconductor device built-in multilayer wiring board on which is mounted, a prepreg having substantially the same composition as the wiring board used for laminating the wiring board is heated under an atmosphere under heat and pressure. A semiconductor wherein an electronic component is mounted on an outer surface of the multi-layer wiring board with a built-in semiconductor element formed by filling and hardening a space formed around the semiconductor element by decompression; Device with built-in element. 5. A semiconductor device comprising: a plurality of laminated wiring boards made of a thermosetting resin; wiring patterns formed on the surface and inside of the wiring board; and via-hole connecting portions between the wiring patterns. A step of mounting the semiconductor element on the upper surface of the lower wiring board; and forming a front wiring board on at least the lower surface of the intermediate wiring board in which a portion corresponding to the semiconductor element is cut out. A step of applying a prepreg having substantially the same composition to the lower wiring board, and a step of applying the prepreg to the lower surface of the upper wiring board in the same manner, and overlapping the intermediate wiring board, under heating and pressure. The atmosphere is reduced in pressure, and the lower wiring board, the intermediate wiring board, and the upper wiring board are stacked and formed around the semiconductor element. And curing by filling the prepreg in a space are, manufacturing method of the semiconductor-embedded multilayer wiring substrate characterized by comprising the. 6. The step of mounting the semiconductor element on the lower wiring board, wherein the prepreg is applied to an upper surface of the lower wiring board, and an electrode terminal of the semiconductor element penetrates the prepreg and is placed on the wiring pattern. 6. The method according to claim 5, wherein the step of heating and pressurizing the prepreg after the connection with the connection portion cures the prepreg. 7. The step of mounting the semiconductor element on the lower wiring board, the step of applying a semiconductor element adhesive containing anisotropic or isotropic conductive particles to a connection portion on the wiring pattern; After the electrode terminals of the element penetrate the adhesive for the semiconductor element and are connected to the connection portions on the wiring pattern, the step of heating and pressurizing the adhesive for the semiconductor element is performed. A method for manufacturing the multilayer wiring board with a built-in semiconductor element according to claim 5. 8. A semiconductor device comprising: a plurality of laminated wiring boards made of a thermosetting resin; wiring patterns formed on the surface and inside of the wiring board; and via-hole connecting portions between the wiring patterns. In the method for manufacturing a semiconductor device with a built-in semiconductor element in which electronic components are mounted on a multilayer wiring board with a built-in semiconductor element on which a semiconductor element is mounted, a step of mounting the semiconductor element on an upper surface of a lower wiring board; Applying a prepreg having substantially the same composition as the lower wiring substrate to at least the lower surface of the hollowed-out intermediate wiring substrate, and superimposing the prepreg on the lower wiring substrate; applying the prepreg to the lower surface of the upper wiring substrate in the same manner, A step of superimposing on an intermediate wiring board, and reducing the atmosphere under heating and pressurization to reduce the atmosphere of the lower wiring board, the intermediate wiring board, and the upper wiring. Bonding and laminating a board, filling the prepreg into a space formed around the semiconductor element and curing the prepreg, and mounting an electronic component on an outer surface of the formed multilayer wiring board with a built-in semiconductor element. A method of manufacturing a device with a built-in semiconductor element, comprising: