JP2002261077A - Dry etching method - Google Patents

Abstract

An object of the present invention is to provide a semiconductor device having a silicide structure, which prevents deterioration of transistor characteristics caused by an increase in sheet resistance of a silicide film, and a method for manufacturing the semiconductor device. [MEANS FOR SOLVING PROBLEMS] To solve the above problems, the present invention provides:
A semiconductor device and a method for manufacturing a semiconductor device, comprising removing a contaminated layer and a damaged layer by taking in and removing a contaminated layer and a damaged layer generated before a silicide film is formed in a silicon oxide film by a thermal oxidation method. .

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for dry-etching a silicon oxide film capable of suppressing the occurrence of contamination and damage to a silicon material as an underlayer.

[0002]

2. Description of the Related Art As high integration and high performance of semiconductor integrated circuits have progressed as seen in recent ULSIs and the like, technical requirements have also been placed on a dry etching method for a silicon compound layer represented by SiO _2. Increasingly severe. First, there is a demand for the device area to be enlarged and the wafer to have a large diameter due to the high integration, and for the processing to be highly miniaturized in the pattern to be formed and the uniformity in the wafer surface to be improved. Therefore, the mainstream of the dry etching apparatus is shifting from the conventional batch type to the single-wafer type. Since the junction depth of the impurity diffusion region has become shallower and various material layers have become thinner in order to increase the speed and miniaturization of the device, an etching technology that is superior in selectivity to the base and has less damage than before has been developed. Has been requested.

However, it is extremely difficult to establish an etching process that satisfies all of the characteristics such as high speed, high selectivity, and low damage.

Conventionally, in order to keep a high selectivity with respect to a silicon substrate while maintaining an SiO ₂ layer or dry etching,
CHF ₃ gas, CF ₄ / H ₂ mixed gas, CF ₄ / O
₂ mixed gas, C ₂ F ₆ / CHF ₃ mixed gas, etc.
It has been used as a gas for etching.

[0005] These all have a C / F ratio (C
It is mainly composed of a fluorocarbon-based gas having a ratio of the number of atoms to the number of F atoms) of 0.25 or more.

[0006] These gas systems are used in (a)
(B) CF, which is the main etching species of the SiO ₂ layer, has a function of generating C—O bonds on the surface of the SiO ₂ layer by C contained in the fluorocarbon-based gas and cutting or weakening the Si—O bond. _x ⁺ (especially x = 3,4) can be produced, and (c) the oxygen in the SiO ₂ is removed in the form of CO or CO ₂ while a relatively carbon-rich state is created in the plasma. , A carbon-based polymer is deposited on the surface of the silicon-based material layer due to the contribution of C, H, F, and the like contained in the gas-based material, the etching rate is reduced, and a high selectivity to the silicon-based material layer is obtained. Based on the reason. The concept of the C / F ratio and the etching mechanism described above are described in J. Vac.
Sci. Tech., 16 (2), 1979, p391.

[0007] Japanese Patent Application Laid-Open No. Hei 5-3177 discloses that S plays the role of C in conventional etching of SiO ₂ -based materials and performs low-temperature etching to provide high selectivity, low contamination, and high anisotropy. Proposal of technology to achieve sexuality.

[0008] This is because in contact hole processing,
In a first step of etching the SiO ₂ interlayer insulating film within a range not exceeding its thickness, S ₂ F ₂ gas is used,
_{In the second} step, the remaining portion of the _two- layer insulating film is etched and over-etched. In the second step, the etching is performed by using an S ₂ F ₂ / N ₂ mixed gas at a low etching rate, and will be described with reference to FIG. I do. As shown in FIG. 3A, an SiO ₂ interlayer insulating film 13 is formed on the single crystal silicon 11 on which the impurity diffusion region 12 has been formed in advance, and an opening is formed as an etching mask for the SiO ₂ interlayer insulating film 13. A resist pattern 14 having 14a is formed. Next, as shown in FIG. 3B, etching was performed while cooling the single-crystal silicon substrate 11 by using an RF bias application type magnetic field microwave plasma etching apparatus so as to be maintained at −60 ° C.

The etching conditions are such that the flow rate of the S ₂ F ₂ gas is 10
0 sccm, gas pressure 1.3 Pa (10 mTorr),
The microwave power is 850 W, and the interlayer insulating film 1
3 was etched to a depth of about 0.9 μm.

In the first step of this etching, S ₂ F ₂
The radical reaction due to F generated in the plasma by the discharge dissociation of the gas causes the etching to proceed by a mechanism assisted by ions such as SF _x ⁺ and S ⁺ , and the SiO ₂ interlayer insulating film 13 becomes SiF _x , SO _{x and the} like. Etched in the form of

At this time, a first sidewall protective film 15 mainly composed of carbon-based polymer or the like derived from S released from S ₂ F ₂ and a decomposition product of the resist pattern 14 is formed on the pattern sidewall. The formed contact hole 13a having a vertical wall is formed halfway.

The sulfur fluoride etches the SiO ₂ -based material layer by a mechanism that assists a radical reaction due to F radicals with sulfur such as SF _x ⁺ .

Further, these sulfur fluorides have a large S / F ratio (the ratio of the number of S atoms to the number of F atoms in the molecule) to SF _6, which is the best known, even for the same sulfur fluoride. Free S can be generated in the plasma by dissociation.

This S is O on the surface of the SiO ₂ material layer.
The atoms are extracted and removed in the form of SO _x , but are deposited on the Si-based material layer to greatly reduce the etching rate, so that a high selectivity is achieved. Further, S deposited on the side wall of the pattern in which normal incidence of ions does not occur in principle plays a role of protecting the side wall and contributes to anisotropic processing.

Next, as shown in FIG. 3C, in the second etching step, the remaining portion of the SiO ₂ interlayer insulating film 13 is etched by using an S ₂ F ₂ / N ₂ mixed gas.
In this step, the contribution of N ⁺ formed from N ₂ is also added,
The remaining portion of the SiO2 interlayer insulating film 13 is composed of SiF _x , SO _x , N
It is removed in the form of O _x . RF compared to the first step
The reduced power results in less carbon-based polymer formation. As a result, S
A second sidewall protection film 16 is formed, and the underlying impurity diffusion region 12 has a deposited film 1 mainly composed of (SN) _n.
7 is formed to prevent and protect the F radicals from entering the underlying impurity diffusion region 12.

Finally, as shown in FIG. 3D, after peeling the resist, anisotropic contact holes without particle contamination can be formed.

As described above, etching of a SiO ₂ material is performed based on a mechanism mainly based on an ion assist reaction, and a process using a fluorocarbon gas has already been introduced into a mass production line.

However, in a process using a conventional carbon-based polymer, although there is an advantage that no contamination is left on the surface, physical damage due to implantation of SF _x ⁺ , contamination by S atoms inside a silicon substrate, and However, it has not solved problems such as generation of lattice defects accompanying the above.

In order to solve this problem,
The mainstream is to include a step of performing a light etch after the etching of the O ₂ -based material layer is completed to remove the surface layer of the silicon substrate.

[0020]

However, as the junction depth of the impurity diffusion region becomes shallow as in recent years,
Since the removal amount of the silicon substrate by the light etching reaches a level that cannot be ignored, there is a problem that the range of contamination and damage exceeds the junction depth.

Therefore, the present invention is to solve the above-mentioned problem, and to provide a method capable of suppressing the occurrence of contamination and damage to the underlying silicon-based material layer when etching the SiO ₂ -based material layer with a fluorocarbon-based gas. It is.

[0022]

In order to solve the above-mentioned problems, the substrate to be etched is controlled at a temperature of room temperature or lower, and a mixed gas of a fluorocarbon-based gas and another gas is used.
A first step of resist-patterning the silicon oxide film on the substrate, and the step of removing a reaction product generated by the etching remaining on the substrate to be etched into a plasma atmosphere of a non-etching gas for the substrate and the silicon oxide film; And a second step of removing inside.

In the dry etching method, the non-etching gas is either oxygen or argon.

Further, there is provided a dry etching method wherein the etching gas in the first step contains C ₄ F ₈ and any one of CO, O ₂ and Ar.

Further, the dry etching method is characterized in that the first step and the second step are performed in a vacuum state by switching an etching gas.

The pressure in the second step is 20
A dry etching method characterized by being at most 0 mTorr.

According to the above-described dry etching method,
Impulse due to ion energy during etching can be reduced, and immediately after the silicon surface is exposed to plasma
By reacting with oxygen radicals in -situ, impurities can be easily and completely removed.

Therefore, it is possible to avoid contamination and damage to the underlying silicon during etching of the SiO ₂ -based material.

[0029]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a view showing an embodiment in which the present invention is applied to a SiO ₂ mask forming step for controlling a salicide forming region. As shown in FIG. 1A, a single crystal silicon substrate 1 on which an impurity diffusion region 2 is formed
O2 insulating film 3 is formed, which is further resist pattern 4 is formed with an opening 4a as an etching mask of the SiO ₂ insulating film 3. Here, the SiO
The two insulating films 3 are deposited to a thickness of about 50 nm by, for example, a CVD method. Next, the silicon substrate 1 is set on a wafer mounting electrode of a magnetic field excitation type reactive ion etching apparatus. The wafer mounting electrode has a built-in cooling pipe, and a cooling equipment such as a chiller installed outside the apparatus supplies and circulates an appropriate coolant to the cooling pipe to maintain the wafer being etched at a predetermined temperature. It is possible to do. Here, ethylene glycol was used as a coolant, and the single crystal silicon substrate 1 was set to be maintained at 15 ° C., and a C ₄ F ₈ flow rate of 3 sccm and a C
O flow rate 15 sccm, Ar flow rate 105 sccm, gas pressure 60 mT, RF power 450 W, applied magnetic field 10 Gauss
Under the condition of s, the SiO ₂ insulating film 3 was completely etched.
In the first etching step, etching proceeds by a mechanism in which a radical reaction caused by F radicals generated in plasma by discharge dissociation of C ₄ F ₈ is assisted by ions such as CF _x ⁺ and C ⁺ , and SiO ₂ insulation is performed. The film 3 is made of SiF _x , CO
Removed in _second magnitude. At this time, on the silicon substrate 1, there are impurities mainly composed of F released from C ₄ F ₈ and carbon-based polymers derived from decomposition products of the resist pattern 4 on the pattern side wall. At this time, the etching rate is about 100 nm / min.

Next, a second etching is performed. The etching conditions are as follows: O ₂ flow rate 100 sccm, gas pressure 100
mTorr, RF power 300 W, time is about 20 seconds. O2 generated from O ₂ by this second etching
The impurities existing on the silicon substrate 1 are removed by the contribution of the radicals. At this time, since the RF power is reduced by the first etching, the dissociation reaction of C ₄ F ₈ is suppressed, and the damage of the low molecular compound such as F or C in the depth direction of the silicon substrate 1 is suppressed. . As a result, as shown in FIG. 1 (b), an impurity layer 5 consisting mainly CF _x is on the silicon substrate 1 is formed on the silicon substrate 1. Subsequently, at the same time when the first etching is completed, the supply of the etching gas is stopped without turning off the RF power and the applied magnetic field, and either the oxygen gas or the argon gas is introduced into the etching chamber for about 20 seconds. After exposing the substrate to a plasma atmosphere, the discharge is turned off (dechucked) to remove impurities on the outermost surface.

After completion of the etching, the silicon substrate 1 is transferred to a plasma ashing apparatus, and the resist pattern 4 is removed by O ₂ plasma ashing. This removal is based on decomposition by combustion and heating, and a salicide-forming mask 3a having a good shape can be formed without generating particle contamination.

SIM is applied to the silicon substrate processed by etching the SiO ₂ insulating film in this embodiment.
FIG. 2 shows the results of the S analysis. (A), (b),
The condition (c) is a condition that optimizes the dechucking sequence, which is indispensable for the etching process using the electrostatic chuck. The condition (a) has an etching time of about 3 seconds and no gas introduction (used during etching). Condition only), no pressure control, no RF power control Condition (b): Etching time: 20 seconds, Ar gas flow rate: 1
00 sccm, pressure 100 mT, RF power 300 W Condition (c): etching time 20 seconds, O ₂ gas flow rate 1
The pressure was 100 sccm, the pressure was 100 mT, and the RF power was 300 W.

According to the results shown in FIG. 2, the F ion amount (count value) of the fluorine-based film formed on the surface of the silicon substrate is 17105 in the condition (a) and 8 in the process (b).
104, and about 52% by introducing Ar gas.
It can be seen that it decreases. In condition (c), F
The ion amount (count value) is 1104, and F is formed on the silicon substrate surface by introducing O ₂ gas.
It can be seen that the ion amount is reduced by about 95%.

After completion of the first etching step, formation of a damaged layer formed on the surface of the single-crystal silicon substrate into which impurities are introduced and a concave portion formed by etching the single-crystal silicon substrate are performed using a TEM (transmission electron transmission). No abnormalities were observed from the result of observation under a microscope.

[0036]

According to the present invention, in dry etching of a SiO 2 -based material, it is possible to easily form a damaged layer on at least the surface of the underlying single crystal silicon substrate and to remove an etching product, thereby reducing contact resistance. It is possible to greatly improve the electrical characteristics of the device.

Further, only by optimizing the dechucking sequence, which is indispensable for the etching process using the electrostatic chuck, the gas types and apparatuses conventionally used can be used as they are, so that the practicality is high. , The throughput does not decrease.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a manufacturing process of a semiconductor device showing an etching method of the present invention.

FIG. 2 is a graph showing F ion analysis values on a single crystal silicon substrate after performing a second etching step of the present invention.

FIG. 3 is a cross-sectional view of a manufacturing process of a semiconductor device showing a conventional etching method.

[Explanation of symbols]

Single crystal silicon substrate 2 diffusion region 3 SiO ₂ insulating film 3a salicide mask fourth resist pattern 4a opening 5 impurity layer

Claims (5)

[Claims] A first step of controlling the temperature of the substrate to be etched to a temperature equal to or lower than room temperature and patterning a resist using a mixed gas of a fluorocarbon-based gas and another gas to etch a silicon oxide film on the substrate; A second step of removing a reaction product generated by the etching remaining on the substrate to be etched in a plasma atmosphere of a non-etching gas with respect to the substrate and the silicon oxide film. Method. 2. The dry etching method according to claim 1, wherein the non-etching gas is one of oxygen and argon. 3. The etching gas in the first step is C
₄ F ₈ and CO, the dry etching method according to claim 1, comprising either of the O _2, Ar. 4. The dry etching method according to claim 1, wherein the first step and the second step are performed in a vacuum state by switching an etching gas. 5. The pressure in the second step is 200 m
2. The dry etching method according to claim 1, wherein the pressure is equal to or less than Torr.