JP2002240261A - Print buffer memory controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a print buffer memory controller in which raster column conversion can be effected using a raster column converter smaller than that for all colors and all nozzles without complicating the timing control even when the inter-color distance is not equal to an integer times of the width of the raster column converter. SOLUTION: In the print buffer memory controller, data lines of I/F 1 comprising a Centronics I/F or a USB I/F are inputted to the data control circuit 3 of an ASIC 2. Data lines of I/O to the data control circuit 3 are also connected with a memory 6, a raster column converter 7, and a parallel/series converter 4. An address outputted from an address generating circuit 5 in the ASIC 2 is connected with the memory 6 through an address bus.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a printing buffer memory control device.

[0002]

2. Description of the Related Art Conventionally, a printing buffer memory control device of this type has a raster column converter for each color in an ink jet serial printer in which a plurality of nozzles form different nozzle rows. Is transmitted.

In this method, raster data is fetched from an image memory into a raster column converter immediately before printing of a nozzle of each color, and the data fetched into the raster column converter is stored for a print timing corresponding to the width of the raster column converter. In order to transmit necessary column data at each printing timing, raster column converters are required for the number of colors, and the greater the number of nozzles for each color, the larger the resources of the raster column converter.

For example, in the case of a head having 128 nozzles of each color and three colors, as shown in FIG. 8, a raster column converter for storing 128 raster data and outputting column data in accordance with printing timing is required for three colors. It is. Raster column converters do not require raster and column sizes to be equal, so in such cases per color,
Eight blocks of raster column converters of 16 × 16 size are prepared to hold data of 128 rasters in the nozzle direction and 16 columns in the printing direction, or 32 × 32
A raster column converter having a size of is prepared so as to be able to hold data of 128 rasters in the nozzle direction and 32 columns in the printing direction.

There is also a method in which raster column conversion is performed in accordance with the printing timing of the nozzle row of each color, and the converted column data is stored in a buffer memory. In this method, the raster column conversion timing of each color must be separately controlled, and the execution timing of the raster column conversion sequence is different, and the timing control circuit is complicated. In order to simplify the timing control circuit in this method, the inter-color distance between the nozzle rows of each color may be multiplied by an integer times the width of the raster column converter. However, there is a problem in that the head is restricted.

For example, in the case of an 8-nozzle head for each color and a two-color head, the timing at which raster data is fetched into raster column conversion is as follows: color 1 before printing the first dot, and color 2 before the printing of the A dot. is there. 8 × 8 raster column converter
If the size is, 8
Column data for the print timing can be prepared.

Here, when the distance between colors 1 and 2 is different from the width of the raster column converter as shown in FIG. 9, the timing at which raster data is taken into the raster column converter changes for each color. Since the position at which the column data is taken out at the printing timing differs for each color, control of these timings becomes complicated. If the distance between the colors is an integral multiple of the width of the raster column converter, the control of these timings will be simple, but this will limit the design and manufacture of the head.

[0008]

A first problem with the conventional print buffer memory control device is that as the number of head colors and the number of nozzles for each color increase, the size of the raster column converter increases. And the scale of the LSI becomes large.

The reason is that the column data to be sent to the head in accordance with the printing timing is held in the raster column converter for all colors and all nozzles.

A second problem is that when the distance between the colors is different from an integral multiple of the width of the raster column converter, the raster data is fetched into the raster column converter or the column data is output from the raster column converter. This means that the timing control of the take-out becomes complicated.

The reason for this is that control is performed to extract column data from the raster column converter and transfer it to the head in accordance with the print timing.

An object of the present invention is to use a raster column converter smaller than a raster column converter for all nozzles of all colors to control timing even when the inter-color distance is other than an integral multiple of the width of the raster column converter. An object of the present invention is to provide a print buffer memory control device capable of performing raster column conversion without making it complicated.

[0013]

According to the present invention, there is provided a print buffer memory control apparatus for an ink jet serial printer in which a plurality of nozzle groups of a plurality of colors are arranged at a distance of an integral multiple of a minimum print dot interval. Print data to be sent to the print head at one print timing is stored in an area specified by one ROW address in the head buffer memory.

Further, the printing buffer memory control device of the present invention is characterized in that the printing data subjected to the raster column conversion is temporarily held in the head buffer memory until a timing to use for printing comes.

Further, the printing buffer memory control device of the present invention is characterized in that the maximum value of the memory address used for the head buffer memory is a power of 2 minus 1.

Further, the printing buffer memory control device of the present invention is characterized in that the ROW address of the memory used as the head buffer memory and the order of the printing timing correspond one to one.

Further, the printing buffer memory control device of the present invention has a plurality of addition amount setting registers, and a selector for selecting one of the addition amounts output from the register.
The address generator includes an adder that adds the selected addition amount to an address currently output to the memory, and an output address latch register that holds an output of the adder.

Further, the printing buffer memory control device of the present invention increases the ROW address of the memory for reading the printing data to be sent to the head according to the printing timing,
When the ROW address of the memory reaches the maximum value of the memory used for the head buffer, the ROW address of the memory is set to the minimum value of the memory used for the head buffer.

Further, the printing buffer memory control device of the present invention can control the horizontal size of the raster column converter, that is, the next raster column conversion during the printing timing of the number of columns obtained by one raster column conversion. Is performed.

[0020]

Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. Referring to FIG. 1, in a print buffer memory control device according to this embodiment, a Centronics I / F or USBI
The data line of the I / F 1 including / F and the like is input to the data control circuit 3 of the ASIC 2. The data lines that are input / output to / from the data control circuit 3 are also connected to the memory 6, the raster column converter 7, and the parallel-serial converter 4. ASIC2
The address output from the internal address generation circuit 5 is connected to the memory 6 via an address bus.

The inside of the address generation circuit 5 comprises a ROW address generation section 50 and a COL address generation section 500 as shown in FIG.

In the ROW address generation unit 50, the outputs of the plurality of addition amount setting registers 51, 52,
It is connected to the. The selector 54 selects one of the addition amount setting registers 51, 52, 53, and
5 to one input. The output of the adder 55 is latched by an output address latch register 56. The output of the output address latch register 56 is connected to the other input of the adder 55.

In the COL address generating section 500, the color 1 C
The OL address 501 and the color 2 COL address 502 are switched by the selector 503 and output to the memory 6.

When storing the print data from the external I / F 1 to the memory 6, the data control circuit 3 reads out the raster print data stored in the memory 6 and inputs it to the raster column converter 7. When the column format data of the output of the column converter is taken out and written in the head buffer area of the memory, when the print data read from the head buffer is written in the parallel-serial converter 4,
The connection of the data line is switched correspondingly.

Referring to FIG. 3, which is an internal configuration diagram of an SDRAM which is a type of the memory 6, there are a plurality of COL addresses in an area indicated by one ROW address.
By specifying the address and the COL address, a specific area in the memory can be specified to store and read data.

FIG. 4 is a diagram for explaining the head of this embodiment, and FIG. 5 is a schematic diagram of a raster column converter.
FIG. 6 showing the relationship between print timing and raster column conversion, FIG. 7 which is an explanatory diagram of a buffer memory, and FIG. 1, FIG. 2, and FIG. The operation will be described.

FIG. 4 is a perspective view of the nozzle on the lower side of the head 8 as viewed from above the head 8. There are two nozzle rows, color 1 and color 2, which are spaced 10 times the minimum print dot spacing. At the time of printing, the head 4 advances from left to right as indicated by an arrow A. Therefore, it is the color 1 nozzle row that first reaches the top of the paper and prints dots. Each row has eight nozzles. Eight vertical dots can be printed at one printing timing.

FIG. 5 is a schematic diagram of a raster column converter. In this embodiment, an 8 × 8 converter is assumed. When this converter captures raster data having a horizontal length of 8 bits eight times, column data for eight print timings of the eight nozzle head 4 can be prepared. SDR
The raster data read from the AM is sequentially stored in raster rows 1 to 8 of the raster column converter. When writing the output of the raster column converter to the head buffer, the data of the column columns a to h of the raster column converter are sequentially read and stored in the SDRAM.

FIG. 6 is a diagram showing the relationship between print timing and raster column conversion. The upper row is a section where raster column conversion is performed before print timing 1. Raster data is taken in from color 1 and color 2 in the image memory area, converted into column data, and stored in the head buffer. The lower row shows print timings 9 to 1 which are the next raster column conversions between print timings 1 to 8.
6 indicates that raster column conversion for 6 is performed. During eight printing timings that can be prepared by one raster column conversion, column data for the next eight printing timings is prepared by raster column conversion.

FIG. 7 is an explanatory diagram of the buffer memory. 1
At the end of the second raster column conversion, the column data of color 1 is changed from ROW addresses 0 to 7 as shown in FIG.
The column data of color 2 is stored at addresses 10 to 17 which are separated by the inter-color distance 10. The column data of color 1 to be printed on the paper first is the print timing 1
Are stored in the area of ROW addresses 0 to 7 corresponding to. The color 2 comes to the position where printing is performed on the paper only when the head 8 advances by 10 printing timings in the printing direction.
It is stored in the area of addresses 10 to 17. The data of color 1 and color 2 are stored in areas of the same ROW address but different COL addresses.

Referring also to FIG. 1, raster image data received by the I / F 1 is stored in the image data area of the memory 6 via the data control circuit 3 in the ASIC 2. At the time of raster column conversion, raster data is read from the image data area of the memory 6 and sequentially written to the raster column converter 7. After writing the raster data for eight rows, the column data for eight columns is extracted and stored in the head buffer area of the memory 6. At this time, the address of the memory is stored in the address generation circuit 5.
, And the column data is written so that the print timing and the ROW address correspond to each other.

FIG. 2 shows an address generation circuit for generating an address when writing column data to the head buffer.
Is also referred to, the addition amount setting registers 51, 52,
53 includes “+1” for calculating a ROW address corresponding to the next print timing of the current address, and data of the nozzle group of the next color when the processing of the column data for the width of the raster column converter 7 is completed. "10-7 = 3" for calculating the ROW address for storing the column data, and the column for the next raster column conversion of the first color when the processing of the column data of the second color is completed by the width of the raster column converter 7. Calculate the ROW address for storing data "7 + 1-17 = (-
9) "is set in advance.

Referring also to FIG. 3, which is an internal configuration diagram of the memory, a specific area of the memory can be designated by a ROW address and a COL address, and data at that address can be read and written. In this embodiment, it is assumed that 8-bit data can be stored in one address.

When printing is started, the column data in the buffer memory is sequentially read from ROW address 0 and transferred to the head 8. In this embodiment, the ROW address of the buffer memory has one-to-one correspondence with the print timing.

Before starting printing, the first raster column conversion is performed. First, color 1 is converted. During the raster column conversion of color 1, the selector 54 selects +1 and operates so that the buffer address increases in order from 1. When the eight column data are written into the head buffer, the selector 54 sets +3
To generate a ROW address of 10, which is the head address of the buffer memory in which the column data of color 2 is written. Thereafter, during the raster column conversion of color 2, +1 is selected, and eight column data of color 2 are written into the buffer memory allocated to a part of the memory 6. Color 2
When the eight column data of (1) have been written into the buffer memory, the selector 54 selects -9 and prepares to write the column data of color 1 from address 8 of the buffer memory.

In this embodiment, the COL address at the time of writing column data to the buffer memory starts from 0 for color 1 and from 2 for color 2. Therefore, the maximum value of each color nozzle that can be printed at one printing timing is 8
This is 16 dots, which is twice the bit. The maximum value of the actual COL address is 511 or 1023 depending on the configuration of the memory. Also, the number of bits of data that can be stored in one address can take a value of 16, 32, or 64.

When the first raster column conversion is completed, data of color 1 is written into the buffer memory at COL addresses 0 of ROW addresses 0 to 7 corresponding to print timings 1 to 8, respectively, as shown in FIG. ing. The color 2 is written to the COL addresses 2 of the ROW addresses 10 to 17 corresponding to the print timings 11 to 18, respectively.

Color 1 is ROW at print timings 1 to 8
Data at addresses 0 to 7 is used for printing. Color 1 is printed because the column data is written at this address. However, for the color 2, since the column data is not written from ROW addresses 0 to 7, the printing timing 1
No prints are made from 8 to 8.

During the printing timings 1 to 8, the next raster column conversion is performed in parallel with the printing. As shown in FIG. 7 (b), the column data for the print timings 9 to 16 of the color 1 after the raster column conversion is stored in the COL address 0 of the ROW addresses 8 to 15 and the print timing 1 of the color 2
Column data for 9 to 26 is written to COL address 2 of ROW addresses 18 to 25.

From 9 to 16 of the print timing, since the column data of the color 1 already converted into the raster columns is included in the ROW addresses 8 to 15, printing is performed based on the data. Since the color 2 has column data at addresses 10 to 15, printing is performed based on the column data at print timings 11 to 16. That is, printing is performed at the printing timing in which the nozzle row of color 1 and the nozzle row of color 2 are shifted by the distance 10 between colors.

As shown in FIG. 7 (c), raster column conversion of color 1 and color 2 is also performed between the print timings 9 and 16, and the column data of color 1 are respectively stored in the ROW addresses 16 to 23 and the color data. Column data of 2 is written to ROW addresses 26 to 31 and ROW addresses 0 to 1.

Since the maximum value of the capacity of the buffer memory is a power of 2 minus 1, the address 0 is followed by the address 0.
And the buffer memory can be used cyclically.

When the maximum value 31 of the ROW address of this embodiment is represented by a binary number, which is 1_1111b, adding 1 to the address 31, ie, 1_1111b, results in 10_0000b, which is 32 in decimal. However, since the output of the adder is only 5 bits in the internal circuit, 10_0000b is 0_0000b and the upper 1 bit is discarded and the address returns to 0.

At print timings 9 to 16, RO
Since the column data stored at the W addresses 0 to 7 has been used at the print timings 1 to 8, there is no problem that the column data is overwritten by the next column data.

Here, the RO for writing to the buffer memory
How the W address changes is described in order from 0 to 31, which are actual ROW addresses.

Color 1 Color 2 0 1 2 3 4 5 6 7 10 11 12 13 14 15 16 17 First raster column conversion 8 9 10 11 12 13 14 15 18 19 20 21 22 23 24 25 Second raster column Conversion 16 17 18 19 20 21 22 23 26 27 28 29 30 31 0 1 Third raster column conversion 24 25 26 27 28 29 30 31 2 3 4 5 6 7 8 9 Fourth raster column conversion 0 1 2 3 4 5 6 7 10 11 12 13 14 15 16 17 Fifth raster column conversion Focusing on the added amount of addresses, the increment of the ROW address during raster column conversion is +1 and the raster column conversion for one color is completed. The increment of the ROW address when moving to the next color is +3, and the increment of the ROW address when returning to the first color after raster column conversion for two colors is completed is -9.

These three values are added to the addition amount setting register 5
If they are set to 1, 52, and 53, raster column conversion for the head 8 of this embodiment is performed.

The distance between the colors can be set to any value in the addition amount setting registers 51, 52, and 53. Therefore, the distance between the nozzle rows of color 1 and color 2 can be changed from the ROW address range of the head buffer to the raster column. It can be arbitrarily set within the value obtained by subtracting the column width of the converter.

In this embodiment, one print timing data is stored in the area of the memory indicated by one ROW address.
If there are not enough OL addresses, multiple consecutive ROWs
A control method for storing one print timing data in a memory area indicated by an address is also conceivable.

When there are a plurality of colors, column data for a plurality of colors can be stored in one ROW address by preparing the selectors of the COL address generation circuit and the COL address values for the number of colors. Becomes

Even when the distance between the colors is different,
Since an addition amount setting register corresponding to each color is provided and each of the inter-color distances is set in each register, it is possible to easily cope with the distance.

[0053]

As described above, the effect of the present invention is as follows.
Even if the distance between the colors of the nozzle rows is not an integral multiple of the raster column width, the printing column data can be stored in the ROW address corresponding to the printing timing of the nozzle group of each color in the head buffer. Means that it is sufficient to simply increase the ROW address one by one and read out the printing column data.

Even if the distance between colors changes due to the replacement of the head, it is possible to cope only by rewriting the value set in the inter-color distance register.

Further, since only one raster column converter is required, the resources can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of the present invention.

FIG. 2 is a block diagram illustrating an address generation circuit that generates an address when writing column data to a head buffer according to the embodiment;

FIG. 3 is a diagram illustrating an SDRA which is a type of a memory according to the embodiment;
FIG. 3 is an internal configuration diagram of M.

FIG. 4 is a diagram illustrating a head according to the embodiment.

FIG. 5 is a schematic diagram of a raster column converter according to this embodiment.

FIG. 6 is a diagram illustrating a relationship between print timing and raster column conversion according to the embodiment.

FIG. 7 is an explanatory diagram of a buffer memory according to the embodiment.

FIG. 8 is a diagram for explaining an operation of a raster column converter in the case of a head of 128 nozzles of each color and three colors in the related art.

FIG. 9 is a diagram for explaining the operation of the raster column converter when the distance between colors 1 and 2 is different from the width of the raster column converter in the related art.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 I / F 2 ASIC 3 Data control circuit 4 Parallel-serial converter 5 Address generation circuit 6 Memory 7 Raster column converter 8 Head 50 ROW address generation part 51, 52, 53 Addition amount setting register 54 Selector 55 Adder 56 Output address latch Register 500 COL address generator 501 COL address for color 1 502 COL address for color 2 503 Selector

Claims (7)

[Claims] In an ink jet serial printer in which a plurality of nozzle groups of a plurality of colors are arranged at a distance of an integral multiple of a minimum print dot interval, print data sent to a print head at one print timing is stored in a head buffer memory. The print buffer memory control device is stored in an area specified by one of the ROW addresses. 2. The print buffer memory control device according to claim 1, wherein the print data converted from the raster column is temporarily stored in the head buffer memory until a timing for using the print data comes. 3. The print buffer memory control device according to claim 1, wherein the maximum value of the memory address used for the head buffer memory is a power of two minus one. 4. A one-to-one correspondence between a ROW address of a memory used as the head buffer memory and an order of print timing.
2. The printing buffer memory control device according to claim 1, wherein 5. A selector having a plurality of addition amount setting registers and selecting one of the addition amounts output from the register, and a selector which outputs the selected addition amount to an address which is currently output to a memory. A print buffer memory control device, comprising: an adder for addition; and an address generator including an output address latch register for holding an output of the adder. 6. The ROW address of a memory for reading print data to be sent to a head according to a print timing is increased, and when the ROW address of the memory reaches the maximum value of the memory used for the head buffer, the ROW address of the memory is used for the head buffer. A print buffer memory control device, wherein the minimum value of the memory to be used is set. 7. The horizontal size of the raster column converter,
That is, a printing buffer memory control device, which performs the next raster column conversion during printing timing for the number of columns obtained by one raster column conversion.