JP2002118465A - Analog/digital converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reflect dither without superimposing it. SOLUTION: This analog/digital converter for generating a digital output signal G by performing the differential modulation of an analog input signal A is provided with a dither signal generating circuit 70 for generating a dither signal M, and a difference signal C or a derived signal (P) is compared with the dither signal M so that a binary signal E can be generated. Thus, the dither signal is used so as to be separated from the analog input signal or the like.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog-to-digital converter (analog-to-digital converter) of an oversampling method, and more particularly, to a dither signal for improving an S / N (signal / noise) characteristic. Analog-to-digital converter. Analog
The digital converter is embodied by a delta modulation type analog-to-digital converter (Δ modulation type A / D converter) or a delta sigma modulation type analog-to-digital converter (ΔΣ modulation type A / D converter). It is often used by incorporating it into a circuit for processing voice or sound in a telephone or audio equipment.

[0002]

2. Description of the Related Art A conventional analog-to-digital converter whose entire block diagram is shown in FIG. 7A performs a primary conversion so that a signal conversion for generating a digital output signal from an analog input signal is performed by 1-bit differential modulation. Predictive delta modulation analog
It is configured based on a digital converter. Specifically, a difference calculation circuit 1 that receives an analog input signal A and a feedback signal B to generate a difference signal C, the difference signal C and a threshold signal D 2 that generates a binary signal E in response to
And a digital filter 3 which receives the binary signal E and suppresses components above a predetermined frequency (cutoff frequency) fg to generate a digital output signal G;
And a digital-analog converter 4 + 5 that converts the binary signal E into an analog signal H at a repetition rate (sampling frequency fk) that exceeds the above, and an integration circuit 6 that receives the analog signal H and generates a feedback signal B. . Here, the sampling frequency fk is set higher than the cutoff frequency fg, and the cutoff frequency fg is set higher than the frequency fa of the analog input signal A.

In order to improve the S / N characteristic, the analog-digital converter has a dither signal J oscillating at an amplitude smaller than the maximum amplitude of the analog input signal A, for example, ± ΔV (see FIG. 7B). Is provided, and an adder circuit 8 for adding the dither signal J to the analog input signal A upstream of the difference calculation circuit 1 is also provided. The illustration is omitted, but the dither signal J
Is added to the feedback signal B and the difference signal C so as to add
Are provided on the recirculation side to the difference calculation circuit 1 or downstream of the difference calculation circuit 1. In any case, the dither is finally reflected in such a manner that the dither signal J is superimposed on the difference signal C. Further, a predetermined voltage Vd or the like is adopted as the threshold signal D, and the voltage value is a constant value smaller than the upper limit of the analog input signal A and larger than the lower limit.

In such an analog-to-digital converter, a difference signal C is generated by subtracting the feedback signal B from the analog input signal A, and this is compared with a threshold signal D to generate a binary signal E. A digital output signal G is generated by suppressing and removing high-frequency components exceeding the cutoff frequency fg from the binary signal E. At the same time, the binary signal E
Is sampled at a frequency fk by the sampling circuit 4 and further converted into an analog signal H by the DA converter 5, and the analog signal H is
Is integrated into a feedback signal B.

In this way, the difference signal C is binarized at the sampling frequency fk, and a digital output signal G is generated based on the binarized signal. The feedback signal B is obtained by stacking the binarized difference at the previous sampling timing. Since the binary signal E is a signal obtained by differentially modulating the analog input signal A immediately before the binary signal E, the sampling frequency fk is not changed even if the binary signal E is a 1-bit signal. If it is sufficiently higher than fa, the binary signal E
, The waveform information of the analog input signal A is accurately taken over. Then, when the digital output signal G is generated from the binary signal E, the high-frequency component higher than the cutoff frequency fg is removed, so that the digital output signal G (see FIG. 7C) has a noise component of the sampling frequency fk. (See the dashed line with the arrow in FIG. 7C), and contains an appropriate signal component corresponding to the analog input signal A (FIG. 7C).
(See the solid line with the arrow of the frequency fa in (c)).

When an undesired offset is present in the DA converter 5 of the analog-digital converter, the value of the analog signal H is shifted to one of the positive and negative and upper and lower sides by that amount, but the deviation component is constantly integrated. Then, a gradually increasing or decreasing noise component appears in the feedback signal B. This noise component is not included in the analog input signal A but is generated in the analog-to-digital converter. However, since the comparison circuit is also incorporated in the feedback loop, the noise component remains in the feedback loop. And the frequency fh is the cutoff frequency f
If it is lower than g (see the solid line with the frequency fh in FIG. 7C), the signal passes through the digital filter 3 and deteriorates the S / N characteristic of the digital output signal G.

The dither signal J is useful in such a case, and an oscillation signal having a small amplitude that does not impair the analog input signal A is used. Then, the dither signal J is added to the analog input signal A and the like, and the difference signal C
, The noise component generated in the analog-digital converter due to the offset of the DA converter 5 is widely dispersed at frequencies other than the frequency fh under the influence of the dither signal J (FIG. 7 ( d)). Of the dispersed noise components, those exceeding the cutoff frequency fg cannot pass through the digital filter 3 and are removed there.

[0008] Thus, with the introduction of the appropriate dither signal J, the noise generated due to the accumulation of the offset component of the output of the DA converter in the integration circuit is reduced by the S / D of the delta modulation type analog-digital converter. N characteristics are improved. The delta-sigma modulation type analog
A digital converter is described in Japanese Patent Application Laid-Open No. 6-104751, and a delta-sigma modulation type analog-to-digital converter uses S / N to introduce a dither signal.
It is known to help improve properties.

[0009]

However, in such a conventional analog-to-digital converter, when introducing a dither signal, it is intuitive and direct to add the dither signal to an analog input signal or a difference signal. A technique has been adopted. Therefore, in addition to the dither signal generation circuit,
It is necessary to provide an analog addition circuit or an equivalent subtraction circuit. In addition, when the value of the analog input signal or the difference signal is close to the upper or lower limit, the superimposition of the dither signal reaches the limit and the waveform is distorted, so a new heterogeneous noise factor is also introduced. However, in order to suppress the generation of the noise, it is necessary to reduce the maximum amplitude of the analog input signal or the differential signal by the amplitude of the dither signal, which is rather inconvenient.

Therefore, a dither signal is introduced into a differential modulation type analog-to-digital converter in order to improve the S / N characteristic with respect to noise generated due to the offset component of the output of the DA converter being accumulated in the integration circuit. In this case, it is a technical problem to devise a circuit configuration so as to obtain the same improvement effect without directly superimposing a dither signal on an analog input signal, a difference signal, or the like. Also,
Considering the application to mobile phones where miniaturization is important,
When modifying a circuit, reducing the circuit scale is also an important issue.

The present invention has been made to solve such a problem, and has as its object to realize an analog-digital converter in which dither is reflected without being superimposed. Another object of the present invention is to realize an analog-to-digital converter having a small circuit size without an adder circuit for dither superposition.

[0012]

Means for Solving the Problems First and second solving means invented to solve such problems are as follows.
The configuration and operation and effect will be described below.

[First Solution] An analog-to-digital converter according to a first solution is an analog-to-digital converter for differentially modulating an analog input signal to generate a digital output signal, as described in claim 1 of the present application. In the digital converter, a dither signal generating circuit for generating a dither signal is provided, and a binarization of a difference signal or a derivative signal thereof is performed by comparison with the dither signal.

In the analog-to-digital converter according to the first solution, the noise accompanying the differential modulation is dispersed and partly suppressed by the introduction of the dither signal, and the point of introduction is changed. It has been moved to a comparison section for binarization in modulation. Since a plurality of signals are generally input separately for comparison, processing is performed with the difference signal and the like and the dither signal separated. Even in such a case, if necessary, a threshold as a reference for binarization is included as a DC component or the like on the dither signal side, so that the function of differential modulation including binarization is not impaired at all. The value signal and the digital output signal based thereon are reliably affected by the dither signal. As a result, the S / N characteristics are improved without reducing the maximum amplitude of the analog input signal or the difference signal. Therefore, according to the present invention, it is possible to realize an analog-digital converter in which a dither signal is reflected on a conversion result without being directly superimposed on an analog input signal, a difference signal, or the like.

[Second Solution] The analog-digital converter of the second solution is the analog-digital converter of the first solution, as described in claim 2 of the present application. The dither signal generating circuit includes means for generating a first voltage, means for generating a second voltage, and switching means for alternately selecting and outputting the first and second voltages. It is.

In the analog-to-digital converter according to the second solution, the threshold for binarization, which becomes a constant value when there is no dither signal, is determined by the first voltage and the second voltage. It matches the median / average value of. As a result, the threshold is included on the dither signal side. Moreover, by appropriately setting the first and second voltages, the threshold value can be easily set in addition to the amplitude of the dither signal. Further, since the switching means and the like are embodied by a simpler circuit than the analog adding circuit, the circuit scale can be small. Therefore, according to the present invention, it is possible to realize an analog-to-digital converter having a small circuit scale without an adder circuit for dither superposition.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific embodiments for implementing the analog-digital converter of the present invention achieved by such a solution will be described with reference to the following first to sixth embodiments. . The first embodiment shown in FIG. 1 embodies the first solution described above based on a delta modulation type analog-to-digital converter, and the second embodiment shown in FIG. The above-described first solution is embodied on the basis of a sigma modulation type analog-digital converter. In addition, the third to the third shown in FIGS.
Each of the sixth embodiments embodies the second solution described above. In the drawings, the same components as those in the related art are denoted by the same reference numerals, and the description thereof will not be repeated, and the following description will focus on the differences from the related art.

[0018]

First Embodiment A first embodiment of an analog-to-digital converter according to the present invention will be described with reference to the drawings. FIG. 1A is a block diagram of the entire circuit, and FIG. 1B is a waveform example of the dither signal M. This analog-to-digital converter is a delta modulation type analog-to-digital converter.
It is configured based on a digital converter to perform 1-bit differential modulation, which is the above-described conventional example (see FIG. 7).
The difference is that the dither signal generating circuit 70 for generating the dither signal M is introduced instead of the dither signal generating circuit 7 and the adding circuit 8, and the dither signal M is input to the comparing circuit 2 as the threshold signal D. It is the point that came to come.

That is, the analog-to-digital converter (see FIG. 1A) includes a difference calculation circuit 1 which receives a analog input signal A and a feedback signal B and generates a difference signal C, A comparator circuit 2 for generating a binary signal E in response to the threshold signal D, and a digital circuit for receiving the binary signal E and suppressing a component equal to or higher than a predetermined frequency (cutoff frequency) fg to generate a digital output signal G Filter 3 and
A digital-analog converter 4 + 5 for converting the binary signal E into an analog signal H at a repetition rate (sampling frequency fk) exceeding a predetermined frequency fg, and the analog signal H
And a dither signal generation circuit 70 that generates a dither signal M that oscillates with an amplitude smaller than the maximum amplitude of the difference signal C. The comparison circuit 2 receives the dither signal M as the threshold signal D.

Taking the case where the analog input signal A is an audio signal as an example, the respective components will be described in detail. The frequency fa of the analog input signal A ranges from several tens Hz to several thousands Hz centering on several hundred Hz. Based on this, the cutoff frequency fg
Is set to 8 kHz or 4 kHz, and the sampling frequency fk is set to 1 MHz or 10 MHz. The digital filter 3 may be a circuit of a pure low-pass filter, but converts the binary signal E into a digital-analog converter 4 + 5
Counting at a high speed in synchronization with, for example, conversion to a plurality of bits such as 8 bits or 14 bits and outputting a digital output signal G at a predetermined low speed cycle is accompanied or parasitically implemented. It may be done.

The difference calculation circuit 1 is easily embodied by an addition circuit or the like using an operational amplifier (op-amp), and the comparison circuit 2 is embodied by a comparator or the like, and for example, a difference signal is input to its positive input. C is led and the threshold signal D, that is, the dither signal M is led to the negative input. Further, a D-type flip-flop or the like suitable for a latch is often used for the sampling circuit 4, but this may be embodied as a part of the DA converter 5. The integration circuit 6 is preferably an active circuit in which an operational amplifier is combined with a capacitor.

Although a specific configuration example of the dither signal generation circuit 70 will be described in detail in the third and subsequent embodiments, the dither signal M (see FIG. 1B) has a small amplitude ΔV centered on the voltage Vd. It is an oscillation signal that changes only up and down.
That is, the dither signal M alternately becomes the first voltage (Vd + ΔV) or the second voltage (Vd−ΔV) in a predetermined cycle. Although the phase of the dither signal does not affect the S / N ratio and is not an essential requirement for the present invention, in this example, the dither signal M and the conventional dither signal M It is assumed that the phase with J is shifted by 180 °, that is, inverted. Further, the dither signal M
Is higher than the cutoff frequency fg and lower than the sampling frequency fk so that the dither signal M is cut by the digital filter 3.

The usage and operation of the analog-to-digital converter according to the first embodiment will be described with reference to the drawings. FIG. 1B shows a typical waveform of the dither signal M, and FIGS. 1C and 1D show the digital output signal G.
7 (c) shows a state without a dither signal, and FIG. 7 (d) shows a state with a dither signal.

In this case, since the amplitude ΔV of the dither signal M is not large, there is no fear that the threshold signal D exceeds the inputtable range of the comparison circuit 2. Further, in a range where the waveforms of the analog input signal A, the feedback signal B, and the difference signal C are not distorted, a voltage value obtained by adding the oscillation signal of the amplitude voltage ΔV to the difference signal C to reduce the threshold voltage Vd, and the amplitude from the threshold voltage Vd. Since the voltage value obtained by subtracting the oscillation signal of the voltage ΔV and subtracting the result from the difference signal C is equal, the analog-to-digital converter of this example (see FIG. 1A) and the analog-to-digital converter of the conventional example Comparing with the signal (see FIG. 7A), it can be seen that if the difference signal C is the same, the binary signal E, the analog signal H, and the feedback signal B are also the same. If the analog input signal A is the same, the difference signal C is also the same. As a result, the same digital output signal G is obtained.

More specifically, a difference signal C is generated by subtracting the feedback signal B from the analog input signal A, and this is compared with a threshold signal D consisting of a dither signal M to generate a binary signal E. A digital output signal G is generated by suppressing and removing high-frequency components exceeding the cutoff frequency fg from the signal E. In parallel with this, the binary signal E is sampled at the frequency fk by the sampling circuit 4 and further converted into an analog signal H by the DA converter 5, and the analog signal H is integrated by the integration circuit 6 to obtain the feedback signal B Becomes

In this manner, the digital output signal G is generated. At this time, even if an undesired offset component of the DA converter 5 is constantly integrated and noise of the frequency fh appears (see FIG. 1C). As in the conventional case, the noise component is widely dispersed at frequencies other than the frequency fh under the influence of the dither signal M (see FIG. 1D), and the noise component exceeds the cutoff frequency fg. That portion is removed by the digital filter 3. In this case as well, by introducing an appropriate dither signal M, D
The S / N characteristic of the noise generated due to the accumulation of the offset component of the output of the A converter in the integration circuit is improved.

Moreover, in this case, the analog input signal A
Since the dither signal M is not directly superimposed on the feedback signal B and the difference signal C, the difference calculation circuit 1 and the comparison circuit 2
Since the signal waveform of the analog input signal A and the like does not distort as long as the input range does not deviate from the input range, the maximum amplitude of the analog input signal A and the like does not become narrower than the input range of the difference calculation circuit 1 and the like. This also reduces the requirements that need to be considered when designing the circuit, so that a further advantage that the design becomes easier can be enjoyed.

[0028]

Second Embodiment The analog-to-digital converter of the present invention whose overall block diagram is shown in FIG. 2 is constructed based on a delta-sigma modulation type analog-to-digital converter and performs 1-bit differential modulation. This is different from the first embodiment in that the integration circuit 6 is disconnected from the line of the analog signal H between the DA converter 5 and the difference calculation circuit 1, and the difference calculation circuit 1 and the comparison circuit 2 is inserted in the line of the difference signal C between the two.

That is, the analog-to-digital converter generates a difference signal C by receiving an analog input signal A and a feedback signal B, and generates a derivative signal P by receiving the difference signal C. Integrator 6 and its derivative signal P
A comparison circuit 2 which receives the binary signal E and a threshold signal D to generate a binary signal E, and which receives the binary signal E and suppresses components above a predetermined frequency (cutoff frequency) fg to generate a digital output signal G Digital filter 3 and predetermined frequency f
g is converted to an analog signal H at a repetition rate (sampling frequency fk) exceeding
And a digital-analog converter 4 + 5 for sending to the difference operation circuit 1, a dither signal generating circuit 70 for generating a dither signal M oscillating with an amplitude smaller than the maximum amplitude of the derived signal P is provided. The comparison circuit 2 receives the dither signal M as the threshold signal D.

It is known that the introduction of a dither signal also contributes to the improvement of the S / N characteristic in a delta-sigma modulation type analog-to-digital converter. A method of superimposing the dither signal on an analog input signal by an adder at the time of the introduction is known. In the case of the present invention (see FIG. 2), the dither signal M is used as the threshold signal D as the threshold signal D of the negative side of the comparison circuit 2 in the case of the present invention (see FIG. 2). The signal is guided to the input and is used for comparison with the derivative signal P while being separated from the difference signal C and its derivative signal P. As a result, also in the delta-sigma modulation type analog-to-digital converter, the S / N characteristic with respect to the noise generated due to the accumulation of the offset component of the output of the DA converter in the integration circuit is improved, and the analog input is also improved. The maximum amplitude of a signal or the like is not reduced, and the design becomes easy.
Moreover, an adder circuit for superimposing a dither signal is not required.

[0031]

Third Embodiment In the analog-to-digital converter of the present invention whose dither signal generation circuit is shown in FIG. 3, the dither signal generation circuit 70 in the first and second embodiments described above uses the first voltage ( Vd + .DELTA.V), means for generating a second voltage (Vd-.DELTA.V), and switching means for alternately selecting and outputting these first and second voltages (Vd. +-.. DELTA.V). It has become something.

Specifically, three resistors R1, R2, R3
Are connected in series with the power supply line of the voltage Vdd and the voltage Vss.
And a first voltage (Vd + ΔV) at a connection point between the resistor R1 and the resistor R2 due to the voltage division of the resistor.
V) is generated, and a second voltage (Vd-ΔV) is generated at a connection point between the resistors R2 and R3. That way each resistor R
1, R2, and R3 are set. The resistance R1
A connection point between the resistor and the resistor R2 is connected to a signal line of the dither signal M via a switch SW1 such as an analog switch,
The connection point between the resistors R2 and R3 is also connected to the signal line of the dither signal M via the switch SW2. Further, a control signal Q for switching the open / close state of the switch SW1 is generated by, for example, dividing the frequency of a clock signal K defining the sampling frequency fk, and the switching control signal for the switch SW2 inverts the control signal Q. Is generated.

In this case, the connection point voltage of the resistors R1 and R2 is calculated by the equation [Vss + (Vdd-Vss) · (R2 + R3) / (R1 + R2 + R3)], and the connection point of the resistors R2 and R3 is obtained. The voltage is calculated by the formula [Vss + (Vdd-Vss)
(R3) / (R1 + R2 + R3)].
The first voltage (Vd + .DELTA.V) and the second voltage (Vd-.DELTA.V) can be easily set by appropriately setting the resistance values of R2 and R3 or their ratios, and for practically any voltage Vd and amplitude .DELTA.V. ) Can be generated. In the equation, “•” indicates multiplication and “/” indicates division. Since the switches SW1 and SW2 alternately repeat conduction or cutoff in response to the control signal Q, the dither signal M is a signal oscillating with the amplitude ΔV around the voltage Vd. Thus, the threshold voltage Vd can be included in the dither signal M, and the dither signal M can be used as a threshold signal D for comparison for binarization without an analog addition circuit or a subtraction circuit.

[0034]

Fourth Embodiment An analog-to-digital converter according to the present invention whose dither signal generating circuit is shown in FIG. 4 differs from that of the third embodiment in that a part of the resistors are parallel. And that the number of switches is reduced to one. Specifically, the switch SW3 and the resistor R5 are connected in series, this circuit and the resistor R4 are connected in parallel, and this circuit and the resistor R6
Are connected in series, and this circuit is connected between the power supply line of the voltage Vdd and the ground line of the voltage Vss.

In this case, when the switch SW3 opens and closes in response to the control signal Q and the like, the resistances of the resistors R4 and R6
The dither signal M can be generated by extracting the voltage since the connection point voltage of the node is switched. Also in this case, the resistors R4 and R4 are used without using an adder circuit.
The first voltage (Vd + ΔV) and the second voltage (Vd−V) can be easily set for practically arbitrary voltage Vd and amplitude ΔV by appropriately setting the resistance values of R5 and R6 or their ratios.
ΔV) can be generated.

[0036]

Fifth Embodiment An analog-to-digital converter according to the present invention whose dither signal generating circuit is shown in FIG. 5 differs from that of the third and fourth embodiments in that a constant current source is introduced. Is a point. Specifically, the constant current source IS1 and the switch SW
4 and a constant current source IS2 and a switch SW5.
Are connected in series, these series circuits are connected in parallel, this circuit and the resistor R7 are connected in series, and this circuit is connected between the power supply line of the voltage Vdd and the ground line of the voltage Vss. Although illustration is omitted, the switch SW
4, SW5 are alternately opened and closed according to the control signal Q and its inverted signal.

In this case, when the switch SW4 is conducting, the voltage of the formula [IS1 · R7] is generated in the resistor R7, and when the switch SW5 is conducting, the formula [IS2 ·
R7], and those voltages are applied to the switches SW4 and SW4.
Since it appears alternately according to the opening and closing of SW5, the dither signal M can be generated by extracting the voltage.
Also, in this case, the first current value of the constant current sources IS1 and IS2 and the resistance value of the resistor R7 can be appropriately set without using an adder circuit. Voltage (Vd + ΔV) and the second voltage (Vd
−ΔV) can be generated.

[0038]

Sixth Embodiment An analog-to-digital converter according to the present invention whose dither signal generating circuit is shown in FIG. 6 is different from that of the above-described fifth embodiment in that the number of switches is reduced.
Specifically, the constant current source IS4 and the switch SW6 are connected in series, this circuit and the constant current source IS3 are connected in parallel, this circuit and the resistor R8 are connected in series, and this circuit supplies the voltage Vdd. It is connected between the electric wire and the ground line of the voltage Vss.

In this case, when the switch SW6 is conducting according to the control signal Q or the like, the equation [R8 · (IS3 +
IS4)] and the switch SW6 is turned off, a voltage of the formula [R8 · IS4] is generated in the resistor R8, and these voltages alternately appear in response to the opening and closing of the switch SW6. By extracting the voltage, the dither signal M can be generated. Also in this case, the current values of the constant current sources IS3 and IS4 and the resistance R
The first voltage (Vd + ΔV) and the second voltage (Vd−ΔV) can be easily generated for an arbitrary voltage Vd and amplitude ΔV by appropriately setting the resistance value of No. 8.

[0040]

As is apparent from the above description, in the analog-to-digital converter according to the first solution of the present invention, the dither signal is obtained by utilizing the comparison for binarization accompanying the differential modulation. Is used in a state separated from an analog input signal or the like, thereby realizing an analog-digital converter in which a dither signal is reflected on a conversion result without being directly superimposed on an analog input signal or a difference signal. This has the advantageous effect of being able to do so.

In the analog-to-digital converter according to the second solution of the present invention, the dither signal generation circuit is limited to a specific structure, so that there is no addition circuit for dither superposition and the circuit scale is large. Has an advantageous effect of being able to realize an analog-digital converter having a small value.

[Brief description of the drawings]

FIG. 1A is a block diagram of an entire circuit of a first embodiment of an analog-digital converter of the present invention, and FIG.
7C is a waveform example of a dither signal, FIG. 7C is a power spectrum diagram when there is no dither signal, and FIG. 7C is a power spectrum diagram when a dither signal is added.

FIG. 2 is a block diagram of an overall circuit for a second embodiment of the analog-digital converter of the present invention.

FIG. 3 is a detailed diagram of a dither signal generation circuit according to a third embodiment of the analog-digital converter of the present invention.

FIG. 4 is a detailed diagram of a dither signal generation circuit according to a fourth embodiment of the analog-to-digital converter of the present invention.

FIG. 5 is a detailed diagram of a dither signal generation circuit according to a fifth embodiment of the analog-to-digital converter of the present invention.

FIG. 6 is a detailed diagram of a dither signal generation circuit according to a sixth embodiment of the analog-digital converter of the present invention.

FIG. 7 shows a conventional analog-digital converter.
(A) is a block diagram of the entire circuit, (b) is a waveform example of a dither signal, (c) is a power spectrum diagram when there is no dither signal, and (c) is a power spectrum diagram when a dither signal is added. .

[Explanation of Signs] 1. Difference arithmetic circuit, 2. Comparison circuit (Cmp), 3. Digital filter, 4. Sampling circuit (FF, digital
Analog converter), 5 ... DA converter 5 (DAC, digital-analog converter), 6 ... integrator 6, 7 ... dither signal generator, 8 ... adder, 70 ... dither signal generator

Claims (2)

[Claims] An analog-to-digital converter for differentially modulating an analog input signal to generate a digital output signal is provided with a dither signal generation circuit for generating a dither signal. An analog-to-digital converter characterized in that the comparison is performed with the dither signal.
Digital converter. 2. The dither signal generating circuit includes means for generating a first voltage, means for generating a second voltage, and switching means for alternately selecting and outputting the first and second voltages. 2. The analog-to-digital converter according to claim 1, comprising: