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JP2002173361A - Ceramic substrate, thin film circuit substrate and method of manufacturing ceramic substrate - Google Patents

Ceramic substrate, thin film circuit substrate and method of manufacturing ceramic substrate

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Publication number
JP2002173361A
JP2002173361A JP2000373122A JP2000373122A JP2002173361A JP 2002173361 A JP2002173361 A JP 2002173361A JP 2000373122 A JP2000373122 A JP 2000373122A JP 2000373122 A JP2000373122 A JP 2000373122A JP 2002173361 A JP2002173361 A JP 2002173361A
Authority
JP
Japan
Prior art keywords
ceramic substrate
ceramic
sintered body
warpage
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000373122A
Other languages
Japanese (ja)
Other versions
JP4795529B2 (en
Inventor
Yasushi Iyogi
靖 五代儀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2000373122A priority Critical patent/JP4795529B2/en
Publication of JP2002173361A publication Critical patent/JP2002173361A/en
Application granted granted Critical
Publication of JP4795529B2 publication Critical patent/JP4795529B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

(57)【要約】 【課題】優れた放熱性を有し、かつ、被膜性の高い薄膜
回路層を確実に形成できるセラミック基板を得る。ま
た、被膜性の高い薄膜回路層を形成した薄膜回路基板を
得る。さらに、研磨加工後の反り発生を防止したセラミ
ック基板の製造方法を得る。 【解決手段】板状のセラミック焼結体2から成り、反り
が5μm/インチ以下であることを特徴とする。
(57) Abstract: A ceramic substrate having excellent heat dissipation and capable of reliably forming a thin film circuit layer with high film properties. In addition, a thin film circuit board on which a thin film circuit layer having a high coating property is formed is obtained. Further, a method for manufacturing a ceramic substrate in which warpage after polishing is prevented is obtained. The ceramic sintered body is characterized by having a warpage of 5 μm / inch or less.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、優れた放熱性を有
し、薄膜回路層を形成可能なセラミック基板、薄膜回路
基板およびセラミック基板の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic substrate having excellent heat radiation and capable of forming a thin film circuit layer, a thin film circuit substrate, and a method of manufacturing a ceramic substrate.

【0002】[0002]

【従来の技術】半導体素子を搭載する回路基板は、基板
と、この基板の少なくとも一方の側面に銅などの導電体
から成る回路層を配置して構成されている。回路基板の
基板材料として、樹脂,金属,セラミックスなどの各種
材料が知られている。従来、基板材料として、回路基板
の用途に応じ、好適な材料が選択されていた。
2. Description of the Related Art A circuit board on which a semiconductor element is mounted comprises a board and a circuit layer made of a conductor such as copper on at least one side of the board. Various materials such as resins, metals, and ceramics are known as substrate materials for circuit boards. Conventionally, a suitable material has been selected as a substrate material according to the use of the circuit board.

【0003】近年、半導体素子を高集積化,高速化,大
チップ化した大規模集積回路(LSI:Large S
cale Integration)などが実用化され
ている。半導体素子の高集積化に伴い、基板に要求され
る材料特性は、半導体チップの機械的応力面の保護から
電気的,熱的な保護に移行している。樹脂,金属,セラ
ミックスの中でもセラミックスは、放熱性,電気的特
性,信頼性をはじめ総合的に優れた特性を有する。この
ため、セラミック基板が多用されている。
In recent years, a large-scale integrated circuit (LSI: Large S) in which a semiconductor element is highly integrated, operated at a high speed, and made into a large chip
call integration) has been put to practical use. With the increase in the degree of integration of semiconductor elements, the material characteristics required for the substrate have shifted from protection of mechanically stressed surfaces of semiconductor chips to electrical and thermal protection. Among resins, metals, and ceramics, ceramics have comprehensively excellent characteristics including heat dissipation, electrical characteristics, and reliability. For this reason, ceramic substrates are often used.

【0004】さらに、最近では、半導体素子を一層、高
集積化,高速化,大チップ化しているため、使用時の半
導体素子からの発熱が増加してより一層温度が上昇する
傾向にある。このため、基板材料の特性として、半導体
素子から発生する熱を外部に効率良く放熱できる高放熱
性が要求される。従って、高熱伝導率を有するAlN焼
結体,SiC焼結体,Si焼結体などのセラミッ
ク基板が使用されている。
In recent years, since semiconductor elements have been further integrated, operated at higher speeds, and as chips have become larger, heat generation from the semiconductor elements during use has been increasing, and the temperature tends to further increase. Therefore, as a characteristic of the substrate material, a high heat radiation property capable of efficiently radiating heat generated from the semiconductor element to the outside is required. Therefore, ceramic substrates such as AlN sintered bodies, SiC sintered bodies, and Si 3 N 4 sintered bodies having high thermal conductivity are used.

【0005】セラミック基板の放熱性をより一層向上さ
せるためには、セラミック基板に高熱伝導率を有する材
料を適用するだけでなく、セラミック基板の板厚自体を
小さくして熱抵抗値を下げることがセラミック基板にと
って不可欠である。
In order to further improve the heat dissipation of the ceramic substrate, it is necessary not only to apply a material having a high thermal conductivity to the ceramic substrate but also to reduce the thermal resistance value by reducing the thickness of the ceramic substrate itself. Indispensable for ceramic substrates.

【0006】[0006]

【発明の解決しようとする課題】しかしながら、研磨加
工によりセラミック基板厚を薄くすると、セラミック基
板に反りが発生し、そのセラミック基板に形成する回路
層の被覆性が低下するという問題を有していた。一方、
研磨加工を施さないようにするため、予め薄肉のセラミ
ック成形体を形成し焼結する方法もあるが、セラミック
成形体は焼結時に収縮することからこのような方法であ
っても完全に反りを無くすことは難しかった。また、仮
に反りを小さくできたとしてもセラミック焼結体の焼き
上がり面では表面粗さが粗いものしか得られず、表面の
平坦度を上げるには研磨加工は必須であり、研磨加工を
行うと前述のような反りの問題が生じていた。
However, when the thickness of the ceramic substrate is reduced by polishing, there is a problem that the ceramic substrate is warped and the coverage of a circuit layer formed on the ceramic substrate is reduced. . on the other hand,
In order to prevent polishing, there is a method of forming a thin ceramic molded body in advance and sintering it.However, since the ceramic molded body shrinks during sintering, even such a method completely warps. It was difficult to get rid of it. Also, even if the warpage can be reduced, only a baked surface of the ceramic sintered body can obtain only a rough surface roughness, and polishing is indispensable to increase the surface flatness. The above-described warping problem has occurred.

【0007】本発明は、上述した問題を解決するために
なされたものであり、優れた放熱性を有し、かつ、被膜
性の高い薄膜回路層を確実に形成できるセラミック基板
を提供することを目的とする。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a ceramic substrate having excellent heat dissipation and capable of reliably forming a thin film circuit layer having a high coating property. Aim.

【0008】また、上記セラミック基板を用いて被膜性
の高い薄膜回路層を形成した薄膜回路基板を提供するこ
とを目的とする。
It is another object of the present invention to provide a thin-film circuit board in which a thin film circuit layer having high coatability is formed using the above-mentioned ceramic substrate.

【0009】さらに、セラミック基板が薄肉であって
も、研磨後の反り発生を防止できるセラミック基板の製
造方法を提供することを目的とする。
Another object of the present invention is to provide a method of manufacturing a ceramic substrate which can prevent warpage after polishing even if the ceramic substrate is thin.

【0010】[0010]

【課題を解決するための手段】通常、セラミック基板上
の電気・電子部品を電気的に接続するため、セラミック
基板表面に銅などの導電体からなる回路層を形成する。
回路層を薄膜形成する際、セラミック基板上にスパッタ
法や真空蒸着法などの物理蒸着法を用いる。物理蒸着法
は、セラミック基板の材料に左右されずに密着性を確保
し易いという優れた特性を有するが、セラミック基板の
表面形状に凹凸が存在する場合、段差部での薄膜の被覆
性が劣る。このため、セラミック基板表面には高い平坦
度が要求される。実際、蒸着膜により薄膜回路層を形成
するためには、セラミック基板表面の表面粗さRaを
0.5μm以下とすることが必要である。従って、セラ
ミック基板表面の平坦化のため、研磨加工を施す必要が
ある。
Generally, a circuit layer made of a conductor such as copper is formed on the surface of a ceramic substrate in order to electrically connect electric and electronic components on the ceramic substrate.
When a circuit layer is formed as a thin film, a physical vapor deposition method such as a sputtering method or a vacuum vapor deposition method is used on a ceramic substrate. The physical vapor deposition method has an excellent property that it is easy to secure adhesion without being influenced by the material of the ceramic substrate, but when unevenness exists in the surface shape of the ceramic substrate, the thin film coverage at the step portion is poor. . For this reason, high flatness is required for the ceramic substrate surface. Actually, in order to form a thin film circuit layer by a vapor deposition film, it is necessary that the surface roughness Ra of the ceramic substrate surface is 0.5 μm or less. Therefore, it is necessary to perform a polishing process for flattening the surface of the ceramic substrate.

【0011】一方、薄肉のセラミック基板を製造する場
合、焼結時における変形を防止するため、セッターなど
の矯正冶具を用いて均等な荷重をかけて焼結する方法が
用いられる。しかし、焼結後におけるセラミック基板表
面は矯正冶具の表面状態に左右され、セラミック基板表
面には不可避的に凹凸が生じる。このため、焼結後にセ
ラミック基板表面を研磨加工することは必須である。
On the other hand, when a thin ceramic substrate is manufactured, a method of sintering by applying a uniform load using a straightening jig such as a setter is used to prevent deformation during sintering. However, the surface of the ceramic substrate after sintering depends on the surface condition of the straightening jig, and irregularities are inevitably generated on the surface of the ceramic substrate. For this reason, it is essential to polish the surface of the ceramic substrate after sintering.

【0012】通常、セラミック基板の研磨を行う際、水
平に配置したセラミック基板の下面を固定し、上面にダ
イヤモンドなどの砥粒を含む上端盤を配置し、上端盤を
回転または左右に移動して基板表面を研磨加工する片面
研磨が行われている。
Usually, when polishing a ceramic substrate, the lower surface of a horizontally disposed ceramic substrate is fixed, the upper end plate containing abrasive grains such as diamond is disposed on the upper surface, and the upper end plate is rotated or moved right and left. Single-side polishing for polishing a substrate surface is performed.

【0013】片面研磨を行うと、セラミック基板の一方
の面から力が研磨加工時に負荷される。この力によっ
て、セラミック基板の材料内部に応力が発生する。セラ
ミック基板が厚肉の場合、材料内部に発生する応力はセ
ラミック基板内部で吸収され、セラミック基板自体が変
形することはない。しかし、薄肉のセラミック基板で
は、片面研磨を行うと、セラミック基板の材料内部に発
生する応力が吸収されず、材料内部の応力はそのままセ
ラミック基板自体を変形させる。その結果、研磨加工後
に反りが発生する。例えば、基板厚さが0.5mm以下
の薄肉のセラミック基板では、研磨加工後に50μm/
インチ(1インチあたり50μm程度)の反りが発生す
る。
When single-side polishing is performed, a force is applied from one side of the ceramic substrate during polishing. This force generates stress inside the material of the ceramic substrate. When the ceramic substrate is thick, the stress generated inside the material is absorbed inside the ceramic substrate, and the ceramic substrate itself is not deformed. However, when a single-sided polishing is performed on a thin ceramic substrate, the stress generated inside the material of the ceramic substrate is not absorbed, and the stress inside the material directly deforms the ceramic substrate itself. As a result, warpage occurs after polishing. For example, in the case of a thin ceramic substrate having a substrate thickness of 0.5 mm or less, 50 μm /
Warpage of inches (about 50 μm per inch) occurs.

【0014】また、研磨加工時には、セラミック基板と
上端盤との摩擦により摩擦熱が発生する。この摩擦熱に
よりセラミック基板が変形し易く、研磨加工後に反りが
発生する原因の一つになっている。
Further, during polishing, frictional heat is generated due to friction between the ceramic substrate and the upper end plate. This frictional heat easily deforms the ceramic substrate, which is one of the causes of warpage after polishing.

【0015】本発明者は、薄肉のセラミック基板を研磨
する際、セラミック基板の両面から同時に両面研磨を施
すことで、セラミック基板の材料内部に発生する応力に
起因したセラミック基板の変形を防止し、研磨加工後に
おけるセラミック基板の反り発生を低減できることを見
い出した。そして、セラミック基板の反りの発生を低減
した結果、セラミック基板への蒸着による被覆性を大幅
に向上でき、回路層を薄膜形成可能としたのである。
The present inventor, when polishing a thin ceramic substrate, simultaneously performs double-side polishing from both surfaces of the ceramic substrate to prevent deformation of the ceramic substrate due to stress generated inside the material of the ceramic substrate. It has been found that the occurrence of warpage of the ceramic substrate after polishing can be reduced. Then, as a result of reducing the occurrence of warpage of the ceramic substrate, the coatability by vapor deposition on the ceramic substrate can be greatly improved, and a thin circuit layer can be formed.

【0016】すなわち、本発明のセラミック基板は板状
のセラミック焼結体から成り、反りが5μm/インチ以
下であることを特徴とする。
That is, the ceramic substrate of the present invention is formed of a plate-shaped ceramic sintered body, and is characterized in that the warpage is 5 μm / inch or less.

【0017】上記態様のセラミック基板において、板厚
が0.2〜0.5mmであることが望ましく、また、セ
ラミック焼結体は、窒化アルミニウムまたは窒化ケイ素
のいずれか1種を主成分とすることが好ましい。
[0017] In the ceramic substrate of the above aspect, the plate thickness is desirably 0.2 to 0.5 mm, and the ceramic sintered body mainly contains one of aluminum nitride and silicon nitride. Is preferred.

【0018】さらに、上記態様のセラミック基板におい
て、セラミック基板の両表面の表面粗さRaは、0.5
μm以下であることが望ましい。
Further, in the ceramic substrate of the above aspect, the surface roughness Ra of both surfaces of the ceramic substrate is 0.5
It is desirable that it is not more than μm.

【0019】また、セラミック基板は略長方形状であ
り、短辺の長さが120mm以下である。
The ceramic substrate has a substantially rectangular shape, and the length of the short side is 120 mm or less.

【0020】上記態様のセラミック基板において、セラ
ミック基板の少なくとも一方の表面に、厚さ0.5〜
5.0μmの回路層が形成されている薄膜回路基板であ
ることを特徴とする。なお、本発明の回路層は前述のよ
うに物理蒸着法により形成された薄膜であることが好ま
しいが、金属ペーストを用いた回路層であっても適用可
能である。
In the ceramic substrate according to the above aspect, at least one surface of the ceramic substrate has a thickness of 0.5 to 0.5 mm.
It is a thin film circuit board on which a 5.0 μm circuit layer is formed. Although the circuit layer of the present invention is preferably a thin film formed by the physical vapor deposition method as described above, a circuit layer using a metal paste is also applicable.

【0021】さらに、上記態様のセラミック基板の製造
方法において、セラミック粉末を焼結して板状のセラミ
ック焼結体とし、このセラミック焼結体の両表面に研磨
加工を同時に施して前記セラミック焼結体の両表面の表
面粗さRaを0.5μm以下としたセラミック基板を得
ることを特徴とする。
Further, in the method of manufacturing a ceramic substrate according to the above aspect, the ceramic powder is sintered into a plate-shaped ceramic sintered body, and both surfaces of the ceramic sintered body are simultaneously polished to obtain the ceramic sintered body. It is characterized in that a ceramic substrate having a surface roughness Ra of 0.5 μm or less on both surfaces of the body is obtained.

【0022】上記態様のセラミック基板の製造方法にお
いて、板厚を0.2〜0.5mmとしたセラミック焼結
体を用いることが望ましい。さらに、窒化アルミニウム
または窒化ケイ素のいずれか1種を主成分としたセラミ
ック焼結体を用いることが望ましい。
In the method of manufacturing a ceramic substrate according to the above aspect, it is preferable to use a ceramic sintered body having a plate thickness of 0.2 to 0.5 mm. Further, it is desirable to use a ceramic sintered body containing any one of aluminum nitride and silicon nitride as a main component.

【0023】また、窒化アルミニウム基板の場合、Al
N結晶粒子の平均粒径を3.0μm以下としたセラミッ
ク焼結体を用いることが望ましい。特に、粒径を1.0
μmから3.0μmまでの範囲と小径、かつ、均一な平
均粒径することが好ましく、これにより、セラミック基
板の研磨性向上を図れる。また、窒化ケイ素基板の場
合、Si結晶粒子の長軸径は2.0〜7.0μm
の範囲であると同様の効果が得られる。従来は、セラミ
ック基板を片方ずつ研磨加工する片面研磨を施していた
が、研磨性を向上することで両面研磨を同時に行うこと
が可能となった。
In the case of an aluminum nitride substrate, Al
It is desirable to use a ceramic sintered body in which the average particle size of the N crystal particles is 3.0 μm or less. In particular, a particle size of 1.0
It is preferable to have a small diameter in the range of μm to 3.0 μm and a uniform average particle diameter, whereby the polishing property of the ceramic substrate can be improved. In the case of a silicon nitride substrate, the major axis diameter of the Si 3 N 4 crystal particles is 2.0 to 7.0 μm.
Within the range, the same effect can be obtained. Conventionally, single-side polishing in which the ceramic substrate is polished one by one has been performed. However, by improving the polishing property, double-side polishing can be performed simultaneously.

【0024】このような本発明のセラミック基板の製造
方法を用いれば、板厚が0.2〜0.5mmと薄いにも
関わらず、反りの小さなセラミック基板を得ることがで
きるのである。
By using such a method for manufacturing a ceramic substrate according to the present invention, a ceramic substrate with a small warpage can be obtained despite its thinness of 0.2 to 0.5 mm.

【0025】[0025]

【発明の実施の形態】以下、本発明の実施形態につい
て、実施例1〜実施例14、比較例1〜比較例10を用
いて説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below using Examples 1 to 14 and Comparative Examples 1 to 10.

【0026】実施例1 本実施例では、窒化アルミニウム(AlN)焼結体から
成るセラミック基板を下記の方法によって作製した。
Embodiment 1 In this embodiment, a ceramic substrate made of an aluminum nitride (AlN) sintered body was manufactured by the following method.

【0027】AlNの原料粉末(平均粒径1.8μm)
に焼結助剤、例えば、Yを質量%で(重量%と同
様)5%添加し、更に、有機溶剤、バインダを添加して
ボールミルにて混合を行い、均一混合したスラリーを作
製した。得られたスラリーをドクターブレード法により
厚さ0.8mmのシート状に形成した。そして、焼結後
3インチ角になるように割り掛けた状態にシートを切断
した後、500℃で脱脂を行った。その後、非酸化性雰
囲気中、1750℃で4時間焼結してAlN焼結体を得
た。ここで、一旦、AlN焼結体の反りを測定した。
AlN raw material powder (average particle size 1.8 μm)
A sintering aid, for example, Y 2 O 3 is added in an amount of 5% by mass (similar to the amount by weight), an organic solvent and a binder are further added, and the mixture is mixed by a ball mill to produce a uniformly mixed slurry. did. The obtained slurry was formed into a sheet having a thickness of 0.8 mm by a doctor blade method. Then, after sintering, the sheet was cut in a state of being divided into 3 inch squares, and then degreased at 500 ° C. Thereafter, sintering was performed at 1750 ° C. for 4 hours in a non-oxidizing atmosphere to obtain an AlN sintered body. Here, the warpage of the AlN sintered body was measured once.

【0028】図1は、平板1上にAlN焼結体2を配置
し、AlN焼結体2の板厚方向から見た図である。ま
ず、図1に示すAlN焼結体2の長さAを測定し、次
に、平板1からAlN焼結体2の凹面までの垂直距離の
最大値Bを測定した。そして、AlN焼結体2の長さA
の1インチあたりの垂直距離Bを算出して、反りとし
た。その結果、反りは100μm/インチであった。
FIG. 1 is a view in which an AlN sintered body 2 is arranged on a flat plate 1 and viewed from the thickness direction of the AlN sintered body 2. First, the length A of the AlN sintered body 2 shown in FIG. 1 was measured, and then the maximum value B of the vertical distance from the flat plate 1 to the concave surface of the AlN sintered body 2 was measured. And the length A of the AlN sintered body 2
The vertical distance B per inch was calculated as the warpage. As a result, the warpage was 100 μm / inch.

【0029】このAlN焼結体の破断面からサンプル
(単位面積50μm×50μm)を任意の3個所選択し
た。各サンプルを拡大写真により2000倍に拡大し、
単位面積内に含まれるAlN結晶粒子個々の最大径を測
定し、平均粒径を算出した。その結果、粒子の平均粒径
は2.5μmであった。
From the fractured surface of this AlN sintered body, three arbitrary samples (unit area 50 μm × 50 μm) were selected. Each sample is enlarged 2000 times by the enlarged photograph,
The maximum diameter of each AlN crystal particle contained in the unit area was measured, and the average particle diameter was calculated. As a result, the average particle size of the particles was 2.5 μm.

【0030】このように反りが100μm/インチ、粒
子の平均粒径が2.5μmであるAlN焼結体2の両面
を、下記の方法によって同時に研磨加工して、板厚0.
5mm、表面粗さRa0.5μm以下としたセラミック
基板を得た。
As described above, both surfaces of the AlN sintered body 2 having a warpage of 100 μm / inch and an average particle diameter of 2.5 μm are simultaneously polished by the following method to obtain a sheet thickness of 0.1 μm.
A ceramic substrate having a thickness of 5 mm and a surface roughness Ra of 0.5 μm or less was obtained.

【0031】すなわち、図2(a)に示すように、Al
N焼結体2の両側面にAlN焼結体2の全面を被覆する
上端盤3aと下端盤4aとを配置し、AlN焼結体2の
端部は固定した。そして、上端盤3aと下端盤4aとを
同時に移動させてAlN焼結体2の両側面を研磨した。
このときの砥石の盤定は♯200〜1000の範囲で実
施した。なお、AlN焼結体2のサイズが大きい場合に
は、図2(b)に示すように、AlN焼結体2の両側面
の一部に上端盤3bと下端盤4bとを配置し、上端盤3
bと下端盤4bとを同時に移動させてAlN焼結体2を
研磨しても良い。
That is, as shown in FIG.
An upper end plate 3a and a lower end plate 4a that cover the entire surface of the AlN sintered body 2 were arranged on both side surfaces of the N sintered body 2, and the ends of the AlN sintered body 2 were fixed. Then, the upper end plate 3a and the lower end plate 4a were simultaneously moved to polish both side surfaces of the AlN sintered body 2.
The setting of the whetstone at this time was performed in the range of $ 200 to 1,000. When the size of the AlN sintered body 2 is large, as shown in FIG. 2B, an upper end plate 3b and a lower end plate 4b are arranged on a part of both side surfaces of the AlN sintered body 2, and Board 3
The AlN sintered body 2 may be polished by simultaneously moving the lower end plate 4b and the lower end plate 4b.

【0032】このように両面を同時に研磨加工して得ら
れたAlN基板の反りを測定した。その結果、下記の表
1に示すように、研磨加工後のAlN基板の反りは、5
μm/インチと、研磨前のものに比べて反りが大幅に減
少した。
The warpage of the AlN substrate obtained by polishing both surfaces simultaneously was measured. As a result, as shown in Table 1 below, the warpage of the polished AlN substrate was 5%.
In μm / inch, the warpage was significantly reduced as compared with that before polishing.

【0033】実施例2 本実施例では、以下のように、焼結条件および添加物を
変えた。
Example 2 In this example, the sintering conditions and additives were changed as follows.

【0034】すなわち、AlNの原料粉末(平均粒径
0.8μm)に焼結助剤、例えば、Y を質量%で
3%添加し、更に、有機溶剤、バインダを添加してボー
ルミルにて混合を行い、均一混合したスラリーを作製し
た。得られたスラリーをドクターブレード法により厚さ
0.8mmのシート状に形成した。そして、焼結後3イ
ンチ角になるように割り掛けた状態にシートを切断した
後、520℃で脱脂を行った。その後、非酸化性雰囲気
中、1800℃で3時間焼結して平均粒子径を2.0μ
mとした板状のAlN焼結体を得た。
That is, the raw material powder of AlN (average particle diameter)
0.8 μm), a sintering aid such as Y 2O3In mass%
3%, and an organic solvent and a binder
Mixing with a mill to produce a uniformly mixed slurry.
Was. Thick the obtained slurry by the doctor blade method.
It was formed into a 0.8 mm sheet. And after sintering 3
The sheet was cut in a state where it was divided so that it became
Thereafter, degreasing was performed at 520 ° C. Then a non-oxidizing atmosphere
And sintered at 1800 ° C for 3 hours to obtain an average particle size of 2.0μ.
Thus, a plate-like AlN sintered body having a thickness of m was obtained.

【0035】このAlN焼結体の両側面を同時に研磨し
て、板厚を0.5mmとしたセラミック基板を得て、反
りを測定した。その結果、表1に示すように、セラミッ
ク基板の反りは3μm/インチであった。
Both sides of the AlN sintered body were simultaneously polished to obtain a ceramic substrate having a thickness of 0.5 mm, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 3 μm / inch.

【0036】実施例3 本実施例では、以下のように、焼結条件および添加物を
変えた。
Example 3 In this example, the sintering conditions and additives were changed as follows.

【0037】すなわち、AlNの原料粉末(平均粒径
1.5μm)に焼結助剤、例えば、Y を質量%で
4%添加し、更に、有機溶剤、バインダを添加してボー
ルミルにて混合を行い、均一混合したスラリーを作製し
た。得られたスラリーをドクターブレード法により厚さ
0.7mmのシート状に形成した。そして、焼結後3イ
ンチ角になるように割り掛けた状態にシートを切断した
後、550℃で脱脂を行った。その後、非酸化性雰囲気
中、1820℃で2時間焼結して平均粒子径を2.3μ
mとした板状のAlN焼結体を得た。
That is, the raw material powder of AlN (average particle diameter)
1.5 μm) to a sintering aid such as Y 2O3In mass%
4%, and an organic solvent and a binder
Mixing with a mill to produce a uniformly mixed slurry.
Was. Thick the obtained slurry by the doctor blade method.
It was formed into a 0.7 mm sheet. And after sintering 3
The sheet was cut in a state where it was divided so that it became
Thereafter, degreasing was performed at 550 ° C. Then a non-oxidizing atmosphere
And sintered at 1820 ° C for 2 hours to obtain an average particle diameter of 2.3μ.
Thus, a plate-like AlN sintered body having a thickness of m was obtained.

【0038】このAlN焼結体の両側面を同時に研磨し
て、板厚を0.4mmかつ表面粗さRaを0.05μm
以下としたセラミック基板を得て、反りを測定した。そ
の結果、表1に示すように、セラミック基板の反りは5
μm/インチであった。
The both sides of this AlN sintered body were simultaneously polished to a thickness of 0.4 mm and a surface roughness Ra of 0.05 μm.
The following ceramic substrate was obtained, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 5
μm / inch.

【0039】実施例4 本実施例では、以下のように、焼結条件および添加物を
変えた。
Example 4 In this example, the sintering conditions and additives were changed as follows.

【0040】すなわち、Siの原料粉末(平均粒
径1.8μm)に焼結助剤、例えば、Yを質量%
で6%,TiOを1%添加し、更に、有機溶剤、バイ
ンダを添加してボールミルにて混合を行い、均一混合し
たスラリーを作製した。得られたスラリーをドクターブ
レード法により厚さ0.7mmのシート状に形成した。
そして、焼結後3インチ角になるように割り掛けた状態
にシートを切断した後、550℃で脱脂を行った。その
後、非酸化性雰囲気中、1800℃で3時間焼結して、
平均粒子径を4.2μmとした板状の窒化ケイ素(Si
)焼結体を得た。なお、Siの平均粒子径
は、AlN焼結体同様にSi焼結体の破断面にお
いて、単位面積50μm×50μmを任意の3個所選択
し、その単位面積を2000倍程度の拡大写真に写し、
そこに写る個々のSi結晶粒子の長軸径の平均値
により求めたものである。
That is, a sintering aid such as Y 2 O 3 was added to the raw material powder (average particle size 1.8 μm) of Si 3 N 4 by mass%.
Then, 6% and TiO 2 were added by 1%, and further, an organic solvent and a binder were added and mixed by a ball mill to prepare a uniformly mixed slurry. The obtained slurry was formed into a sheet having a thickness of 0.7 mm by a doctor blade method.
Then, after sintering, the sheet was cut in a state of being divided into three inch squares, and then degreased at 550 ° C. Then, it is sintered at 1800 ° C. for 3 hours in a non-oxidizing atmosphere,
Plate-like silicon nitride (Si) having an average particle diameter of 4.2 μm
3 N 4) to obtain a sintered body. The average particle size the Si 3 N 4, in fracture surface of the AlN sintered body likewise Si 3 N 4 sintered body, the unit area 50 [mu] m × 50 [mu] m to select any three points, 2000 times the unit area In the enlarged photo of
It is obtained from the average value of the major axis diameters of the individual Si 3 N 4 crystal grains reflected there.

【0041】このSi焼結体の両側面を同時に研
磨して、板厚を0.5mmかつ表面粗さRaを0.3μ
m以下としたセラミック基板を得て、反りを測定した。
その結果、表1に示すように、セラミック基板の反りは
2μm/インチであった。
The both sides of the Si 3 N 4 sintered body were simultaneously polished to a thickness of 0.5 mm and a surface roughness Ra of 0.3 μm.
m and a warp was measured.
As a result, as shown in Table 1, the warpage of the ceramic substrate was 2 μm / inch.

【0042】実施例5 本実施例では、以下のように、焼結条件および添加物を
変えた。
Example 5 In this example, the sintering conditions and additives were changed as follows.

【0043】すなわち、Siの原料粉末(平均粒
径2.0μm)に焼結助剤、例えば、Yを質量%
で5%,Ybを3%,TiOを0.5%添加
し、更に、有機溶剤、バインダを添加してボールミルに
て混合を行い、均一混合したスラリーを作製した。得ら
れたスラリーをドクターブレード法により厚さ0.6m
mのシート状に形成した。そして、焼結後3インチ角に
なるように割り掛けた状態にシートを切断した後、50
0℃で脱脂を行った。その後、非酸化性雰囲気中、18
20℃で3時間焼結して、平均粒子径を5.1μmとし
た板状のSi 焼結体を得た。
That is, Si3N4Raw material powder (average grain
Sintering aid such as Y2O3The mass%
At 5%, Yb2O33%, TiO20.5% added
And further add an organic solvent and a binder to the ball mill.
To obtain a uniformly mixed slurry. Get
0.6m thick slurry obtained by doctor blade method
m. And, after sintering,
After cutting the sheet in a state where it is
Degreasing was performed at 0 ° C. Then, in a non-oxidizing atmosphere, 18
Sintering at 20 ° C for 3 hours to make the average particle size 5.1 μm
Plated Si3N 4A sintered body was obtained.

【0044】このSi焼結体の両側面を同時に研
磨して、板厚を0.3mmかつ表面粗さRaを0.1μ
m以下としたセラミック基板を得て、反りを測定した。
その結果、表1に示すように、セラミック基板の反りは
5μm/インチであった。
Both sides of the Si 3 N 4 sintered body were simultaneously polished to a thickness of 0.3 mm and a surface roughness Ra of 0.1 μm.
m and a warp was measured.
As a result, as shown in Table 1, the warpage of the ceramic substrate was 5 μm / inch.

【0045】比較例1 本比較例では、以下のように、焼結条件および添加物を
変えた。
Comparative Example 1 In this comparative example, the sintering conditions and additives were changed as follows.

【0046】すなわち、AlNの原料粉末(平均粒径
2.8μm)に焼結助剤、例えば、Y を質量%で
4%添加し、更に、有機溶剤、バインダを添加してボー
ルミルにて混合を行い、均一混合したスラリーを作製し
た。得られたスラリーをドクターブレード法により厚さ
0.8mmのシート状に形成した。そして、焼結後3イ
ンチ角になるように割り掛けた状態にシートを切断した
後、550℃で脱脂を行った。その後、非酸化性雰囲気
中、1820℃で3時間焼結して、平均粒子径を4.5
μmとした板状のAlN焼結体を得た。
That is, the raw material powder of AlN (average particle diameter)
2.8 μm), a sintering aid such as Y 2O3In mass%
4%, and an organic solvent and a binder
Mixing with a mill to produce a uniformly mixed slurry.
Was. Thick the obtained slurry by the doctor blade method.
It was formed into a 0.8 mm sheet. And after sintering 3
The sheet was cut in a state where it was divided so that it became
Thereafter, degreasing was performed at 550 ° C. Then a non-oxidizing atmosphere
Medium, and sintered at 1820 ° C. for 3 hours to obtain an average particle diameter of 4.5.
A plate-shaped AlN sintered body having a thickness of μm was obtained.

【0047】このAlN焼結体の両側面を同時に研磨し
て、板厚を0.5mmかつ表面粗さRaを0.5μmと
したセラミック基板を得て、反りを測定した。その結
果、表1に示すように、セラミック基板の反りは22μ
m/インチであった。
Both sides of the AlN sintered body were simultaneously polished to obtain a ceramic substrate having a thickness of 0.5 mm and a surface roughness Ra of 0.5 μm, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 22 μm.
m / inch.

【0048】比較例2 本比較例では、以下のように、焼結条件および添加物を
変えた。
Comparative Example 2 In this comparative example, the sintering conditions and additives were changed as follows.

【0049】すなわち、AlNの原料粉末(平均粒径
1.3μm)に焼結助剤、例えば、Y を質量%で
5%添加し、更に、有機溶剤、バインダを添加してボー
ルミルにて混合を行い、均一混合したスラリーを作製し
た。得られたスラリーをドクターブレード法により厚さ
0.8mmのシート状に形成した。そして、焼結後3イ
ンチ角になるように割り掛けた状態にシートを切断した
後、500℃で脱脂を行った。その後、非酸化性雰囲気
中、1800℃で2時間焼結して、平均粒子径を2.0
μmとした板状のAlN焼結体を得た。
That is, the raw material powder of AlN (average particle diameter)
1.3 μm), a sintering aid such as Y 2O3In mass%
5%, and further, an organic solvent and a binder.
Mixing with a mill to produce a uniformly mixed slurry.
Was. Thick the obtained slurry by the doctor blade method.
It was formed into a 0.8 mm sheet. And after sintering 3
The sheet was cut in a state where it was divided so that it became
Thereafter, degreasing was performed at 500 ° C. Then a non-oxidizing atmosphere
Sintering at 1800 ° C. for 2 hours to reduce the average particle size to 2.0
A plate-shaped AlN sintered body having a thickness of μm was obtained.

【0050】このAlN焼結体の片方の表面を研磨し
て、板厚を0.5mmかつ表面粗さRaを0.5μmと
したセラミック基板を得て、反りを測定した。その結
果、表1に示すように、セラミック基板の反りは50μ
m/インチであった。
One surface of the AlN sintered body was polished to obtain a ceramic substrate having a thickness of 0.5 mm and a surface roughness Ra of 0.5 μm, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 50 μm.
m / inch.

【0051】比較例3 本比較例では、以下のように、焼結条件および添加物を
変えた。
Comparative Example 3 In this comparative example, the sintering conditions and additives were changed as follows.

【0052】すなわち、Siの原料粉末(平均粒
径3.0μm)に焼結助剤、例えば、Yを質量%
で5%添加し、更に、有機溶剤、バインダを添加してボ
ールミルにて混合を行い、均一混合したスラリーを作製
した。得られたスラリーをドクターブレード法により厚
さ0.8mmのシート状に形成した。そして、焼結後3
インチ角になるように割り掛けた状態にシートを切断し
た後、500℃で脱脂を行った。その後、非酸化性雰囲
気中、1820℃で8時間焼結して、平均粒子径(長軸
径)を8.7μmとした板状のSi焼結体を得
た。
That is, a sintering aid, for example, Y 2 O 3 was added to the raw material powder (average particle size: 3.0 μm) of Si 3 N 4 by mass%.
, And further, an organic solvent and a binder were added and mixed by a ball mill to prepare a uniformly mixed slurry. The obtained slurry was formed into a sheet having a thickness of 0.8 mm by a doctor blade method. And after sintering 3
After the sheet was cut in a state where the sheet was cut into an inch square, degreasing was performed at 500 ° C. Thereafter, in a non-oxidizing atmosphere, and 8 hours sintered at 1820 ° C., to obtain an average particle diameter (major axis diameter) and 8.7μm were plate-shaped Si 3 N 4 sintered body.

【0053】このSi焼結体の両面を同時に研磨
して、板厚を0.5mmかつ表面粗さRaを0.5μm
としたセラミック基板を得て、反りを測定した。その結
果、表1に示すように、セラミック基板の反りは20μ
m/インチであった。
Both surfaces of the Si 3 N 4 sintered body were simultaneously polished to a thickness of 0.5 mm and a surface roughness Ra of 0.5 μm.
Was obtained, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 20 μm.
m / inch.

【0054】比較例4 本比較例では、以下のように、焼結条件および添加物を
変えた。
Comparative Example 4 In this comparative example, the sintering conditions and additives were changed as follows.

【0055】すなわち、Siの原料粉末(平均粒
径1.8μm)に焼結助剤、例えば、Yを質量%
で7%添加し、更に、有機溶剤、バインダを添加してボ
ールミルにて混合を行い、均一混合したスラリーを作製
した。得られたスラリーをドクターブレード法により厚
さ0.8mmのシート状に形成した。そして、焼結後3
インチ角になるように割り掛けた状態にシートを切断し
た後、500℃で脱脂を行った。その後、非酸化性雰囲
気中、1800℃で3時間焼結して、平均粒子径(長軸
径)を5.5μmとした板状のSi焼結体を得
た。
That is, a sintering aid such as Y 2 O 3 was added to the raw material powder (average particle size 1.8 μm) of Si 3 N 4 by mass%.
, And further, an organic solvent and a binder were added and mixed by a ball mill to prepare a uniformly mixed slurry. The obtained slurry was formed into a sheet having a thickness of 0.8 mm by a doctor blade method. And after sintering 3
After the sheet was cut in a state where the sheet was cut into an inch square, degreasing was performed at 500 ° C. Thereafter, sintering was performed at 1800 ° C. for 3 hours in a non-oxidizing atmosphere to obtain a plate-shaped Si 3 N 4 sintered body having an average particle diameter (major axis diameter) of 5.5 μm.

【0056】このSi焼結体の片方の表面を研磨
して、板厚を0.5mmかつ表面粗さRaを0.5μm
としたセラミック基板を得て、反りを測定した。その結
果、表1に示すように、セラミック基板の反りは55μ
m/インチであった。
[0056] by polishing the one surface of the Si 3 N 4 sintered body, a 0.5mm and a surface roughness Ra of the sheet thickness 0.5μm
Was obtained, and the warpage was measured. As a result, as shown in Table 1, the warpage of the ceramic substrate was 55 μm.
m / inch.

【0057】[0057]

【表1】 [Table 1]

【0058】上記実施例1〜実施例5および比較例1〜
比較例4に示すセラミック基板を作製して反りを測定し
た結果、表1に示すように、片面を固定して研磨した比
較例2,比較例4では、反りが50μm/インチ,55
μm/インチ生じていた。これに対し、セラミック基板
を両面同時に研磨した実施例1〜実施例5では、いずれ
も反りが5μm/インチ以下となっており、反りを大幅
に低減できることが判明した。
The above Examples 1 to 5 and Comparative Examples 1 to
As a result of manufacturing the ceramic substrate shown in Comparative Example 4 and measuring the warp, as shown in Table 1, in Comparative Examples 2 and 4 in which one side was fixed and polished, the warp was 50 μm / inch, 55
μm / inch. On the other hand, in Examples 1 to 5 in which both surfaces of the ceramic substrate were simultaneously polished, the warpage was 5 μm / inch or less, and it was found that the warpage could be greatly reduced.

【0059】従って、本実施形態によれば、セラミック
基板を薄肉とした場合であっても、セラミック基板を両
面研磨してセラミック基板の両側面から力を負荷するこ
とで、セラミック基板の材料内部に発生する応力を互い
に相殺することで、研磨加工後のセラミック基板の反り
発生を防止できる。
Therefore, according to the present embodiment, even when the ceramic substrate is made thin, the ceramic substrate is polished on both sides and a force is applied from both sides of the ceramic substrate, so that the inside of the material of the ceramic substrate is formed. By canceling the generated stresses, warpage of the ceramic substrate after polishing can be prevented.

【0060】また、比較例1,比較例3では、セラミッ
ク焼結体の粒子の平均粒径が本発明の好ましい範囲を超
えており、セラミック基板両面を同時に研磨した場合で
あっても、反りが22μm/インチ,55μm/インチ
生じていた。これに対し、セラミック焼結体の粒子の平
均粒径を好ましい範囲にした実施例1〜実施例5では、
いずれも反りが5μm/インチであり、反りの発生を低
減することができた。
In Comparative Examples 1 and 3, the average particle diameter of the particles of the ceramic sintered body exceeded the preferred range of the present invention, and even when both surfaces of the ceramic substrate were simultaneously polished, the warpage was small. 22 μm / inch and 55 μm / inch occurred. On the other hand, in Examples 1 to 5 in which the average particle diameter of the ceramic sintered body was in a preferable range,
In each case, the warpage was 5 μm / inch, and the occurrence of warpage could be reduced.

【0061】従って、本実施形態によれば、セラミック
焼結体の粒子を小径化して研磨性を向上させることで、
研磨加工時における摩擦熱の発生を抑制でき、より一
層、反りの発生を防止できることが確認された。
Therefore, according to the present embodiment, by reducing the diameter of the particles of the ceramic sintered body to improve the polishing property,
It has been confirmed that the generation of frictional heat during polishing can be suppressed, and the occurrence of warpage can be further prevented.

【0062】実施例6〜実施例10,比較例5〜比較例
実施例1〜実施例5および比較例1〜比較例4のセラミ
ック基板上に、スパッタ法により表2に示した回路層を
設けた。その際に、スパッタ不良の発生する割合を求め
た。なお、スパッタ不良とは、所定の配線形状になるよ
うスパッタリングを行ったにも関わらず、所定の配線形
状が得られなかったものの割合(%)を示したものであ
る。その結果を表2に示す。
Examples 6 to 10, Comparative Examples 5 to Comparative Examples
8 The circuit layers shown in Table 2 were provided on the ceramic substrates of Examples 1 to 5 and Comparative Examples 1 to 4 by a sputtering method. At that time, the rate of occurrence of defective sputtering was determined. Here, the term “sputter failure” indicates the percentage (%) of the cases in which a predetermined wiring shape was not obtained in spite of performing sputtering to obtain a predetermined wiring shape. Table 2 shows the results.

【0063】[0063]

【表2】 [Table 2]

【0064】表2から分かる通り、本発明の実施例に係
るセラミック基板は反りが小さいことから、スパッタ不
良発生率を低減できることが分かった。また、本発明の
セラミック基板は両面が研磨加工されていることから、
表面裏面どちらにも回路層を設けることができる。その
ため表面裏面の違いがないことからスパッタ装置に装着
する際の方向性を気にしなくて済むため作業性が良好で
ある。
As can be seen from Table 2, since the ceramic substrate according to the example of the present invention has a small warpage, it was found that the rate of occurrence of spatter defects can be reduced. Also, since the ceramic substrate of the present invention is polished on both sides,
A circuit layer can be provided on both the front and back surfaces. Therefore, since there is no difference between the front surface and the back surface, it is not necessary to worry about the directionality when mounting the device on the sputtering apparatus, so that the workability is good.

【0065】それに対し、比較例のセラミック基板は反
りが大きいことから不良発生率が大きく、スパッタ等の
物理蒸着法により回路層を設けることには向かないこと
が判明した。
On the other hand, it was found that the ceramic substrate of the comparative example had a large occurrence of defects due to large warpage, and was not suitable for providing a circuit layer by physical vapor deposition such as sputtering.

【0066】実施例11〜実施例14,比較例9,比較
例10 基板サイズを表3のように変えた以外は、実施例1と同
様としたセラミック基板を実施例11、実施例12およ
び比較例9とした。同じく基板サイズを表3のように変
えた以外は、実施例4と同様としたセラミック基板を実
施例13、実施例14および比較例10とした。なお、
比較例9および比較例10は、本発明の範囲外の基板サ
イズを有するものである。
Examples 11 to 14, Comparative Example 9, Comparative
Example 10 Except that the substrate size was changed as shown in Table 3, the same ceramic substrates as in Example 1 were used as Example 11, Example 12, and Comparative Example 9. The same ceramic substrates as in Example 4 except that the substrate size was changed as shown in Table 3 were used as Example 13, Example 14, and Comparative Example 10. In addition,
Comparative Examples 9 and 10 have substrate sizes outside the scope of the present invention.

【0067】上記実施例11〜実施例14,比較例9〜
比較例10の反り量を測定した。その結果を表3に示
す。
The above Examples 11 to 14 and Comparative Examples 9 to
The amount of warpage of Comparative Example 10 was measured. Table 3 shows the results.

【0068】[0068]

【表3】 [Table 3]

【0069】表3から分かる通り、セラミック基板の短
辺が120mm以下であれば反り量を5μ/インチ以下
にできることが分かった。
As can be seen from Table 3, if the short side of the ceramic substrate is 120 mm or less, the warpage can be reduced to 5 μ / inch or less.

【0070】それに対し、比較例9、比較例10のよう
に基板サイズは本発明の範囲を超えて大きくなると本発
明の効果が十分得られないことが判明した。これは基板
サイズが大きくなりすぎると、研磨加工時の応力を緩和
し難くなるためであると考えられる。
On the other hand, it has been found that the effects of the present invention cannot be sufficiently obtained when the substrate size is increased beyond the range of the present invention as in Comparative Examples 9 and 10. This is considered to be because if the substrate size is too large, it is difficult to reduce the stress during polishing.

【0071】[0071]

【発明の効果】以上説明したように、本発明のセラミッ
ク基板の製造方法によれば、放熱性に優れ、かつ研磨加
工後における反りを低減したセラミック基板を得られ
る。また、セラミック基板上に被膜性の高い薄膜回路層
を形成した回路基板を得ることができ、半導体素子を高
集積化,高速化,大チップ化した高性能の回路部品が提
供できる。
As described above, according to the method for manufacturing a ceramic substrate of the present invention, it is possible to obtain a ceramic substrate having excellent heat dissipation and reduced warpage after polishing. In addition, a circuit board in which a thin film circuit layer having a high coating property is formed on a ceramic substrate can be obtained, and a high-performance circuit component in which a semiconductor element is highly integrated, operated at high speed, and a large chip can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施形態における、反りの測定方法を
模式的に示す図。
FIG. 1 is a diagram schematically showing a warpage measuring method in an embodiment of the present invention.

【図2】本発明の実施形態における研磨加工を示す断面
図であり、(a)はセラミック基板サイズが小である場
合、(b)はセラミック基板サイズが大である場合の研
磨加工を示す断面図。
FIGS. 2A and 2B are cross-sectional views illustrating polishing processing according to an embodiment of the present invention. FIG. 2A is a cross-sectional view illustrating polishing when the size of the ceramic substrate is small, and FIG. FIG.

【符号の説明】[Explanation of symbols]

1 平板 2 AlN焼結体 3a,3b 上端盤 4a,4b 下端盤 A AlN焼結体の長さ B 平板からAlN焼結体の凹面までの垂直距離の最大
1 Flat plate 2 AlN sintered body 3a, 3b Upper plate 4a, 4b Lower plate A Length of AlN sintered body B Maximum value of vertical distance from flat plate to concave surface of AlN sintered body

Claims (11)

【特許請求の範囲】[Claims] 【請求項1】 板状のセラミック焼結体から成り、反り
が5μm/インチ以下であることを特徴とするセラミッ
ク基板。
1. A ceramic substrate comprising a plate-shaped ceramic sintered body and having a warpage of 5 μm / inch or less.
【請求項2】 請求項1記載のセラミック基板におい
て、板厚が0.2〜0.5mmであることを特徴とする
セラミック基板。
2. The ceramic substrate according to claim 1, wherein the thickness of the ceramic substrate is 0.2 to 0.5 mm.
【請求項3】 請求項1または2記載のセラミック基板
において、セラミック焼結体は、窒化アルミニウムまた
は窒化ケイ素のいずれか1種を主成分とすることを特徴
とするセラミック基板。
3. The ceramic substrate according to claim 1, wherein the ceramic sintered body mainly comprises one of aluminum nitride and silicon nitride.
【請求項4】 請求項1から3までのいずれかに記載の
セラミック基板において、セラミック基板の両表面の表
面粗さRaは、0.5μm以下であることを特徴とする
セラミック基板。
4. The ceramic substrate according to claim 1, wherein both surfaces of the ceramic substrate have a surface roughness Ra of 0.5 μm or less.
【請求項5】 請求項1から4までのいずれかに記載の
セラミック基板において、セラミック基板は略長方形状
であり、短辺の長さが120mm以下であることを特徴
とするセラミック基板。
5. The ceramic substrate according to claim 1, wherein the ceramic substrate has a substantially rectangular shape and a short side length is 120 mm or less.
【請求項6】 請求項3記載のセラミック基板におい
て、窒化アルミニウムを主成分とするセラミック基板で
あって、窒化アルミニウム結晶粒子の長軸径の平均粒径
が3.0μm以下であることを特徴とするセラミック基
板。
6. The ceramic substrate according to claim 3, wherein the ceramic substrate contains aluminum nitride as a main component, and the average particle diameter of major axes of aluminum nitride crystal grains is 3.0 μm or less. Ceramic substrate.
【請求項7】 請求項3記載のセラミック基板におい
て、窒化ケイ素を主成分とするセラミック基板であっ
て、窒化ケイ素結晶粒子の長軸径の平均粒径が2.0〜
7.0μmであることを特徴とするセラミック基板。
7. The ceramic substrate according to claim 3, wherein the ceramic substrate contains silicon nitride as a main component, and the silicon nitride crystal particles have an average major axis diameter of 2.0 to 2.0.
A ceramic substrate having a thickness of 7.0 μm.
【請求項8】 請求項1から7までのいずれかに記載の
セラミック基板の少なくとも一方の表面に、厚さ0.5
〜5.0μmの回路層が形成されていることを特徴とす
る薄膜回路基板。
8. A ceramic substrate according to claim 1, wherein at least one surface has a thickness of 0.5.
A thin-film circuit board, wherein a circuit layer of up to 5.0 μm is formed.
【請求項9】 セラミック粉末を焼結して板状のセラミ
ック焼結体とし、このセラミック焼結体の両表面に研磨
加工を同時に施して前記セラミック焼結体の両側面の表
面粗さRaを0.5μm以下としたセラミック基板を得
ることを特徴とするセラミック基板の製造方法。
9. Sintering a ceramic powder to form a plate-shaped ceramic sintered body, and polishing both surfaces of the ceramic sintered body at the same time to reduce the surface roughness Ra on both side surfaces of the ceramic sintered body. A method for manufacturing a ceramic substrate, comprising obtaining a ceramic substrate having a thickness of 0.5 μm or less.
【請求項10】 請求項9記載のセラミック基板の製造
方法において、板厚を0.2〜0.5mmとしたセラミ
ック焼結体を用いることを特徴とするセラミック基板の
製造方法。
10. The method of manufacturing a ceramic substrate according to claim 9, wherein a ceramic sintered body having a thickness of 0.2 to 0.5 mm is used.
【請求項11】 請求項9または10記載のセラミック
基板の製造方法において、窒化アルミニウムまたは窒化
ケイ素のいずれか1種を主成分としたセラミック焼結体
を用いることを特徴とするセラミック基板の製造方法。
11. The method for manufacturing a ceramic substrate according to claim 9, wherein a ceramic sintered body containing at least one of aluminum nitride and silicon nitride as a main component is used. .
JP2000373122A 2000-12-07 2000-12-07 Ceramic substrate, thin film circuit substrate, and method for manufacturing ceramic substrate Expired - Lifetime JP4795529B2 (en)

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JP2009054489A (en) * 2007-08-28 2009-03-12 Panasonic Electric Works Co Ltd Discharge lamp lighting device and lighting fixture
JP2009215142A (en) * 2008-03-13 2009-09-24 Hitachi Metals Ltd Silicon nitride substrate, method for producing the same, silicon nitride circuit board using the same, and semiconductor module
JP2010180105A (en) * 2009-02-06 2010-08-19 Denki Kagaku Kogyo Kk Probe guiding member
JP2019509960A (en) * 2016-01-26 2019-04-11 コーニング インコーポレイテッド Systems, processes and related sintered products

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JPH0848564A (en) * 1994-04-05 1996-02-20 Natl Inst For Res In Inorg Mater Silicon nitride sintered body and method for producing the same
JPH11188588A (en) * 1997-12-26 1999-07-13 Ngk Insulators Ltd Disk substrate intermediate product and its manufacture
JP2000053470A (en) * 1998-05-06 2000-02-22 Sumitomo Electric Ind Ltd Aluminum nitride sintered body, manufacturing method thereof, and semiconductor substrate
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Publication number Priority date Publication date Assignee Title
JP2009054489A (en) * 2007-08-28 2009-03-12 Panasonic Electric Works Co Ltd Discharge lamp lighting device and lighting fixture
JP2009215142A (en) * 2008-03-13 2009-09-24 Hitachi Metals Ltd Silicon nitride substrate, method for producing the same, silicon nitride circuit board using the same, and semiconductor module
JP2010180105A (en) * 2009-02-06 2010-08-19 Denki Kagaku Kogyo Kk Probe guiding member
JP2019509960A (en) * 2016-01-26 2019-04-11 コーニング インコーポレイテッド Systems, processes and related sintered products
US11014822B2 (en) 2016-01-26 2021-05-25 Corning Incorporated System, process and related sintered article
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US11952285B2 (en) 2016-01-26 2024-04-09 Corning Incorporated System, process and related sintered article

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