JP2002171267A - Method and circuit for signal processing - Google Patents

Abstract

PROBLEM TO BE SOLVED: To resolve a communication defect caused by a failure to detect a gap in the idle state in the case that a communication network of serial connection is used to perform an arbitration process. SOLUTION: The end point of a sub-action gap and that of an arbitration reset gap are prescribed by a function which takes a first gap count value, which is not directly changed by a register write instruction from a link layer, as a variable, and the first gap count value is a variable which is changed to a second gap count value directly changed by the register write instruction from the link layer only at the time of transition of one node from a state other than the idle state to the idle state.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to each of the IEEE 1
The present invention relates to a signal processing technique for transmitting and receiving signals in a plurality of serially connected electrical equipment (node) networks having an interface of the 394 standard.

[0002]

2. Description of the Related Art Heretofore, personal computers and peripheral devices such as video cameras, digital still cameras, scanners, printers, mice, and keyboards have been connected using different connectors and cables.

According to such a method, a separate interface is required for each peripheral device, and various types of cables extend from a personal computer, which complicates the connection.

Recently, IEEE1394 has been used as a unified interface for connecting peripheral devices such as digital video cameras, handy scanners, and digital still cameras that input and output data related to multimedia technology to information processing devices such as personal computers. Standards have been proposed and their practical use is progressing.

[0005] An interface based on the IEEE 1394 standard is an interface used for serial connection.

FIG. 9 schematically shows a system configuration of an interface for performing communication via an IEEE 1394 serial bus. The interface is included in a large number of nodes (connection points existing between communication networks, specifically, electronic devices such as personal computers and peripheral devices). As shown in FIG. 9, the IEEE 1394 interface 101 includes a hardware unit 103 and a firmware unit 105. The hardware unit 103 includes a physical layer controller (PHY) 121 and a link layer controller 125. The firmware unit 105 includes the transaction layer 127 and the serial bus manager 113.
And

The physical layer controller 121 is composed of, for example, an integrated circuit (IC) and has functions such as bus initialization, transmission / reception data encoding / decoding, bus arbitration, and bias voltage output / detection. are doing. The link layer controller 125 is also configured by, for example, an IC, and has functions such as cycle control and packet transmission / reception. The physical layer controller 121 is connected to the serial bus 111, and is connected to the physical layer controller of another node via the serial bus 111.

[0008] The transaction layer 127 controls serial bus transactions.
25 together with the function of optimizing the use efficiency of the bus. The serial bus manager 113 performs bus power management, provision of a speed map, provision of a topology map, and optimization of the bus based on the map.

Since each node has these interfaces, a large number of nodes can be serially connected. The number of connectable nodes is as large as 63, and the distance between the nodes can be increased.

[0010] A communication network using an interface based on the IEEE 1394 standard requires synchronization data (Iss) that must guarantee completion of information transfer within a fixed time.
Asynchronous data transfer that transfers synchronous data and asynchronous data that guarantees that data is always transmitted to the destination node
data transfer function of asynchronous data transfer for transferring the data. Data transmitted and received on a communication network is divided into packets and transferred. The process of transferring this packet is called a subaction. Corresponding to the above two transfer functions, there are an isochronous subaction for transferring packets at regular intervals and an asynchronous subaction for not transferring data regularly.

The sub-action can be considered in three steps. An arbitration step for requesting and granting a bus control right, a data packet transfer step for performing actual data transfer, and an acknowledgment step for returning a packet reception status and the like are included.

In the arbitration step,
A node that wants to transmit a packet among a number of nodes forming a communication network has its physical layer controller 12
1 is requested to output a signal for obtaining control of the serial bus 111. In the arbitration step, finally, one node is given control of the bus. The node that has obtained the bus control right can transmit a data packet.

[0013]

FIG. 10 is a diagram showing an example of the IEEE 1 standard.
FIG. 3 is a state transition diagram illustrating a schematic configuration of an arbitration state machine based on the 394a_2000 standard. FIG.
FIG. 1 is a flowchart illustrating a processing procedure when a transition is made from each state to the idle state in the state transition diagram of FIG.

FIG. 10 shows one node (hereinafter referred to as “node”).
) As a subject, and shows a state transition of the node. Of the states shown in FIG.
0: The idle state indicates a state where the node does not output the arbitration signal. A1: The request state is a state in which a TX_REQUEST signal (bus use request signal) is output to the parent port of the node. A2: The grant state is such that a serial bus enable signal (TX
_GRANT signal). PH: PH
In the Y response state, a PHY response packet transmitted as a response to the extended PHY packet is output. RX: In the packet reception state, a packet is received. TX: In the packet transmission state, a packet is transmitted.

[0015] As shown in FIG.
According to the _2000 standard, when transitioning from all states other than A0: idle state to A0: idle state, in step S101, the arbitration timer (arb)
_Timer) is operated (reset). That is,
arb_timer = 0. Then, step S1
At 02, an operation for detecting a subaction gap and an arbitration reset gap is started.

In the IEEE 1394 standard, a subaction gap and an arbitration reset gap are
Reset the arbitration timer (arb_tim
er = 0), and is defined as the period from when the arbitration timer reaches the value represented by the following equations (1) and (2). That is, equation (1), (2)
The expression is an expression representing each end point of the subaction gap and the arbitration reset gap.

Subaction_gap = (28 + gap_count * 16) / Base rate (1) Arb_reset_gap = (52 + gap_count * 16) / Base rate (2) Here, the gap count value (gap_count value)
Is a variable stored in a register of the physical layer. Ba
serate is the lowest bit rate of a packet output to the IEEE 1394 cable, and is 98.304.
Mbit / s.

As shown in the above equations (1) and (2), A0: Subaction_ in the idle state
If a gap is detected and A0: the idle state continues (A0: does not escape from the idle state in any step), Arb_reset_gap is detected.

If the value of the arbitration timer is Suba
When the value becomes the same as the ction_gap value, the end point of the subaction gap has been detected. Step S1
In 03, the link layer is notified that a subaction gap has been detected. If the idle state continues, the process returns to step S102. In step S102, the value of the arbitration timer is set to Arb_reset.
When it becomes equal to the _gap value, it notifies the link layer that the end point of the arbitration reset gap has been detected.

If the sub-action gap and the arbitration reset gap are not detected in step S102, the process proceeds to the next step, where RX_DATA_PRE is set.
The presence / absence of FIX and RX_REQUEST signals, the presence / absence of transmission packets, and the like are checked.

However, when the electronic device network is actually operated based on the IEEE 1394 standard, it may take time for the link layer to escape from the bus initialization phase or the isochronous cycle.

It is an object of the present invention to provide a signal processing technique that enables smooth data communication when data is transferred using a serial connection communication network conforming to the IEEE 1394 standard.

[0023]

According to an aspect of the present invention, a plurality of nodes connected to each other by a bus to form a network based on the IEEE 1394 standard are included in a physical layer controller, and one node is included in the physical layer controller. A sub-action for defining a period from when one of the plurality of nodes transmits a packet signal to when the one node can transmit an asynchronous packet signal when entering an idle state in which an arbitration signal is not output; When the one node detects the end point of the gap, data transmission becomes possible, and the idle state continues even after detecting the end point of the subaction gap. One fair period and the next public one each guarantee that each node sends one fair packet. An arbitration reset which defines a gap period between the first and second nodes. A signal processing circuit which is in a state where data transmission is enabled by detecting the end point of the gap, the end point of the sub-action gap and the arbitration reset. The end point of the gap is defined by a function having a first gap count value that is not directly changed by a register write instruction from the link layer as a variable, and the first gap count value is determined by the one node. A signal processing circuit is provided that is a variable that is changed to a second gap count value that is directly changed by a register write instruction from the link layer only when transitioning from a state other than the idle state to the idle state.

According to another aspect of the present invention, an IEEE 13
94. A signal processing method in a network in which a plurality of nodes are connected to each other by a bus according to the H.94 standard, the method comprising: (a) when one of the plurality of nodes enters an idle state in which an arbitration signal is not output; A first gap defined as a period from when any one of the plurality of nodes sends a packet signal to when the one node can send an asynchronous packet, and which is not directly changed by a register write instruction from the link layer. Detecting an end point of a sub-action gap determined by a function having a count value as a variable; and (b) notifying the link layer of the end point of the arbitration reset gap when the end point of the arbitration reset gap is detected in the step (a). (C) when the idle state continues even after the step (a). Defining a gap period between one fair period and the next fair period to ensure that each of the plurality of nodes sends one fair packet each, Detecting an end point of an arbitration reset gap determined by a function using a first gap count value that is not directly changed by the instruction as a variable; and (d) detecting an end point of the arbitration reset gap in the step (c). And (e) registering the first gap count value only when the one node makes a transition from a state other than the idle state to the idle state. Changing to a second gap count value directly changed by a write instruction. It is subjected.

The second gap count value is changed by a PHY configuration packet from the serial bus manager, and is also directly changed by a register write command from the interface between the link layer controller and the physical layer controller. The first gap count value is not directly changed by a register write instruction from the interface between the link layer controller and the physical layer controller.

When transitioning from another state to an idle state in which no arbitration signal is output, the second gap count value is substituted for the first gap count value. The latest first gap count value determines the end of the subaction gap, the end of the arbitration reset gap. When the end points of these gap values are detected, the link layer controller is notified that a gap has been detected.

In the idle state, the end point of the subaction gap value and the end point of the arbitration reset gap are determined based on the first gap count value, and the gap can be detected even if the network situation changes. it can.

[0028]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Before describing a signal processing technique according to an embodiment of the present invention, the reason why the above-described problem occurs will be considered.

According to the IEEE 1394 standard, the gap count value is stored in a register included in the physical layer controller. A0: When in the idle state, the gap count value is read from the register and referred to. Incidentally, the gap count value is changed according to the connection state of the communication network at that time.

Normally, the gap count value is determined by a physical layer configuration packet (PHY configuration pack) transmitted by the serial bus manager.
et) according to the network status and the like. In addition, it may be changed by a register write instruction from an interface between the link layer controller, which is an upper layer of the physical layer, and the physical layer controller.

The link layer, which is the upper layer, does not operate by grasping the detailed status of the physical layer, which is the lower layer (such as the state of the physical layer). The inventor
When the node is in the A0: idle state, it is considered that the gap count value stored in the above register may be rewritten by access from the link layer.

When one node is in the A0: idle state, and the gap count value is rewritten to a small value by the register write instruction, at that time, the sub-action gap in the above formulas (1) and (2) is obtained. Subacton_gap value indicating the end point of Arb_res, indicating the end point of the arbitration reset gap
The et_gap value may be smaller than the value indicated by the arbitration timer. In such a case, the physical layer cannot detect the sub-action gap and arbitration reset gap,
Therefore, it was thought that the link layer could not recognize the gap, so that it would not be possible to escape from the bus initialization phase and the isochronous cycle.

The inventor has added, in addition to the gap count value,
Another value (here, temporarily referred to as a gap count valid value (gap_count_valid) value) was considered to be stored in a register.

Su indicating the end point of the subaction gap
The "action_gap" value and the "arb_reset_gap" value indicating the end point of the arbitration reset gap are used as variables of a gap count valid value (first gap count value) that is not directly affected by a register write instruction in response to a change in network state.

The gap count value (second gap count value) may change by a register write instruction according to a change in the state of the network, etc. The gap count valid value may change according to a change in the state of the network. It is not directly affected by the register write instruction.

In addition, in order to reflect a change in the state of the network in the subaction gap and the arbitration reset gap, at the time of transition from any state other than the idle state to the idle state (entrance to the idle state), The gap count value that directly reflects the state of the network is changed to a gap count valid value. For example, when resetting the arbitration timer (arb_timer = 0),
The gap count value may be substituted for the gap count valid value.

In this way, even if the gap count value is changed due to network conditions while one node is in the A0: idle state, the gap will be reliably detected. Since the gap count valid value is not changed until one node transitions to the next entry point of A0: idle state, the end point of the sub-action gap and the end point of the arbitration reset gap can be reliably detected.

Based on the above considerations, a signal processing technique according to an embodiment of the present invention will be described below with reference to FIGS.

FIGS. 1A and 1B show the state of the network from a bus reset to A0: entering an idle state. FIGS. 2C and 2D show A0: exiting from an idle state and arbitration. It shows a change in the state of the network at the time (A1, A2).

FIG. 1A shows a configuration example of a communication network using an interface based on the IEEE 1394 standard.
In this example, there are six nodes from node A to node F in the communication network. There are two types of nodes, a node called a leaf and a node called a branch. A leaf is a node that is connected to only one device (for example, a personal computer). A branch is a node that is connected to two or more devices. Devices that are not turned on are included in the device count.

In FIG. 1A, nodes A, E, and F are leaves. Nodes B, C, and D are branches. Each node has one or more ports. A bus line BL connecting the nodes between the ports included in the nodes
Is connected.

The first operation to be performed in automatically setting the communication network is to reset the bus line BL. When the reset operation starts, all the nodes stop reading and writing operations and stop data transfer.

Next, a phase for recognizing where the node is located in what kind of tree structure is entered.

By exchanging signals bidirectionally between the nodes, it is determined whether the own port is the parent port p or the child port c with respect to the port included in the partner node.

Inquired earlier (parent_not
The port that transmitted the ify signal) becomes the parent port (p). When the parent-child relationship is determined, the whole becomes a complete tree structure.

In FIG. 1A, only the node B has no parent port (p). Node B is the parent to all nodes and is called the root. The route is
There is only one in a serially connected tree-structured communication network.

The arbitration (ar) described above
When the tree structure of the communication network is determined by the (bitration) step, the node number of the communication network is then determined.
Move on to step D).

Based on FIG. 1B, the node number (self I
The step of determining D) will be described. After performing the above arbitration step, each node sends out its own ID packet. The information included in the self ID packet is:
Your node number, where you are on the communication network, how many ports the node has, whether devices are connected to each port, whether each port is a parent or a child, etc. is there. The node that first acquires the arbitration, for example, node A in FIG. 1B, acquires the node number (0).

The node A sends out a self ID packet having information of the node number (0). Since this packet is broadcast, all nodes know that “node number (0)” has been allocated.

Next, the node C that has acquired the arbitration becomes the node number (1). By transmitting the self ID packet having the information of the node number (1) by the node E,
Inform other nodes that “node number 1” has also been assigned.

Arbitration is performed such that the order in which all the nodes A to F send their own ID packets is first the leaf, the next is the branch, and the last is the root. The route always sends the self ID packet last. The root node B has the largest node number, for example, (5).

One communication network serially connected using an interface based on the IEEE 1394 standard can connect up to 63 nodes. The bus lines can be expanded up to a total of 1023 lines. That is, a maximum of 1023 × 63 devices can be connected.

After the step of determining the self ID is completed, the apparatus enters an idle state for a time defined as a sub-action gap. The initialization of the bus line is completed, and asynchronous transfer or synchronous transfer becomes possible. The time from the reset of the bus line to the completion of the above initialization is about 200 μs. The time required for initialization varies depending on the number of nodes.

The step of requesting the right to use the bus will be described with reference to FIG. 2C, and the step of sending a bus licensing or sending a DP (data prefix) signal will be described with reference to FIG. 2D.

A communication network serially connected using an interface based on the IEEE 1394 standard always performs arbitration of the right to use the bus prior to data transfer.

At a time, only one node performs data transfer. Therefore, no collision of data signals occurs.

As shown in FIG. 2C, when arbitration starts, one or more nodes issue a request for a bus use right to the parent node (indicated by an arrow parallel to the bus line). The parent node further requests the right to use the bus toward the parent node. This request is finally delivered to route B.

As shown in FIG. 2D, route B, which has received the request for the right to use the bus line, determines which node is to use the bus line. A bus license is given to the node that has acquired the arbitration. At the same time, for nodes (nodes A and F) for which arbitration could not be obtained, DP (data pr)
efix) signal. Upon receiving the DP signal, the request for the right to use the bus line is rejected.

Before starting the data transfer, the node which has obtained the bus line license sends a signal indicating the transfer speed. Usually three different data transfer rates (100 Mbit /
Second, 200 Mbit / sec, and 400 Mbit / sec).

In the asynchronous transfer method, data is sent from one node to the address space of another node.
The node ignores data signals applied to other than its own address.

The packet signal is transmitted from the communication transfer source node to the transfer destination node. When the transfer destination node returns an acknowledgment or returns a response packet, a transaction (a series of processing that occurs when transmitting and receiving desired data) is completed.

When the destination node receives the data of the asynchronous packet signal, the destination node must return an acknowledgment to all nodes.
The content of the acknowledgment is success or busy. However,
No arbitration is required to return the acknowledgment.

FIG. 3 is a state transition diagram showing a schematic configuration of the arbitration state machine according to the present embodiment. 4 to 7 correspond to the state transition diagram of FIG.
It is a flowchart figure which shows the flow of the transition between each state, conditions, etc. Although FIGS. 4 to 7 can be basically represented by one figure, they are separately described in four figures for convenience. FIGS. 4 to 7 are connected by the same lowercase alphabet. FIG. 8 is a flowchart showing, in more detail, the transition flow, conditions, and the like when transitioning from each state to the idle state in order to explain the features of the signal processing technique according to the present embodiment.

The arbitration state machine shown in FIG. 3 shows the states in the arbitration process and the transition between the states.

The subaction gap is a gap (idle) time from when one node sends a packet to when the next (one node or another node) can send an asynchronous packet.

The arbitration reset gap is
This is a gap period that indicates the end of a fair period when fair arbitration for equally guaranteeing bus access to all transmission request nodes is performed. One node can transmit only one fair packet in one fair period. The fair period ends when all nodes on the network send one fair packet at a time, there is an arbitration reset gap, and then the next fair period begins.

Hereinafter, the signal processing technique according to the present embodiment will be described in detail with reference to the state transition diagram of FIG. 3 and the flowchart diagrams of FIGS. In FIG. 3, for example, description of A0: A1 means transition from the A0 state to the A1 state. The flow of signal processing described below will be described based on FIG. 3 and will be referred to FIGS. 4 to 7 as appropriate.

A0: The idle state indicates a state where the node does not output an arbitration signal. A1: Request status is TX_REQUEST to parent port of node
In this state, a signal (bus use request signal) is output. A
2: The grant state is a state in which a serial bus permission signal (TX_GRANT signal) is output to the request child port. PH: In the PHY response state, a PHY response packet transmitted as a response to the extended PHY packet is output. RX: In the packet reception state, a packet is received. TX: In the packet transmission state, a packet is transmitted. 1) A0: Transition from Idle State A0: A0; When the node in the idle state detects a subaction gap or an arbitration reset gap in step S2, the process proceeds to step S3 and notifies the link layer that the gap has been detected. After outputting the signal, the process returns to step S2.

A0: RX; If the node in the idle state does not detect a subaction gap or an arbitration reset gap in step S2, the process proceeds to step S4. Upon receiving the RX_DATA_PREFIX signal in step S4,
X: Move to the packet receiving state.

A0: A1; RX in step S4
If the _DATA_PREFIX signal has not been received, the process proceeds to step S5. In step S5, no acknowledgment request signal from the link layer is received, and in step S6, no ping packet is received.
In step 7, if no response packet is transmitted, step S
Move to 8. In step S8, there is a bus request from the link layer, and it is the timing at which the node can be arbitrated. If it is determined in step S9 that the node is not the root, the state transits to A1: request state.
In step S8, if there is no bus request from the link layer, or if the node has not received the arbitration timing and has received the serial bus use permission signal from the child port in step S10, the node proceeds to step S11. When it is determined that the route is not the root, the state transits to A1: request state.

A0: A2; In the above case,
If a node is determined to be a root in step S11 when a serial bus use permission signal is received from a child port in a state where the process has proceeded to step S10, A
2: Transition to the grant state.

A0: PH; When the process proceeds to step S7, if it is necessary to output a PHY response packet, the state transits to the PH: PHY response state.

A0: TX; a bus request from the link layer is received in step S8, and it is the timing at which the node can be arbitrated. In step S9, it is determined that the node is the root, or in step S5, When an acknowledgment request (response request) is received from the link layer, the state transits to the TX: packet transmission state.

A0: S4; In step S6, a ping packet is received and a self ID packet is transmitted (output).
If it is necessary to perform the operation, the state shifts to S4: self-ID transmission state. 2) A1: Transition from request state A1: RX; When receiving a data prefix signal at the parent port in step S16, transition to RX: packet reception state.

A1: A0; If no data prefix signal is received at the parent port in step S16, the flow advances to step S17. When the serial bus permission signal (RX_GRANT signal) is received in step S17 and the node is not capable of transmitting a packet in step S18 and the serial port request signal is not received in the child port in step S19, A0: idle Transition to the state.

A1: A2; The serial port permission signal is received by the parent port at step S17, and
If the node is not capable of transmitting a packet at 18 and a serial bus request signal is received at the request child port at step S19, the state transits to the A2 state.

A1: TX; The serial port permission signal is received by the parent port in step S17,
If the node is able to transmit a packet in step 8, the state transits to the TX: packet transmission state. 3) A2: Transition from Grant State A2: A0; Upon receiving a signal (RX_REQUEST_CANCEL signal) for canceling the request for using the serial bus at the request child port in step S20, transition to A0: idle state.

A2: RX; When a signal for canceling the serial bus request signal from the child node is not received at the request child port at step S20 and a data prefix signal is received at step S21, the state transits to RX: packet reception state. I do. 4) PHY: transition from response state PH: A0; After outputting a PHY response packet, transition to A0 state. 5) RX: Transition from packet receiving state RX: A0; In step S12, the received packet must be a concatenated packet (concatenated packet: another packet transmitted continuously without arbitration after one packet). If it is determined that fly-by arbitration (arbitration in which the own packet is connected to the packet received by the child port and transmitted) is not performed in step S13, A
0: Transition to idle state.

RX: RX; If it is determined in step S12 that the received packet is a concatenate packet, the state returns to the RX state again.

If it is determined in step S12 that the received packet is not a concatenate packet, and if fly-by arbitration is performed in step S13, the state transits to the TX: packet transmission state. 6) TX: Transition from packet transmission state TX: A0; If no concatenate packet is transmitted in step S14 and a short bus reset signal is not output in step S15, transition to A0: idle state.

TX: R0; When a short bus reset signal is output in step S15, the state transits to R0: bus reset start state.

TX: TX; When a concatenate packet is transmitted in step S14, the state returns to the TX state.

In the above-mentioned state transition operation, the case of returning to A0: idle state from all states other than A0: idle state will be described in more detail.

In the arbitration state machine according to the present embodiment, the gap count value (first variable)
In addition, a gap count valid value (second variable), which is another value, is stored.

As shown in FIG. 8, the arbitration timer is started (reset) when transitioning from all states other than A0: idle state to A0: idle state. That is, arb_timer = 0 is set (step S1). In addition, the gap count valid value (gap_count_valid) stored in the register
Is replaced with the gap count value (gap_count value) also stored in the register.

Next, in step S2, an operation for detecting a gap on the cable is started.

Su indicating the end point of the subaction gap
The argument_gap value and the Arb_reset_gap value indicating the end point of the arbitration reset gap are defined as variables of the gap_count_valid value.
It is determined by the following equations (3) and (4).

Subaction_gap = (28 + gap_count_valid * 16) / Base rate (3) Arb_reset_gap = (52 + gap_count_valid * 16) / Base rate (4) Here, Base98.
/ S. Baserate is the lowest bit rate of a packet output to the 1394 cable.

Based on the above equations (3) and (4), A
0: A sub-action gap (end point) is detected in the idle state, and A0: If the idle state continues, an arbitration reset gap (end point) is detected.

At the end time of the sub-action gap, the link layer is notified in step S4 that a sub-action gap has been detected. When the end time of the arbitration reset gap has come, it is determined that the arbitration reset gap has been detected at the link layer. Inform.

The gap count valid value (Gap_c)
The value of “out_valid” is not directly changed by a register write instruction from the link layer that reflects the state of the network. Therefore, even if the gap count value (gap_count value) is changed during A0: idle, the gap count valid value (gap_count value) is changed.
_Valid value) is not changed until the next transition to A0: idle state, the subaction gap and the arbitration reset gap do not change, and the gap can be detected reliably. Since the detection of the gap can be notified to the link layer, it is possible to reliably escape from the bus initialization phase and the synchronization cycle, and to ensure smooth communication.

When transitioning from any state other than the idle state to the idle state, the latest (previous) gap count value (gap_count) is set as the gap count valid value (gap_count_valid value).
Value), it is possible to reflect a change in the state of the network in the subaction gap and the arbitration reset gap.

In the above-described embodiment, the gap count value is changed (substituted) to the gap count valid variable at the same time as the arbitration timer is reset. However, the gap count value is changed (substituted) to the gap count valid variable. The time when the arbitration timer is reset may not be completely the same as the time when the arbitration timer is reset. However, it is desirable that this is a stage before resetting the arbitration timer.

Although the present invention has been described with reference to the embodiments, the present invention is not limited to these embodiments. It will be obvious to those skilled in the art that various changes, improvements, combinations, and the like can be made.

[0095]

[Effect of the Invention] When the arbitration process is performed using a serial connection communication network conforming to the IEEE 1394 standard, smooth data communication has become possible.

[Brief description of the drawings]

1A is a diagram illustrating a configuration example of a communication network using an interface based on the IEEE 1394 standard, and FIG. 1B is a diagram illustrating an example of a configuration of a communication network illustrated in FIG.
FIG. 3 is a conceptual diagram for explaining a step of determining a node number (self ID).

FIG. 2C is a conceptual diagram for explaining a bus use right requesting step in the configuration example of the communication network shown in FIG. 1A, and FIG. FIG. 3 is a conceptual diagram illustrating a step of transmitting a bus license or a data prefix signal in the configuration example of the communication network illustrated in FIG.

FIG. 3 is a state transition diagram illustrating a configuration of an arbitration state machine included in the signal processing circuit according to the present embodiment.

FIG. 4 is a flowchart illustrating a part of a processing procedure corresponding to the state transition diagram illustrated in FIG. 3;

FIG. 5 is a flowchart showing a part of a processing procedure corresponding to the state transition diagram shown in FIG. 3;

FIG. 6 is a flowchart illustrating a part of a processing procedure corresponding to the state transition diagram illustrated in FIG. 3;

FIG. 7 is a flowchart showing a part of a processing procedure corresponding to the state transition diagram shown in FIG. 3;

8 is a flowchart showing a processing procedure in an idle state in the state transition diagram shown in FIG.

FIG. 9 is a functional block diagram schematically showing a system based on the IEEE 1394 standard.

FIG. 10 is a state transition diagram showing the configuration of an arbitration state machine based on the IEEE 1394 standard.

11 is a flowchart illustrating a processing procedure in an idle state in the state transition diagram illustrated in FIG. 10;

[Explanation of symbols]

 A0: Idle state A1: Request state A2: Grant state PH: PHY response state RX: Packet reception state TX: Packet transmission state AF: Node p: Parent port c: Child port BL: Bus line

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Claims (8)

[Claims] 1. A physical layer controller included in each of a plurality of nodes connected to each other by a bus and forming a network in accordance with the IEEE 1394 standard, wherein one node enters an idle state in which an arbitration signal is not output. The one node detects an end point of a sub-action gap that defines a period from when any one of the plurality of nodes transmits a packet signal to when the one node can transmit an asynchronous packet signal. When data transmission becomes possible and the idle state continues even after detecting the end point of the subaction gap, each of the plurality of nodes transmits one fair packet to each of the plurality of nodes. Arguments that define the gap between one fair period and the next A signal processing circuit which is in a state where data transmission is enabled by detecting the end point of the bitration reset gap by the one node, wherein the end point of the sub-action gap and the end point of the arbitration reset gap are from a link layer. The first gap count value is defined by a function having a first gap count value that is not directly changed by the register write instruction as a variable, and the first gap count value changes from a state other than an idle state to an idle state. A signal processing circuit that is a variable that is changed to a second gap count value that is changed directly by a register write instruction from the link layer only when a transition occurs. 2. A Subaction_gap value indicating an end point of the subaction gap is expressed as: Subaction_gap = (28 + gap_cou)
nt_valid × 16) / f, and the Arb_reset_gap value indicating the end point of the arbitration reset gap is: Arb_reset_gap = (52 + gap_cou)
The signal processing circuit according to claim 1, wherein the signal processing circuit is obtained from an equation of (nt_valid × 16) / f. However, gap_count
_Valid represents the first gap count value, and f represents a base rate. 3. A method according to the IEEE 1394 standard, which is included in a physical layer controller of each of a plurality of nodes connected by a bus to form a network, wherein one node enters an idle state in which it does not output an arbitration signal. The data is detected by the one node detecting an end point of a subaction gap that defines a period from when any one of the plurality of nodes transmits a packet signal to when the one node can transmit an asynchronous packet. A signal processing circuit which enables transmission, wherein an end point of the sub-action gap is not directly changed by a register write command from a link layer.
The first gap count value is defined only when the node transitions from a state other than the idle state to the idle state.
A signal processing circuit that is a variable that is changed to a second gap count value that is directly changed by a register write instruction from the link layer. 4. When a node enters an idle state in which a plurality of nodes connected to each other by a bus and forming a network are included in a physical layer controller in accordance with the IEEE 1394 standard and one node does not output an arbitration signal, The end point of the arbitration reset gap defining the gap period between one fair period and the next fair period, which ensures that each node of the plurality of nodes sends one fair packet each, A signal processing circuit capable of transmitting data by detecting a node, wherein an end point of the arbitration reset gap uses a first gap count value that is not directly changed by a register write instruction from a link layer as a variable. A first gap count defined by a function From a state other than the idle state to the idle state when the node transitions only,
A signal processing circuit that is a variable that is changed to a second gap count value that is directly changed by a register write instruction from the link layer. 5. A signal processing method in a network in which a plurality of nodes are connected by a bus according to the IEEE 1394 standard, wherein (a) one of the plurality of nodes enters an idle state in which no node outputs an arbitration signal. If
A first period which is defined as a period from when any one of the plurality of nodes transmits a packet signal to when the one node can transmit an asynchronous packet, and which is not directly changed by a register write instruction from the link layer. Detecting the end point of the subaction gap determined by a function using the gap count value as a variable; and (b) notifying the link layer of the detection of the end point of the subaction gap in the step (a). And (c) ensuring that each of the plurality of nodes sends one fair packet each when the idle state continues after the step (a).
An arbitration reset gap end point determined by a function having a variable as a first gap count value that is not directly changed by a register write instruction from the link layer is defined by defining a gap period between one fair period and the next fair period. (D) when the end point of the arbitration reset gap is detected in the step (c), the step of notifying the link layer of the detection; and (e) the one node is in a state other than the idle state. And changing the first gap count value to a second gap count value that is directly changed by a register write instruction from the link layer only when transitioning from the first state to the idle state. 6. The value of Subaction_gap indicating the end point of the subaction gap is Subaction_gap = (28 + gap_cou).
nt_valid × 16) / f, and the Arb_reset_gap value indicating the end point of the arbitration reset gap is: Arb_reset_gap = (52 + gap_cou)
The signal processing method according to claim 5, wherein the signal processing method is obtained from an expression of (nt_valid x 16) / f. However, gap_count
_Valid represents the first gap count value, and f represents a base rate. 7. A signal processing method in a network in which a plurality of nodes are connected by a bus according to the IEEE 1394 standard, wherein (a) one of the plurality of nodes enters an idle state in which no node outputs an arbitration signal. If
A first period which is defined as a period from when any one of the plurality of nodes transmits a packet signal to when the one node can transmit an asynchronous packet, and which is not directly changed by a register write instruction from the link layer. Detecting the end point of the subaction gap determined by a function using the gap count value as a variable; and (b) notifying the link layer when the end point of the subaction gap is detected in the step (a). (C) a second gap in which the first gap count value is directly changed by a register write instruction from a link layer only when the one node transitions from a state other than the idle state to the idle state. Changing to a count value. 8. A signal processing method in a network in which a plurality of nodes are connected by a bus according to the IEEE 1394 standard, comprising: (a) in an idle state in which each of the plurality of nodes does not output an arbitration signal; Defining a gap period between one fair period and the next fair period, which guarantees that each of the plurality of nodes sends one fair packet, directly by a register write instruction from the link layer. Detecting the end point of the arbitration reset gap determined by a function having the first gap count value unchanged as a variable; and (b) detecting the end point of the arbitration reset gap in the step (a). Notifying the link layer to the effect that (c) the one node Only when the node transits from a state other than the idle state to the idle state, the first
And changing the gap count value to a second gap count value that is directly changed by a register write instruction from the link layer.