JP2002163229A - Continuous DMA request issuing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To continuously DMA a DMA controller
Provided is a continuous DMA request issuing device that issues a request efficiently. SOLUTION: Each local agent 103-106
DMA accepting multiple local requests from
A continuous request issuance arbitration circuit 112 for recognizing the number of DMA requests stored in the DMA controller 102 in the request issuance control circuit 101 and determining issuance of the next DMA request;
Local agent request control circuit 11 which recognizes and determines the number of local DMA requests from
3 and D in the information of the continuous request issuance arbitration circuit 112
And a DMA request issuance control circuit 114 for controlling the issuance of the MA request.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a continuous DMA request issuing device for continuously issuing DMA requests.

[0002]

2. Description of the Related Art There is known a DMA (Direct Memory Access) for directly enjoying data between an external device and a memory without passing through an arithmetic control unit such as a central processing unit.
D for the DMA controller which controls this DMA
A conventional DMA request issuing device that issues a MA request issues a DMA request and then issues a next DM request.
The A request is configured to be issued at the timing when the DMA controller issues a "bus release signal" at the time of receiving and releasing the request from the DMA controller or after the lapse of the receiving release. When the DMA request issuing device receives the “bus release signal”,
Recognize the handshake with the MA controller and
An MA transfer request was issued. In addition, since it was impossible to recognize the number of local DMA requests from the local agent, the next local DMA request was accepted after the handshake recognition was established.

[0003]

However, in the above-described conventional configuration, even when the DMA controller enters a request accepting / releasing state in which a request from the DMA controller can be accepted, unless the DMA request issuing circuit receives a "bus releasing signal", the next request is issued. Cannot be issued.

In addition, since it was impossible to recognize a plurality of local DMA requests from a local agent, it was not possible to quickly issue a continuous local DMA request. Therefore, there is a problem that a time loss of continuous issuance of the DMA transfer request and a deterioration in performance of the entire DMA transfer are caused.

An object of the present invention is to solve the above-mentioned conventional problem, and an object of the present invention is to provide a continuous DMA request issuing device capable of continuously and efficiently issuing a DMA request to a DMA controller.

[0006]

In order to achieve this object, a continuous DMA request issuing apparatus according to the present invention comprises a continuous DMA request issuing apparatus.
A DMA controller capable of accepting an MA request, and a continuous DMA request issue control means for accepting a plurality of local requests from each local agent and continuously issuing and controlling a DMA request to the DMA controller; The continuous D
The MA request issuance control means recognizes the number of DMA requests stored in the DMA controller, and
A continuous request issuance and arbitration circuit for determining issuance of an A request; a local agent request control circuit for recognizing and determining the number of local DMA requests from the local agent and transmitting information to the continuous request issuance and arbitration circuit; DM based on information from local agent request control circuit
This is a circuit configuration having a DMA request issuance control circuit for controlling A request issuance.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a continuous DMA request issuing device according to an embodiment of the present invention.

As shown in FIG. 1, the continuous DMA request issuing device includes four local agents [0] 103
From local agent [3] 106 and memory 121
Are connected by a bus 122, and the DMA controller 102 is provided with four channels CH [0] 107 to CH [3] 110 corresponding to the number of local agents [0] 103 to local agents [3] 106. Provided,
DMA controller 102 and local agent 10
The configuration is such that a continuous DMA request issuance control circuit 101 is interposed between 3 and 106.

[0009] Continuous DMA request issuance control circuit 101
Is a data start notification that a DMA request 111 is issued between the local agents 103 to 106 and the DMA controller 102, a bus release signal 115 granting ownership of the bus 122 is issued from the DMA controller 102, and a start of DMA transfer data is notified. Reception of the signal 116,
The request and permission for local requests of the local agents 103 to 106 are controlled. Each of the local agents 103 to 106 performs an independent operation, and operates synchronously with each other.

[0010] Continuous DMA request issuance control circuit 101
Is the DM stored in the DMA controller 102
A continuous request issuance arbitration circuit 112 for recognizing the number of A requests and determining issuance of the next DMA request, and local DMAs from the local agents 103 to 106.
A local agent request control circuit 113 for recognizing and determining the number of requests and transmitting information to the continuous request issuance arbitration circuit 112, and a DMA request issuance control circuit 114 for controlling the DMA request issuance based on information from the continuous request issuance and arbitration circuit 112 Consists of

As shown in FIGS. 2 and 3, the continuous request issuance and arbitration circuit 112 includes a request storage number setting unit 201 for setting a request storage number as an initial setting value,
The actual request number setting unit 202 increments the actual request numerical value 206 via the increment circuit unit 203 when the MA request 111 is issued, and decrements the actual request numerical value 206 via the decrement circuit unit 204 when receiving the DMA request issue signal 117.
When it is recognized that the request storage number setting value 205 of the request storage number setting unit 201 matches the actual request numerical value 206 of the actual request number setting unit 202 and the request number becomes full, the request number full signal 118 And a request storage number comparison unit 207 that outputs

As shown in FIG. 4, a local agent request control circuit 113 controls and manages the reception of a local request 123 from the local agents 103 to 106 and the return of an acknowledgment 124 to the local agents 103 to 106. Local agent request buffers 402 to 405 for receiving and managing the number of times of generation of the request 123 are provided for each local agent 103 to 106 unit. Further, in a local agent local request management unit 401 provided in the local agent request control circuit unit 113, the local agent DMA
A request issuance instruction signal 119 is output to transmit request information, and thereafter, the continuous request issuance arbitration circuit 1
12 receives the instruction of the local agent DMA request acceptance signal 120 from the local agent 1
This is returned as an acknowledgment 124 to the local agents 103 to 106, and the local request 123 and the continuous issuance of the acknowledgment 124 between the local agents 103 to 106 are controlled and managed.

Next, the operation of the continuous DMA request issuance control circuit 101 will be described. The continuous request issuance arbitration circuit 112 sends the request storage number “F (111) for the four connection channels to the request storage number setting unit 201.
1) is set in advance. Thereafter, when the DMA request 111 is issued, the DMA request issuance signal 11 output from the DMA request issuance control circuit 114 is output.
7 is received by the continuous request issuance and arbitration circuit 112, and the increment circuit unit 203 of the continuous request issuance and arbitration circuit 112 outputs the request storage number increment signal 208 in synchronization with the input clock 210, and increments the actual request numerical value 206.

A bus release signal 115 from the DMA controller 102 is transmitted to the DMA request issuance control circuit 11.
4 and outputs the DMA request issuance signal 117 to the continuous request issuance arbitration circuit 112.
The decrement circuit unit 204 outputs the stored request number decrement signal 209 in synchronization with the input clock 210, and decrements the actual request numerical value 206.

The request storage number comparison unit 207 converts the request storage number setting value 205 of the request storage number setting unit 201 and the actual request numerical value 206 of the actual request number setting unit 202 as shown in FIG. If it is “F” and a match is detected, DMA
Recognizing that the request storage number in the controller 102 has reached the full state, the request storage number comparison unit 207 outputs a request number full signal 118 to the DMA request issuance control circuit 114.

In the local agent request control circuit 113, each local agent 1
Request buffer 402 to 405 in units of 03 to 106
And the request buffers 402 to 405
The number of requests received is buffered in Then, while buffering is present, the local agent DMA request issuance instruction signal 119 is sent out to keep informing that there is a request from the local agents 103 to 106. Thereafter, the local agent DMA acknowledgment reception signal 120 corresponding to the reception of the bus release signal 115 is received from the continuous request issuance arbitration circuit 112, and it is recognized that the local agent DMA request in the request buffers 402 to 405 has been completed once. Also, the request buffer information is deleted and the local agents 103 to 106 are sent to the local agent DMA.
The acknowledgment 124 is returned.

Here, the local agent [0] 10
The local agent [0] DMA request from No. 3 will be described. First local agent [0]
The local agent [0] local request 123 received from the local agent 103 is received by the local agent local request management unit 401, and the agent [0] request buffer 402 recognizes that there is a local request and buffers it. Then, the local agent DMA request issuance instruction signal 119 is transmitted to the continuous request issuance arbitration circuit 112. Thereafter, the continuous request issue arbitration circuit 112 outputs the bus release signal 11
5 receives the local agent DMA acknowledge signal 120 for the local agent [0] in the agent [0] request buffer 402.
The information corresponding to the local request 123 is deleted.

Here, after receiving the local agent 0 local request 404 from the first local agent [0] 103, the local agent [0] 103 from the next local agent [0] 103 is received.
When the local request 123 is received, and thereafter, the local agent [0] local request 12
For each occurrence of 3, the received information is stored in the agent [0] request buffer 402.
Then, the agent [0] request buffer 402
Until the information inside becomes empty, the local agent [0] 103 keeps informing that a local DMA request exists while the local agent DMA request issuance instruction signal 119 remains on.

The continuous request issuance arbitration circuit 112 controls the local agent DMA request issuance instructing signal 11
As long as 9 is on, it recognizes that there is a local DMA request 123, so that the continuous request issue arbitration circuit 112 is ready to issue the next DMA request 111 immediately upon receiving the bus release signal 115. You can do it. After that, when the agent 0 request buffer 402 becomes the remaining one information and the local agent [0] 103 receives the local agent DMA acknowledge 120, the local agent [0] 103 turns off the local agent DMA request issuance instruction signal 119 and the local agent [0] 103 And the local agent DMA request 123 from
A series of DMA transfer ends.

As described above, according to the continuous DMA request issuing device of the present embodiment, the continuous DMA request is issued to the DMA controller 102 and the local agents 103 to 106 by the continuous DMA request.
The request issuing arbitration circuit 112 controls and manages the DMA requests continuously and efficiently.
2, the time loss of successive issuance of DMA transfer requests can be reduced, and the performance of the entire DMA transfer can be increased.

[0021]

As described above, according to the present invention, it is possible to continuously issue DMA requests.
It is possible to reduce the time loss of successive issue of transfer requests, and to speed up the performance of the entire DMA transfer.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a continuous DMA request issuing device according to an embodiment of the present invention.

FIG. 2 shows a continuous DMA of the continuous DMA request issuing device.
It is a block diagram which shows a request issue arbitration circuit.

FIG. 3 is a block diagram showing a case where the actual request numerical value of the continuous DMA request issuing arbitration circuit matches a request storage setting value.

FIG. 4 is a block diagram showing a local agent request control circuit of the continuous DMA request issuing device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 101 Continuous DMA request issue control circuit 102 DMA controller 103-106 Local agent 107-110 DMA controller channel 112 Continuous request issue arbitration circuit 113 Local agent request control circuit 114 DMA request issue control circuit 121 Memory 122 Bus

Claims (3)

[Claims] 1. A DMA controller capable of receiving a continuous DMA request and a continuous DMA request issuance control means for receiving a plurality of local requests from each local agent and continuously issuing a DMA request to the DMA controller. The continuous DMA request issuance control means includes a bus release signal for granting ownership of the bus from the DMA controller and a bus release signal.
A continuous DMA request issuing device, which receives a data start signal indicating the start of MA transfer data and responds with a local acknowledge to each local agent to permit DMA transfer. 2. The continuous DMA request issuance control means,
A continuous request issuing arbitration circuit for recognizing the number of DMA requests stored in the DMA controller and determining the issuance of the next DMA request, and recognizing and determining the number of local DMA requests from the local agent, and arbitrating the continuous request issuance. 2. The continuous DMA request according to claim 1, further comprising: a local agent request control circuit for transmitting information to the circuit; and a request issue control circuit for controlling DMA request issuance based on information from the continuous request issuance arbitration circuit. Issuing device. 3. The continuous request issuance arbitration circuit includes a DMA
The number of DMA requests issued to the controller can be set. Increment calculation is performed when a request is issued, and decrement calculation is performed when a DMA request is completed. It manages the request issuance enable instruction to the request issuance control circuit and the start and suppression of continuous issuance of DMA requests. The local agent request control circuit recognizes and judges the number of local DMA requests from the local agent, and makes continuous requests. 3. The continuous DMA request issuing device according to claim 2, wherein information is transmitted to an issuance arbitration circuit, and high-speed information transmission is performed for the presence or absence of a next local agent request.