JP2002158550A - Digital power amplifier - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To facilitate gain setting for increasing an average output sound pressure level in an average input signal level portion of a digital power amplifier. SOLUTION: An audio frequency band signal S3 is converted to a ΔΣ modulator 2
3, the signal S3 is converted into a power switch control signal S11 such as a pulse density modulation signal or a PWM signal via the ΔΣ modulator, and a power switching signal 13 obtained based on the control signal 11 is supplied to the load 7. And a detecting means for detecting the gain of the signal gain controller 2 provided before the ΔΣ modulator 23 to detect the peak signal strength of the input digital signal. 21 to stabilize the operation of the ΔΣ modulator 23, increase the upper limit of the average signal level of the signal S3 that can be input to the ΔΣ modulator 23, and improve the reproduction output of the average signal level. I made it.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital power amplifier constituted by a class D amplifier which is suitably applied to a case where switching control of a power amplification stage is performed.

[0002]

2. Description of the Related Art Conventionally, as a typical example of the digital power amplifier, a signal amplifier called a class D operation (class D operation) has been used, especially in an audio frequency (audio frequency).
y) It is known as one form of signal amplifier for band signals. In a typical example of this class D amplifier, as shown in FIG. 4A, a signal input terminal 1, a manually operated signal gain controller 2, a sampling frequency converter 3, a ΔΣ modulator 4, a power switch unit 5 And power LPF (low pass filter)
The section 6 constitutes the main part of this class D amplifier. 7
Is a speaker for sound reproduction. In the following description, an analog signal is sampled and quantized, and a PCM (pulse code modula) obtained by encoding the quantized signal is obtained.
ulation) signal is referred to as a digital signal, and converting an analog signal into a PCM signal in this manner is referred to as digital signal conversion.

A digital audio frequency band signal S1 sampled at the same sampling frequency of 44.1 KHz as a CD (compact disc) is input to a signal input terminal 1 as shown in FIG. The digital audio frequency band signal S2 multiplied by the gain coefficient for manually adjusting the signal level and adjusting the signal level is input to the sampling frequency converter 3 via the converter 3. As an example, the sampling frequency is 2.8224 MHz (64
The digital audio frequency band signal S3 converted into a digital signal of (× 44.1 kHz) is input to the ΔΣ modulator 4.

The ΔΣ modulator 4 includes a signal adder 9, a signal integrator 10, a quantizer 11, a sample delay 12, and an input terminal 13 for a clock signal S11 as shown in FIG. 4B.
The output terminal 14 of the 1-bit pulse density modulation signal S4 constitutes a main part thereof. And this input terminal 1
3 is supplied with a clock signal S11 having a frequency of 2.8224 MHz synchronized with the sampling frequency signal of the digital audio frequency band signal S3, and these signal adders 9,.
Each operation of the sample delay 12 is executed while being locked to the clock signal S11.

The digital audio frequency band signal S3 inputted to the signal input terminal 8A is supplied to the positive input side of the signal adder 9 and supplied to the negative input side of the signal adder 9, which will be described later. A digital signal S8 having a difference value from the feedback signal S10 is generated via the signal adder 9, and is supplied from the output side of the signal adder 9 to the input side of the signal integrator 10.

The signal S9 integrated and generated via the signal integrator 10 is supplied to a quantizer 11,
1-bit quantization / encoding is performed via the quantizer 11, and the 1-bit pulse density modulation signal S 4 output from the quantizer 11 is supplied to the input side of the delay 12. The signal is converted to a feedback signal S10 delayed by one sample in the sampling cycle via the delay 12, and this feedback signal S10 is supplied to the negative input side of the signal adder 9 and subtracted from the input signal S3 as described above. You. On the other hand, this 1-bit pulse density modulation signal S4
Is output from the signal output terminal 14.

The signal output terminal 14 outputs the pulse density modulated signal from the signal output terminal 14 or, if necessary, a PWM (pud) signal via a pulse width modulator or the like.
signal output terminal 14
Output from

As shown in FIG. 4B, a signal negative feedback loop is formed from the signal output side to the input side of the quantizer 11 via the delay 12, the signal adder 9 and the signal integrator 10. Thus, the quantization noise generated by the quantizer 11 and mixed into the pulse density modulation signal S4 has a differential characteristic, and the frequency range of the low frequency band of the density modulation signal S4, that is, the D range of the audio signal band is expanded. Be improved.

The technique for improving the D range by eliminating the quantization noise in this way is called noise shaping. 4B shows an example of noise shaping by primary feedback, but in the example shown in FIG.
In addition to the noise shaping by the primary feedback, there has been proposed an example in which the feedback loop is increased to perform the secondary and tertiary feedback so that the noise shaping is performed by the multiple feedback loop to further enhance the improvement effect. I have.

A 1-bit pulse density modulated signal S4 modulated in such a state or a PWM signal S4 generated based on the ΔΣ modulated signal (not shown) is input as shown in FIG. 4C. The power is supplied to the power switch unit 5 through the terminal 15A. The signal S4 is supplied to the gate side of the FET element 17A of the two N-channel power MOSFET elements 17A and 17B cascade-connected between the power supply Vcc side and the ground side of the power switch section 5. A signal S4A obtained by inverting the phase of this S4 through an inverter 16A is supplied to the gate side of the element 17B, and these two N-channel power MOSFET elements 17A and 17B are complementarily switched by this S4. Power signal S5 from power supply Vcc that has been power switched accordingly.
Is output from the output terminal 15B.

Further, the power signal S5 is input to the input terminal 18A of the power LPF unit 6, and the choke coil 19 connected between the input terminal 18A and the output terminal 18B and the output terminal 18B between the output terminal 18B and the ground. Power LPF circuit 6 having a characteristic of cutting high frequency components outside the audible frequency band, comprising a capacitor 20 connected to
The power signal S5 in the audible frequency band obtained through the terminal is supplied to the speaker 7 for reproducing an audio signal through the output terminals 18B and 18C, and is reproduced as an audio signal.

[0012]

However, in the ΔΣ modulator 4 according to the prior art as described above, the ΔΣ
Digital audio frequency band signal S3 that can be input to modulator 4
Is divided by the amplitude value that can be expressed by the 1-bit pulse modulation signal S4 that can be output from the ΔΣ modulator 4, the maximum modulation rate is determined by the noise shaping order, the setting of the signal integrator 10, and the like. When a digital audio frequency band signal S3 exceeding the maximum modulation rate is input to the ΔΣ modulator 4, the noise shaping characteristic is deteriorated. In the worst case, the ΔΣ modulator is used. 4 may oscillate. Therefore, conventionally, it was necessary to limit the peak value of the digital audio frequency band signal S3 so as not to exceed the maximum modulation rate.

[0013] Therefore, a conventional ΔΣ modulator incorporating D
In a class-A signal amplifier, a signal gain controller is provided manually before the Δ に modulator to limit the peak value of the signal level of the signal input to the ΔΣ modulator so as not to exceed the maximum modulation rate. I was However, in the case of a power amplifier (power amplifier) as shown in FIG. 4, if the signal gain controller is adjusted so that the peak value of the signal level of the signal input to the ΔΣ modulator does not exceed the maximum modulation rate, The maximum power (maximum volume) that can be output as a power amplifier is determined by limiting the signal level of the signal input to the ΔΣ modulator so as not to exceed the maximum modulation rate. However, there is a problem that when the power is input to the ΔΣ modulator, the power (volume) that can be output as the power amplifier cannot be increased.

That is, even if the signal peak value of the digital audio frequency band signal input to the signal input terminal is large, but the average signal level is considerably lower than this peak value, the signal is input to the ΔΣ modulator. It is necessary to limit the peak value of the signal level of the signal to be controlled by the signal gain controller so as not to exceed the maximum modulation rate. There was a problem that could not be done.

The present invention has been made in view of such a conventional problem, and a digital audio frequency band signal input to a signal input terminal has a large signal peak value, but the average signal level is compared with the peak value. Even if the signal is considerably low, the signal gain controller must limit the peak value of the signal level of the signal input to this ΔΣ modulator so as not to exceed this maximum modulation rate. It is an object of the present invention to solve the problem that the power of the signal portion cannot be increased as the power amplifier.

[0016]

Means for Solving the Problems In order to solve the above-mentioned problems and the like and to achieve the above-mentioned object, a first aspect of the present invention is described.
The digital power amplifier described above is a digital power amplifier that power-amplifies an input digital signal, and detects a signal intensity of the input digital signal and a signal amplification intensity of the input digital signal. Signal gain adjusting means for adjusting, frequency converting means for converting a sampling frequency of an output signal from the signal gain adjusting means,
A Δ 変 換 modulation means for modulating an output signal from the frequency conversion means into a ΔΣ modulation signal; and a power switching means for switching in accordance with the output signal from the ΔΣ modulation means. By controlling the signal gain adjusting means based on the detected signal corresponding to the signal strength of the digital signal, the signal strength of the output signal of the frequency conversion means input to the ΔΣ modulation means can be adjusted to a predetermined strength. It is characterized by having.

With the above-described configuration, in the digital power amplifier according to the first aspect of the present invention, when the average value of the signal level is significantly lower than the peak value of the signal level in the audio frequency band. In this case, the power of the signal portion having the average signal level as the power amplifier can be increased.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. In the following description, a PCM (pulse code modulation) obtained by sampling and quantizing an analog signal and encoding the quantized signal is obtained.
A signal is referred to as a digital signal, and converting an analog signal into a PCM signal in this manner is referred to as digital signal conversion.

An embodiment of a digital power amplifier according to the present invention will be described with reference to FIG.
FIG. 1 is a circuit block diagram showing an example of a main part of a class D amplifier (class D operation amp.) As a specific example of a digital power amplifier.
Signal gain controller 2, sampling frequency converter 3, modulation means 22, power switch unit 5, power LPF (low pass f
(ilter) section 6 and a peak detector 21.
The modulator 22 includes a ΔΣ modulator 23 and a switching controller 24. The peak detector 21 includes a detector for detecting the signal intensity of the peak value of the signal S1 input to the signal input terminal 1. The average value signal S1A of the square of the peak value obtained by detection by the detection means.
Is a peak detector. Reference numeral 7 denotes a speaker unit for reproducing an audio signal, which is constituted by a dynamic speaker as an example.

As an example, a digital audio frequency band signal S1 sampled at the same sampling frequency of 44.1 KHz as a CD (compact disc) is input to a signal input terminal 1,
The signal intensity of the peak value of the signal S1 is detected through the peak detector 21, and a signal S1A of the root mean square value of the signal intensity of the peak value is generated. The signal S1A is used as a gain control signal as a signal gain controller. 2, a digital audio frequency band signal S2 in which the maximum amplitude of the signal S1 is adjusted is generated via the signal gain controller 2.

The signal S2 is further input to a sampling frequency converter 3, and is converted into a sampling frequency suitable for a power switch operation in a power switch unit 5 described later via the converter 3. Then, the digital audio frequency band signal S3 thus converted is applied to the modulation means 2
2 is input to the second input terminal 22A. When the signal S2 is converted into a sampling frequency suitable for a power switch operation in the power switch unit 5 described later, the switching control unit 24 described later can be omitted.

The PWM (pulse width modulation) signal S output from the output terminal 22B of the modulating means 22
11 is supplied to the power switch unit 5 and this signal S11
In response to the above, a power switching signal S12 generated by performing a power switching operation in the power switch unit 5 is supplied to a power LPF (low pass filter) unit 6, and a power signal S13 in the audio frequency band is selected. S13 is supplied to the speaker unit 7 for reproducing the audio signal.

That is, the PWM signal S11 generated via the switching control unit 24 by the 1-bit pulse density modulation signal S3A modulated and generated in such a state is converted into a signal shown in FIG.
Is supplied to the power switch section 5 through the input terminal 15A as shown in FIG. Then, two N-channel power MOSFET elements 17A and 17B cascade-connected between the power supply Vcc side and the ground side of the power switch section 5.
Of the signal S11 on the gate side of the FET element 17A.
Is supplied to the gate side of the FET element 17B.
4 is a signal S1 whose phase has been inverted through the inverter 16A.
1A are supplied, and these two N-channel power MOs
The SFET elements 17A and 17B are complementarily switched by the signal S11, and the power signal S5 from the power supply Vcc that is power-switched according to the S11 is:
It is output from the output terminal 15B.

Further, the power signal S5 is input to the input terminal 18A of the power LPF section 6, and the choke coil 19 connected between the input terminal 18A and the output terminal 18B and the choke coil 19 between the output terminal 18B and the ground. Power LPF circuit 6 having a characteristic of cutting high frequency components outside the audible frequency band, comprising a capacitor 20 connected to
The power signal S6 in the audible frequency band obtained through the above is supplied to the speaker 7 for reproducing an audio signal through the output terminals 18B and 18C, and is reproduced as an audio signal.

Next, an example of an embodiment of the modulation means 22 will be described with reference to FIG.

FIG. 2 is a block diagram showing a main part of the configuration of the modulation means 22. The modulation means 22 has a signal input terminal 22A,
Signal output terminal 22B, PWM modulator 24, first signal adder 25, second signal adder 26, quantizer 27, signal limiter 28, third signal adder 29, first one sampling delay 30, a square integrator 31 and a second one-sampling delay 32. The modulating means 22 operates in synchronization with a clock signal synchronized with the sampling frequency of the digital audio frequency band signal S3 input to the converter 3 shown in FIG. It is to do.

The digital audio frequency band signal S3 input to the input terminal 22A is input to the positive input side of the first signal adder 25, and the feedback signal supplied to the negative input side of the signal adder 25 S1 of the difference value from S21
5 is supplied from the output side of the signal adder 25 to the positive input side of the second signal adder 26, and the feedback signal supplied to the other positive input side of the second signal adder 26 therefrom. The addition signal S16 of S20 is input to the quantizer 27.

The addition signal S16 is supplied to the quantizer 27.
, One-bit encoding is performed by rounding, such as rounding or truncating to one bit,
A digital signal S17 modulated so that the signal level of the digital audio frequency band signal S3 can be represented by 1 bit is output from the quantizer 27. Then, the digital signal S17 is input to the signal limiter 28, and a 1-bit pulse density modulation signal S3A suppressed to a predetermined amplitude or less is generated. The gain of the signal gain controller 2 is set based on the set value of the limit value of the signal limiter 28. As an example, when the signal output limited by the signal limiter 28 is 1.0, the output of the signal gain controller 2 is set to be limited to 0.9, and the output of the ΔΣ modulator 23 in which noise shaping is performed is set. Stabilize operation.

Next, the operation of noise shaping will be described.

First, the signal S3A is supplied to the negative input side of the signal adder 29, and the difference S18 from the addition signal S16 supplied to the positive input side of the signal adder 27 is obtained.
Is supplied from the output side of the signal adder 29 to the input side of the one-sampling delay 30. The feedback signal S19 delayed by one sample at the sampling period obtained from the output side of the one sampling delay 30 is input to each of the square integrator 31 and the second one sampling delay 32.

The feedback signal S20 generated via the square integrator 31 is supplied to the other positive input side of the second signal adder 26 as described above, and the second one sample As described above, the feedback signal S21 delayed by one sample in the sampling period generated by the delay 32 is supplied to the negative input side of the first signal adder 25 to perform noise shaping. To be executed.

That is, in the example shown in FIGS. 1 and 2, the signal intensity of the peak value of the digital audio frequency band signal S1 input to the signal input terminal 1 is detected via the peak detector 21, and this peak value is detected. The signal S1A of the root mean square value of the signal intensity of the value is generated by the peak detector 21, and the signal S1A is supplied to the signal gain controller 2 as a gain control signal. The maximum amplitude of the signal S1 is determined by the signal gain controller 2. The adjusted digital audio frequency band signal S2 is generated, and the maximum amplitude value of the digital audio frequency band signal S3 that can be input to the ΔΣ modulator 23 is changed to the ΔΣ modulator 4.
The maximum modulation rate can be set so as not to exceed the maximum modulation rate determined by dividing by the maximum amplitude value that can be expressed by the 1-bit pulse modulation signal S4 that can be output from the multiplexing unit.

Therefore, according to this example, the digital audio frequency band signal S1 has a low average sound pressure level and a high instantaneous maximum sound pressure level of the digital audio frequency band signal S1.
Is input to the signal input terminal 1 shown in FIG.
The average audible frequency (au
There is an advantage that the level of the digital audio frequency band signal S1 in the portion where the sound pressure level is low can be increased and reproduced from the speaker section 7 for reproducing the audio signal.

Therefore, according to this embodiment, as is often the case with music signals in particular, the possibility that the digital signal frequency band signal S1 having a low average signal level and being instantaneously excessively large may be input to the signal input terminal 1 will be described. Even when the music signal is present, it is possible to reproduce a portion where the average signal level of the music signal is low, and when a music signal including an excessive peak value is input as the digital audio frequency band signal S1. Also, the average sound pressure level of the average sound pressure level portion can be reduced without a problem such that the ΔΣ modulator 23 oscillates or a noise of a detectable level is generated in the digital audio frequency band signal S19. You can play it in the raised state.

In this embodiment, a digital power amplifier for reproducing an audio signal has been described as an example. However, the present invention is not limited to a digital power amplifier that reproduces this audio signal, but can be applied to a digital power amplifier for supplying various other digital power signals. It can be applied to a digital power amplifier for motor drive control. When the present invention is applied to a digital power amplifier for motor drive control, the digital power amplifier may be configured by omitting the power LPF section 6 as necessary.

Of course, the noise shaping portion shown in FIG. 2 may be configured as noise shaping by primary feedback or noise shaping of a plurality of orders so that noise shaping is performed. When the calculation algorithm of the noise shaping is changed as described above, the peak signal suppression level value by the signal gain controller 2 and / or the second signal limiter 28
It is needless to say that the operation of the ΔΣ modulator 23 needs to be stabilized by changing the characteristics of the signal limit value and the like according to these orders.

[0037]

As described above, according to the first aspect of the present invention,
According to the described digital power amplifier, even when an excessive peak signal is input to the digital power amplifier, the operation of the digital power amplifier does not become unstable, and no extreme deterioration in sound quality occurs. In this state, a signal output can be obtained from this digital power amplifier. Therefore, the signal to this digital power amplifier can be input with reference to the average input signal level, and the gain setting to increase the average output sound pressure level of this average input signal level portion of the digital power amplifier can be easily realized in this digital power amplifier. it can.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram for explaining an example of an embodiment of a digital power amplifier according to the present invention.

FIG. 2 is a circuit block diagram for explaining an example of an embodiment of a modulation unit according to the present invention;

FIG. 3 is a circuit block diagram for explaining an example of an embodiment of a power switch unit and a power LPF unit applicable to the present invention;

FIG. 4 is a circuit block diagram for explaining a class D amplifier as an example of a conventional digital power amplifier.

[Explanation of symbols]

2 ... Signal gain controller, 5 ... Power switch section,
7 Speaker part 21 Detecting means 23
ΔΣ modulator, 25... First signal limiter, 30.
... Second signal limiter S3... Audio frequency band signal S11... Power switch control signal S1
1

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5J064 AA00 BA03 BB12 BC11 BC19 BC21 BD01 5J091 AA02 AA24 AA26 AA41 AA66 CA35 FA01 HA10 HA29 HA33 HA39 KA00 KA04 KA15 KA20 KA26 KA31 KA42 KA53 KA55 U10 TA08

Claims (1)

[Claims] 1. A digital power amplifier for power-amplifying an input digital signal, a detecting means for detecting a signal intensity of the input digital signal, and a signal gain for adjusting a signal amplification intensity of the input digital signal. Adjusting means; frequency converting means for converting a sampling frequency of an output signal from the signal gain adjusting means; ΔΣ modulating means for modulating an output signal from the frequency converting means into a ΔΣ modulated signal; and Power switching means for switching according to the output signal of the, by controlling the signal gain adjustment means based on a detection signal according to the signal strength of the input digital signal obtained from the detection means, The signal strength of the output signal of the frequency conversion means input to the ΔΣ modulation means can be adjusted to a predetermined strength. Digital power amplifier, wherein the door.