JP2002140719A - Graphic processing unit - Google Patents

Abstract

(57) [Summary] Conventionally, in parallel processing of graphic processing, since an input data structure is special (shared node information), another apparatus for simplifying the data structure and performing graphic processing. Was needed. This was an obstacle in making the number of parallelizations arbitrary. In addition, when parallelized, the data processing is duplicated, which is not efficient. A device is simplified by connecting devices to be parallelized in a chain or in a ring, and by creating a path for inputting data from another device, and drawing in node information shared from the device. Plan. This allows
The processing time can be reduced by not depending on the data structure to be input and by reusing the processed data through a chain connection.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for processing graphics data, which is suitably used in computers, digital AV equipment, digital communication devices and the like.

[0002]

2. Description of the Related Art As is conventionally known, graphics data processing models various figures with their vertex coordinates and brightness as node information. For example, in 3D graphics, a desired object is approximately modeled by a set of basic figures such as triangles. As node information,
There are coordinate values indicated by X, Y, and Z, and luminance values such as RGB. Many of the nodes share the vertices of a plurality of basic figures, as shown by a, b, c,... In FIG. 3, and share data.

[0003] Node information is generated by a node generation device. More specifically, the example of 3D graphics will be described. In 3D graphics, a scene is formed by combining different model data. The scene is, for example, a room in a house. The model data is a combination of basic figures, such as a figure imitating a TV, a desk or a chair in a house.

In order to project these on a display,
It is necessary to correct the perspective depending on the viewing position and angle, and to calculate the brightness of the object from the direction of the light source. These calculations involve manipulating coordinate values and luminance values, and are called geometry transformations. The node generation device performs these geometric transformations. In the devices subsequent to the node generation device, the processing of the generated node is performed for each basic figure. A conventional apparatus for processing such node information will be described with reference to FIGS. 2, 3, 4, 5, and 6. FIG. In FIG. 2, 1
Is a graphics processing device, 2 is a node generation device, 3 is a rendering device, 4 is a frame memory, 10 is a node control device,
11 is a first graphic calculation device, 12 is a second graphic calculation device, 13 is a third graphic calculation device, 111 is a control device, 1
12 is a processing device, 113 is a register, and 114 is an output buffer.

First, the graphic processing device 1 calculates the characteristics of each basic graphic as a unit. For example, if this is a triangle, the inclination of the sides of the triangle, the inclination of the luminance, and the like are obtained from the given node information of the three points. These are used in the rendering device 3 at the subsequent stage. The rendering device 3 at the subsequent stage calculates pixels according to the characteristics of the basic graphic obtained as described above and writes the calculated pixels into the frame buffer 4.
In computer equipment, since a raster scan display is used, calculation of pixels is usually performed for each scan line. Therefore, information such as a coordinate gradient, a luminance gradient, coordinate partial differentiation, and luminance partial differentiation as shown in FIG. 4 is required.

In performing the above-described graphic processing, high-speed processing is basically required. The basis of speeding up is to parallelize each processing. The parallelization of the node generation device 2 is described in Japanese Patent Application Laid-Open No. 5-26620.
A specific example is described in No. 1 “Graphics parallel processing method and device thereof”. Here, a method for executing the above-described geometry transformation in parallel is described. However, since the parallelization of the graphic processing device 1 is performed not for each node but for each graphic, for example, if three graphics are to be processed in parallel, as shown in FIG. Apparatus 1 for generating vertex coordinate data of three basic figures and executing the figure processing on three sets of these data
It is executed in a form of being distributed to 1, 12, and 13 and supplied.

However, the contents of the control of the parallel processing are such that the shared nodes are held and duplicated according to the number of parallelizations and the number of shares, and the graphic processing apparatus 1 is divided into parallel and subdivided graphic processing apparatuses 1.
1, 12, and 13. For this reason, the node control device 10 must have a register for holding node information inside, or set a control method according to the number of parallelizations. Therefore, the number of parallelizations is fixed by each system.

As described above, each of the graphic calculation devices 11, 12, and 13 processes each basic graphic.
The basic figure may be a triangle or a quadrangle, but a triangle is assumed for simplicity. Details will be described using the graphic calculation device 11 as an example. The graphic calculation device 11 includes a control device 111, a processing device 112, a register 113, and an output buffer 114 as shown in FIG.

When all the triangle node information is stored in the register 113, the control device 111 activates the processing device 112. The processing device 112 reads /
Performs internal calculations with light to calculate triangular characteristics. The control device 111 transmits the obtained characteristic data to the output buffer 11.
4 and output to the outside. As described above, each of the graphic calculation devices 11, 12, and 13 processes a completely individual triangle, which shares a node but is completely independent.

Since the above-mentioned outputs are outputted in parallel, the rendering device 3 processes them in order or renders the rendering device 3 itself in parallel. Here, for details of the processing of the graphic processing apparatus 1, the contents of the processing of the graphic calculation apparatuses 11, 12, and 13 will be described in time series in FIG. 4 to calculate the characteristics of the triangle shown in, first, three each in register 113 three partial node _{(N 0, N 1, N} 2) (N 0, N 2, N 3) (N 0 , N ₃ , N ₄ ). 610 in FIG. 6 corresponds to this processing time.

Next, the graphic calculation device 11 performs a calculation for calculating the characteristics of the triangle from the information stored in the register 113. This calculation is performed by the processing device 112, and it is simple to operate according to a program like the processor. The calculation is performed for each node (N ₀ , N ₁ ,
Node-specific processing such as normalization of N ₂ ) is performed, and then the characteristics of the triangle are calculated. 611, 612 and 6 in FIG.
Reference numeral 13 denotes a processing time peculiar to each node such as normalization of each node, and reference numeral 614 denotes a processing time for calculating the characteristics of the triangle.

In the same manner as described above, the graphic calculation device 12
21 to 624, and the graphic calculation device 13 are also shown in FIG. As described above, each of the graphic calculation devices performs the processing unique to the node in the same time zone. As described above, graphic processing with high performance can be performed by parallelization.

[0013]

However, in the above-mentioned conventional method, the number of parallelized graphic computing devices is fixed, and it is difficult to add a graphic computing device later, so that the system performance can be increased flexibly. Difficult to respond to. For example, when trying to display a very clear image with a high-speed operation responsiveness, such as a game, the number of parallelized graphic calculation devices is required. When displaying an image in a field that is not required or a field that does not require real-time processing, the number of parallelizations of the graphic calculation device can be reduced. In such a case, it is extremely inefficient to prepare a graphic calculation device having a parallel number according to individual requirements, and it is inconvenient in product management. However, in the above-described conventional apparatus, a dedicated apparatus has to be manufactured for each parallel number. As shown by reference numerals 611, 621, and 631 in FIG. 6, inefficient overlapping processing occurs in which processing of the same node is performed by a plurality of graphic processing devices in an overlapping manner.

There are two problems. In view of the above problems, the present invention makes it possible to set an arbitrary number of parallelizations in a graphic calculation device, and to make a special node control device unnecessary, thereby facilitating system performance improvement and the like.
The purpose is to simplify the design. Also, with regard to the processing time, it is another object to improve the performance by deleting the processing of the overlapped nodes and improving the efficiency.

[0015]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention relates to a graphic processing apparatus for processing a set of graphics having an arbitrary number of nodes, comprising: When information is input, a plurality of graphic calculation devices are provided for performing graphic processing from the node information and outputting a processing result. Each of the graphic calculation devices receives the node information from the preceding node output device as a first data input. It is characterized by receiving the node information as the second data input from another graphic calculation device.

Here, the second data input received by each graphic calculation device is node information processed by another graphic calculation device. Further, the individual graphic calculation devices are connected in a chain in a ring, and the second data input is performed through a chain connection line. Further, by the chain connection, each graphic computing device is configured to cyclically transition to the active state, and the graphic computing device that has transitioned to the active state includes:
It is characterized by receiving node information from a node output device and node information from an upstream graphic computing device connected by a chain connection line.

Further, the data output of each graphic calculation device is performed cyclically, and the input FIs are input in accordance with the output order.
The FO device is provided. As described above, an arbitrary number of connections can be made in units of the graphic calculation device, and a detachable feature can be added. Further, since the processing structure for reusing the processed data can be realized, the parallel processing can be efficiently advanced.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to FIGS. 1, 7 to 9. (Embodiment 1) FIG. 1 shows a graphic processing apparatus according to an embodiment of the present invention. This will be described based on FIG. Reference numeral 115 denotes a control device that controls the processing of each of the graphic calculation devices 11, 12, and 13 and the chain connection between the devices. This control device is provided in each of the graphic calculation devices 11, 12, and 13. Also,
In order to enable chain control, each of the graphic calculation devices 11, 1
The two and thirteen registers 113, 113, and 113 are connected to each other by data lines L1, L2, and L3 in FIG. 1 so that the output of one register becomes the input of the register of the next graphic calculation device.

If the basic figure is a triangle for simplicity, as shown in FIG. 3, nodes of a complicated figure composed of triangles are often shared with other triangles. Therefore, in the case of parallel processing of nodes of a shared triangle, efficient processing can be achieved by avoiding duplication of storage and processing of the nodes by a plurality of graphic calculation devices. The embodiment shown in FIG.
The figure illustrates a case where parallel processing is performed by the three graphic calculation devices 11, 12, and 13 while avoiding overlapping processing. The node information output from the node generation device 2 is commonly input to the three graphic calculation devices 11, 12 and 13, but only the active state is stored in the internal register 113 by the control device 115 in each device. . The active state of each figure computing device shifts to the next figure computing device when necessary node information is prepared. This control can be realized by sequentially connecting the graphic computing devices 11, 12, and 13 in a chain.
For example, after the initialization, only the graphic calculation device 11 becomes active, and when the storage of the node information of the graphic calculation device 11 ends, the graphic calculation device 12 takes over the active state.
The takeover means includes, for example, chaining the input and output of data of the register 113 by signal lines L1, L2, and L3 as shown in the figure, preparing an active information flag, and transferring the data. Further, the control lines of the control device 115 may be connected in a chain.

As shown in FIG. 7, the node data generated by the node generating device 2 is generated by adding one header to a unit of node data of a group of triangles sharing a node. These are input commonly to the graphic calculation devices 11, 12, and 13. These will be described in detail. Graphic calculation device 1
After becoming active, 1 takes in the header 1 of FIG. The header stores graphic processing start information and graphic information.

Among the information stored in the header, the graphic processing start information means that the subsequent node data is a new group of triangles. , When you receive this,
Three pieces of new node information following the header are fetched without requesting data transfer from the graphic processing apparatus that was in the active state immediately before. In addition, the graphic processing start information is not transmitted to the next graphic calculation device.

On the other hand, graphic information, which is another information stored in the header, is transmitted in a chain to the next graphic calculation device. This graphic information is numerical information indicating how many basic triangles the graphic formed by the node information N _{0 to} N ₄ following the header is formed, and is information indicating which shared node data to use. . The numerical information also indicates the position of a group of basic triangles with respect to a group of triangles. That is, for example, a group of triangles is 4
If it consists of three basic triangles, the numerical information is "4""3"
There can be four types of “2” and “1”, each of which represents one unique basic triangle. Therefore, the graphic calculation device that receives the graphic information can determine which basic triangle node data is to be processed from the numerical information. Further, from the instruction information, it is possible to determine which node data should be received from the graphic processing device that has already been processed, and which node data should be read from the node generation device 2. When the graphic calculation device sends the active information flag to the next graphic calculation device, the numerical value of the graphic information is 1
The value is subtracted and sent to the next graphic calculation device.

The graphic processing apparatus 11 which has been activated first has three node data N ₀ ,
N ₁ and N ₂ are fetched and stored in the register 113. Since the node information of the triangle A has been prepared, the control device 115 starts the processing device 112 and performs a process for obtaining the characteristics of the triangle A. The result of the processing is stored in the output buffer and output.
If the node information N ₀ , N ₁ , N ₂ is stored in the register 113 of the graphic calculation device 11, an active information flag is sent to the graphic calculation device 12.
The active state shifts to 2. At this time, the graphic calculation device 1
The information of the graphic stored in 1 is transferred to the graphic processing device 12 by decrementing the numerical information by one. After entering the active state, the graphic calculation device 12 determines that the triangle B is to be processed based on the numerical value of the graphic information, and fetches the node data N ₃ necessary for processing the triangle B from the node generation device 2.
It is stored in the register 113. Subsequently, the information of the other nodes N ₀ and N ₂ of the triangle B is requested to be transferred from the graphic calculation device 11 through the data line L 1, and is stored in the register 113. Since the node information of the triangle B is complete, the control device 115
Starts the processing device 112 and performs a process of obtaining the characteristics of the triangle B. The result of the processing is stored in the output buffer and output.

Similarly, the graphic calculation device 13 receives the active information flag from the graphic calculation device 12, enters the active state, and determines which basic triangle is to be processed from the numerical value of the graphic information and the instruction. As a result, the node data N
₄ from the node generation device 2 to the node data N ₀ , N ₃
Is taken in from the graphic calculation device 12 and the characteristic processing for the triangle C is performed. When this is completed, the active state returns to the graphic calculation device 11 again, and the graphic calculation device 11 returns the node N from the node generation device 2 to the node N for the remaining triangle D.
₁ from the graphic calculation device 13 to the node data N ₄ , N ₀
Is received, and processing for determining the characteristics of the triangle D is performed. Thus, the processing of the node data following the header 1 is completed.

In the subsequent processing, the graphic processing device 12 becomes active. In this case, since the numerical value of the graphic information received from the graphic calculation device 11 is "0", the processing of a group of triangles is no longer performed. Is completed, and therefore, the graphic calculation device 12 waits for the input of a new header 2 from the node generation device 2. When the header 2 is input to the graphic calculator in the active state, the processing of the node data following the header 2 starts from the graphic calculator 12.

As described above, the processing of the new set of triangles is started from the next graphic processing apparatus after the graphic processing apparatus which has just finished the processing, and the graphic processing apparatus at the start of the processing is fixed. Since there is no need to allocate the graphics, the number of graphic calculation devices can be increased later, and the system can be flexibly improved. Furthermore, since the shared node information is sequentially transferred and sequentially processed by the chain connection,
This eliminates the need to duplicate node data to be shared and sent to each graphic calculation device. (Embodiment 2) In the configuration shown in Embodiment 1, if the node data is stored in the register, each graphic calculation device changes the active state to the next graphic calculation without waiting for processing by the processing device. Although it has shifted to equipment,
In the chain connection of the graphic calculation devices 11, 12, and 13, the node data is not transferred as it is, but the processing device 112 is used.
In this case, the node information processed in step (1) may be transferred. In the second embodiment, such processing is performed.
The system diagram is almost the same as that of FIG. 1 except that the data lines L1, L2, and L3 are connected to the output terminal of the processing device 112. Therefore, illustration is omitted. The operation of the second embodiment will be described with reference to FIG. For comparison with FIG. 6 of the explanatory diagram of the conventional example, the same graphic is processed.

In FIG. 8, reference numerals 811 to 813 denote graphic charts.
The three node processes first input to the arithmetic unit 11
You. Usually, this processing includes node normalization processing.
I can do it. 814 is composed of nodes processed by the node.
Triangle (N₀, N₁, N_Two), 821
Node N input to the figure calculation device 12_TwoNode processing
(Normalization processing), 820 is a chain connection,
824 is the node information transferred from the
And nodes directly input from the node generation device 2.
The triangle to be formed (N₀, N_Two, N_Three8) Characteristic calculation processing
31 is input from the node generation device 2 to the graphic calculation device 13.
Node N_Four830 is a chain connection
The transfer of node information from the computing device 12
Node and the input from the node generation device 2 directly.
Triangle (N ₀, N_Three, N_Four) Features
The graphic calculation apparatus 84 performs the activeness calculation processing 841 again.
Node state and entered from the node generation device 2
N₁Node processing 840 is a chain connection and
844 is the transfer of node information from
Node information and the node information input from the node generation device 2.
Triangle (N₀, N_Four, N₁) Characteristic calculation processing
Reason.

Although the node information is processed by each graphic calculation device, preprocessing such as normalization is required before calculating the characteristics of the triangle. In the second embodiment, since these processes are performed once in each graphic computing device, the node information processed by the chain connection between the devices is reused. It can be said that the processing is more efficient than the previous embodiment. In this method, the processing time required by one graphic calculation device is the preprocessing time of one node information (821 and 83 in FIG. 8).
1,841) and the sum of the calculation times of the characteristics of the triangle.
Since the active states are sequentially shifted, there is a shift in the activation of the processing apparatus 112, but there is no waste of processing time as in the pipeline principle as a whole.

In the conventional example, as shown in FIG. 6, the processing time required by one graphic calculation device is the preprocessing time of three node information,
Since the sum of the calculation times of the characteristics of the triangles is obtained, this method can save the pre-processing time for two pieces of node information. (Embodiment 3) The configuration shown in Embodiment 1 is provided.
Bundling the outputs to the rendering device 3 into one is necessary to flexibly change the number of parallelizations.

This can be realized by providing a FIFO at the output stage of the graphic processing apparatus 1. FIG. 9 illustrates this. FIG.
14 is a FIFO. Graphic calculation devices 11, 12, 1
Each output of 3 is bus-connected. In order to prevent the outputs from colliding with each other, the output state is circulated between the graphic calculation devices, similarly to the flag in the active state, using the chain connection of the graphic calculation devices 11, 12, and 13. As a result, only one of the graphic calculation devices 11, 12, and 13 is in an output state. Then, the output state of each graphic calculation device is shifted to the next graphic calculation device when the necessary characteristic information of the triangles is completed and the output to the FIFO 14 is completed. For example, after the initialization, only the graphic calculation device 11 enters the output state, and the graphic calculation device 1
When the output of the characteristic information of the triangle 1 is completed, the graphic calculation device 1
2 takes over the active state. The means of taking over is
For example, the input / output of data of the register 113 of each of the graphic calculation devices 11, 12, and 13 is cascaded, and an output state flag is prepared and transferred. Further, the control devices 115 may be cascaded with each other.

In addition to such token control, FIFO
It is also possible to eliminate 14 and transfer the triangular characteristic information itself in a chain connection instead of the output state flag. In this case, an output bus is not required, and for example, the output of only the graphic calculation device 11 may be connected to the rendering device 3. The outputs of the graphic calculation devices 12 and 13 are sent to the graphic calculation device 11 through a chain connection and sequentially output.

When the graphic processing device 1 is formed into a chip, for example, three graphic calculation devices 11, 12, and 13 are used.
The one equipped with is configured as one chip. In this case, external connection terminals T1 and T2 are provided in place of the data lines L3 to be connected to the graphic calculation devices 13 to 11, and the terminals T1 and T2 and the data line connection portions of the graphic calculation devices 11 and 12 are connected to the data lines. The connection is established by L31 and L32.

With this configuration, by preparing a plurality of chips of the same type and connecting them in series through the external connection terminals T1 and T2, the number of parallel graphic calculation devices can be increased in multiples of three. In other words, even if the graphic calculation device is arbitrarily added or reduced, only the chain connection needs to be changed, and the graphic calculation device can be flexibly increased or decreased later.

[0034]

As described above, the present invention is a graphic processing apparatus for processing a set of graphics having an arbitrary number of nodes.
A plurality of graphic calculation devices for performing graphic processing from the node information and outputting a processing result; each of the graphic calculation devices equally receives the node information from the preceding node output device as a first data input; Since the configuration is such that node information is received from another graphic calculation device as an input, the following effects are obtained.

Since the node information from another graphic calculation device is received as the second data input, the processing result of the other device can be used, and the inefficiency of repeating the same node processing as in the prior art can be eliminated. I can do it. Since a so-called chained connection with other graphic computing devices will be taken, a new graphic computing device can be inserted into the loop of the chain as needed, or a previously set graphic computing device can be replaced. Or disconnect it from the chain loop,
The number of graphic calculation devices can be arbitrarily increased or decreased.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a graphic processing apparatus according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a graphic processing apparatus in a conventional example.

FIG. 3 is a diagram of a model figure composed of a plurality of nodes used in the description of the conventional embodiment.

FIG. 4 is a diagram of characteristic information calculated using a basic figure (triangle) used in the description of the conventional example.

FIG. 5 is a diagram of a control example of node data used in the description of the conventional embodiment.

FIG. 6 is a diagram of the processing time of each graphic calculation device used in the description of the conventional embodiment.

FIG. 7 is a diagram of node data used in the description of the embodiment of the present invention.

FIG. 8 is a diagram of the processing time of each graphic calculation device used in the description of the embodiment of the present invention.

FIG. 9 is a diagram of an output process of each graphic calculation device used in the description of the embodiment of the present invention.

Claims (5)

[Claims] 1. A graphic processing apparatus for processing a set of graphics composed of an arbitrary number of nodes, wherein, when node information of a basic graphic is input, a graphic processing is performed from the node information and a processing result is output. It comprises a plurality of graphic computing devices, each of which receives equally the node information from the preceding node output device as a first data input and receives the node information from another graphic computing device as a second data input. A graphic processing device characterized by the above-mentioned. 2. The graphic processing apparatus according to claim 1, wherein the second data input received by each graphic processing apparatus is node information processed by another graphic processing apparatus. 3. The graphic processing apparatus according to claim 1, wherein the individual graphic calculation apparatuses are chain-connected in a ring, and the second data input is performed through a chain connection line. 4. A configuration in which each of the graphic calculation devices cyclically transitions to the active state by the chain connection,
4. The graphic processing apparatus according to claim 3, wherein the graphic processing apparatus that has transitioned to the active state receives the node information from the node output apparatus and the node information from the upstream graphic processing apparatus connected by a chain connection line. apparatus. 5. The graphic processing device according to claim 3, wherein data output from each graphic calculation device is performed cyclically, and a FIFO device is provided in accordance with the output order.