JP2002016119A - Semiconductor device manufacturing method and semiconductor cleaning evaluation method - Google Patents

Abstract

(57) [Summary] (with correction) [PROBLEMS] To provide an evaluation method capable of effectively performing cleaning and drying of a semiconductor wafer having a complicated surface shape with severe irregularities. Therefore, semiconductors can be manufactured with high quality and high yield. A semiconductor substrate incorporating a simulated substrate in which fine grooves are formed in order to find optimum conditions for infiltration of a cleaning liquid into a high aspect ratio structure such as a trench hole formed on a surface of a semiconductor wafer. The washing and drying evaluation are performed using

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cleaning method and a surface treatment method (hereinafter referred to collectively as a cleaning method and a cleaning method) in many manufacturing processes such as electronic materials, magnetic materials, optical materials, and ceramics. And an apparatus manufacturing method. In particular, the present invention relates to a semiconductor device cleaning evaluation method and a semiconductor device manufacturing method in a semiconductor device manufacturing process and the like.

[0002]

2. Description of the Related Art A conventional general cleaning and drying of a semiconductor wafer is performed by immersing the wafer in a diluted hydrofluoric acid or a mixed solution of ammonia and hydrogen peroxide for a predetermined time and then cleaning the wafer with pure water. And then spin dry or IP
This is performed by means for drying the wafer by A (isopropyl alcohol) vapor drying or the like. In addition, about the mixed liquid of ammonia, hydrogen peroxide water, and ultrapure water, for example,
“Silicon wafer surface cleaning technology p.242
Spin drying and IPA
The vapor drying and the like are described in, for example, "Silicon Wafer Surface Clean Technology p.285-286, Takeshi Hattori, published by Realize Co., Ltd."

In recent years, in order to increase the density of integrated circuits,
A fine deep groove (width of 1 μm or less, depth of 5 μm or more) is formed by dry etching or the like in a direction substantially perpendicular to the main surface of the semiconductor wafer. Attempts have been made to increase the capacity.

After the above cleaning, the semiconductor wafer is divided to observe the degree of cleaning in the groove, and the cross section thereof is observed with an electron microscope to observe the state of contamination such as the number of foreign substances, and there is no residual oxide film. Was observed. In addition, the product yield was evaluated indirectly.

[0005]

In recent years, in order to increase the density of an integrated circuit, a fine deep groove (width 1 μm or less, depth 5 μm or more) almost perpendicular to a main surface of a semiconductor wafer is dry-dried. Attempts have been made to process by etching or the like, to form element isolation using this groove, or to increase the capacitance of the capacitor.

[0006] In a cleaning means in which a semiconductor wafer on which a high-density semiconductor integrated circuit having a complicated surface shape with severe irregularities is formed is simply immersed in a chemical solution and pure water, the chemical solution or pure water is formed in a deep groove portion on the surface. It is difficult to replace, and the cleaning effect is considerably reduced. Therefore, finding an optimum cleaning condition is an important issue.

However, such a cleaning evaluation method cannot be used for evaluation of the next step because the semiconductor is destroyed. In addition, if the evaluation is performed based on the product yield, it is not possible to distinguish between the defect caused by cleaning and the defect caused by the preceding and following processes.Moreover, since it takes time before the result of the product yield is obtained, it is necessary to take prompt measures. I cannot go and grasp the state of the product.

Further, by removing a semiconductor wafer having a sacrificial oxide film formed on the inner surface of a processed groove formed by dry etching by wet etching, contaminants adhered to the inner surface of the processed groove together with the sacrificial oxide film. The removal has been done. However, as described above, since the opening of the groove is fine and deep as described above, the etching liquid and the cleaning liquid after the etching do not sufficiently penetrate into the groove, and a satisfactory groove surface treatment cannot be performed. Was.

[0009] Even during drying, moisture present in a complex-shaped portion such as a deep groove-shaped portion such as a crown shape or a stack structure represented by a fin-shaped fin or the like is subjected to the spin drying or IPA described above. It is difficult to remove it sufficiently by drying means such as drying. If cleaning and drying are insufficient, various inconveniences such as deterioration of the film quality occur in the subsequent processes such as the formation of a thin film, and have a serious adverse effect on the reliability of the integrated circuit. Therefore, an evaluation method that can quickly and non-destructively evaluate a semiconductor directly is indispensable.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional problems, and has been made to find optimal conditions for effectively cleaning and drying a semiconductor wafer having a complicated surface shape with severe irregularities. It is an object of the present invention to provide an evaluation method capable of performing the following.

[0011]

FIG. 1 shows a basic conceptual diagram of the present invention. FIG. 1A is a simulated substrate of a semiconductor for evaluating the degree of abrasion of an oxide film in a groove by hydrofluoric acid or the like. Figure (b)
Is a simulated substrate of an evaluation semiconductor for evaluating the degree of penetration of the cleaning liquid into the groove. The simulated substrate shown in FIG.
It can be incorporated anywhere in the semiconductor, as shown in FIG. 2 (a), around the inside of the semiconductor memory 5, as shown in FIG. 2 (b), around the outside of the semiconductor memory, FIGS. 2 (c) and 2 (d). As shown in ()), it may be located anywhere such as the center of the semiconductor memory. It goes without saying that it may be on the entire surface of the semiconductor substrate. According to the present invention, in order to solve the above-mentioned problems, as shown in FIG. 3A, a semiconductor wafer 3 incorporating a simulated substrate of the present invention housed in a wafer carrier 8 is installed in a cleaning tank 7. ing. Then, as shown in FIG. 3 (b), cleaning is performed, the present invention is extracted, the degree of infiltration of the cleaning liquid is observed with an optical microscope, and stored again. The same evaluation is performed after rinsing. The semiconductor wafer is transferred to the drying chamber 11 by the wafer transfer device 10,
As shown in FIG. 3C, drying is performed in a drying chamber. Then, a similar evaluation is performed.

FIG. 3 is an example of the present invention. As another cleaning method of the present invention, as shown in FIG. 4A, a semiconductor wafer incorporating a simulated substrate of the present invention is set in a cleaning chamber. Next, as shown in FIG. 4B, the cleaning liquid 9 is supplied from the cleaning liquid supply device 11 to perform cleaning. After draining the washing liquid, FIG.
There is also a method of drying as shown in (c).

FIGS. 3 and 4 are merely examples of the present invention, and although not shown, it goes without saying that the present invention can also be applied to a single-wafer cleaning apparatus for cleaning one wafer at a time.

According to the present invention, the degree of infiltration of the cleaning liquid after cleaning can be directly and quickly observed, so that the optimum conditions for cleaning can be found. Therefore, contaminants adhering to the inside of the fine processing groove and drying can be more reliably removed. Furthermore, as described in "Problems to be Solved by the Invention", the optimum conditions for removing the oxide film during the formation of the capacitor can be found, and the quality control of the product can be surely and easily performed. It is possible to provide a semiconductor wafer cleaning evaluation method and a semiconductor device manufacturing method that can achieve the above.

[0015]

(Embodiment 1) A simulation substrate for evaluation of the present invention can be prepared by the following procedure.

According to the process flow shown in FIG.
(A) As shown in FIG.
8 μm is formed. Next, as shown in FIG.
Is applied to form a pattern. Next, as shown in FIG. 5C, the thermal oxide film is removed with hydrofluoric acid.
As shown in (c), dry etching is performed for 0.05 to 3 μm of Si.
Etch at a depth of. Next, the resist is removed as shown in FIG. 5E, and then the thermal oxide film is removed again with hydrofluoric acid as shown in FIG. 5F. Next, FIG.
An oxide film is formed as shown in (g), and then the oxide film is flattened by CMP (Chemical Mechanical Polishing) as shown in FIG. Next, as shown in FIG. 5 (i) Si ₃
Forming a film of N _4, TiN or SiN in a thickness of 0.05 to 0.5 [mu] m. This corresponds to FIG. Next, as shown in FIG. 5 (j), by removing the oxide film therein with hydrofluoric acid, an evaluation sample having no oxide film in the space can be prepared. This corresponds to FIG.

(Example 2) The cleaning effect of the inside of the fine processing groove provided on the wafer was confirmed by the present invention in the following procedure. An Si ₃ N ₄ film is formed on the Si substrate 14 of the present invention, and the opening diameter of the groove is 0.5.
A microfabricated groove having a thickness of 2 μm and a depth of 2 μm was used.

The following was conducted in order to evaluate the cleaning in the present invention. It was immersed in a mixed solution of ammonium fluoride of hydrofluoric acid and ultrapure water (however, the mixing ratio was adjusted so that the solution became pH = 2) for 1 to 20 minutes, and washed with water for 20 minutes. The present invention was confirmed with a sampling optical microscope. After that, it was dried for 20 minutes with an IPA vapor drying device, and was similarly evaluated.

As a result of the evaluation in the present invention, it was found that an immersion time of 15 minutes or more was required for removing the oxide film.

(Embodiment 3) In a semiconductor manufacturing process, a general wiring forming process using Al (for example, Japanese Patent Laid-Open No. 5-3255)
The present invention has been carried out as described in US Pat.

FIG. 6 is a schematic view of a cross section of a semiconductor substrate. In FIG. 6A, reference numeral 14 denotes an Si substrate, and reference numeral 16 denotes an Si substrate 14.
An oxide film 17 is formed on the surface of the substrate, 17 is an Al electrode, 18 to 20 are interlayer insulating layers. In this embodiment, an SiO ₂ film 18 (film thickness) formed by a CVD (chemical vapor deposition) method is used. 2000Å), SOG
Film 19 (600-1200 mm thick), SiO ₂ formed by CVD method
It had a three-layer structure of the film 20 (film thickness: 2000 Å). As shown in FIG. 6 (a), fluorocarbon CF ₃ , C ₂ F ₆
A through-hole 21 having a hole diameter of 1.2 μm is formed in the interlayer insulating film layer by dry etching using, for example, to expose the Al electrode on the semiconductor substrate. Next, according to the present invention, the semiconductor substrate was washed with a processing liquid composed of an organic alkali liquid at 80 degrees for 1 to 20 minutes, and the present invention was extracted to confirm the infiltration of the cleaning liquid, which was generated during dry etching in 15 minutes or more. FIG.
It was confirmed that the by-product 22 shown in (b) could be removed. Next, water washing was performed for 20 minutes. Confirmed similarly.

Next, since moisture has penetrated into the inside of the through-hole, a dry state was similarly confirmed in the present invention. In this state, on the Al electrode exposed from the through-hole, generation of a thin insulator such as Al ₂ O ₃ generated by the conventional cleaning method was not observed. Next, an Ar sputtering process or the like is performed. Further, as shown in FIG. 6C, when an Al wiring layer 20 is formed on the Al wiring 14, an insulating film is formed thereon, and a wiring layer connected to the Al is further formed thereon. May follow the same procedure as described above.

After forming the wiring in the above steps, the connection status of each wiring layer was examined. As a result, it was confirmed that there was almost no contact failure between the wiring layers, and that the contact resistance was extremely small as compared with the conventional connection. Therefore, since the optimum conditions were found by the present invention, the defect rate was reduced by 5%, and semiconductors could be manufactured with high quality and high yield.

(Embodiment 4) In a semiconductor manufacturing process, a general wiring forming process using Cu (for example, Japanese Patent Application Laid-Open No. Hei 6-32610)
No. 1 publication). FIG. 7 is a cross-sectional view of a semiconductor product manufacturing process when the fourth embodiment is performed.

As shown in FIG. 7A, an insulating film (for example, BPSG) is formed on a semiconductor substrate 23 having a diffusion layer and the like (not shown).
A film 24 (boron phosphorus silicate glass) is formed by a CVD method. Subsequently, a Ti film is formed thereon by sputtering.
25, a TiN film 26 is formed thereon, and Cu
A film 27 is deposited. Next, as shown in FIG. 7B, a resist 28 is applied on the structure, and is patterned by a known photolithography (photolithography) etching technique.
Subsequently, as shown in FIG. 7C, the Cu film, TiN film and Ti film are patterned using the resist as a mask.
That is, the portions other than the portions that become the wirings are removed by etching. Next, as shown in FIG. 7D, after removing the resist,
A mixed cleaning solution of hydrofluoric acid, hydrogen peroxide and ultrapure water (however,
(Mixing ratio was adjusted so that the solution had a pH of 3). After washing and drying, evaluation was performed in the present invention. Next, the Ti remaining in the above-described step is formed by the CVD method shown in FIG.
A wiring portion having a three-layer structure of a film, a TiN film, and a Cu film is covered with a W film 29. Next, as shown in FIG. 7F, a passivation film 30 (for example, a TiN film) was entirely formed by a CVD method to complete a structure mainly including a wiring portion.

According to the semiconductor cleaning evaluation method and the semiconductor manufacturing method of the present invention, the defective rate is reduced by 5%, and the semiconductor can be manufactured with high quality.
It could be manufactured with high yield.

[0027]

According to the present invention, by finding the optimum conditions for cleaning and drying, the cleaning liquid easily penetrates into a semiconductor wafer having a complicated surface shape with severe irregularities, thereby enabling effective cleaning and drying. Further, the present invention can be applied to cleaning evaluation of not only semiconductor wafers but also substrates such as thin film devices and disks.

[Brief description of the drawings]

FIG. 1 is a basic conceptual diagram of the present invention.

FIG. 2 is a diagram showing an example of a basic concept of the present invention.

FIG. 3 is a diagram showing an example of a cleaning method using the present invention.

FIG. 4 is a diagram showing an example of a cleaning method using the present invention.

FIG. 5 is a diagram showing a cross-sectional view of a semiconductor substrate at the time of preparation of the present invention.

FIG. 6 is a diagram showing a cross-sectional view of a semiconductor product when the present invention is implemented in a wiring process using Al in a semiconductor product manufacturing process.

FIG. 7 is a diagram showing a cross-sectional view of a semiconductor product when the present invention is applied to a wiring process using Cu in a semiconductor product manufacturing process.

[Explanation of symbols]

1 ... nitride film, 2 ... Si, 3 ... semiconductor wafer, 4 ... oxide film,
5: Simulated substrate, 6: Memory, 7: Cleaning tank, 8: Wafer carrier, 9: Cleaning liquid, 10: Transfer device, 11: Drying room, 12
... thermal oxide film, 13 ... resist, 14 ... oxide layer, 15 ... Si ₃ N ₄ or TiN, 16 ... oxide film, 17 ... Al electrode, 18 ... SiO ₂ film, 19 ... S
OG film, 20 Al wiring layer, 21 through hole, 22 by-product, 23 semiconductor substrate, 24 BPSG film, 25 Ti film, 26 TiN
Film, 27 ... Cu film, 28 ... resist, 29 ... W film, 30 ... passivation film.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) C11D 7/18 C11D 7/18 7/26 7/26 7/50 7/50 17/08 17/08 H01L 21/3065 H01L 21/304 647Z 21/304 647 648Z 648 21/302 N (72) Inventor Koji Hara 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Pref. Hitachi, Ltd. Production Technology Research Laboratory (72) Inventor Autumn Hiroko Mori 3-16, Shinmachi, Shinmachi, Ome City, Tokyo Inside the Device Development Center, Hitachi, Ltd. (72) Inventor Hideki Tomioka 6-16-16, Shinmachi, Ome City, Tokyo Inside the Device Development Center, Hitachi, Ltd. (72 ) Inventor Masaki Ito 3-16-6 Shinmachi, Ome-shi, Tokyo Inside the Device Development Center, Hitachi, Ltd. (72) Inventor Satoshi Tsugane Ao, Tokyo 6-chome, Shinmachi, Ichiba 3-term F-term in Hitachi, Ltd. Device Development Center Co., Ltd. (Reference) 3B201 AA02 BB02 CC11 CC21 CD41 4H003 BA12 DA05 DA15 DA16 DB01 EA03 EA05 EB07 EB13 ED02 EE04 FA15 4M106 AA01 AA12 BA10 BA12 CA70 00455A09 CB20 DB01 DB03 DB05 DB08 DB12 EA10 FA08

Claims (20)

[Claims] 1. A method of cleaning a semiconductor, comprising cleaning a semiconductor substrate incorporating a simulated substrate having a thin film formed on the semiconductor substrate. 2. The method according to claim 1, wherein after cleaning the semiconductor substrate incorporating the simulated substrate formed with a thin film on the semiconductor substrate, observation of infiltration of a liquid into the simulated substrate is performed. Semiconductor cleaning method. 3. The semiconductor cleaning method according to claim 1, wherein said thin film is a nitride film. 4. The semiconductor cleaning method according to claim 1, wherein said thin film is a Si ₃ N ₄ film. 5. The semiconductor cleaning method according to claim 1, wherein said thin film is a TiN film. 6. The liquid according to claim 1, wherein the liquid is water or a chemical.
6. The semiconductor cleaning method according to any one of items 5 to 5. 7. The semiconductor cleaning method according to claim 1, wherein the liquid is a cleaning liquid or a surface treatment liquid. 8. The liquid according to claim 1, wherein the liquid is any one of 1) hydrofluoric acid (hydrofluoric acid), hydrochloric acid, sulfuric acid, nitric acid, acetic acid, an organic acid and the like.
An acidic solution containing at least one kind thereof; 2) an acidic solution containing at least one kind of acidic solution and hydrogen peroxide solution, ammonium fluoride, or the like; or 3) an alkaline solution containing at least one kind of ammonia water, amine, and the like; 4) An alkaline solution containing one or more alkaline solutions and an aqueous solution of hydrogen peroxide, ammonium fluoride, or the like, or 5) A mixed solution containing one or more acidic solutions and one or more alkaline solutions thereof, or 6) 2. A neutral solution such as water.
8. The semiconductor cleaning method according to any one of items 7 to 7. 9. The method according to claim 1, wherein the liquid is an organic solvent.
9. The semiconductor cleaning method according to item 8. 10. The method for cleaning a semiconductor according to claim 1, wherein the liquid is used in combination with an additive such as a cationic surfactant, an anionic surfactant, an amphoteric surfactant, and an organic solvent. 11. A method for manufacturing a semiconductor device, comprising manufacturing a semiconductor device using the semiconductor substrate in which a simulated substrate formed by forming a thin film on the semiconductor substrate is used. 12. A semiconductor device is manufactured by cleaning a semiconductor substrate incorporating a simulated substrate in which a thin film is formed on a semiconductor substrate, and then observing penetration of a liquid into the simulated substrate. The method of manufacturing a semiconductor device according to claim 11, wherein 13. The method according to claim 11, wherein said thin film is a nitride film. 14. The method according to claim 11, wherein the thin film is a Si ₃ N ₄ film. 15. The method according to claim 11, wherein the thin film is a TiN film. 16. The method according to claim 11, wherein the liquid is water or a chemical. 17. The method according to claim 11, wherein the liquid is a cleaning liquid or a surface treatment liquid. 18. The liquid may be any one of 1) hydrofluoric acid (hydrofluoric acid), hydrochloric acid, sulfuric acid, nitric acid, acetic acid, organic acid and the like.
An acidic solution containing at least one kind thereof; 2) an acidic solution containing at least one kind of acidic solution and hydrogen peroxide solution, ammonium fluoride, or the like; or 3) an alkaline solution containing at least one kind of ammonia water, amine, and the like; 4) An alkaline solution containing one or more alkaline solutions and an aqueous solution of hydrogen peroxide, ammonium fluoride, or the like, or 5) A mixed solution containing one or more acidic solutions and one or more alkaline solutions thereof, or 6) 2. A neutral solution such as water.
19. The method for manufacturing a semiconductor device according to any one of 1 to 18. 19. The liquid according to claim 1, wherein the liquid is an organic solvent.
20. The method of manufacturing a semiconductor device according to any one of 1 to 19. 20. The method of manufacturing a semiconductor device according to claim 1, wherein said liquid is used in combination with an additive such as a cationic surfactant, an anionic surfactant, an amphoteric surfactant, and an organic solvent.