JP2002016066A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

(57) [Summary] [Problem] To provide upper and lower wiring layers (3) via plugs in connection holes (5).
In the semiconductor device having a multi-layer wiring structure for connecting the upper and lower wiring layers 9, even if the cavity 13 generated in the plug tungsten film 12 due to the shape of the connection hole 5 remains, the etching residue due to the organic alkaline solution after patterning the upper wiring layer 9. In the removing step, the tungsten film 12 is prevented from being dissolved, thereby improving the reliability of the electrical connection. SOLUTION: After a tungsten film 12 is formed, the entire surface is etched back and left only in a connection hole 5, and silicon is formed on an exposed surface layer of the tungsten film 12 by a CVD method or an ion implantation method using SiH ₄ gas. Is formed to serve as an etching stopper for an organic alkaline solution.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and, more particularly, to an electrode structure of a multilayer wiring.

[0002]

2. Description of the Related Art In recent years, a semiconductor integrated circuit device has adopted a multilayer wiring structure due to a demand for higher integration and higher density.
FIG. 8 is a sectional view showing a multilayer wiring structure of a conventional semiconductor device. In the figure, reference numeral 1 denotes a semiconductor substrate (hereinafter referred to as a substrate 1) having an element structure, 2 denotes a barrier metal film formed on the substrate 1 and made of a titanium compound such as a TiN film,
Reference numeral 3 denotes a lower wiring layer made of, for example, a tungsten film; 4, an interlayer insulating film made of, for example, a silicon oxide film formed on the entire surface of the lower wiring layer 3; 5, a connection hole provided in the interlayer insulating film 4; An ohmic contact formation film for forming an ohmic contact in the connection hole portion, for example, made of a Ti film, and the lower wiring layer 3 and a later-described plug conductive film 8;
Reference numeral 7 denotes a barrier metal film made of a titanium compound such as a TiN film, and 8 denotes a tungsten film, for example.
The plug conductive film 9 filled therein is an upper wiring film made of, for example, an Al alloy film, and 10 is an antireflection film formed on the upper wiring film 9.

[0003] A conventional method of forming a multi-layer wiring structure having the above configuration will be described below with reference to FIGS. 9 and 10. First, a barrier metal film 2 and a lower wiring layer 3 are sequentially formed and patterned on the entire surface of a substrate 1 on which elements are configured. Next, after an interlayer insulating film 4 is formed on the entire surface so as to cover the lower wiring layer 2 by, for example, a CVD method, a connection hole 5 reaching the lower wiring layer 2 is formed in the interlayer insulating film 4 (FIG. 9).
(A)). Next, a predetermined degassing process and a short-time plasma etching process are performed on the interlayer insulating film 4. In this plasma etching process, the opening surface of the connection hole 5 is chamfered,
And to remove the natural oxide film at the bottom of the connection hole 5. Subsequently, an ohmic contact formation film 6 and a barrier metal film 7 are sequentially formed on the entire surface of the interlayer insulating film 3 so as to fill the connection holes 5 by, for example, a sputtering method. 8 for CVD
A film is formed by a method (FIG. 9B). Next, the entire surface of the conductive film 8 is etched back to leave a plug (conductive film 8) only in the connection hole 5 (FIG. 9C). After the alloy film and the anti-reflection film 10 are sequentially formed by, for example, a sputtering method, they are patterned by etching using a resist mask (FIG. 10A), and thereafter, the upper wiring layer 9 and the anti-reflection film 10 are etched. The etching residue including the resist residue at this time is removed by a wet treatment using an organic alkaline solution (FIG. 10B).

[0004]

The conventional multilayer wiring structure of a semiconductor device is formed as described above.
When the aspect ratio of the connection hole becomes higher, the shape of the connection hole 5 may have an inverse tapered shape in which the diameter in the middle of the connection hole is larger than the opening size as shown in FIG. When the connection hole 5 is formed in an inversely tapered shape as described above, FIG.
As shown in FIG. 9B, a void (void) 11 is generated in the conductive film 8 buried in the connection hole 5 by the CVD method, and the entire surface is etched back as shown in FIG. 10 reaches the surface of the conductive film 5, and FIG.
As shown in (a), the upper wiring layer 9 and the antireflection film 10
In some cases, the cavity 11 may be left without closing the upper portion even after the formation of the cavity. When such cavities 11 remain in the conductive film 8, in the etching residue removal step using an organic alkaline solution after patterning of the upper wiring layer 9, the solution enters the cavities 11 from above as shown in FIG. And the conductive film 8 and the barrier metal film 7 around the cavity 11
In addition, the ohmic contact formation film 6 is dissolved, and the electrical connection between the upper and lower wiring layers via the plug (conductive film 8) cannot be made well. As described above, due to the high integration, the high density, and the high aspect ratio, the reliability of the electrical connection between the upper and lower wiring layers via the plug (conductive film 8) is reduced due to the shape of the connection hole 5. There was a problem.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and has a reverse tapered shape in which the shape of the connection hole is larger in the middle of the connection hole than in the opening size by increasing the aspect ratio. Even when formed, the wet process using an organic alkaline solution after the upper wiring layer patterning prevents the conductive film from dissolving in the connection hole, and enables good electrical connection between the upper and lower wiring layers via the conductive film. The purpose is to do.

[0006]

Means for Solving the Problems Claim 1 according to the present invention.
The semiconductor device described above has a device configuration including upper and lower wiring layers stacked on a semiconductor substrate with an insulating layer interposed therebetween and connected to each other by a conductive film filled in a connection hole provided in the insulating layer. The surface layer of the conductive film is a layer containing silicon.

According to a second aspect of the present invention, there is provided a semiconductor device which is stacked on a semiconductor substrate via an insulating layer, and is connected to each other by a conductive film filled in a connection hole provided in the insulating layer. A device configuration having upper and lower wiring layers, wherein the conductive film contains silicon.

According to a third aspect of the present invention, there is provided a semiconductor device according to the second aspect, wherein the conductive film has a multilayer structure including a layer containing silicon at a predetermined thickness interval.

According to a fourth aspect of the present invention, in the semiconductor device according to any one of the first to third aspects, the conductive film is made of tungsten.

According to a fifth aspect of the invention, there is provided a method of manufacturing a semiconductor device, comprising: a first step of forming an insulating layer covering a lower wiring layer formed on a semiconductor substrate; and forming the lower wiring layer on the insulating layer. A second step of opening a connection hole that reaches
A third step of filling the connection hole to form a conductive film on the entire surface of the insulating layer, removing the conductive film on the insulating layer and leaving the conductive film only in the connection hole; A fourth step of forming a layer containing silicon on the surface layer of the conductive film by the used CVD method, and contacting an upper wiring layer made of a conductive material different from the conductive film on the insulating layer with the conductive film. And a fifth step of forming the same.

According to a sixth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: a first step of forming an insulating layer covering a lower wiring layer formed on a semiconductor substrate; and forming the lower wiring layer on the insulating layer. A second step of opening a connection hole that reaches
A third step of filling the connection hole to form a conductive film on the entire surface of the insulating layer, removing the conductive film on the insulating layer and leaving the conductive film only in the connection hole; A fourth step of forming a layer containing silicon by introducing silicon ions into the portion by ion implantation, and contacting the upper wiring layer made of a conductive material different from the conductive film on the insulating layer with the conductive film. And a fifth step of forming as described above.

According to a seventh aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: a first step of forming an insulating layer covering a lower wiring layer formed on a semiconductor substrate; and forming the lower wiring layer on the insulating layer. A second step of opening a connection hole that reaches
By filling the connection holes, a conductive film is formed on the entire surface of the insulating layer,
A third step in which silicon is contained by a CVD method using a gas containing silicon, and a fourth step in which the conductive film on the insulating layer is removed and left only in the connection hole. And a fifth step of forming an upper wiring layer made of a conductive material different from the conductive film on the insulating layer so as to be in contact with the conductive film.

According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor device according to the seventh aspect, when the conductive film is formed in the third step, the amount of addition of the gas containing silicon is from 0 to a predetermined flow rate. Then, the conductive film is formed at a predetermined time interval, and the conductive film is formed into a multilayer structure including silicon-containing layers at a predetermined thickness interval.

According to a ninth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: a first step of forming an insulating layer covering a lower wiring layer formed on a semiconductor substrate; and forming the lower wiring layer on the insulating layer. A second step of opening a connection hole that reaches
A third step of filling the connection hole to form a conductive film on the entire surface of the insulating layer, removing the conductive film on the insulating layer and leaving the conductive film only in the connection hole, A fourth step of forming a second conductive film of the same conductive material as the conductive film only on the conductive film by a selective CVD method, and forming an upper wiring layer made of a conductive material different from the conductive film on the insulating layer; A fifth conductive film formed to be in contact with the second conductive film;
And the step of

According to a tenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to any one of the fifth, seventh and eighth aspects, wherein the conductive film is made of tungsten, and the gas containing silicon used for forming the conductive film is used. SiH ₄ .

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a sectional view showing a multilayer wiring structure in a semiconductor device according to a first embodiment of the present invention. In the drawing, reference numeral 1 denotes a substrate on which an element is formed, 2 denotes a barrier metal film formed on the substrate 1 and made of, for example, a titanium compound such as a TiN film, 3 denotes a lower wiring layer made of, for example, a tungsten film, and 4 denotes a lower wiring layer. 3, an interlayer insulating film as an insulating layer made of, for example, a silicon oxide film, 5 is a connection hole provided in the interlayer insulating film 4, 6 is an ohmic contact forming film made of, for example, a Ti film, and 7 is For example, a barrier metal film made of a titanium compound such as a TiN film, 9 is an upper wiring film made of, for example, an Al alloy film, 10 is an antireflection film formed on the upper wiring film 9, and 12 is an ohmic contact formed in the connection hole 5. Membrane 6
And a tungsten film 12a as a conductive film formed via the barrier metal film 7, 12a is a silicon-rich layer containing silicon on the surface of the tungsten film 12, and 13 is a cavity (void) formed in the tungsten film 12 in the connection hole 5. )
It is.

As shown in the figure, the lower wiring layer 3 and the upper wiring layer 9 are electrically connected via the tungsten film 12 filled in the connection hole 5, but in this case, the connection hole 5 is formed in a reverse tapered shape having a diameter in the middle of the connection hole larger than the opening size, and a cavity 13 whose upper part reaches the surface is formed in the tungsten film 12 in the connection hole 5. In this case, the upper wiring layer 9 and the antireflection film 10
Although formed without closing the upper part of the cavity 13, a silicon-rich layer 12 a is formed on the entire surface including the cavity 13 on the surface of the tungsten film 12, and the tungsten film 12 containing no silicon is not exposed.

A method for forming a multilayer wiring structure having such a configuration will be described below with reference to FIG. First, a barrier metal film 2 and a lower wiring layer 3 are sequentially formed and patterned on the entire surface of a substrate 1 on which elements are configured. Next, an interlayer insulating film 4 is formed on the entire surface so as to cover the lower wiring layer 2 by, for example, a CVD method.
Is formed. At this time, it is assumed that the shape of the connection hole 5 is an inverted tapered shape in which the diameter in the middle of the connection hole is larger than the opening size. (See FIG. 9A). Next, a predetermined degassing process and a short-time plasma etching process are performed on the interlayer insulating film 4. This plasma etching process is performed for chamfering the opening surface of the connection hole 5 and removing the natural oxide film at the bottom of the connection hole 5. Subsequently, the ohmic contact formation film 6 is formed to a thickness of 10 to 50 nm and the barrier metal film 7 is formed on the entire surface of the interlayer insulating film 3 so as to fill the connection holes 5 by, for example, a sputtering method.
A film is sequentially formed to a thickness of 0 to 100 nm, and a tungsten film 12 for a plug is formed on the entire surface by a CVD method. At this time, it is assumed that the tungsten film 12 is not satisfactorily buried in the connection hole 5 and a cavity 13 is generated in a portion in the connection hole 5 (see FIG. 9B).

Next, a plug is formed by etching back the entire surface of the tungsten film 12 by, for example, dry etching and leaving it only in the connection hole 5. At this time, it is assumed that the cavity 13 generated at the time of film formation remains with its upper part reaching the surface of the tungsten film 12 in the connection hole 5 (FIG. 2).
(A)). Next, silicon is contained in the surface layer of the exposed tungsten film 12 by a CVD method using SiH ₄ gas to form a silicon-rich layer 12a (FIG. 2).
(B)). After that, an Al alloy film and an anti-reflection film 10 to be the upper wiring layer 9 are sequentially formed on the entire surface by, for example, a sputtering method, and then patterned by etching using a resist mask to form the upper wiring layer 9 and the anti-reflection film 1.
An etching residue including a resist residue at the time of etching with 0 is removed by a wet process using an organic alkaline solution to complete a multilayer wiring structure (see FIG. 1).

In the multilayer wiring structure formed as described above, the connection hole 5 is formed in a reverse tapered shape having a high aspect ratio and a diameter in the middle of the connection hole larger than the opening size. The cavity 13 formed by the subsequent etching back forms the tungsten film 12 in the connection hole 5.
The cavity 13 remains without reaching the surface. Even after the subsequent formation of the upper wiring layer 9 and the antireflection film 10, the cavity 13 remains without blocking the upper portion. Even if such a cavity 13 remains, the exposed surface layer of the tungsten film 12, that is, the cavity 1
In order to form a silicon-rich layer 12a containing silicon around the substrate 3 by a CVD method using SiH ₄ gas and having etching resistance to an organic alkaline solution, the upper wiring layer 9 and the anti-reflection film 10 are patterned. In the etching residue removal step using the organic alkaline solution, even if the solution enters the cavity 13 from above, the tungsten film 12, the barrier metal film 7, and the ohmic contact formation film 6 are not dissolved.

As described above, the surface layer of the tungsten film 12 filled in the connection hole 5 is formed by CVD using SiH ₄ gas.
By forming the silicon-rich layer 12a by adding silicon by the method, the dissolution of the tungsten film 12 by the organic alkaline solution can be prevented, and the electrical connection between the upper and lower wiring layers 3 and 9 via the tungsten film 12 can be made well.

In this embodiment, the effect is obtained when the cavity 13 remains without closing the upper portion. However, when the cavity 13 does not occur, or when the generated cavity 13 is In any case, there is no problem even if the silicon-rich layer 12a is formed on the surface layer of the tungsten film 12. In these cases, even if the upper wiring layer 9 has a borderless structure, the surface of the tungsten film 12 is covered with the silicon-rich layer 12a and is not exposed, so that the tungsten film 12 can be prevented from being dissolved by the organic alkaline solution in the etching residue removing step. .

Embodiment 2 FIG. In the first embodiment, the surface portion of the tungsten film 12 filled in the connection hole 5 has C
Although the silicon rich layer 12a is formed by the VD method, a similar silicon rich layer 12a may be formed by an ion implantation method. The formation method is described below. Embodiment 1
In the same manner as described above, the formed tungsten film 12 is etched back over the entire surface and left only in the connection hole 5 to form a plug (see FIG. 2A). Ions are implanted into the exposed surface layer of the tungsten film 12 to form a silicon-rich layer 12a containing silicon (see FIG. 2B). Thereafter, the same processing as in the first embodiment is performed to complete the multilayer wiring structure.

Also in this embodiment, the cavity 13 is formed in a state where the upper portion is not blocked by the tungsten film 12 in the connection hole 5.
Is left, in order to form a silicon-rich layer 12a having an etching resistance to an organic alkaline solution by containing silicon by an ion implantation method around the exposed surface layer of the tungsten film 12, that is, around the cavity 13.
In the etching residue removal step using an organic alkaline solution after patterning the upper wiring layer 9 and the antireflection film 10, even if the solution enters the cavity 13 from above, the tungsten film 12, the barrier metal film 7, and the ohmic contact formation film 6 Is not dissolved. Thus, similarly to the first embodiment, the dissolution of the tungsten film 12 by the organic alkaline solution can be prevented, and the electrical connection between the upper and lower wiring layers 3 and 9 via the tungsten film 12 can be performed well.

Embodiment 3 In the first and second embodiments, the silicon-rich layer 12a is formed in the surface layer of the tungsten film 12 filled in the connection hole 5, but silicon may be introduced into the film at the stage of forming the tungsten film. . FIG. 3 is a sectional view showing a multilayer wiring structure in a semiconductor device according to a third embodiment of the present invention. In the figure,
7, 9, 10 and 13 are the same as those in the first embodiment, and 14 is an ohmic contact formation film 6 in the connection hole 5.
And a tungsten film containing silicon as a conductive film formed through the barrier metal film 7 (hereinafter, referred to as a silicon-containing tungsten film).

A method for forming the multilayer wiring structure thus configured will be described below. As in the first embodiment,
A connection hole 5 is opened in the interlayer insulating film 4, and an ohmic contact formation film 6 and a barrier metal film 7 are sequentially formed on the entire surface of the interlayer insulating film 3 so as to fill the connection hole 5. Thereafter, a silicon-containing tungsten film 14 for a plug is formed on the entire surface.
Is formed by filling the connection holes 5 by a CVD method using SiH ₄ , WF ₆ , and H ₂ gas. Next, the formed silicon-containing tungsten film 14 is etched back to leave a plug only in the connection hole 5 to form a plug. Then, as in the first embodiment, the upper wiring layer 9 and the reflective After sequentially forming the anti-reflection film 10, patterning is performed by etching using a resist mask, and the upper wiring layer 9, the anti-reflection film 10 and the etching residue are removed by a wet process using an organic alkaline solution to form a multilayer wiring structure. It is completed (see FIG. 3).

In this embodiment, since the whole of the plug conductive film filled in the connection hole 5 is made of the silicon-containing tungsten film 14 containing silicon, the entire film 14 has etching resistance to an organic alkaline solution. Having. For this reason, the cavity 1 as described in the first embodiment is used.
3 remains in the silicon-containing tungsten film 1 in the etching residue removal step using an organic alkaline solution after patterning the upper wiring layer 9 and the antireflection film 10.
4. The barrier metal film 7 and the ohmic contact formation film 6 are not dissolved. As described above, the dissolution of the silicon-containing tungsten film 14 by the organic alkaline solution can be reliably prevented, and the electrical connection between the upper and lower wiring layers 3 and 9 via the silicon-containing tungsten film 14 can be favorably performed. further,
Since silicon can be easily introduced when the tungsten film 14 is formed, it can be easily manufactured without increasing the number of steps.

Embodiment 4 In the third embodiment, the entirety of the plug conductive film filled in the connection hole 5 is formed of the silicon-containing tungsten film 14 containing silicon. However, as shown in FIG. 4, the film contains silicon. A tungsten film 15 having a multilayer structure including the silicon-rich layer 15b at a predetermined thickness interval may be used. The formation method is described below. In this case, as shown in FIG. 5, the tungsten film 15 is formed by using a C gas using SiH ₄ , WF ₆ , and H ₂ gas.
When the connection hole 5 is buried by the VD method to form a film, the amount of addition of the SiH ₄ gas containing silicon is alternately changed at a predetermined time interval between 0 and a predetermined flow rate to form a layer containing no silicon. The tungsten film 15 is formed by alternately laminating 15a and silicon-rich layers 15b containing silicon. Thereafter, as in the third embodiment, the entire surface is etched back to form a plug with the tungsten film 15 remaining only in the connection hole 5, and the upper wiring layer 9 and the antireflection film 1 are formed.
0 is formed (see FIG. 4).

In this embodiment, in the step of forming the tungsten film 15 filling the connection hole 5, the silicon rich layer 15b is formed so as to include the silicon rich layer 15b at a predetermined thickness interval. Therefore, the silicon rich layer 15b can be formed without fail until the upper portion of the generated cavity 13 is closed. As described above, the tungsten film 15 including the silicon-rich layer 15b can be reliably formed along the shape of the connection hole 5, that is, in the periphery of the cavity 13. Therefore, the upper wiring layer 9 and the antireflection film 10
In the etching residue removing step using an organic alkaline solution after the patterning, if the cavity 13 as shown in the first embodiment remains, the dissolution occurs in the silicon-free layer 15 a of the tungsten film 15 around the cavity 13. Even if it progresses, the dissolution stops at the stage when it reaches the silicon-rich layer 15b. Further, the barrier metal film 7 and the ohmic contact formation film 6 are not dissolved. In this way, the dissolution of the tungsten film 15 by the organic alkaline solution can be reliably suppressed, and the electrical connection between the upper and lower wiring layers 3 and 9 via the tungsten film 15 can be made well.

In the fourth embodiment, the addition amount of the SiH ₄ gas is alternately changed at a predetermined time interval between 0 and a predetermined flow rate, so that the silicon-free layer 15a and the silicon-free layer 15a are added. Although by laminating a silicon rich layer 15b of alternating, the amount of SiH ₄ gas between 0 and a predetermined flow rate, by a predetermined change, the silicon-rich layer 15b
Film 15 having a multi-layered structure including a predetermined thickness interval
The same effect can be obtained by forming a film.

Embodiment 5 Next, FIG. 6 is a sectional view showing a multilayer wiring structure in a semiconductor device according to a fifth embodiment of the present invention. In the figure, 1 to 7, 9, 10, 1
2 and 13 are the same as those in the first embodiment, and 16 is a second tungsten film as a second conductive film formed only on the tungsten film 12 filled in the connection hole 5. The forming method is described below with reference to FIG. The whole surface of the tungsten film 12 formed in the same manner as in the first embodiment is etched back and left only in the connection hole 5.
A recess is formed by retracting from the opening surface of the connection hole 5 (FIG. 7).
(A)). Next, a second tungsten film 16 of the same conductive material is formed only on the tungsten film 12 by using a selective CVD method. Thus, even if the cavity 13 remains in the tungsten film 12 without closing the upper portion, the cavity 13 can be closed by forming the second tungsten film 16 thereon by the selective CVD method (FIG. 7).
(B)). Thereafter, the upper wiring layer 9 and the antireflection film 10 are formed.
Is formed (see FIG. 6).

In this embodiment, since the second tungsten film 16 is formed by selective CVD on the tungsten film 12 left only in the connection hole 5, the cavity 13 is closed. In the etching residue removal step using an organic alkaline solution after the patterning of the antireflection film 10, the dissolution of the tungsten films 12, 16 and the barrier metal film 7 and the ohmic contact formation film 6 by the organic alkaline solution can be reliably prevented. The electrical connection between the upper and lower wiring layers 3 and 9 via the connection 16 can be made well.

In the first to fifth embodiments, the conductive film filling the connection hole 5 is a tungsten film.
Other conductive films may be used. In this case, the gas added by the CVD method in the first, third, and _fourth embodiments may be a gas containing silicon other than the SiH ₄ gas.

[0034]

As described above, the semiconductor device according to the first aspect of the present invention is a semiconductor device which is laminated on a semiconductor substrate via an insulating layer, and is filled in a connection hole provided in the insulating layer. In the device configuration having upper and lower wiring layers connected to each other by a film, and since the surface layer of the conductive film is a layer containing silicon, even when a void is generated in the conductive film, the upper conductive layer can be used for patterning the upper wiring layer. Dissolution of the conductive film can be prevented in the etching residue removal step using an organic alkaline solution, and the reliability of electrical connection between the upper and lower wiring layers via the conductive film is improved.

According to a second aspect of the present invention, a semiconductor device is stacked on a semiconductor substrate via an insulating layer, and is connected to each other by a conductive film filled in a connection hole provided in the insulating layer. In the device configuration having upper and lower wiring layers, the conductive film contains silicon, so that even if cavities are generated in the conductive film, the conductive film is removed in an etching residue removing step using an organic alkaline solution during patterning of the upper wiring layer. Can be reliably prevented, and the reliability of electrical connection between the upper and lower wiring layers via the conductive film is improved.

According to a third aspect of the present invention, in the semiconductor device according to the second aspect, the conductive film has a multi-layered structure including a layer containing silicon at a predetermined thickness interval. The film quality is maintained, the dissolution of the conductive film can be reliably prevented, and the reliability of electrical connection between the upper and lower wiring layers via the conductive film is further improved.

According to a fourth aspect of the present invention, in the semiconductor device according to any one of the first to third aspects, since the conductive film is made of tungsten, electrical connection between the upper and lower wiring layers via the conductive film is established. Reliability is surely improved.

According to a fifth aspect of the invention, there is provided a method of manufacturing a semiconductor device, comprising: a first step of forming an insulating layer covering a lower wiring layer formed on a semiconductor substrate; and forming the lower wiring on the insulating layer. A second step of opening a connection hole reaching the layer, forming a conductive film on the entire surface of the insulating layer by filling the connection hole, removing the conductive film on the insulating layer, and removing the conductive film on the insulating layer. A fourth step of forming a layer containing silicon on the surface layer of the conductive film by a CVD method using a gas containing silicon, and a step of forming a layer containing silicon on the insulating layer. And a fifth step of forming an upper wiring layer made of a conductive material different from that of the conductive film so that the upper wiring layer is in contact with the conductive film. In etching residue removal process Dissolution of the conductive film can be easily prevented, reliability of the electrical connection of the upper and lower wiring layers through the conductive film is improved.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor device, a first step of forming an insulating layer covering the lower wiring layer formed on the semiconductor substrate is provided, and the lower wiring is formed on the insulating layer. A second step of opening a connection hole reaching the layer, forming a conductive film on the entire surface of the insulating layer by filling the connection hole, removing the conductive film on the insulating layer, and removing the conductive film on the insulating layer. A fourth step of forming silicon-containing layers by introducing silicon ions into a surface layer portion of the conductive film by an ion implantation method; and forming a silicon-containing layer on the insulating layer. A fifth step of forming an upper wiring layer made of a different conductive material so as to be in contact with the conductive film, so that even if a void is formed in the conductive film, etching with an organic alkaline solution during patterning of the upper wiring layer is performed. Residue removal process Dissolution of the conductive film can be easily prevented, reliability of the electrical connection of the upper and lower wiring layers through the conductive film is improved.

According to a seventh aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: a first step of forming an insulating layer covering a lower wiring layer formed on a semiconductor substrate; and forming the lower wiring on the insulating layer. A second step of opening a connection hole reaching the layer; and filling the connection hole with a conductive film over the entire surface of the insulating layer, containing silicon by a CVD method using a gas containing silicon. A third step of forming in a state;
A fourth step of removing the conductive film on the insulating layer and leaving the conductive film only in the connection hole, and contacting an upper wiring layer made of a conductive material different from the conductive film on the insulating layer with the conductive film Therefore, even if voids are generated in the conductive film, the conductive film can be easily and reliably prevented from being removed in the etching residue removing step using an organic alkaline solution during patterning of the upper wiring layer. In addition, the reliability of electrical connection between the upper and lower wiring layers via the conductive film is improved.

According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor device according to the seventh aspect, when the conductive film is formed in the third step, the amount of the gas containing silicon is reduced from 0 to a predetermined flow rate. Between at predetermined time intervals,
Since the conductive film is formed in a multilayer structure including silicon-containing layers at a predetermined thickness interval in the film, even if voids are generated in the conductive film, etching residues due to an organic alkaline solution during patterning of the upper wiring layer. Dissolution of the conductive film can be reliably prevented in the removing step, and the reliability of electrical connection between the upper and lower wiring layers via the conductive film is improved.

According to a ninth aspect of the present invention, in the method of manufacturing a semiconductor device, a first step of forming an insulating layer covering the lower wiring layer formed on the semiconductor substrate is provided, and the lower wiring layer is formed on the insulating layer. A second step of opening a connection hole that reaches
A third step of filling the connection hole to form a conductive film on the entire surface of the insulating layer, removing the conductive film on the insulating layer and leaving the conductive film only in the connection hole, A fourth step of forming a second conductive film of the same conductive material as the conductive film only on the conductive film by a selective CVD method, and forming an upper wiring layer made of a conductive material different from the conductive film on the insulating layer; A fifth conductive film formed to be in contact with the second conductive film;
Therefore, even if cavities are generated in the conductive film, the conductive film can be reliably closed by the second conductive film. Dissolution of the (second conductive film) can be reliably prevented, and the reliability of electrical connection between the upper and lower wiring layers via the conductive film is improved.

According to a tenth aspect of the present invention, in the method for manufacturing a semiconductor device according to any one of the fifth, seventh and eighth aspects, the conductive film is made of tungsten, and the gas containing silicon used for forming the conductive film is used. Is SiH ₄ , reliability of electrical connection between the upper and lower wiring layers via the conductive film is reliably improved.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a multilayer wiring structure according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing a method for forming a multilayer wiring structure according to the first embodiment of the present invention;

FIG. 3 is a sectional view showing a multilayer wiring structure according to a third embodiment of the present invention;

FIG. 4 is a sectional view showing a multilayer wiring structure according to a fourth embodiment of the present invention;

FIG. 5 is a sectional view showing a method for forming a multilayer wiring structure according to a fourth embodiment of the present invention.

FIG. 6 is a sectional view showing a multilayer wiring structure according to a fifth embodiment of the present invention.

FIG. 7 is a sectional view showing a method for forming a multilayer wiring structure according to a fifth embodiment of the present invention.

FIG. 8 is a cross-sectional view showing a conventional multilayer wiring structure.

FIG. 9 is a cross-sectional view showing a plug forming step in a conventional multilayer wiring structure.

FIG. 10 is a cross-sectional view showing an upper wiring layer forming step in a conventional multilayer wiring structure.

[Explanation of symbols]

Reference Signs List 1 semiconductor substrate, 3 lower wiring layer, 4 interlayer insulating film as insulating layer, 5 connection hole, 9 upper wiring layer, 12 tungsten film as conductive film, 12a silicon-rich layer as silicon-containing layer, 14 conductive film A silicon-containing tungsten film as a conductive film, a tungsten film as a conductive film, a silicon-rich layer as a silicon-containing layer, and a second tungsten film as a second conductive film.

Claims (10)

[Claims] 1. A semiconductor device having upper and lower wiring layers stacked on a semiconductor substrate via an insulating layer and connected to each other by a conductive film filled in a connection hole provided in the insulating layer. A semiconductor device, wherein a surface layer of a film is a layer containing silicon. 2. A semiconductor device having upper and lower wiring layers stacked on a semiconductor substrate via an insulating layer and connected to each other by a conductive film filled in a connection hole provided in the insulating layer. A semiconductor device, wherein the film contains silicon. 3. The semiconductor device according to claim 2, wherein the conductive film has a multilayer structure including a layer containing silicon in the film at a predetermined thickness interval. 4. The semiconductor device according to claim 1, wherein the conductive film is made of tungsten. 5. A first step of forming an insulating layer covering a lower wiring layer formed on a semiconductor substrate, and a second step of opening a connection hole reaching the lower wiring layer in the insulating layer.
A third step of filling the connection hole to form a conductive film on the entire surface of the insulating layer, removing the conductive film on the insulating layer and leaving the conductive film only in the connection hole; A fourth step of forming a layer containing silicon on the surface layer of the conductive film by the used CVD method, and contacting an upper wiring layer made of a conductive material different from the conductive film on the insulating layer with the conductive film. And a fifth step of forming the semiconductor device. 6. A first step of forming an insulating layer covering a lower wiring layer formed on a semiconductor substrate, and a second step of opening a connection hole reaching the lower wiring layer in the insulating layer.
A third step of filling the connection hole to form a conductive film on the entire surface of the insulating layer, removing the conductive film on the insulating layer and leaving the conductive film only in the connection hole; A fourth step of forming a layer containing silicon by introducing silicon ions into the portion by ion implantation, and contacting the upper wiring layer made of a conductive material different from the conductive film on the insulating layer with the conductive film. And a fifth step of forming the semiconductor device as described above. 7. A first step of forming an insulating layer covering a lower wiring layer formed on a semiconductor substrate, and a second step of opening a connection hole reaching the lower wiring layer in the insulating layer.
By filling the connection holes, a conductive film is formed on the entire surface of the insulating layer,
A third step in which silicon is contained by a CVD method using a gas containing silicon, and a fourth step in which the conductive film on the insulating layer is removed and left only in the connection hole. And a fifth step of forming an upper wiring layer made of a conductive material different from the conductive film on the insulating layer so as to be in contact with the conductive film. 8. A method for forming a conductive film in a third step, comprising:
The addition amount of the gas containing silicon is changed at a predetermined time interval between 0 and a predetermined flow rate, and the conductive film is formed into a multilayer structure including silicon-containing layers in the film at a predetermined thickness interval. 8. The method for manufacturing a semiconductor device according to claim 7, wherein: 9. A first step of forming an insulating layer covering a lower wiring layer formed on a semiconductor substrate, and a second step of opening a connection hole reaching the lower wiring layer in the insulating layer.
A third step of filling the connection hole to form a conductive film on the entire surface of the insulating layer, removing the conductive film on the insulating layer and leaving the conductive film only in the connection hole, A fourth step of forming a second conductive film of the same conductive material as the conductive film only on the conductive film by a selective CVD method, and forming an upper wiring layer made of a conductive material different from the conductive film on the insulating layer; A fifth conductive film formed to be in contact with the second conductive film;
And a method of manufacturing a semiconductor device. 10. The semiconductor device according to claim 5, wherein the conductive film is made of tungsten, and the gas containing silicon used for forming the conductive film is SiH _4. Method.