JP2002009006A - Diffusion silicon wafer and method of manufacturing the same - Google Patents

Abstract

(57) Abstract: When manufacturing a semiconductor device using a diffusion silicon wafer, generation of crystal defects caused by diffusion transition is prevented, and the yield of semiconductor device manufacturing is improved. SOLUTION: Impurities such as phosphorus and boron are diffused on the surface of a silicon wafer so that the sheet resistance of the diffusion surface of the diffusion silicon wafer is in a range of 0.085 to 0.115 Ω / □.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a diffusion silicon wafer suitable for manufacturing power MOS transistors and the like, and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, a diffusion silicon wafer having an impurity diffusion layer on the back surface of a wafer is used for a device such as a power MOS transistor. In the thermal diffusion of impurities into a silicon wafer for a device such as a power MOS transistor, it is necessary to perform high-concentration diffusion. Therefore, there has been a problem that crystal defects considered to be based on diffusion dislocations frequently occur. .

That is, it is known that diffusion dislocations occur in a silicon wafer in which impurities are diffused at a high concentration due to a change in the lattice constant of a crystal. It has been confirmed that this dislocation occurs at least in the diffusion of phosphorus atoms whose atomic radius difference with silicon is 5.98%.

[0004] By the way, even if it is determined that a silicon wafer has few defects immediately after diffusion into a silicon wafer, it is determined that the silicon wafer has a small number of defects. When the silicon wafer is subjected to a heat treatment such as oxidation to form the silicon oxide, the above-described diffusion transition grows and causes crystal defects.

When a device such as a power MOS transistor is manufactured by using a diffusion wafer, a semiconductor device obtained with a high defect density causes a defect such as a leak defect, thereby lowering a semiconductor device manufacturing yield. It is required to reduce the defect density to 300 / cm ² or less.

However, since a crystal defect occurs as described above in the process of forming a device on a silicon wafer, it is difficult to discriminate a non-defective product from a non-defective product at the stage of shipping a diffusion silicon wafer. There was a problem. Therefore, it has been desired to supply a diffused silicon wafer capable of predicting the growth of dislocation in a semiconductor device forming process and suppressing generation of crystal defects in a semiconductor device manufacturing process in a diffusion process.

[0007]

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems in a diffusion silicon wafer,
It is an object of the present invention to control the generation of crystal defects in a process of forming a semiconductor device using the diffusion silicon wafer by controlling a diffusion transition generated in a process of manufacturing the diffusion silicon wafer.

[0008]

According to the present invention, when a semiconductor device is manufactured using a diffusion silicon wafer, the sheet resistance value of the diffusion surface of the diffusion silicon wafer and the density of crystal defects generated in the semiconductor device manufacturing process. And found that the use of a diffusion silicon wafer manufactured by controlling the amount of diffusing impurities suppresses the growth of diffusion dislocations and reduces the occurrence of crystal defects. And improved the yield of device manufacturing.

That is, according to the first aspect of the present invention, in a diffusion wafer obtained by diffusing impurities into a silicon wafer, a sheet resistance of a diffusion surface is 0.085 to 0.115.
It is a diffusion silicon wafer characterized by Ω / □.

[0010] The invention according to claim 2 is characterized in that the impurity radius of the impurity diffused into the silicon wafer is an impurity having a difference of ± 5.98% or more with respect to the atomic radius of silicon. Wafer.

Further, according to the invention of claim 3, the sheet resistance of the diffusion surface of the silicon wafer after diffusion is 0.085 to 0.11.
Manufacturing a diffusion silicon wafer, comprising: a diffusion step of diffusing an impurity element in an amount of 5 Ω / □ from the front and back surfaces of the silicon wafer; and a step of polishing one surface of the silicon wafer subjected to the impurity diffusion. Is the way.

Further, according to the invention of claim 4, the sheet resistance of the diffusion surface of the silicon wafer after diffusion is 0.085 to 0.11.
A diffusion step of diffusing an impurity element in an amount of 5 Ω / □ from both the front and back surfaces of the silicon wafer, a step of dividing the silicon wafer subjected to the impurity diffusion into two at a center in a thickness direction, and cutting the obtained silicon wafer A method for manufacturing a diffusion silicon wafer, comprising a step of polishing a surface.

That is, in the present invention, when diffusing impurities into a silicon wafer, the amount of impurities is diffused so that the sheet resistance of the diffusion surface obtained after the diffusion has a value of 0.100 ± 0.015Ω / □. At this impurity concentration, many diffusion dislocations are generated in the diffusion layer of the silicon wafer. These diffusion dislocations form a lattice-like structure deeper than the boundary between the non-diffusion layer and the diffusion layer, and are generated by impurity diffusion. A diffusion wafer having a low defect density of 300 / cm ² or less for obtaining a specified yield in a device is obtained by relaxing stress and stopping the growth of dislocations in the non-diffusion layer due to heat treatment such as oxidation. This is what made it possible.

When the sheet resistance value of the diffusion surface of the silicon wafer is lower than the above range, a sufficient lattice-like structure is not formed. On the other hand, when the sheet resistance value is higher than the above range, dislocations are excessively generated. Dislocations grow in the diffusion layer, and crystal defects occur at high density.

If the difference between the atomic radius of the impurity element and the atomic radius of silicon does not fall within the above range, no transition having the function of preventing the generation of the crystal defects occurs, and the generation of the crystal defects is promoted. Will be.

[0016]

Embodiments of the present invention will be described below in detail.

The diffusion silicon wafer of the present invention forms a diffusion layer inside the back surface of the silicon wafer. As an impurity (dopant) element to be diffused, boron is used in the case of manufacturing a P-type semiconductor, and N-type is used. When a semiconductor is manufactured, phosphorus and antimony can be used. The ratio of these atoms to the atomic radius of silicon is 69.23% for boron, 94.02% for phosphorus, and 123.93% for antimony.

The optimum sheet resistance value on the diffusion surface of the diffusion silicon wafer of the present invention is 0.085 to 0.115 Ω /.
Although this is indicated by □, this sheet resistance value can be realized by controlling the amount of impurities to be diffused. The impurity amount Cx for obtaining the sheet resistance value in the above range varies depending on the type of the impurity and the thickness of the diffusion layer.
It is calculated according to the following equation.

(Equation 1) Note that the diffusion coefficient D in the above equation varies depending on the type of the impurity, and is as follows. Phosphorus: D = 10.5exp (-3.69ev / k
^t) cm 2 / sec antimony: D = 5.6exp (-3.95ev / k
t) cm ² / sec boron: D = 17.1 exp (−3.68 ev / k)
t) cm ² / sec Here, ev represents activation energy, and k represents absolute temperature.

As a method for thermally diffusing an impurity element into the surface of a silicon wafer, there are a gas phase diffusion method and a solid phase diffusion method. In the gas phase diffusion method, an impurity gas such as B ₂ H ₆ or AsH ₃ is circulated in a furnace in which a silicon wafer is placed, and the impurity gas is brought into contact with the silicon wafer to decompose the impurity gas on the silicon wafer surface. The impurity element generated as a result is thermally diffused to the surface of the silicon wafer. Also,
In the solid phase diffusion method, a gas such as BCl ₃ , POCl ₃ , AsCl ₃ and a carrier gas containing oxygen are brought into contact with the surface of a silicon wafer at a relatively low temperature to deposit an oxide of an impurity element on the surface of the silicon wafer. Then, impurities are diffused by heating to a higher temperature. In addition,
In the present invention, as these methods, a method usually used as a method for manufacturing a diffusion silicon wafer can be adopted.

Hereinafter, a method for manufacturing a diffusion silicon wafer according to the present invention will be described in detail with reference to the drawings. Figure 1
FIG. 4 is a schematic process diagram illustrating a method for manufacturing a diffusion silicon wafer. First, a silicon single crystal ingot manufactured by the CZ method or the MCZ method is cut, and its surface is mechanically polished to produce a wrapped silicon wafer (FIG. 1a). This is mounted on a wafer boat and loaded into a diffusion furnace capable of controlling the atmosphere in the furnace and heating at a high temperature. Next, an impurity gas containing an impurity element to be diffused is introduced and distributed together with a carrier gas into a diffusion furnace heated to a high temperature, the impurity gas is decomposed on the surface of the silicon wafer, and the impurity is deposited on the surface of the silicon wafer ( FIG. 1b). The impurities deposited on the surface gradually diffuse into the inside of the silicon wafer under high-temperature conditions. Therefore, the introduction of the impurity gas is stopped when a predetermined amount of the diffusion is completed. Next, this silicon wafer is heated to 1100 ° C.
By heating at the above temperature, the impurities diffuse into the silicon from both surfaces of the silicon wafer toward the inside to form a diffusion layer (FIG. 1c).

Since the diffusion silicon wafer has a structure in which only the back surface has a diffusion layer, it is necessary to remove the diffusion layer formed on the front surface. As this means, a method of grinding and polishing one surface of the diffusion silicon wafer to remove the diffusion layer (FIG. 1d), or a method of dividing the diffusion wafer into two at the center in the thickness direction of the silicon wafer and forming two diffusion silicon wafers (FIG. 1e).

In the above method, when diffusing boron as the compound gas of the impurity element, BCl ₃ , BB
r ₃ , B ₂ H _6, etc. are used. When phosphorus is diffused, POCl ₃ , PCl ₃ , PH ₃ or the like is used. When arsenic is diffused, AsCl ₃ , AsH ₃ or the like is used. Can be Further, as the carrier gas, any gas which is non-reactive with the compound gas of the impurity element can be used, but nitrogen gas is most preferable. In the present invention, as the impurity gas concentration, a concentration employed in the production of a normal diffusion silicon wafer can be used.

[0023]

EXAMPLES (Examples and Comparative Examples) A silicon wafer obtained by slicing and lapping an MCZ crystal was placed in a thermal diffusion furnace, and phosphorus chloride was used as an impurity gas, and nitrogen gas was used as a carrier gas. In use, seven deposited silicon wafers were fabricated with different amounts of phosphorous oxide deposited on the silicon wafer surface. Next, these deposited silicon wafers were subjected to an oxidizing heat treatment at 1100 ° C. for 5 hours and 10 minutes, and then the oxide film was removed with HF, light etching was performed, and crystal defects were observed and measured with an optical microscope. As shown in FIG. 3, the observation positions on the diffused silicon wafer are nine points in total, eight points 5 mm from the center of the silicon wafer and the edge of the silicon wafer. The results are shown in FIG.

As can be seen from FIG. 2, those having a high sheet resistance after the diffusion step have a high dislocation density and a low sheet resistance.
The defect density increases again around the vicinity of 00Ω / □. As can be seen from this graph, the sheet resistance for obtaining a diffusion wafer having a defect density of 300 / cm ² or less is 0.100.
It was found that the range of ± 0.015Ω / □ was optimal.

In the above embodiment, the result of evaluating a sample prepared by polishing the cut surface at the center in the process chart shown in FIG. 1 by dividing it into two is described. It is clear that the defect reduction effect can be obtained for the same sample.

[0026]

According to the present invention, by controlling the surface sheet resistance of a silicon wafer after a diffusion process to an optimum range, the defect density generated in the process of manufacturing a semiconductor device using the obtained diffusion silicon wafer can be reduced. It could be significantly reduced.

[Brief description of the drawings]

FIG. 1 is a schematic process diagram for manufacturing a diffusion silicon wafer.

FIG. 2 is a graph showing the relationship between sheet resistance and defect density after a phosphorus diffusion step.

FIG. 3 is a view showing a position for measuring a defect density on a silicon wafer.

[Explanation of symbols]

Claims (4)

[Claims] 1. A diffusion wafer obtained by diffusing impurities into a silicon wafer, wherein the sheet resistance of the diffusion surface is 0.085 to 0.115 Ω / □. 2. The diffusion wafer according to claim 1, wherein the atomic radius of the impurity diffused into the silicon wafer is an impurity having a difference of ± 5.98% or more with respect to the atomic radius of silicon. 3. A diffusion step of diffusing an impurity element from the front and back surfaces of the silicon wafer in an amount such that the sheet resistance of the diffusion surface of the silicon wafer after diffusion becomes 0.085 to 0.115 Ω / □, and performing the impurity diffusion. Polishing the one surface of the silicon wafer which has been manufactured. 4. A diffusion step of diffusing an impurity element from the front and back surfaces of the silicon wafer in an amount such that the sheet resistance of the diffusion surface of the silicon wafer after diffusion becomes 0.085 to 0.115 Ω / □. A method for manufacturing a diffusion wafer, comprising: a step of dividing the performed silicon wafer into two parts at a center in a thickness direction thereof; and a step of polishing a cut surface of the obtained silicon wafer.